Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-05-06 14:25:54 +03:00
Code Issues Actions 3 Packages Projects Releases Wiki Activity

cpu/jaguar/*.cpp : Updates

Browse Source 
Add notes, Reduce defines, Simplify handlers, Use shorter / correct type values, Reduce unnecessary lines, Remove register_postload
jaguar.cpp : Fix metadata, Correct XTAL frequency
This commit is contained in:
cam900 2019-06-02 16:52:20 +09:00
parent 6deb0d35e3
commit 77f9bccb44
8 changed files with 500 additions and 474 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
src/devices/cpu/jaguar/jagdasm.cpp
View File

@ -2,7 +2,7 @@
// copyright-holders:Aaron Giles // copyright-holders:Aaron Giles
/*************************************************************************** /***************************************************************************
jagdasm.c jagdasm.cpp
Disassembler for the portable Jaguar DSP emulator. Disassembler for the portable Jaguar DSP emulator.
Written by Aaron Giles Written by Aaron Giles
@ -15,7 +15,7 @@
STATIC VARIABLES STATIC VARIABLES
***************************************************************************/ ***************************************************************************/
const uint8_t jaguar_disassembler::convert_zero[32] = const u8 jaguar_disassembler::convert_zero[32] =
{ 32,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 }; { 32,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 };
const char *const jaguar_disassembler::condition[32] = const char *const jaguar_disassembler::condition[32] =
@ -71,10 +71,10 @@ std::string jaguar_disassembler::signed_16bit(int16_t val)
offs_t jaguar_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) offs_t jaguar_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{ {
uint32_t flags = 0; u32 flags = 0;
int op = opcodes.r16(pc); const u16 op = opcodes.r16(pc);
int reg1 = (op >> 5) & 31; const u8 reg1 = (op >> 5) & 31;
int reg2 = op & 31; const u8 reg2 = op & 31;
int size = 2; int size = 2;
pc += 2; pc += 2;
@ -150,7 +150,7 @@ offs_t jaguar_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
case 50: util::stream_format(stream, "store r%d,(r15+$%x)", reg2, convert_zero[reg1]*4);break; case 50: util::stream_format(stream, "store r%d,(r15+$%x)", reg2, convert_zero[reg1]*4);break;
case 51: util::stream_format(stream, "move pc,r%d", reg2); break; case 51: util::stream_format(stream, "move pc,r%d", reg2); break;
case 52: util::stream_format(stream, "jump %s(r%d)", condition[reg2], reg1); break; case 52: util::stream_format(stream, "jump %s(r%d)", condition[reg2], reg1); break;
case 53: util::stream_format(stream, "jr %s%08X", condition[reg2], pc + ((int8_t)(reg1 << 3) >> 2)); break; case 53: util::stream_format(stream, "jr %s%08X", condition[reg2], pc + ((s8)(reg1 << 3) >> 2)); break;
case 54: util::stream_format(stream, "mmult r%d,r%d", reg1, reg2); break; case 54: util::stream_format(stream, "mmult r%d,r%d", reg1, reg2); break;
case 55: util::stream_format(stream, "mtoi r%d,r%d", reg1, reg2); break; case 55: util::stream_format(stream, "mtoi r%d,r%d", reg1, reg2); break;
case 56: util::stream_format(stream, "normi r%d,r%d", reg1, reg2); break; case 56: util::stream_format(stream, "normi r%d,r%d", reg1, reg2); break;
@ -180,7 +180,7 @@ jaguar_disassembler::jaguar_disassembler(variant var) : m_variant(var)
{ {
} }
uint32_t jaguar_disassembler::opcode_alignment() const u32 jaguar_disassembler::opcode_alignment() const
{ {
return 2; return 2;
} }

2
src/devices/cpu/jaguar/jagdasm.h
View File

@ -29,7 +29,7 @@ public:
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override; virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private: private:
static const uint8_t convert_zero[32]; static const u8 convert_zero[32];
static const char *const condition[32]; static const char *const condition[32];
const variant m_variant; const variant m_variant;

703
src/devices/cpu/jaguar/jaguar.cpp
View File

File diff suppressed because it is too large Load Diff

221
src/devices/cpu/jaguar/jaguar.h
View File

@ -90,20 +90,21 @@ public:
// configuration helpers // configuration helpers
auto irq() { return m_cpu_interrupt.bind(); } auto irq() { return m_cpu_interrupt.bind(); }
virtual DECLARE_WRITE32_MEMBER(ctrl_w) = 0; virtual void ctrl_w(offs_t offset, u32 data, u32 mem_mask = ~0) = 0;
virtual DECLARE_READ32_MEMBER(ctrl_r) = 0; virtual u32 ctrl_r(offs_t offset) = 0;
protected: protected:
jaguar_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, bool isdsp); jaguar_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 version, bool isdsp);
// device-level overrides // device-level overrides
virtual void device_start() override; virtual void device_start() override;
virtual void device_reset() override; virtual void device_reset() override;
virtual void device_post_load() override;
// device_execute_interface overrides // device_execute_interface overrides
virtual uint32_t execute_min_cycles() const override { return 1; } virtual u32 execute_min_cycles() const override { return 1; }
virtual uint32_t execute_max_cycles() const override { return 1; } virtual u32 execute_max_cycles() const override { return 1; }
virtual uint32_t execute_input_lines() const override { return 5; } virtual u32 execute_input_lines() const override { return 5; }
virtual void execute_set_input(int inputnum, int state) override; virtual void execute_set_input(int inputnum, int state) override;
// device_memory_interface overrides // device_memory_interface overrides
@ -112,20 +113,45 @@ protected:
// device_state_interface overrides // device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// defines
inline void CLR_Z();
inline void CLR_ZN();
inline void CLR_ZNC();
inline void SET_Z(u32 r);
inline void SET_C_ADD(u32 a, u32 b);
inline void SET_C_SUB(u32 a, u32 b);
inline void SET_N(u32 r);
inline void SET_ZN(u32 r);
inline void SET_ZNC_ADD(u32 a, u32 b, u32 r);
inline void SET_ZNC_SUB(u32 a, u32 b, u32 r);
inline u8 CONDITION(u8 x);
inline u8 READBYTE(offs_t a);
inline u16 READWORD(offs_t a);
inline u32 READLONG(offs_t a);
inline void WRITEBYTE(offs_t a, u8 v);
inline void WRITEWORD(offs_t a, u16 v);
inline void WRITELONG(offs_t a, u32 v);
inline u16 ROPCODE(offs_t pc);
address_space_config m_program_config; address_space_config m_program_config;
/* core registers */ /* core registers */
uint32_t m_r[32]; u32 m_r[32];
uint32_t m_a[32]; u32 m_a[32];
uint32_t * m_b0; u32 * m_b0;
uint32_t * m_b1; u32 * m_b1;
/* control registers */ /* control registers */
uint32_t m_ctrl[G_CTRLMAX]; u32 m_ctrl[G_CTRLMAX];
uint32_t m_ppc; u32 m_ppc;
uint64_t m_accum; u64 m_accum;
/* internal stuff */ /* internal stuff */
u8 m_version;
bool m_isdsp; bool m_isdsp;
int m_icount; int m_icount;
int m_bankswitch_icount; int m_bankswitch_icount;
@ -133,96 +159,95 @@ protected:
address_space *m_program; address_space *m_program;
memory_access_cache<2, 0, ENDIANNESS_BIG> *m_cache; memory_access_cache<2, 0, ENDIANNESS_BIG> *m_cache;
uint32_t m_internal_ram_start; u32 m_internal_ram_start;
uint32_t m_internal_ram_end; u32 m_internal_ram_end;
typedef void (jaguar_cpu_device::*op_func)(uint16_t op); typedef void (jaguar_cpu_device::*op_func)(u16 op);
static const op_func gpu_op_table[64]; static const op_func gpu_op_table[64];
static const op_func dsp_op_table[64]; static const op_func dsp_op_table[64];
static const uint32_t convert_zero[32]; static const u32 convert_zero[32];
bool m_tables_referenced; bool m_tables_referenced;
uint32_t table_refcount; u32 table_refcount;
std::unique_ptr<uint16_t[]> mirror_table; std::unique_ptr<u16[]> mirror_table;
std::unique_ptr<uint8_t[]> condition_table; std::unique_ptr<u8[]> condition_table;
const op_func *m_table; const op_func *m_table;
void abs_rn(uint16_t op); void abs_rn(u16 op);
void add_rn_rn(uint16_t op); void add_rn_rn(u16 op);
void addc_rn_rn(uint16_t op); void addc_rn_rn(u16 op);
void addq_n_rn(uint16_t op); void addq_n_rn(u16 op);
void addqmod_n_rn(uint16_t op); /* DSP only */ void addqmod_n_rn(u16 op); /* DSP only */
void addqt_n_rn(uint16_t op); void addqt_n_rn(u16 op);
void and_rn_rn(uint16_t op); void and_rn_rn(u16 op);
void bclr_n_rn(uint16_t op); void bclr_n_rn(u16 op);
void bset_n_rn(uint16_t op); void bset_n_rn(u16 op);
void btst_n_rn(uint16_t op); void btst_n_rn(u16 op);
void cmp_rn_rn(uint16_t op); void cmp_rn_rn(u16 op);
void cmpq_n_rn(uint16_t op); void cmpq_n_rn(u16 op);
void div_rn_rn(uint16_t op); void div_rn_rn(u16 op);
void illegal(uint16_t op); void illegal(u16 op);
void imacn_rn_rn(uint16_t op); void imacn_rn_rn(u16 op);
void imult_rn_rn(uint16_t op); void imult_rn_rn(u16 op);
void imultn_rn_rn(uint16_t op); void imultn_rn_rn(u16 op);
void jr_cc_n(uint16_t op); void jr_cc_n(u16 op);
void jump_cc_rn(uint16_t op); void jump_cc_rn(u16 op);
void load_rn_rn(uint16_t op); void load_rn_rn(u16 op);
void load_r14n_rn(uint16_t op); void load_r14n_rn(u16 op);
void load_r15n_rn(uint16_t op); void load_r15n_rn(u16 op);
void load_r14rn_rn(uint16_t op); void load_r14rn_rn(u16 op);
void load_r15rn_rn(uint16_t op); void load_r15rn_rn(u16 op);
void loadb_rn_rn(uint16_t op); void loadb_rn_rn(u16 op);
void loadw_rn_rn(uint16_t op); void loadw_rn_rn(u16 op);
void loadp_rn_rn(uint16_t op); /* GPU only */ void loadp_rn_rn(u16 op); /* GPU only */
void mirror_rn(uint16_t op); /* DSP only */ void mirror_rn(u16 op); /* DSP only */
void mmult_rn_rn(uint16_t op); void mmult_rn_rn(u16 op);
void move_rn_rn(uint16_t op); void move_rn_rn(u16 op);
void move_pc_rn(uint16_t op); void move_pc_rn(u16 op);
void movefa_rn_rn(uint16_t op); void movefa_rn_rn(u16 op);
void movei_n_rn(uint16_t op); void movei_n_rn(u16 op);
void moveq_n_rn(uint16_t op); void moveq_n_rn(u16 op);
void moveta_rn_rn(uint16_t op); void moveta_rn_rn(u16 op);
void mtoi_rn_rn(uint16_t op); void mtoi_rn_rn(u16 op);
void mult_rn_rn(uint16_t op); void mult_rn_rn(u16 op);
void neg_rn(uint16_t op); void neg_rn(u16 op);
void nop(uint16_t op); void nop(u16 op);
void normi_rn_rn(uint16_t op); void normi_rn_rn(u16 op);
void not_rn(uint16_t op); void not_rn(u16 op);
void or_rn_rn(uint16_t op); void or_rn_rn(u16 op);
void pack_rn(uint16_t op); /* GPU only */ void pack_rn(u16 op); /* GPU only */
void resmac_rn(uint16_t op); void resmac_rn(u16 op);
void ror_rn_rn(uint16_t op); void ror_rn_rn(u16 op);
void rorq_n_rn(uint16_t op); void rorq_n_rn(u16 op);
void sat8_rn(uint16_t op); /* GPU only */ void sat8_rn(u16 op); /* GPU only */
void sat16_rn(uint16_t op); /* GPU only */ void sat16_rn(u16 op); /* GPU only */
void sat16s_rn(uint16_t op); /* DSP only */ void sat16s_rn(u16 op); /* DSP only */
void sat24_rn(uint16_t op); /* GPU only */ void sat24_rn(u16 op); /* GPU only */
void sat32s_rn(uint16_t op); /* DSP only */ void sat32s_rn(u16 op); /* DSP only */
void sh_rn_rn(uint16_t op); void sh_rn_rn(u16 op);
void sha_rn_rn(uint16_t op); void sha_rn_rn(u16 op);
void sharq_n_rn(uint16_t op); void sharq_n_rn(u16 op);
void shlq_n_rn(uint16_t op); void shlq_n_rn(u16 op);
void shrq_n_rn(uint16_t op); void shrq_n_rn(u16 op);
void store_rn_rn(uint16_t op); void store_rn_rn(u16 op);
void store_rn_r14n(uint16_t op); void store_rn_r14n(u16 op);
void store_rn_r15n(uint16_t op); void store_rn_r15n(u16 op);
void store_rn_r14rn(uint16_t op); void store_rn_r14rn(u16 op);
void store_rn_r15rn(uint16_t op); void store_rn_r15rn(u16 op);
void storeb_rn_rn(uint16_t op); void storeb_rn_rn(u16 op);
void storew_rn_rn(uint16_t op); void storew_rn_rn(u16 op);
void storep_rn_rn(uint16_t op); /* GPU only */ void storep_rn_rn(u16 op); /* GPU only */
void sub_rn_rn(uint16_t op); void sub_rn_rn(u16 op);
void subc_rn_rn(uint16_t op); void subc_rn_rn(u16 op);
void subq_n_rn(uint16_t op); void subq_n_rn(u16 op);
void subqmod_n_rn(uint16_t op); /* DSP only */ void subqmod_n_rn(u16 op); /* DSP only */
void subqt_n_rn(uint16_t op); void subqt_n_rn(u16 op);
void xor_rn_rn(uint16_t op); void xor_rn_rn(u16 op);
void update_register_banks(); void update_register_banks();
void check_irqs(); void check_irqs();
void init_tables(); void init_tables();
void jaguar_postload();
}; };
@ -230,10 +255,10 @@ class jaguargpu_cpu_device : public jaguar_cpu_device
{ {
public: public:
// construction/destruction // construction/destruction
jaguargpu_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); jaguargpu_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
DECLARE_WRITE32_MEMBER(ctrl_w) override; void ctrl_w(offs_t offset, u32 data, u32 mem_mask = ~0) override;
DECLARE_READ32_MEMBER(ctrl_r) override; u32 ctrl_r(offs_t offset) override;
protected: protected:
virtual void execute_run() override; virtual void execute_run() override;
@ -245,13 +270,13 @@ class jaguardsp_cpu_device : public jaguar_cpu_device
{ {
public: public:
// construction/destruction // construction/destruction
jaguardsp_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); jaguardsp_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
DECLARE_WRITE32_MEMBER(ctrl_w) override; void ctrl_w(offs_t offset, u32 data, u32 mem_mask = ~0) override;
DECLARE_READ32_MEMBER(ctrl_r) override; u32 ctrl_r(offs_t offset) override;
protected: protected:
virtual uint32_t execute_input_lines() const override { return 6; } virtual u32 execute_input_lines() const override { return 6; }
virtual void execute_run() override; virtual void execute_run() override;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;

4
src/emu/xtal.cpp
View File

@ -297,13 +297,13 @@ const double XTAL::known_xtals[] = {
25'398'360, /* 25.39836_MHz_XTAL Tandberg TDV 2324 */ 25'398'360, /* 25.39836_MHz_XTAL Tandberg TDV 2324 */
25'400'000, /* 25.4_MHz_XTAL PC9801-86 PCM base clock */ 25'400'000, /* 25.4_MHz_XTAL PC9801-86 PCM base clock */
25'447'000, /* 25.447_MHz_XTAL Namco EVA3A (Funcube2) */ 25'447'000, /* 25.447_MHz_XTAL Namco EVA3A (Funcube2) */
25'590'906, /* 25.590906_MHz_XTAL Atari Jaguar NTSC */
25'593'900, /* 25.5939_MHz_XTAL Atari Jaguar PAL */
25'771'500, /* 25.7715_MHz_XTAL HP-2622A */ 25'771'500, /* 25.7715_MHz_XTAL HP-2622A */
25'920'000, /* 25.92_MHz_XTAL ADDS Viewpoint 60 */ 25'920'000, /* 25.92_MHz_XTAL ADDS Viewpoint 60 */
26'000'000, /* 26_MHz_XTAL Gaelco PCBs */ 26'000'000, /* 26_MHz_XTAL Gaelco PCBs */
26'366'000, /* 26.366_MHz_XTAL DEC VT320 */ 26'366'000, /* 26.366_MHz_XTAL DEC VT320 */
26'580'000, /* 26.58_MHz_XTAL Wyse WY-60 80-column display clock */ 26'580'000, /* 26.58_MHz_XTAL Wyse WY-60 80-column display clock */
26'590'906, /* 26.590906_MHz_XTAL Atari Jaguar NTSC */
26'593'900, /* 26.5939_MHz_XTAL Atari Jaguar PAL */
26'601'712, /* 26.601712_MHz_XTAL Astro Corp.'s Show Hand, PAL Vtech/Yeno Socrates (6x PAL subcarrier) */ 26'601'712, /* 26.601712_MHz_XTAL Astro Corp.'s Show Hand, PAL Vtech/Yeno Socrates (6x PAL subcarrier) */
26'666'000, /* 26.666_MHz_XTAL Imagetek I4100/I4220/I4300 */ 26'666'000, /* 26.666_MHz_XTAL Imagetek I4100/I4220/I4300 */
26'666'666, /* 26.666666_MHz_XTAL Irem M92 but most use 27MHz */ 26'666'666, /* 26.666666_MHz_XTAL Irem M92 but most use 27MHz */

2
src/mame/audio/jaguar.cpp
View File

@ -261,7 +261,7 @@ WRITE16_MEMBER( jaguar_state::jerry_regs_w )
WRITE32_MEMBER( jaguar_state::dsp_flags_w ) WRITE32_MEMBER( jaguar_state::dsp_flags_w )
{ {
/* write the data through */ /* write the data through */
m_dsp->ctrl_w(space, offset, data, mem_mask); m_dsp->ctrl_w(offset, data, mem_mask);
/* if they were clearing the A2S interrupt, see if we are headed for the spin */ /* if they were clearing the A2S interrupt, see if we are headed for the spin */
/* loop with R22 != 0; if we are, just start spinning again */ /* loop with R22 != 0; if we are, just start spinning again */

22
src/mame/drivers/jaguar.cpp
View File

@ -461,8 +461,8 @@ void jaguar_state::machine_reset()
dsp_resume(); dsp_resume();
/* halt the CPUs */ /* halt the CPUs */
m_gpu->ctrl_w(m_gpu->space(AS_PROGRAM), G_CTRL, 0, 0xffffffff); m_gpu->ctrl_w(G_CTRL, 0);
m_dsp->ctrl_w(m_dsp->space(AS_PROGRAM), D_CTRL, 0, 0xffffffff); m_dsp->ctrl_w(D_CTRL, 0);
/* set blitter idle flag */ /* set blitter idle flag */
m_blitter_status = 1; m_blitter_status = 1;
@ -631,8 +631,8 @@ WRITE32_MEMBER(jaguar_state::misc_control_w)
dsp_resume(); dsp_resume();
/* halt the CPUs */ /* halt the CPUs */
m_gpu->ctrl_w(space, G_CTRL, 0, 0xffffffff); m_gpu->ctrl_w(G_CTRL, 0);
m_dsp->ctrl_w(space, D_CTRL, 0, 0xffffffff); m_dsp->ctrl_w(D_CTRL, 0);
} }
/* adjust banking */ /* adjust banking */
@ -654,13 +654,13 @@ WRITE32_MEMBER(jaguar_state::misc_control_w)
READ32_MEMBER(jaguar_state::gpuctrl_r) READ32_MEMBER(jaguar_state::gpuctrl_r)
{ {
return m_gpu->ctrl_r(space, offset); return m_gpu->ctrl_r(offset);
} }
WRITE32_MEMBER(jaguar_state::gpuctrl_w) WRITE32_MEMBER(jaguar_state::gpuctrl_w)
{ {
m_gpu->ctrl_w(space, offset, data, mem_mask); m_gpu->ctrl_w(offset, data, mem_mask);
} }
@ -673,13 +673,13 @@ WRITE32_MEMBER(jaguar_state::gpuctrl_w)
READ32_MEMBER(jaguar_state::dspctrl_r) READ32_MEMBER(jaguar_state::dspctrl_r)
{ {
return m_dsp->ctrl_r(space, offset); return m_dsp->ctrl_r(offset);
} }
WRITE32_MEMBER(jaguar_state::dspctrl_w) WRITE32_MEMBER(jaguar_state::dspctrl_w)
{ {
m_dsp->ctrl_w(space, offset, data, mem_mask); m_dsp->ctrl_w(offset, data, mem_mask);
} }
@ -1886,7 +1886,7 @@ void jaguar_state::cojag68k(machine_config &config)
void jaguar_state::jaguar(machine_config &config) void jaguar_state::jaguar(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
M68000(config, m_maincpu, JAGUAR_CLOCK/2); M68000(config, m_maincpu, JAGUAR_CLOCK/2); // MC68000FN12F 16 MHz
m_maincpu->set_addrmap(AS_PROGRAM, &jaguar_state::jaguar_map); m_maincpu->set_addrmap(AS_PROGRAM, &jaguar_state::jaguar_map);
m_maincpu->set_addrmap(m68000_device::AS_CPU_SPACE, &jaguar_state::cpu_space_map); m_maincpu->set_addrmap(m68000_device::AS_CPU_SPACE, &jaguar_state::cpu_space_map);
@ -2740,8 +2740,8 @@ void jaguar_state::init_vcircle()
*************************************/ *************************************/
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME */ /* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME */
CONS( 1993, jaguar, 0, 0, jaguar, jaguar, jaguar_state, init_jaguar, "Atari", "Jaguar", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) CONS( 1993, jaguar, 0, 0, jaguar, jaguar, jaguar_state, init_jaguar, "Atari", "Jaguar (NTSC)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
CONS( 1995, jaguarcd, jaguar, 0, jaguarcd, jaguar, jaguar_state, init_jaguarcd, "Atari", "Jaguar CD", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) CONS( 1995, jaguarcd, jaguar, 0, jaguarcd, jaguar, jaguar_state, init_jaguarcd, "Atari", "Jaguar CD (NTSC)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
/* YEAR NAME PARENT MACHINE INPUT CLASS INIT ROT COMPANY FULLNAME */ /* YEAR NAME PARENT MACHINE INPUT CLASS INIT ROT COMPANY FULLNAME */
GAME( 1996, area51, 0, cojagr3k, area51, jaguar_state, init_area51, ROT0, "Atari Games", "Area 51 (R3000)", 0 ) GAME( 1996, area51, 0, cojagr3k, area51, jaguar_state, init_area51, ROT0, "Atari Games", "Area 51 (R3000)", 0 )

4
src/mame/includes/jaguar.h
View File

@ -23,8 +23,8 @@
/* CoJag and Jaguar have completely different XTALs, pixel clock in Jaguar is the same as the GPU one */ /* CoJag and Jaguar have completely different XTALs, pixel clock in Jaguar is the same as the GPU one */
#define COJAG_PIXEL_CLOCK XTAL(14'318'181) #define COJAG_PIXEL_CLOCK XTAL(14'318'181)
#define JAGUAR_CLOCK XTAL(25'590'906) // NTSC #define JAGUAR_CLOCK XTAL(26'590'906) // NTSC
// XTAL(25'593'900) PAL, TODO // XTAL(26'593'900) PAL, TODO
class jaguar_state : public driver_device class jaguar_state : public driver_device
{ {