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Updated intelfsh.c in order to support AMD 29F080 chip [Sandro Ronco]
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@ -47,6 +47,7 @@ enum
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// device type definition
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const device_type INTEL_28F016S5 = &device_creator<intel_28f016s5_device>;
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const device_type SHARP_LH28F016S = &device_creator<sharp_lh28f016s_device>;
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const device_type AMD_29F080 = &device_creator<amd_29f080_device>;
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const device_type FUJITSU_29F016A = &device_creator<fujitsu_29f016a_device>;
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const device_type FUJITSU_29DL16X = &device_creator<fujitsu_29dl16x_device>;
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const device_type INTEL_E28F400 = &device_creator<intel_e28f400_device>;
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@ -127,6 +128,13 @@ intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type
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m_device_id = 0xaa;
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map = ADDRESS_MAP_NAME( memory_map8_16Mb );
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break;
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case FLASH_AMD_29F080:
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m_bits = 8;
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m_size = 0x100000;
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m_maker_id = 0x01;
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m_device_id = 0xd5;
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map = ADDRESS_MAP_NAME( memory_map8_8Mb );
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break;
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case FLASH_SHARP_LH28F400:
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case FLASH_INTEL_E28F400:
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m_bits = 16;
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@ -222,6 +230,9 @@ fujitsu_29dl16x_device::fujitsu_29dl16x_device(const machine_config &mconfig, co
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sharp_lh28f016s_device::sharp_lh28f016s_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: intelfsh8_device(mconfig, SHARP_LH28F016S, "Sharp LH28F016S Flash", tag, owner, clock, FLASH_SHARP_LH28F016S) { }
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amd_29f080_device::amd_29f080_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: intelfsh8_device(mconfig, AMD_29F080, "AMD 29F080 Flash", tag, owner, clock, FLASH_AMD_29F080) { }
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intel_e28f008sa_device::intel_e28f008sa_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: intelfsh8_device(mconfig, INTEL_E28F008SA, "Intel E28F008SA Flash", tag, owner, clock, FLASH_INTEL_E28F008SA) { }
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@ -532,6 +543,10 @@ void intelfsh_device::write_full(UINT32 address, UINT32 data)
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{
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m_flash_mode = FM_READAMDID2;
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}
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else if( ( address & 0x7ff ) == 0x2aa && ( data & 0xff ) == 0x55 && m_type == FLASH_AMD_29F080 )
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{
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m_flash_mode = FM_READAMDID2;
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}
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else
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{
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logerror( "unexpected %08x=%02x in FM_READAMDID1\n", address, data & 0xff );
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@ -591,6 +606,24 @@ void intelfsh_device::write_full(UINT32 address, UINT32 data)
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{
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m_flash_mode = FM_BANKSELECT;
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}
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// for AMD 29F080 address bits A11-A19 don't care
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else if(( address & 0x7ff ) == 0x555 && ( data & 0xff ) == 0x80 && m_type == FLASH_AMD_29F080 )
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{
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m_flash_mode = FM_ERASEAMD1;
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}
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else if(( address & 0x7ff ) == 0x555 && ( data & 0xff ) == 0x90 && m_type == FLASH_AMD_29F080 )
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{
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m_flash_mode = FM_READAMDID3;
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}
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else if(( address & 0x7ff ) == 0x555 && ( data & 0xff ) == 0xa0 && m_type == FLASH_AMD_29F080 )
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{
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m_flash_mode = FM_BYTEPROGRAM;
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}
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else if(( address & 0x7ff ) == 0x555 && ( data & 0xff ) == 0xf0 && m_type == FLASH_AMD_29F080 )
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{
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m_flash_mode = FM_NORMAL;
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}
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else
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{
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logerror( "unexpected %08x=%02x in FM_READAMDID2\n", address, data & 0xff );
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@ -16,6 +16,9 @@
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#define MCFG_SHARP_LH28F016S_ADD(_tag) \
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MCFG_DEVICE_ADD(_tag, SHARP_LH28F016S, 0)
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#define MCFG_AMD_29F080_ADD(_tag) \
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MCFG_DEVICE_ADD(_tag, AMD_29F080, 0)
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#define MCFG_FUJITSU_29F016A_ADD(_tag) \
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MCFG_DEVICE_ADD(_tag, FUJITSU_29F016A, 0)
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@ -68,6 +71,7 @@ public:
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FLASH_INTEL_28F016S5 = 0x0800,
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FLASH_FUJITSU_29F016A,
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FLASH_FUJITSU_29DL16X,
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FLASH_AMD_29F080,
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FLASH_SHARP_LH28F016S,
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FLASH_INTEL_E28F008SA,
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FLASH_MACRONIX_29L001MC,
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@ -178,6 +182,12 @@ public:
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fujitsu_29dl16x_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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};
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class amd_29f080_device : public intelfsh8_device
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{
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public:
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amd_29f080_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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};
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class sharp_lh28f016s_device : public intelfsh8_device
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{
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public:
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@ -239,6 +249,7 @@ public:
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// device type definition
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extern const device_type INTEL_28F016S5;
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extern const device_type SHARP_LH28F016S;
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extern const device_type AMD_29F080;
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extern const device_type FUJITSU_29F016A;
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extern const device_type FUJITSU_29DL16X;
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extern const device_type INTEL_E28F400;
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