Converted a number of vector opcodes to the RSP DRC core. [Harmony]

Unrolled and optimized a number of vector opcodes in the interpreter RSP core. [Harmony]
This commit is contained in:
Ryan Holtz 2009-12-28 16:50:06 +00:00
parent 49c68fef35
commit 7858c436fc
2 changed files with 5229 additions and 1384 deletions

View File

@ -1,11 +1,11 @@
/*************************************************************************** /***************************************************************************
mips3.h rsp.h
Interface file for the universal machine language-based Interface file for the universal machine language-based
Reality Signal Processor (RSP) emulator. Reality Signal Processor (RSP) emulator.
Copyright the MESS etam Copyright the MESS team
Released for general non-commercial use under the MAME license Released for general non-commercial use under the MAME license
Visit http://mamedev.org for licensing and usage restrictions. Visit http://mamedev.org for licensing and usage restrictions.
@ -113,10 +113,10 @@ void rspdrc_add_dmem(const device_config *device, void *base);
#define FSREG ((op >> 11) & 31) #define FSREG ((op >> 11) & 31)
#define FDREG ((op >> 6) & 31) #define FDREG ((op >> 6) & 31)
#define IS_SINGLE(o) (((o) & (1 << 21)) == 0) #define IS_SINGLE(o) (((o) & (1 << 21)) == 0)
#define IS_DOUBLE(o) (((o) & (1 << 21)) != 0) #define IS_DOUBLE(o) (((o) & (1 << 21)) != 0)
#define IS_FLOAT(o) (((o) & (1 << 23)) == 0) #define IS_FLOAT(o) (((o) & (1 << 23)) == 0)
#define IS_INTEGRAL(o) (((o) & (1 << 23)) != 0) #define IS_INTEGRAL(o) (((o) & (1 << 23)) != 0)
#define SIMMVAL ((INT16)op) #define SIMMVAL ((INT16)op)
#define UIMMVAL ((UINT16)op) #define UIMMVAL ((UINT16)op)
@ -164,6 +164,11 @@ typedef struct
INT16 mid; INT16 mid;
INT16 high; INT16 high;
} h; } h;
struct
{
INT32 zl;
INT32 mh;
} w;
#else #else
struct struct
{ {
@ -172,6 +177,11 @@ typedef struct
INT16 low; INT16 low;
INT16 z; INT16 z;
} h; } h;
struct
{
INT32 mh;
INT32 zl;
} w;
#endif #endif
}; };
} ACCUMULATOR; } ACCUMULATOR;

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