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https://github.com/holub/mame
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converted psx cpu core to c++
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@ -1,11 +1,36 @@
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/***************************************************************************
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psx.h
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Sony PlayStation CPU emulator.
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***************************************************************************/
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#pragma once
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#pragma once
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#ifndef __PSX_H__
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#ifndef __PSXCPU_H__
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#define __PSX_H__
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#define __PSXCPU_H__
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#define PSXCPU_DELAYR_PC ( 32 )
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//**************************************************************************
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#define PSXCPU_DELAYR_NOTPC ( 33 )
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// CONSTANTS
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//**************************************************************************
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// cache
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#define ICACHE_ENTRIES ( 0x400 )
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#define DCACHE_ENTRIES ( 0x100 )
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// interrupts
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#define PSXCPU_IRQ0 ( 0 )
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#define PSXCPU_IRQ1 ( 1 )
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#define PSXCPU_IRQ2 ( 2 )
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#define PSXCPU_IRQ3 ( 3 )
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#define PSXCPU_IRQ4 ( 4 )
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#define PSXCPU_IRQ5 ( 5 )
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// register enumeration
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enum
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enum
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{
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{
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@ -71,12 +96,223 @@ enum
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PSXCPU_CP2CR30, PSXCPU_CP2CR31
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PSXCPU_CP2CR30, PSXCPU_CP2CR31
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};
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};
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#define PSXCPU_IRQ0 ( 0 )
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extern const device_type PSXCPU;
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#define PSXCPU_IRQ1 ( 1 )
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#define PSXCPU_IRQ2 ( 2 )
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#define PSXCPU_IRQ3 ( 3 )
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//**************************************************************************
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#define PSXCPU_IRQ4 ( 4 )
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// INTERFACE CONFIGURATION MACROS
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#define PSXCPU_IRQ5 ( 5 )
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//**************************************************************************
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//#define MCFG_PSXCPU_CONFIG(_config)
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// psxcpu_device_config::static_set_config(device, _config);
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//**************************************************************************
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// GLOBAL VARIABLES
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//**************************************************************************
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// device type definition
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extern const device_type PSXCPU;
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extern const device_type CXD8661R;
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//**************************************************************************
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// TYPE DEFINITIONS
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//**************************************************************************
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class psxcpu_device;
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// ======================> psxcpu_device_config
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class psxcpu_device_config : public cpu_device_config
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{
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friend class psxcpu_device;
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public:
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// allocators
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static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
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virtual device_t *alloc_device(running_machine &machine) const;
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// construction/destruction
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psxcpu_device_config(const machine_config &mconfig, device_type _type, const char *name, const char *tag, const device_config *owner, UINT32 clock, address_map_constructor internal_map);
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protected:
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// device_config_execute_interface overrides
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virtual UINT32 execute_min_cycles() const { return 1; }
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virtual UINT32 execute_max_cycles() const { return 40; }
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virtual UINT32 execute_input_lines() const { return 6; }
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virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const { return ( clocks + 3 ) / 4; }
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virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const { return cycles * 4; }
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// device_config_memory_interface overrides
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virtual const address_space_config *memory_space_config(int spacenum = 0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : NULL; }
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// device_config_disasm_interface overrides
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virtual UINT32 disasm_min_opcode_bytes() const { return 4; }
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virtual UINT32 disasm_max_opcode_bytes() const { return 4; }
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// address spaces
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const address_space_config m_program_config;
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};
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class cxd8661r_device_config : public psxcpu_device_config
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{
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public:
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// allocators
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static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
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virtual device_t *alloc_device(running_machine &machine) const;
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};
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// ======================> psxcpu_device
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class psxcpu_device : public cpu_device
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{
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friend class psxcpu_device_config;
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friend class cxd8661r_device_config;
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public:
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// public interfaces
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void set_berr();
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void set_biu( UINT32 data, UINT32 mem_mask );
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UINT32 get_biu();
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protected:
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// construction/destruction
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psxcpu_device(running_machine &_machine, const psxcpu_device_config &config);
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// device-level overrides
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virtual void device_start();
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virtual void device_reset();
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virtual void device_post_load();
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// device_execute_interface overrides
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virtual void execute_run();
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virtual void execute_set_input(int inputnum, int state);
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// device_state_interface overrides
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virtual void state_import(const device_state_entry &entry);
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virtual void state_string_export(const device_state_entry &entry, astring &string);
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// device_disasm_interface overrides
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virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
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// CPU registers
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UINT32 m_pc;
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UINT32 m_r[ 32 ];
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UINT32 m_cp0r[ 16 ];
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PAIR m_cp2cr[ 32 ];
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PAIR m_cp2dr[ 32 ];
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UINT32 m_hi;
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UINT32 m_lo;
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// internal stuff
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UINT32 m_op;
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// memory access
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inline UINT32 program_read(UINT32 addr);
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inline void program_write(UINT32 addr, UINT32 data);
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inline UINT32 opcode_read();
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// address spaces
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address_space *m_program;
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direct_read_data *m_direct;
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// other internal states
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int m_icount;
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UINT32 m_delayv;
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UINT32 m_delayr;
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UINT32 m_berr;
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UINT32 m_biu;
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UINT32 m_icacheTag[ ICACHE_ENTRIES / 4 ];
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UINT32 m_icache[ ICACHE_ENTRIES ];
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UINT32 m_dcache[ DCACHE_ENTRIES ];
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int m_multiplier_operation;
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UINT32 m_multiplier_operand1;
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UINT32 m_multiplier_operand2;
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int m_bus_attached;
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UINT32 m_bad_byte_address_mask;
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UINT32 m_bad_half_address_mask;
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UINT32 m_bad_word_address_mask;
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void stop();
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UINT32 cache_readword( UINT32 offset );
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void cache_writeword( UINT32 offset, UINT32 data );
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UINT8 readbyte( UINT32 address );
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UINT16 readhalf( UINT32 address );
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UINT32 readword( UINT32 address );
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UINT32 readword_masked( UINT32 address, UINT32 mask );
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void writeword( UINT32 address, UINT32 data );
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void writeword_masked( UINT32 address, UINT32 data, UINT32 mask );
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UINT32 log_bioscall_parameter( int parm );
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const char *log_bioscall_string( int parm );
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const char *log_bioscall_hex( int parm );
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const char *log_bioscall_char( int parm );
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void log_bioscall();
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void log_syscall();
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void update_memory_handlers();
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void funct_mthi();
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void funct_mtlo();
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void funct_mult();
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void funct_multu();
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void funct_div();
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void funct_divu();
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void multiplier_update();
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UINT32 get_hi();
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UINT32 get_lo();
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int execute_unstoppable_instructions( int executeCop2 );
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void update_address_masks();
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void update_scratchpad();
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void update_cop0( int reg );
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void commit_delayed_load();
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void set_pc( unsigned pc );
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void fetch_next_op();
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int advance_pc();
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void load( UINT32 reg, UINT32 value );
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void delayed_load( UINT32 reg, UINT32 value );
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void branch( UINT32 address );
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void conditional_branch( int takeBranch );
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void unconditional_branch();
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void common_exception( int exception, UINT32 romOffset, UINT32 ramOffset );
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void exception( int exception );
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void breakpoint_exception();
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void load_bus_error_exception();
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void store_bus_error_exception();
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void load_bad_address( UINT32 address );
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void store_bad_address( UINT32 address );
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int data_address_breakpoint( int dcic_rw, int dcic_status, UINT32 address );
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int load_data_address_breakpoint( UINT32 address );
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int store_data_address_breakpoint( UINT32 address );
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UINT32 get_register_from_pipeline( int reg );
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int cop0_usable();
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void lwc( int cop, int sr_cu );
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void swc( int cop, int sr_cu );
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void bc( int cop, int sr_cu, int condition );
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UINT32 getcp1dr( int reg );
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void setcp1dr( int reg, UINT32 value );
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UINT32 getcp1cr( int reg );
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void setcp1cr( int reg, UINT32 value );
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UINT32 getcp3dr( int reg );
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void setcp3dr( int reg, UINT32 value );
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UINT32 getcp3cr( int reg );
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void setcp3cr( int reg, UINT32 value );
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INT32 LIM( INT32 value, INT32 max, INT32 min, UINT32 flag );
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UINT32 getcp2dr( int reg );
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void setcp2dr( int reg, UINT32 value );
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UINT32 getcp2cr( int reg );
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void setcp2cr( int reg, UINT32 value );
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INT64 BOUNDS( INT64 n_value, INT64 n_max, int n_maxflag, INT64 n_min, int n_minflag );
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UINT32 Lm_E( UINT32 result );
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void docop2( int gteop );
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};
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#define PSXCPU_DELAYR_PC ( 32 )
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#define PSXCPU_DELAYR_NOTPC ( 33 )
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#define PSXCPU_BYTE_EXTEND( a ) ( (INT32)(INT8)a )
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#define PSXCPU_BYTE_EXTEND( a ) ( (INT32)(INT8)a )
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#define PSXCPU_WORD_EXTEND( a ) ( (INT32)(INT16)a )
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#define PSXCPU_WORD_EXTEND( a ) ( (INT32)(INT16)a )
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@ -202,6 +438,8 @@ enum
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#define CF_TLBP ( 8 )
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#define CF_TLBP ( 8 )
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#define CF_RFE ( 16 )
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#define CF_RFE ( 16 )
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typedef struct _DasmPSXCPU_state DasmPSXCPU_state;
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typedef struct _DasmPSXCPU_state DasmPSXCPU_state;
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struct _DasmPSXCPU_state
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struct _DasmPSXCPU_state
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@ -214,7 +452,4 @@ struct _DasmPSXCPU_state
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extern unsigned DasmPSXCPU( DasmPSXCPU_state *state, char *buffer, UINT32 pc, const UINT8 *opram );
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extern unsigned DasmPSXCPU( DasmPSXCPU_state *state, char *buffer, UINT32 pc, const UINT8 *opram );
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DECLARE_LEGACY_CPU_DEVICE(PSXCPU, psxcpu);
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#endif /* __PSXCPU_H__ */
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DECLARE_LEGACY_CPU_DEVICE(CXD8661R, cxd8661r);
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#endif /* __PSX_H__ */
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