mirror of
https://github.com/holub/mame
synced 2025-05-29 09:03:08 +03:00
capr1.cpp: Some rather blind guesses that don't help much now (nw)
This commit is contained in:
AJR
parent
7f35d736ad
commit
791e47bb1b
@ -29,6 +29,7 @@ TODO:
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/z80/z80.h"
|
||||
#include "machine/te7750.h"
|
||||
#include "sound/2203intf.h"
|
||||
#include "sound/okim6295.h"
|
||||
#include "speaker.h"
|
||||
@ -42,9 +43,16 @@ public:
|
||||
m_maincpu(*this, "maincpu")
|
||||
{ }
|
||||
|
||||
DECLARE_WRITE8_MEMBER(output_w);
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
};
|
||||
|
||||
WRITE8_MEMBER(capr1_state::output_w)
|
||||
{
|
||||
// bit 7 = watchdog?
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
|
||||
@ -55,12 +63,13 @@ public:
|
||||
static ADDRESS_MAP_START( cspin2_map, AS_PROGRAM, 8, capr1_state )
|
||||
AM_RANGE(0x0000, 0x7fff) AM_ROM
|
||||
AM_RANGE(0x8000, 0x9fff) AM_RAM
|
||||
// AM_RANGE(0xa000, 0xa01f) AM_RAM // wrong
|
||||
AM_RANGE(0xa000, 0xa01f) AM_DEVREADWRITE("te7750", te7750_device, read, write)
|
||||
AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ym", ym2203_device, read, write)
|
||||
// AM_RANGE(0xc004, 0xc005) AM_WRITENOP
|
||||
AM_RANGE(0xc004, 0xc004) AM_DEVREADWRITE("oki", okim6295_device, read, write)
|
||||
// AM_RANGE(0xc008, 0xc009) AM_WRITENOP
|
||||
// AM_RANGE(0xc00c, 0xc00d) AM_WRITENOP
|
||||
// AM_RANGE(0xc00d, 0xc00d) AM_DEVREADWRITE("oki", okim6295_device, read, write)
|
||||
// AM_RANGE(0xe000, 0xe001) AM_WRITENOP
|
||||
// AM_RANGE(0xe002, 0xe004) AM_WRITENOP
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
@ -73,7 +82,7 @@ ADDRESS_MAP_END
|
||||
|
||||
static INPUT_PORTS_START( cspin2 )
|
||||
// just some test stuff
|
||||
PORT_START("IN0")
|
||||
PORT_START("INA")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
|
||||
@ -83,7 +92,7 @@ static INPUT_PORTS_START( cspin2 )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON4 )
|
||||
|
||||
PORT_START("IN1")
|
||||
PORT_START("INB")
|
||||
PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x01, "SW1:1" )
|
||||
PORT_DIPUNKNOWN_DIPLOC( 0x02, 0x02, "SW1:2" )
|
||||
PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x04, "SW1:3" )
|
||||
@ -92,6 +101,86 @@ static INPUT_PORTS_START( cspin2 )
|
||||
PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "SW1:6" )
|
||||
PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x40, "SW1:7" )
|
||||
PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "SW1:8" )
|
||||
|
||||
PORT_START("IN1")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
|
||||
PORT_START("IN2")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
|
||||
PORT_START("IN3")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
|
||||
PORT_START("IN4")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
|
||||
PORT_START("IN5")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
|
||||
PORT_START("IN6")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
|
||||
PORT_START("IN7")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
|
||||
PORT_START("IN8")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
@ -109,6 +198,18 @@ static MACHINE_CONFIG_START( cspin2 )
|
||||
MCFG_CPU_PROGRAM_MAP(cspin2_map)
|
||||
//MCFG_CPU_PERIODIC_INT_DRIVER(capr1_state, nmi_line_pulse, 20)
|
||||
|
||||
MCFG_DEVICE_ADD("te7750", TE7750, 0) // guess
|
||||
MCFG_TE7750_IOS_CB(CONSTANT(7))
|
||||
MCFG_TE7750_IN_PORT1_CB(IOPORT("IN1"))
|
||||
MCFG_TE7750_IN_PORT2_CB(IOPORT("IN2"))
|
||||
MCFG_TE7750_IN_PORT3_CB(IOPORT("IN3"))
|
||||
MCFG_TE7750_IN_PORT4_CB(IOPORT("IN4"))
|
||||
MCFG_TE7750_IN_PORT5_CB(IOPORT("IN5"))
|
||||
MCFG_TE7750_IN_PORT6_CB(IOPORT("IN6"))
|
||||
MCFG_TE7750_IN_PORT7_CB(IOPORT("IN7"))
|
||||
MCFG_TE7750_IN_PORT8_CB(IOPORT("IN8"))
|
||||
MCFG_TE7750_OUT_PORT9_CB(WRITE8(capr1_state, output_w))
|
||||
|
||||
/* no video! */
|
||||
|
||||
/* sound hardware */
|
||||
@ -116,8 +217,8 @@ static MACHINE_CONFIG_START( cspin2 )
|
||||
|
||||
MCFG_SOUND_ADD("ym", YM2203, 4000000) // clock frequency unknown
|
||||
MCFG_YM2203_IRQ_HANDLER(INPUTLINE("maincpu", 0))
|
||||
//MCFG_AY8910_PORT_A_READ_CB(IOPORT("IN0"))
|
||||
//MCFG_AY8910_PORT_B_READ_CB(IOPORT("IN1"))
|
||||
MCFG_AY8910_PORT_A_READ_CB(IOPORT("INA"))
|
||||
MCFG_AY8910_PORT_B_READ_CB(IOPORT("INB"))
|
||||
MCFG_SOUND_ROUTE(0, "mono", 0.15)
|
||||
MCFG_SOUND_ROUTE(1, "mono", 0.15)
|
||||
MCFG_SOUND_ROUTE(2, "mono", 0.15)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user