mirror of
https://github.com/holub/mame
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(MESS) cbm2: Fixed graphics, and some 8088 WIP. (nw)
This commit is contained in:
Curt Coder
parent
145d1da698
commit
7994b3d86b
@ -2,14 +2,14 @@
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TODO:
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- 8088 board
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- CIA timers fail in burn-in test
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- NTSC variants unable to load from disk
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- shift lock
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- Hungarian keyboard
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- cbm620hu charom banking?
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- DIN roms 324866-03a / 324867-02
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- user port
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- co-processor bus
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- 8088 co-processor board
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*/
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@ -44,10 +44,10 @@
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// read_pla - low profile PLA read
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//-------------------------------------------------
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void cbm2_state::read_pla(offs_t offset, int ras, int cas, int refen, int eras, int ecas, int busy2,
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void cbm2_state::read_pla(offs_t offset, int ras, int cas, int refen, int eras, int ecas,
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int *casseg1, int *casseg2, int *casseg3, int *casseg4, int *rasseg1, int *rasseg2, int *rasseg3, int *rasseg4)
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{
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UINT32 input = P0 << 15 | P1 << 14 | P2 << 13 | P3 << 12 | busy2 << 11 | eras << 10 | ecas << 9 | refen << 8 | cas << 7 | ras << 6;
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UINT32 input = P0 << 15 | P1 << 14 | P2 << 13 | P3 << 12 | m_busy2 << 11 | eras << 10 | ecas << 9 | refen << 8 | cas << 7 | ras << 6;
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UINT32 data = m_pla1->read(input);
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*casseg1 = BIT(data, 0);
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@ -65,10 +65,10 @@ void cbm2_state::read_pla(offs_t offset, int ras, int cas, int refen, int eras,
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// read_pla - high profile PLA read
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//-------------------------------------------------
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void cbm2hp_state::read_pla(offs_t offset, int ras, int cas, int refen, int eras, int ecas, int busy2,
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void cbm2hp_state::read_pla(offs_t offset, int ras, int cas, int refen, int eras, int ecas,
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int *casseg1, int *casseg2, int *casseg3, int *casseg4, int *rasseg1, int *rasseg2, int *rasseg3, int *rasseg4)
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{
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UINT32 input = ras << 13 | cas << 12 | refen << 11 | eras << 10 | ecas << 9 | busy2 << 8 | P3 << 3 | P2 << 2 | P1 << 1 | P0;
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UINT32 input = ras << 13 | cas << 12 | refen << 11 | eras << 10 | ecas << 9 | m_busy2 << 8 | P3 << 3 | P2 << 2 | P1 << 1 | P0;
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UINT32 data = m_pla1->read(input);
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*casseg1 = BIT(data, 0);
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@ -86,19 +86,18 @@ void cbm2hp_state::read_pla(offs_t offset, int ras, int cas, int refen, int eras
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// bankswitch -
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//-------------------------------------------------
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void cbm2_state::bankswitch(offs_t offset, int busy2, int eras, int ecas, int refen, int cas, int ras, int *sysioen, int *dramen,
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void cbm2_state::bankswitch(offs_t offset, int eras, int ecas, int refen, int cas, int ras, int *sysioen, int *dramen,
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int *casseg1, int *casseg2, int *casseg3, int *casseg4, int *buframcs, int *extbufcs, int *vidramcs,
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int *diskromcs, int *csbank1, int *csbank2, int *csbank3, int *basiccs, int *knbcs, int *kernalcs,
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int *crtccs, int *cs1, int *sidcs, int *extprtcs, int *ciacs, int *aciacs, int *tript1cs, int *tript2cs)
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{
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int rasseg1 = 1, rasseg2 = 1, rasseg3 = 1, rasseg4 = 1;
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this->read_pla(offset, ras, cas, refen, eras, ecas, busy2, casseg1, casseg2, casseg3, casseg4, &rasseg1, &rasseg2, &rasseg3, &rasseg4);
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this->read_pla(offset, ras, cas, refen, eras, ecas, casseg1, casseg2, casseg3, casseg4, &rasseg1, &rasseg2, &rasseg3, &rasseg4);
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int busen1 = m_dramon;
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int decoden = 0;
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*sysioen = !(P0 && P1 && P2 && P3) && busen1;
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*dramen = !((!(P0 && P1 && P2 && P3)) && busen1);
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*sysioen = !(P0 && P1 && P2 && P3) && m_busen1;
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*dramen = !((!(P0 && P1 && P2 && P3)) && m_busen1);
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if (!decoden && !*sysioen)
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{
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@ -151,12 +150,12 @@ void cbm2_state::bankswitch(offs_t offset, int busy2, int eras, int ecas, int re
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READ8_MEMBER( cbm2_state::read )
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{
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int busy2 = 1, eras = 1, ecas = 1, refen = 0, cas = 0, ras = 1, sysioen = 1, dramen = 1;
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int eras = 1, ecas = 0, refen = 0, cas = 0, ras = 1, sysioen = 1, dramen = 1;
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int casseg1 = 1, casseg2 = 1, casseg3 = 1, casseg4 = 1, buframcs = 1, extbufcs = 1, vidramcs = 1;
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int diskromcs = 1, csbank1 = 1, csbank2 = 1, csbank3 = 1, basiccs = 1, knbcs = 1, kernalcs = 1;
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int crtccs = 1, cs1 = 1, sidcs = 1, extprtcs = 1, ciacs = 1, aciacs = 1, tript1cs = 1, tript2cs = 1;
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bankswitch(offset, busy2, eras, ecas, refen, cas, ras, &sysioen, &dramen,
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bankswitch(offset, eras, ecas, refen, cas, ras, &sysioen, &dramen,
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&casseg1, &casseg2, &casseg3, &casseg4, &buframcs, &extbufcs, &vidramcs,
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&diskromcs, &csbank1, &csbank2, &csbank3, &basiccs, &knbcs, &kernalcs,
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&crtccs, &cs1, &sidcs, &extprtcs, &ciacs, &aciacs, &tript1cs, &tript2cs);
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@ -189,6 +188,10 @@ READ8_MEMBER( cbm2_state::read )
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{
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data = m_buffer_ram[offset & 0x7ff];
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}
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if (!extbufcs && m_extbuf_ram)
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{
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data = m_extbuf_ram[offset & 0x7ff];
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}
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if (!vidramcs)
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{
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data = m_video_ram[offset & 0x7ff];
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@ -216,6 +219,10 @@ READ8_MEMBER( cbm2_state::read )
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{
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data = m_sid->read(space, offset & 0x1f);
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}
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if (!extprtcs && m_ext_cia)
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{
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data = m_ext_cia->read(space, offset & 0x0f);
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}
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if (!ciacs)
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{
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data = m_cia->read(space, offset & 0x0f);
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@ -246,12 +253,12 @@ READ8_MEMBER( cbm2_state::read )
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WRITE8_MEMBER( cbm2_state::write )
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{
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int busy2 = 1, eras = 1, ecas = 1, refen = 0, cas = 0, ras = 1, sysioen = 1, dramen = 1;
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int eras = 1, ecas = 0, refen = 0, cas = 0, ras = 1, sysioen = 1, dramen = 1;
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int casseg1 = 1, casseg2 = 1, casseg3 = 1, casseg4 = 1, buframcs = 1, extbufcs = 1, vidramcs = 1;
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int diskromcs = 1, csbank1 = 1, csbank2 = 1, csbank3 = 1, basiccs = 1, knbcs = 1, kernalcs = 1;
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int crtccs = 1, cs1 = 1, sidcs = 1, extprtcs = 1, ciacs = 1, aciacs = 1, tript1cs = 1, tript2cs = 1;
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bankswitch(offset, busy2, eras, ecas, refen, cas, ras, &sysioen, &dramen,
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bankswitch(offset, eras, ecas, refen, cas, ras, &sysioen, &dramen,
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&casseg1, &casseg2, &casseg3, &casseg4, &buframcs, &extbufcs, &vidramcs,
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&diskromcs, &csbank1, &csbank2, &csbank3, &basiccs, &knbcs, &kernalcs,
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&crtccs, &cs1, &sidcs, &extprtcs, &ciacs, &aciacs, &tript1cs, &tript2cs);
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@ -282,6 +289,10 @@ WRITE8_MEMBER( cbm2_state::write )
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{
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m_buffer_ram[offset & 0x7ff] = data;
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}
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if (!extbufcs && m_extbuf_ram)
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{
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m_extbuf_ram[offset & 0x7ff] = data;
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}
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if (!vidramcs)
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{
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m_video_ram[offset & 0x7ff] = data;
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@ -301,6 +312,10 @@ WRITE8_MEMBER( cbm2_state::write )
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{
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m_sid->write(space, offset & 0x1f, data);
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}
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if (!extprtcs && m_ext_cia)
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{
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m_ext_cia->write(space, offset & 0x0f, data);
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}
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if (!ciacs)
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{
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m_cia->write(space, offset & 0x0f, data);
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@ -319,6 +334,70 @@ WRITE8_MEMBER( cbm2_state::write )
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}
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m_exp->write(space, offset & 0x1fff, data, csbank1, csbank2, csbank3);
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}
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}
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//-------------------------------------------------
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// ext_read -
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//-------------------------------------------------
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READ8_MEMBER( cbm2_state::ext_read )
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{
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int ras = 1, cas = 1, refen = 1, eras = 1, ecas = 0;
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int casseg1 = 1, casseg2 = 1, casseg3 = 1, casseg4 = 1, rasseg1 = 1, rasseg2 = 1, rasseg3 = 1, rasseg4 = 1;
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this->read_pla(offset, ras, cas, refen, eras, ecas, &casseg1, &casseg2, &casseg3, &casseg4, &rasseg1, &rasseg2, &rasseg3, &rasseg4);
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UINT8 data = 0xff;
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if (!casseg1)
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{
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data = m_ram->pointer()[offset & 0xffff];
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}
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if (!casseg2)
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{
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data = m_ram->pointer()[0x10000 | (offset & 0xffff)];
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}
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if (!casseg3 && (m_ram->size() > 0x20000))
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{
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data = m_ram->pointer()[0x20000 | (offset & 0xffff)];
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}
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if (!casseg4 && (m_ram->size() > 0x30000))
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{
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data = m_ram->pointer()[0x30000 | (offset & 0xffff)];
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}
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return data;
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}
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//-------------------------------------------------
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// ext_write -
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//-------------------------------------------------
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WRITE8_MEMBER( cbm2_state::ext_write )
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{
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int ras = 1, cas = 1, refen = 1, eras = 1, ecas = 0;
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int casseg1 = 1, casseg2 = 1, casseg3 = 1, casseg4 = 1, rasseg1 = 1, rasseg2 = 1, rasseg3 = 1, rasseg4 = 1;
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this->read_pla(offset, ras, cas, refen, eras, ecas, &casseg1, &casseg2, &casseg3, &casseg4, &rasseg1, &rasseg2, &rasseg3, &rasseg4);
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if (!casseg1)
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{
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m_ram->pointer()[offset & 0xffff] = data;
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}
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if (!casseg2)
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{
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m_ram->pointer()[0x10000 | (offset & 0xffff)] = data;
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}
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if (!casseg3 && (m_ram->size() > 0x20000))
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{
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m_ram->pointer()[0x20000 | (offset & 0xffff)] = data;
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}
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if (!casseg4 && (m_ram->size() > 0x30000))
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{
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m_ram->pointer()[0x30000 | (offset & 0xffff)] = data;
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}
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}
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@ -749,6 +828,27 @@ static ADDRESS_MAP_START( cbm2_mem, AS_PROGRAM, 8, cbm2_state )
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ADDRESS_MAP_END
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//-------------------------------------------------
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// ADDRESS_MAP( ext_mem )
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//-------------------------------------------------
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static ADDRESS_MAP_START( ext_mem, AS_PROGRAM, 8, cbm2_state )
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AM_RANGE(0x00000, 0xeffff) AM_READWRITE(ext_read, ext_write)
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AM_RANGE(0xf0000, 0xf0fff) AM_MIRROR(0xf000) AM_ROM AM_REGION(EXT_I8088_TAG, 0)
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ADDRESS_MAP_END
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//-------------------------------------------------
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// ADDRESS_MAP( ext_io )
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//-------------------------------------------------
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static ADDRESS_MAP_START( ext_io, AS_IO, 8, cbm2_state )
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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AM_RANGE(0x0000, 0x0001) AM_MIRROR(0x1e) AM_DEVREADWRITE_LEGACY(EXT_I8259A_TAG, pic8259_r, pic8259_w)
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AM_RANGE(0x0020, 0x0027) AM_MIRROR(0x18) AM_DEVREADWRITE(EXT_MOS6525_TAG, tpi6525_device, read, write)
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ADDRESS_MAP_END
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//-------------------------------------------------
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// ADDRESS_MAP( p500_mem )
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//-------------------------------------------------
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@ -975,7 +1075,7 @@ INPUT_PORTS_END
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// mc6845_interface crtc_intf
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//-------------------------------------------------
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static MC6845_UPDATE_ROW( lp_crtc_update_row )
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static MC6845_UPDATE_ROW( crtc_update_row )
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{
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cbm2_state *state = device->machine().driver_data<cbm2_state>();
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@ -987,65 +1087,24 @@ static MC6845_UPDATE_ROW( lp_crtc_update_row )
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offs_t char_rom_addr = (ma & 0x1000) | (state->m_graphics << 11) | ((code & 0x7f) << 4) | (ra & 0x0f);
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UINT8 data = state->m_charom[char_rom_addr & 0xfff];
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for (int bit = 0; bit < 8; bit++)
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for (int bit = 0; bit < 9; bit++)
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{
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int color = BIT(data, 7) ^ BIT(code, 7) ^ BIT(ma, 13);
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if (cursor_x == column) color ^= 1;
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bitmap.pix32(y, x++) = RGB_MONOCHROME_GREEN[color];
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data <<= 1;
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if (bit < 8 || !state->m_graphics) data <<= 1;
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}
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}
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}
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static const mc6845_interface lp_crtc_intf =
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{
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SCREEN_TAG,
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8,
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NULL,
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lp_crtc_update_row,
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NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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NULL
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};
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static MC6845_UPDATE_ROW( hp_crtc_update_row )
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{
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cbm2_state *state = device->machine().driver_data<cbm2_state>();
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int x = 0;
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for (int column = 0; column < x_count; column++)
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{
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UINT8 code = state->m_video_ram[(ma + column) & 0x7ff];
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offs_t char_rom_addr = (ma & 0x1000) | (state->m_graphics << 11) | ((code & 0x7f) << 4) | (ra & 0x0f);
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UINT8 data = state->m_charom[char_rom_addr & 0xfff];
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for (int bit = 0; bit < 8; bit++)
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{
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int color = BIT(data, 7) ^ BIT(code, 7) ^ BIT(ma, 13);
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if (cursor_x == column) color ^= 1;
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bitmap.pix32(y, x++) = RGB_MONOCHROME_GREEN[color];
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data <<= 1;
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}
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bitmap.pix32(y, x++) = RGB_MONOCHROME_GREEN[BIT(code, 7) ^ BIT(ma, 13)];
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}
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}
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static const mc6845_interface hp_crtc_intf =
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static const mc6845_interface crtc_intf =
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{
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SCREEN_TAG,
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9,
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NULL,
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hp_crtc_update_row,
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crtc_update_row,
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NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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@ -1054,6 +1113,7 @@ static const mc6845_interface hp_crtc_intf =
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NULL
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};
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//-------------------------------------------------
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// vic2_interface vic_intf
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//-------------------------------------------------
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@ -1252,6 +1312,7 @@ WRITE8_MEMBER( cbm2_state::tpi1_pb_w )
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// memory
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m_dramon = BIT(data, 4);
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if (m_busy2) m_busen1 = m_dramon;
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// cassette
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m_cassette->write(BIT(data, 5));
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@ -1653,6 +1714,194 @@ static IEEE488_INTERFACE( ieee488_intf )
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};
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//-------------------------------------------------
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// pic8259_interface ext_pic_intf
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//-------------------------------------------------
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static IRQ_CALLBACK( pic_irq_callback )
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{
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cbm2_state *state = device->machine().driver_data<cbm2_state>();
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return pic8259_acknowledge(state->m_ext_pic);
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}
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static pic8259_interface ext_pic_intf =
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{
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DEVCB_CPU_INPUT_LINE(EXT_I8088_TAG, INPUT_LINE_IRQ0),
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DEVCB_LINE_VCC,
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DEVCB_NULL
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};
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//-------------------------------------------------
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// tpi6525_interface ext_tpi_intf
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//-------------------------------------------------
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READ8_MEMBER( cbm2_state::ext_tpi_pb_r )
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{
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/*
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bit description
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0 _BUSY1
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1 CIA PB1
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2 CIA PB2
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3 CIA PB3
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4 CIA PB4
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5 CIA PB5
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6 1
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7 1
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*/
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UINT8 data = 0xc0;
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// _BUSY1
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data |= !m_busen1;
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// CIA
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data = m_ext_cia->pb_r() & 0x3e;
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return data;
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}
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WRITE8_MEMBER( cbm2_state::ext_tpi_pb_w )
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{
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/*
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bit description
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0 U22B CL
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1
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2
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3
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4
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5
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6 CIA FLAG
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7
|
||||
|
||||
*/
|
||||
|
||||
// _BUSY2
|
||||
if (!BIT(data, 0))
|
||||
{
|
||||
m_busy2 = 1;
|
||||
m_busen1 = m_dramon;
|
||||
}
|
||||
|
||||
m_ext_cia->flag_w(BIT(data, 6));
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( cbm2_state::ext_tpi_pc_w )
|
||||
{
|
||||
/*
|
||||
|
||||
bit description
|
||||
|
||||
0
|
||||
1
|
||||
2
|
||||
3
|
||||
4
|
||||
5 U22 CLK
|
||||
6
|
||||
7
|
||||
|
||||
*/
|
||||
}
|
||||
|
||||
static const tpi6525_interface ext_tpi_intf =
|
||||
{
|
||||
DEVCB_NULL,
|
||||
DEVCB_DEVICE_MEMBER(EXT_MOS6526_TAG, mos6526_device, pa_r),
|
||||
DEVCB_NULL,
|
||||
DEVCB_DRIVER_MEMBER(cbm2_state, ext_tpi_pb_r),
|
||||
DEVCB_DRIVER_MEMBER(cbm2_state, ext_tpi_pb_w),
|
||||
DEVCB_NULL,
|
||||
DEVCB_DRIVER_MEMBER(cbm2_state, ext_tpi_pc_w),
|
||||
DEVCB_NULL,
|
||||
DEVCB_NULL
|
||||
};
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// MOS6526_INTERFACE( ext_cia_intf )
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( cbm2_state::ext_cia_pb_r )
|
||||
{
|
||||
/*
|
||||
|
||||
bit description
|
||||
|
||||
0 _BUSY1
|
||||
1 TPI PB1
|
||||
2 TPI PB2
|
||||
3 TPI PB3
|
||||
4 TPI PB4
|
||||
5 TPI PB5
|
||||
6 1
|
||||
7 1
|
||||
|
||||
*/
|
||||
|
||||
UINT8 data = 0xc0;
|
||||
|
||||
// _BUSY1
|
||||
data |= !m_busen1;
|
||||
|
||||
// TPI
|
||||
data |= tpi6525_portb_r(m_ext_tpi, space, 0) & 0x3e;
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( cbm2_state::ext_cia_pb_w )
|
||||
{
|
||||
/*
|
||||
|
||||
bit description
|
||||
|
||||
0 U22B CL
|
||||
1
|
||||
2
|
||||
3
|
||||
4
|
||||
5
|
||||
6 PIC IR0, U29B CL, U22B PR
|
||||
7 PIC IR7
|
||||
|
||||
*/
|
||||
|
||||
// _BUSY2
|
||||
if (!BIT(data, 0))
|
||||
{
|
||||
m_busy2 = 1;
|
||||
m_busen1 = m_dramon;
|
||||
}
|
||||
else if (!BIT(data, 6))
|
||||
{
|
||||
m_busy2 = 0;
|
||||
m_busen1 = 0;
|
||||
}
|
||||
|
||||
pic8259_ir0_w(m_ext_pic, !BIT(data, 6));
|
||||
pic8259_ir7_w(m_ext_pic, BIT(data, 7));
|
||||
}
|
||||
|
||||
static MOS6526_INTERFACE( ext_cia_intf )
|
||||
{
|
||||
DEVCB_DEVICE_LINE_MEMBER(MOS6525_1_TAG, tpi6525_device, i3_w),
|
||||
DEVCB_NULL,
|
||||
DEVCB_NULL,
|
||||
DEVCB_NULL,
|
||||
DEVCB_DEVICE_HANDLER(EXT_MOS6525_TAG, tpi6525_porta_r),
|
||||
DEVCB_NULL,
|
||||
DEVCB_DRIVER_MEMBER(cbm2_state, ext_cia_pb_r),
|
||||
DEVCB_DRIVER_MEMBER(cbm2_state, ext_cia_pb_w)
|
||||
};
|
||||
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// MACHINE INITIALIZATION
|
||||
@ -1666,6 +1915,8 @@ void cbm2_state::device_timer(emu_timer &timer, device_timer_id id, int param, v
|
||||
{
|
||||
m_tpi1->i0_w(m_todclk);
|
||||
|
||||
if (m_ext_pic) pic8259_ir2_w(m_ext_pic, m_todclk);
|
||||
|
||||
m_todclk = !m_todclk;
|
||||
}
|
||||
|
||||
@ -1693,6 +1944,8 @@ MACHINE_START_MEMBER( cbm2_state, cbm2 )
|
||||
|
||||
// state saving
|
||||
save_item(NAME(m_dramon));
|
||||
save_item(NAME(m_busen1));
|
||||
save_item(NAME(m_busy2));
|
||||
save_item(NAME(m_graphics));
|
||||
save_item(NAME(m_ntsc));
|
||||
save_item(NAME(m_todclk));
|
||||
@ -1729,6 +1982,38 @@ MACHINE_START_MEMBER( cbm2_state, cbm2_pal )
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// MACHINE_START( cbm2x_ntsc )
|
||||
//-------------------------------------------------
|
||||
|
||||
MACHINE_START_MEMBER( cbm2_state, cbm2x_ntsc )
|
||||
{
|
||||
// register CPU IRQ callback
|
||||
m_ext_cpu->set_irq_acknowledge_callback(pic_irq_callback);
|
||||
|
||||
// allocate memory
|
||||
m_extbuf_ram.allocate(0x800);
|
||||
|
||||
MACHINE_START_CALL_MEMBER(cbm2_ntsc);
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// MACHINE_START( cbm2x_pal )
|
||||
//-------------------------------------------------
|
||||
|
||||
MACHINE_START_MEMBER( cbm2_state, cbm2x_pal )
|
||||
{
|
||||
// register CPU IRQ callback
|
||||
m_ext_cpu->set_irq_acknowledge_callback(pic_irq_callback);
|
||||
|
||||
// allocate memory
|
||||
m_extbuf_ram.allocate(0x800);
|
||||
|
||||
MACHINE_START_CALL_MEMBER(cbm2_pal);
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// MACHINE_START( p500 )
|
||||
//-------------------------------------------------
|
||||
@ -1781,6 +2066,8 @@ MACHINE_START_MEMBER( p500_state, p500_pal )
|
||||
MACHINE_RESET_MEMBER( cbm2_state, cbm2 )
|
||||
{
|
||||
m_dramon = 1;
|
||||
m_busen1 = 1;
|
||||
m_busy2 = 1;
|
||||
m_graphics = 1;
|
||||
m_tpi1_irq = CLEAR_LINE;
|
||||
m_cass_rd = 1;
|
||||
@ -1877,7 +2164,6 @@ static MACHINE_CONFIG_START( p500_ntsc, p500_state )
|
||||
MCFG_VCS_CONTROL_PORT_ADD(CONTROL2_TAG, vcs_control_port_devices, NULL, NULL)
|
||||
MCFG_CBM2_EXPANSION_SLOT_ADD(CBM2_EXPANSION_SLOT_TAG, VIC6567_CLOCK, cbm2_expansion_cards, NULL, NULL)
|
||||
//MCFG_CBM2_USER_PORT_ADD(CBM2_USER_PORT_TAG, user_intf, cbm2_user_port_cards, NULL, NULL)
|
||||
//MCFG_CBM2_SYSTEM_PORT_ADD(CBM2_SYSTEM_PORT_TAG, system_intf, cbm2_system_port_cards, NULL, NULL)
|
||||
|
||||
// internal ram
|
||||
MCFG_FRAGMENT_ADD(128k)
|
||||
@ -1927,7 +2213,6 @@ static MACHINE_CONFIG_START( p500_pal, p500_state )
|
||||
MCFG_VCS_CONTROL_PORT_ADD(CONTROL2_TAG, vcs_control_port_devices, NULL, NULL)
|
||||
MCFG_CBM2_EXPANSION_SLOT_ADD(CBM2_EXPANSION_SLOT_TAG, VIC6569_CLOCK, cbm2_expansion_cards, NULL, NULL)
|
||||
//MCFG_CBM2_USER_PORT_ADD(CBM2_USER_PORT_TAG, user_intf, cbm2_user_port_cards, NULL, NULL)
|
||||
//MCFG_CBM2_SYSTEM_PORT_ADD(CBM2_SYSTEM_PORT_TAG, system_intf, cbm2_system_port_cards, NULL, NULL)
|
||||
|
||||
// internal ram
|
||||
MCFG_FRAGMENT_ADD(128k)
|
||||
@ -1960,7 +2245,7 @@ static MACHINE_CONFIG_START( cbm2lp_ntsc, cbm2_state )
|
||||
MCFG_SCREEN_SIZE(768, 312)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 768-1, 0, 312-1)
|
||||
|
||||
MCFG_MC6845_ADD(MC68B45_TAG, MC6845, XTAL_18MHz/9, lp_crtc_intf)
|
||||
MCFG_MC6845_ADD(MC68B45_TAG, MC6845, XTAL_18MHz/9, crtc_intf)
|
||||
|
||||
// sound hardware
|
||||
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||
@ -1984,7 +2269,6 @@ static MACHINE_CONFIG_START( cbm2lp_ntsc, cbm2_state )
|
||||
MCFG_VCS_CONTROL_PORT_ADD(CONTROL2_TAG, vcs_control_port_devices, NULL, NULL)
|
||||
MCFG_CBM2_EXPANSION_SLOT_ADD(CBM2_EXPANSION_SLOT_TAG, XTAL_18MHz/9, cbm2_expansion_cards, NULL, NULL)
|
||||
//MCFG_CBM2_USER_PORT_ADD(CBM2_USER_PORT_TAG, user_intf, cbm2_user_port_cards, NULL, NULL)
|
||||
//MCFG_CBM2_SYSTEM_PORT_ADD(CBM2_SYSTEM_PORT_TAG, system_intf, cbm2_system_port_cards, NULL, NULL)
|
||||
|
||||
// software list
|
||||
MCFG_SOFTWARE_LIST_ADD("flop_list", "cbm2_flop")
|
||||
@ -2053,9 +2337,6 @@ MACHINE_CONFIG_END
|
||||
static MACHINE_CONFIG_START( cbm2hp_ntsc, cbm2hp_state )
|
||||
MCFG_FRAGMENT_ADD(cbm2lp_ntsc)
|
||||
|
||||
MCFG_DEVICE_REMOVE(MC68B45_TAG)
|
||||
MCFG_MC6845_ADD(MC68B45_TAG, MC6845, XTAL_18MHz/9, hp_crtc_intf)
|
||||
|
||||
// devices
|
||||
MCFG_DEVICE_REMOVE(MOS6525_2_TAG)
|
||||
MCFG_TPI6525_ADD(MOS6525_2_TAG, hp_tpi2_intf)
|
||||
@ -2089,8 +2370,15 @@ MACHINE_CONFIG_END
|
||||
static MACHINE_CONFIG_START( bx256hp, cbm2hp_state )
|
||||
MCFG_FRAGMENT_ADD(b256hp)
|
||||
|
||||
//MCFG_DEVICE_REMOVE(CBM2_SYSTEM_PORT_TAG)
|
||||
//MCFG_CBM2_SYSTEM_PORT_ADD(CBM2_SYSTEM_PORT_TAG, system_intf, cbm2_system_port_cards, "8088", NULL)
|
||||
MCFG_MACHINE_START_OVERRIDE(cbm2_state, cbm2x_ntsc)
|
||||
|
||||
MCFG_CPU_ADD(EXT_I8088_TAG, I8088, XTAL_12MHz)
|
||||
MCFG_CPU_PROGRAM_MAP(ext_mem)
|
||||
MCFG_CPU_IO_MAP(ext_io)
|
||||
|
||||
MCFG_PIC8259_ADD(EXT_I8259A_TAG, ext_pic_intf)
|
||||
MCFG_TPI6525_ADD(EXT_MOS6525_TAG, ext_tpi_intf)
|
||||
MCFG_MOS6526_ADD(EXT_MOS6526_TAG, XTAL_18MHz/9, 50, ext_cia_intf)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
@ -2139,8 +2427,15 @@ MACHINE_CONFIG_END
|
||||
static MACHINE_CONFIG_START( cbm730, cbm2hp_state )
|
||||
MCFG_FRAGMENT_ADD(cbm720)
|
||||
|
||||
//MCFG_DEVICE_REMOVE(CBM2_SYSTEM_PORT_TAG)
|
||||
//MCFG_CBM2_SYSTEM_PORT_ADD(CBM2_SYSTEM_PORT_TAG, system_intf, cbm2_system_port_cards, "8088", NULL)
|
||||
MCFG_MACHINE_START_OVERRIDE(cbm2_state, cbm2x_pal)
|
||||
|
||||
MCFG_CPU_ADD(EXT_I8088_TAG, I8088, XTAL_12MHz)
|
||||
MCFG_CPU_PROGRAM_MAP(ext_mem)
|
||||
MCFG_CPU_IO_MAP(ext_io)
|
||||
|
||||
MCFG_PIC8259_ADD(EXT_I8259A_TAG, ext_pic_intf)
|
||||
MCFG_TPI6525_ADD(EXT_MOS6525_TAG, ext_tpi_intf)
|
||||
MCFG_MOS6526_ADD(EXT_MOS6526_TAG, XTAL_18MHz/9, 60, ext_cia_intf)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
@ -2347,7 +2642,7 @@ ROM_START( bx256hp )
|
||||
ROM_LOAD( "901241-03.u59", 0x0000, 0x2000, CRC(5c1f3347) SHA1(2d46be2cd89594b718cdd0a86d51b6f628343f42) )
|
||||
ROM_LOAD( "901240-03.u60", 0x2000, 0x2000, CRC(72aa44e1) SHA1(0d7f77746290afba8d0abeb87c9caab9a3ad89ce) )
|
||||
|
||||
ROM_REGION( 0x1000, "8088", 0)
|
||||
ROM_REGION( 0x1000, EXT_I8088_TAG, 0)
|
||||
ROM_LOAD( "8088.u14", 0x0000, 0x1000, CRC(195e0281) SHA1(ce8acd2a5fb6cbd70d837811d856d656544a1f97) )
|
||||
|
||||
ROM_REGION( 0x2000, "kernal", 0 )
|
||||
|
||||
@ -5,6 +5,7 @@
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/m6502/m6509.h"
|
||||
#include "cpu/i86/i86.h"
|
||||
#include "formats/cbm_snqk.h"
|
||||
#include "includes/cbm.h"
|
||||
#include "machine/6525tpi.h"
|
||||
@ -16,6 +17,7 @@
|
||||
#include "machine/ieee488.h"
|
||||
#include "machine/mos6526.h"
|
||||
#include "machine/petcass.h"
|
||||
#include "machine/pic8259.h"
|
||||
#include "machine/pla.h"
|
||||
#include "machine/ram.h"
|
||||
#include "machine/vcsctrl.h"
|
||||
@ -41,6 +43,12 @@
|
||||
#define CONTROL1_TAG "joy1"
|
||||
#define CONTROL2_TAG "joy2"
|
||||
|
||||
#define EXT_I8088_TAG "ext_u1"
|
||||
#define EXT_I8087_TAG "ext_u4"
|
||||
#define EXT_I8259A_TAG "ext_u3"
|
||||
#define EXT_MOS6526_TAG "ext_u15"
|
||||
#define EXT_MOS6525_TAG "ext_u16"
|
||||
|
||||
class cbm2_state : public driver_device
|
||||
{
|
||||
public:
|
||||
@ -62,7 +70,12 @@ public:
|
||||
m_ram(*this, RAM_TAG),
|
||||
m_cassette(*this, PET_DATASSETTE_PORT_TAG),
|
||||
m_ieee(*this, IEEE488_TAG),
|
||||
m_ext_cpu(*this, EXT_I8088_TAG),
|
||||
m_ext_pic(*this, EXT_I8259A_TAG),
|
||||
m_ext_cia(*this, EXT_MOS6526_TAG),
|
||||
m_ext_tpi(*this, EXT_MOS6525_TAG),
|
||||
m_buffer_ram(*this, "buffer_ram"),
|
||||
m_extbuf_ram(*this, "extbuf_ram"),
|
||||
m_dramon(1),
|
||||
m_video_ram(*this, "video_ram"),
|
||||
m_video_ram_size(0x800),
|
||||
@ -93,17 +106,24 @@ public:
|
||||
required_device<pet_datassette_port_device> m_cassette;
|
||||
required_device<ieee488_device> m_ieee;
|
||||
|
||||
optional_device<cpu_device> m_ext_cpu;
|
||||
optional_device<pic8259_device> m_ext_pic;
|
||||
optional_device<mos6526_device> m_ext_cia;
|
||||
optional_device<tpi6525_device> m_ext_tpi;
|
||||
|
||||
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
|
||||
|
||||
DECLARE_MACHINE_START( cbm2 );
|
||||
DECLARE_MACHINE_START( cbm2_ntsc );
|
||||
DECLARE_MACHINE_START( cbm2_pal );
|
||||
DECLARE_MACHINE_START( cbm2x_ntsc );
|
||||
DECLARE_MACHINE_START( cbm2x_pal );
|
||||
DECLARE_MACHINE_RESET( cbm2 );
|
||||
|
||||
virtual void read_pla(offs_t offset, int ras, int cas, int refen, int eras, int ecas, int busy2,
|
||||
virtual void read_pla(offs_t offset, int ras, int cas, int refen, int eras, int ecas,
|
||||
int *casseg1, int *casseg2, int *casseg3, int *casseg4, int *rasseg1, int *rasseg2, int *rasseg3, int *rasseg4);
|
||||
|
||||
void bankswitch(offs_t offset, int busy2, int eras, int ecas, int refen, int cas, int ras, int *sysioen, int *dramen,
|
||||
void bankswitch(offs_t offset, int eras, int ecas, int refen, int cas, int ras, int *sysioen, int *dramen,
|
||||
int *casseg1, int *casseg2, int *casseg3, int *casseg4, int *buframcs, int *extbufcs, int *vidramcs,
|
||||
int *diskromcs, int *csbank1, int *csbank2, int *csbank3, int *basiccs, int *knbcs, int *kernalcs,
|
||||
int *crtccs, int *cs1, int *sidcs, int *extprtcs, int *ciacs, int *aciacs, int *tript1cs, int *tript2cs);
|
||||
@ -112,6 +132,8 @@ public:
|
||||
|
||||
DECLARE_READ8_MEMBER( read );
|
||||
DECLARE_WRITE8_MEMBER( write );
|
||||
DECLARE_READ8_MEMBER( ext_read );
|
||||
DECLARE_WRITE8_MEMBER( ext_write );
|
||||
|
||||
DECLARE_READ8_MEMBER( sid_potx_r );
|
||||
DECLARE_READ8_MEMBER( sid_poty_r );
|
||||
@ -135,12 +157,22 @@ public:
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER( tape_read_w );
|
||||
|
||||
DECLARE_READ8_MEMBER( ext_tpi_pb_r );
|
||||
DECLARE_WRITE8_MEMBER( ext_tpi_pb_w );
|
||||
DECLARE_WRITE8_MEMBER( ext_tpi_pc_w );
|
||||
|
||||
DECLARE_READ8_MEMBER( ext_cia_pb_r );
|
||||
DECLARE_WRITE8_MEMBER( ext_cia_pb_w );
|
||||
|
||||
// memory state
|
||||
optional_shared_ptr<UINT8> m_buffer_ram;
|
||||
optional_shared_ptr<UINT8> m_extbuf_ram;
|
||||
UINT8 *m_basic;
|
||||
UINT8 *m_kernal;
|
||||
UINT8 *m_charom;
|
||||
int m_dramon;
|
||||
int m_busen1;
|
||||
int m_busy2;
|
||||
|
||||
// video state
|
||||
optional_shared_ptr<UINT8> m_video_ram;
|
||||
@ -172,7 +204,7 @@ public:
|
||||
: cbm2_state(mconfig, type, tag)
|
||||
{ }
|
||||
|
||||
virtual void read_pla(offs_t offset, int ras, int cas, int refen, int eras, int ecas, int busy2,
|
||||
virtual void read_pla(offs_t offset, int ras, int cas, int refen, int eras, int ecas,
|
||||
int *casseg1, int *casseg2, int *casseg3, int *casseg4, int *rasseg1, int *rasseg2, int *rasseg3, int *rasseg4);
|
||||
|
||||
DECLARE_READ8_MEMBER( tpi2_pc_r );
|
||||
|
||||
Loading…
Reference in New Issue
Block a user