mirror of
https://github.com/holub/mame
synced 2025-10-04 16:34:53 +03:00
Merge branch 'master' of https://github.com/mamedev/mame
This commit is contained in:
commit
7a0537104e
@ -329,7 +329,7 @@ Then for each sector:
|
||||
- FM-encoded sector data followed by two bytes of crc
|
||||
- A number of FM-encoded 0xff (usually 48, very variable)
|
||||
|
||||
The the track is finished with a stream of '1' cells.
|
||||
The track is finished with a stream of '1' cells.
|
||||
|
||||
The 125KHz pulse trains are used to lock the PLL to the signal
|
||||
correctly. The specific 16-cells streams allow to distinguish between
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -3,7 +3,7 @@
|
||||
|
||||
<softwarelist name="coco_flop" description="Tandy Radio Shack Color Computer disk images">
|
||||
|
||||
<!-- coco3 only requires 512Kb, audio is a farty, run best with a a 6309? - coco3h driver) -->
|
||||
<!-- coco3 only requires 512Kb, audio is a farty, run best with a 6309? - coco3h driver) -->
|
||||
<!-- RUN"DONKEY" -->
|
||||
<software name="dkong" supported ="partial">
|
||||
<description>Donkey Kong (Sock Master's Donkey Kong Emulator for CoCo 3) (512Kb)</description>
|
||||
|
@ -117,7 +117,7 @@
|
||||
<publisher>LeapFrog</publisher>
|
||||
<part name="cart" interface="leapster_cart">
|
||||
<dataarea name="rom" size="0x800000">
|
||||
<rom name="500-11078-a - lernen mit leap (german)" size="0x800000" crc="e1f505e7" sha1="935eb17d3b6f9df2115a12445b3c8c977005481a" offset="0x00000" />
|
||||
<rom name="500-11078-a - lernen mit leap (german).bin" size="0x800000" crc="e1f505e7" sha1="935eb17d3b6f9df2115a12445b3c8c977005481a" offset="0x00000" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
@ -143,4 +143,116 @@
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="dora" supported="no">
|
||||
<description>Dora - Retter der Wildnis (German)</description>
|
||||
<year>2003</year>
|
||||
<publisher>LeapFrog</publisher>
|
||||
<part name="cart" interface="leapster_cart">
|
||||
<dataarea name="rom" size="0x800000">
|
||||
<rom name="500-12562-b - dora - retter der wildnis (german).bin" size="0x800000" crc="242907d4" sha1="262ee3e208fff0fc362bc879416cbdf31bf38304" offset="0x00000" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="vorschul" supported="no">
|
||||
<description>Vorschule (German)</description>
|
||||
<year>2003</year>
|
||||
<publisher>LeapFrog</publisher>
|
||||
<part name="cart" interface="leapster_cart">
|
||||
<dataarea name="rom" size="0x800000">
|
||||
<rom name="500-10934-a - vorschule (german).bin" size="0x800000" crc="4c5e775e" sha1="87819e1a95f0d435fc94697423fcfca13f463a34" offset="0x00000" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="weltmath" supported="no">
|
||||
<description>Weltraum-Mathe - Lernen im Arcade-Stil! (German)</description>
|
||||
<year>2003</year>
|
||||
<publisher>LeapFrog</publisher>
|
||||
<part name="cart" interface="leapster_cart">
|
||||
<dataarea name="rom" size="0x800000">
|
||||
<rom name="500-12140-a - weltraum-mathe - lernen im arcade-stil! (german).bin" size="0x400000" crc="75164c8e" sha1="6bebaef0d3b6f8a1a4b2bb957a00a0cce4ed65a2" offset="0x00000" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
|
||||
<software name="jedimath" supported="no">
|
||||
<description>Star Wars - Jedi Math (US)</description>
|
||||
<year>2003</year>
|
||||
<publisher>LeapFrog</publisher>
|
||||
<part name="cart" interface="leapster_cart">
|
||||
<dataarea name="rom" size="0x800000">
|
||||
<rom name="500-13306-a - star wars - jedi math (us).bin" size="0x800000" crc="27000674" sha1="a7e8e63ab74931ad9546aba20755714df572badb" offset="0x00000" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="carssc" supported="no">
|
||||
<description>Cars - Supercharged (US)</description>
|
||||
<year>2003</year>
|
||||
<publisher>LeapFrog</publisher>
|
||||
<part name="cart" interface="leapster_cart">
|
||||
<dataarea name="rom" size="0x800000">
|
||||
<rom name="500-12712-a - cars - supercharged (us).bin" size="0x800000" crc="beca3909" sha1="8cda80251d6e45427dba6acbae5dff306eb84d34" offset="0x00000" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="clifread" supported="no">
|
||||
<description>Clifford - The big red dog - Reading (US)</description>
|
||||
<year>2003</year>
|
||||
<publisher>LeapFrog</publisher>
|
||||
<part name="cart" interface="leapster_cart">
|
||||
<dataarea name="rom" size="0x800000">
|
||||
<rom name="500-12466-a - clifford - the big red dog - reading (us).bin" size="0x800000" crc="0134af49" sha1="29c3e2e9d56aeee09c752776bfd8c096e02b75c5" offset="0x00000" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="digdino" supported="no">
|
||||
<description>Digging for Dinosaurs (US)</description>
|
||||
<year>2003</year>
|
||||
<publisher>LeapFrog</publisher>
|
||||
<part name="cart" interface="leapster_cart">
|
||||
<dataarea name="rom" size="0x800000">
|
||||
<rom name="500-13681-a - digging for dinosaurs (us).bin" size="0x800000" crc="822ca3da" sha1="ff0ac7f5fded346553e1a4697b45c27fc04ee3fe" offset="0x00000" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="getpuzld" supported="no">
|
||||
<description>Get Puzzled! (US)</description>
|
||||
<year>2003</year>
|
||||
<publisher>LeapFrog</publisher>
|
||||
<part name="cart" interface="leapster_cart">
|
||||
<dataarea name="rom" size="0x800000">
|
||||
<rom name="500-12692-a - get puzzled! (us).bin" size="0x800000" crc="05b608f0" sha1="04b3181f39e88b6cd47e39a7efb50fa14618ff2c" offset="0x00000" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="hugenose" supported="no">
|
||||
<description>Reading with Phonics - Mole's Huge Nose (US)</description>
|
||||
<year>2003</year>
|
||||
<publisher>LeapFrog</publisher>
|
||||
<part name="cart" interface="leapster_cart">
|
||||
<dataarea name="rom" size="0x800000">
|
||||
<rom name="500-10829-a - reading with phonics - mole's huge nose (us).bin" size="0x800000" crc="2c6e623e" sha1="c298181f00109b7f863fdb12b5bd462085c4ff4f" offset="0x00000" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="imagfrnd" supported="no">
|
||||
<description>Foster's Home for Imaginary Friends (US)</description>
|
||||
<year>2003</year>
|
||||
<publisher>LeapFrog</publisher>
|
||||
<part name="cart" interface="leapster_cart">
|
||||
<dataarea name="rom" size="0x800000">
|
||||
<rom name="500-12715-a - foster's home for imaginary friends (us).bin" size="0x800000" crc="e62d1684" sha1="e43820efe9dbd8dddf6312493a7967c75a29431a" offset="0x00000" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
</softwarelist>
|
||||
|
1228
hash/mc1000_cass.xml
Normal file
1228
hash/mc1000_cass.xml
Normal file
File diff suppressed because it is too large
Load Diff
@ -435,9 +435,10 @@
|
||||
<rom loadflag="load16_word_swap" name="006-p1.p1" offset="0x000000" size="0x080000" crc="d4aaf597" sha1="34d35b71adb5bd06f4f1b50ffd9c58ab9c440a84" />
|
||||
<!-- MB834200 -->
|
||||
</dataarea>
|
||||
<dataarea name="mcu" size="0x1000">
|
||||
<dataarea name="mcu" size="0x2000">
|
||||
<!-- Hitachi HD6301V1 MCU -->
|
||||
<!-- <rom name="hd6301v1p.com", 0x0000, 0x1000, NO_DUMP /> -->
|
||||
<rom offset="0x000000" size="0x02000" name="rhcom.bin" crc="e5cd6306" sha1="f6bbb8ae562804d67e137290c765c3589fa334c0" />
|
||||
<!-- dumped from a prototype with external ROM, not 100% confirmed as being the same on a final, or other games (lbowling, trally) -->
|
||||
</dataarea>
|
||||
<dataarea name="fixed" size="0x040000">
|
||||
<rom offset="0x000000" size="0x020000" name="006-s1.s1" crc="eb5189f0" sha1="0239c342ea62e73140a2306052f226226461a478" />
|
||||
@ -487,9 +488,10 @@
|
||||
<rom loadflag="load16_word_swap" name="006-pg1.p1" offset="0x000000" size="0x080000" status="baddump" crc="52445646" sha1="647bb31f2f68453c1366cb6e2e867e37d1df7a54" />
|
||||
<!-- Chip label p1h does not exist, renamed temporarly to pg1, marked BAD_DUMP. This needs to be verified. -->
|
||||
</dataarea>
|
||||
<dataarea name="mcu" size="0x1000">
|
||||
<dataarea name="mcu" size="0x2000">
|
||||
<!-- Hitachi HD6301V1 MCU -->
|
||||
<!-- <rom name="hd6301v1p.com", 0x0000, 0x1000, NO_DUMP /> -->
|
||||
<rom offset="0x000000" size="0x02000" name="rhcom.bin" crc="e5cd6306" sha1="f6bbb8ae562804d67e137290c765c3589fa334c0" />
|
||||
<!-- dumped from a prototype with external ROM, not 100% confirmed as being the same on a final, or other games (lbowling, trally) -->
|
||||
</dataarea>
|
||||
<dataarea name="fixed" size="0x040000">
|
||||
<rom offset="0x000000" size="0x020000" name="006-s1.s1" crc="eb5189f0" sha1="0239c342ea62e73140a2306052f226226461a478" />
|
||||
@ -3566,7 +3568,7 @@
|
||||
<!-- VIC940800 -->
|
||||
</dataarea>
|
||||
<dataarea name="fixed" size="0x040000">
|
||||
<rom offset="0x000000" size="0x020000" name="060-s1.s1" crc="7f012104" sha1="f366dcc3923655dff16ec08a40d5fce22a84257d" />
|
||||
<rom offset="0x000000" size="0x020000" name="060-s1.s1" crc="d62a72e9" sha1="a23e4c4fd4ec11a7467ce41227c418b4dd1ef649" />
|
||||
<!-- VIC930100 -->
|
||||
</dataarea>
|
||||
<dataarea name="audiocpu" size="0x020000">
|
||||
@ -3604,11 +3606,11 @@
|
||||
<rom loadflag="load16_word_swap" name="060-p1.p1" offset="0x000000" size="0x100000" crc="2a104b50" sha1="3eb663d3df7074e1cdf4c0e450a35c9cf55d8979" />
|
||||
<!-- VIC940800 -->
|
||||
<!-- the rom below acts as a patch to the program rom in the cart, replacing the first 512kb -->
|
||||
<rom loadflag="load16_word_swap" name="060-epr.sp2" offset="0x000000" size="0x080000" status="baddump" crc="3032041b" sha1="4b8ed2e6f74579ea35a53e06ccac42d6905b0f51" />
|
||||
<!-- P is on eprom, correct chip label unknown -->
|
||||
<rom loadflag="load16_word_swap" name="1.sp2" offset="0x000000" size="0x080000" crc="3032041b" sha1="4b8ed2e6f74579ea35a53e06ccac42d6905b0f51" />
|
||||
<!-- P is on eprom, has a Viccom logo at the top of the label with a circled '1' in the center -->
|
||||
</dataarea>
|
||||
<dataarea name="fixed" size="0x040000">
|
||||
<rom offset="0x000000" size="0x020000" name="060-s1.s1" crc="7f012104" sha1="f366dcc3923655dff16ec08a40d5fce22a84257d" />
|
||||
<rom offset="0x000000" size="0x020000" name="060-s1.s1" crc="d62a72e9" sha1="a23e4c4fd4ec11a7467ce41227c418b4dd1ef649" />
|
||||
<!-- VIC930100 -->
|
||||
</dataarea>
|
||||
<dataarea name="audiocpu" size="0x020000">
|
||||
|
240
hash/nes.xml
240
hash/nes.xml
@ -60960,6 +60960,37 @@ preliminary proto for the PAL version, still running on NTSC systems) or the gfx
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<!-- Other two games forming the whole F-646 HIGH K Power Sports 4-in-1 were identical to original releases, so went undumped apparently -->
|
||||
<software name="goal5" cloneof="tecmowc">
|
||||
<description>Goal 5 Soccer (Ripped from F-646 HIGH K Power Sports 4-in-1)</description>
|
||||
<year>19??</year>
|
||||
<publisher><unknown></publisher>
|
||||
<part name="cart" interface="nes_cart">
|
||||
<feature name="slot" value="txrom" />
|
||||
<dataarea name="chr" size="65536">
|
||||
<rom name="goal 5 soccer (unl)[p1][!].chr" size="65536" crc="21e379ee" sha1="4401033269a88d484e6768550f152d3f0a204fd3" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
<dataarea name="prg" size="65536">
|
||||
<rom name="goal 5 soccer (unl)[p1][!].prg" size="65536" crc="04005d22" sha1="74069b62dff0bc05708875cfc7693cb6fadfcd8a" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="hstar2" cloneof="f1hero2">
|
||||
<description>High Way Star II (Ripped from F-646 HIGH K Power Sports 4-in-1)</description>
|
||||
<year>19??</year>
|
||||
<publisher><unknown></publisher>
|
||||
<part name="cart" interface="nes_cart">
|
||||
<feature name="slot" value="txrom" />
|
||||
<dataarea name="chr" size="131072">
|
||||
<rom name="highway star ii (unl)[p1][!].chr" size="131072" crc="8fc24316" sha1="ed6bc1c4f5964b9dfc5146d35cfeebc844b6d488" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
<dataarea name="prg" size="131072">
|
||||
<rom name="highway star ii (unl)[p1][!].prg" size="131072" crc="5a08b5c5" sha1="f7b317584fab6d62274021ff3dd3c7bd0d0a60f4" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="huoyansz">
|
||||
<description>Huo Yan Shi Zhe (Chi)</description>
|
||||
<year>19??</year>
|
||||
@ -61098,6 +61129,37 @@ preliminary proto for the PAL version, still running on NTSC systems) or the gfx
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="intcricka" cloneof="intcrick">
|
||||
<description>International Cricket (Pirate)</description>
|
||||
<year>200?</year>
|
||||
<publisher><pirate></publisher>
|
||||
<part name="cart" interface="nes_cart">
|
||||
<feature name="slot" value="txrom" />
|
||||
<dataarea name="chr" size="262144">
|
||||
<rom name="international cricket (unl).chr" size="262144" crc="75dcab42" sha1="72fb441639dca8a9afb60aa57cb896373033795b" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
<dataarea name="prg" size="262144">
|
||||
<rom name="international cricket (unl).prg" size="262144" crc="ed2c3fa6" sha1="0b273dd380e0d36442d23c472c897ae8e04bb8e2" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<!-- the code has alse been modified to run as standalone -->
|
||||
<software name="intcrickb" cloneof="intcrick">
|
||||
<description>Brian Lara 2003 - International Cricket (Pirate, Alt, Ripped from Multicart)</description>
|
||||
<year>200?</year>
|
||||
<publisher><pirate></publisher>
|
||||
<part name="cart" interface="nes_cart">
|
||||
<feature name="slot" value="txrom" />
|
||||
<dataarea name="chr" size="262144">
|
||||
<rom name="international cricket (unl)(alt version)[f1].chr" size="262144" crc="a09bc9af" sha1="bb57acab0ba404521e06743488da396277b8ee38" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
<dataarea name="prg" size="262144">
|
||||
<rom name="international cricket (unl)(alt version)[f1].prg" size="262144" crc="8bcb7111" sha1="188d02e77d126879419e76099288af88effb28a7" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="jgscs">
|
||||
<description>Jin Gwok Sei Chuen Saang (Chi)</description>
|
||||
<year>1990</year>
|
||||
@ -75953,6 +76015,21 @@ be better to redump them properly. -->
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="mc_4fg">
|
||||
<description>Super 4-in-1 Fantasy Gun</description>
|
||||
<year>19??</year>
|
||||
<publisher><unknown></publisher>
|
||||
<part name="cart" interface="nes_cart">
|
||||
<feature name="slot" value="bmc_hik300" />
|
||||
<dataarea name="chr" size="65536">
|
||||
<rom name="super 4-in-1 fantasy gun [p1][!].chr" size="65536" crc="5516b3f9" sha1="bdbfef593273dd442aeaf38bb6c9b6dd80384c10" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
<dataarea name="prg" size="131072">
|
||||
<rom name="super 4-in-1 fantasy gun [p1][!].prg" size="131072" crc="6fe4a699" sha1="82a65dabd598eff1154af48d17a45ccbb49cec4c" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="mc_4fk21" supported="no">
|
||||
<description>4 in 1 (FK23C8021)</description>
|
||||
<year>19??</year>
|
||||
@ -76550,6 +76627,36 @@ be better to redump them properly. -->
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="mc_500" supported="no">
|
||||
<description>500 in 1</description>
|
||||
<year>19??</year>
|
||||
<publisher><pirate></publisher>
|
||||
<part name="cart" interface="nes_cart">
|
||||
<feature name="slot" value="bmc_hik300" /> <!-- mapper says 217 but it's not gc6in1 either! -->
|
||||
<dataarea name="chr" size="65536">
|
||||
<rom name="500-in-1 (anim splash, no rev, alt mapper)[p1][!].chr" size="65536" crc="25bdd64a" sha1="1f95eaf20fec9058b6917aa47dbdcec4b7a5b87d" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
<dataarea name="prg" size="131072">
|
||||
<rom name="500-in-1 (anim splash, no rev, alt mapper)[p1][!].prg" size="131072" crc="23371b82" sha1="ca87f90300ed0f5cc66884cc994f05d9d888c3c2" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="mc_500a" supported="no">
|
||||
<description>500 in 1 (Alt)</description>
|
||||
<year>19??</year>
|
||||
<publisher><pirate></publisher>
|
||||
<part name="cart" interface="nes_cart">
|
||||
<feature name="slot" value="bmc_hik300" /> <!-- mapper says 217 but it's not gc6in1 either! -->
|
||||
<dataarea name="chr" size="65536">
|
||||
<rom name="500-in-1 (static splash, no rev, alt mapper)[p1][!].chr" size="65536" crc="e7dacb8a" sha1="ece1b9c7fd8be955a1df6c8505533b4fac194eeb" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
<dataarea name="prg" size="131072">
|
||||
<rom name="500-in-1 (static splash, no rev, alt mapper)[p1][!].prg" size="131072" crc="ed2b09a7" sha1="68d1b5063a0126e9a07eba9be532276ba064f147" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="mc_50">
|
||||
<description>50 in 1</description>
|
||||
<year>19??</year>
|
||||
@ -76764,6 +76871,22 @@ be better to redump them properly. -->
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="mc_6ky11" supported="partial">
|
||||
<description>Super 6-in-1 (KY-6011)</description>
|
||||
<year>19??</year>
|
||||
<publisher><unknown></publisher>
|
||||
<part name="cart" interface="nes_cart">
|
||||
<feature name="slot" value="fk23c" />
|
||||
<feature name="pcb" value="BMC-FK23C" />
|
||||
<dataarea name="chr" size="524288">
|
||||
<rom name="super 6-in-1 (ky-6011)[p1][!].chr" size="524288" crc="b1543694" sha1="c756a38ac84d8db59db39b60e37fbdfb8e74c180" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
<dataarea name="prg" size="524288">
|
||||
<rom name="super 6-in-1 (ky-6011)[p1][!].prg" size="524288" crc="850a40cf" sha1="480b5ca7976955bc7cfc128d4303e5de2b419e41" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="mc_6m23" supported="no">
|
||||
<description>6 in 1 (MGC-023)</description>
|
||||
<year>19??</year>
|
||||
@ -77400,6 +77523,38 @@ be better to redump them properly. -->
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="mc_9999a" supported="partial">
|
||||
<description>9999 in 1 (Alt)</description>
|
||||
<year>19??</year>
|
||||
<publisher><pirate></publisher>
|
||||
<part name="cart" interface="nes_cart">
|
||||
<feature name="slot" value="bmc_hik300" />
|
||||
<feature name="pcb" value="BMC-SUPERHIK-300IN1" />
|
||||
<dataarea name="chr" size="65536">
|
||||
<rom name="9999-in-1 (anim splash, rev 11)[p2][!].chr" size="65536" crc="5ee1cd6e" sha1="f896273a27a8efb92e2fdc4e95c30405d411d4df" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
<dataarea name="prg" size="131072">
|
||||
<rom name="9999-in-1 (anim splash, rev 11)[p2][!].prg" size="131072" crc="183fdacb" sha1="350d53910c4bb2036cb7bfd741bc314b15f82cf5" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="mc_9999b" supported="partial">
|
||||
<description>9999 in 1 (Alt 2)</description>
|
||||
<year>19??</year>
|
||||
<publisher><pirate></publisher>
|
||||
<part name="cart" interface="nes_cart">
|
||||
<feature name="slot" value="bmc_hik300" />
|
||||
<feature name="pcb" value="BMC-SUPERHIK-300IN1" />
|
||||
<dataarea name="chr" size="65536">
|
||||
<rom name="9999-in-1 (anim splash, rev 12)[p2][!].chr" size="65536" crc="f3ba9c7c" sha1="8e52170e032c2462666e945116f03d973b2a66e1" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
<dataarea name="prg" size="131072">
|
||||
<rom name="9999-in-1 (anim splash, rev 12)[p2][!].prg" size="131072" crc="33202b3e" sha1="a245fb8a895b4315764bab59c82658d849fd41dd" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="mc_9x7">
|
||||
<description>9999999 in 1</description>
|
||||
<year>19??</year>
|
||||
@ -77416,6 +77571,37 @@ be better to redump them properly. -->
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="mc_9x7a" supported="no">
|
||||
<description>9999999 in 1 (Alt)</description>
|
||||
<year>19??</year>
|
||||
<publisher><pirate></publisher>
|
||||
<part name="cart" interface="nes_cart">
|
||||
<feature name="slot" value="bmc_hik300" /> <!-- mapper says 217 but it's not gc6in1 either! -->
|
||||
<dataarea name="chr" size="65536">
|
||||
<rom name="9999999-in-1 (static splash, no rev, alt mapper)[p1][!].chr" size="65536" crc="25bdd64a" sha1="1f95eaf20fec9058b6917aa47dbdcec4b7a5b87d" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
<dataarea name="prg" size="131072">
|
||||
<rom name="9999999-in-1 (static splash, no rev, alt mapper)[p1][!].prg" size="131072" crc="ed2b09a7" sha1="68d1b5063a0126e9a07eba9be532276ba064f147" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="mc_9x7b">
|
||||
<description>9999999 in 1 (Alt 2)</description>
|
||||
<year>19??</year>
|
||||
<publisher><pirate></publisher>
|
||||
<part name="cart" interface="nes_cart">
|
||||
<feature name="slot" value="bmc_hik300" />
|
||||
<feature name="pcb" value="BMC-SUPERHIK-300IN1" />
|
||||
<dataarea name="chr" size="65536">
|
||||
<rom name="9999999-in-1 (static splash, rev 10)[p1].chr" size="65536" crc="9b6e8be7" sha1="4c53a3d5e510c4355041b9ad88f1e633ce85f916" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
<dataarea name="prg" size="131072">
|
||||
<rom name="9999999-in-1 (static splash, rev 10)[p1].prg" size="131072" crc="00a0d43b" sha1="88f4b987bedfd6c8d5131a2abab26b185b052a21" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="mc_brain" supported="no">
|
||||
<description>Brain Series 13 in 1</description>
|
||||
<year>19??</year>
|
||||
@ -78316,6 +78502,22 @@ to check why this is different -->
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="mc_sh300o" cloneof="mc_sh300">
|
||||
<description>Super HIK 300 in 1 1993</description>
|
||||
<year>19??</year>
|
||||
<publisher><pirate></publisher>
|
||||
<part name="cart" interface="nes_cart">
|
||||
<feature name="slot" value="bmc_hik300" />
|
||||
<feature name="pcb" value="BMC-SUPERHIK-300IN1" />
|
||||
<dataarea name="chr" size="65536">
|
||||
<rom name="1993 super hik 300-in-1 (anim splash, protected, no rev)[p1][!].chr" size="65536" crc="4b5299dd" sha1="5da2c66a289e65ef3c4af25d23b5cd5739762616" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
<dataarea name="prg" size="131072">
|
||||
<rom name="1993 super hik 300-in-1 (anim splash, protected, no rev)[p1][!].prg" size="131072" crc="65d87329" sha1="b75f12fda544d30dafb477908acd9d29b2af91f0" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="mc_sh4a">
|
||||
<description>Super HIK 4 in 1 (S4020)</description>
|
||||
<year>19??</year>
|
||||
@ -78981,7 +79183,7 @@ that the real dumps might surface -->
|
||||
<feature name="slot" value="onebus" />
|
||||
<feature name="pcb" value="UNL-OneBus" />
|
||||
<dataarea name="prg" size="4194304">
|
||||
<rom name="ic1.prg" size="4194304" crc="de76f71f" sha1="ff6b37a76c6463af7ae901918fc008b4a2863951" offset="0" status="baddump" />
|
||||
<rom name="ic1.prg" size="4194304" crc="de76f71f" sha1="ff6b37a76c6463af7ae901918fc008b4a2863951" offset="0" />
|
||||
</dataarea>
|
||||
<!-- 8k VRAM on cartridge -->
|
||||
<dataarea name="vram" size="8192">
|
||||
@ -78997,7 +79199,41 @@ that the real dumps might surface -->
|
||||
<feature name="slot" value="onebus" />
|
||||
<feature name="pcb" value="UNL-OneBus" />
|
||||
<dataarea name="prg" size="4194304">
|
||||
<rom name="ic1_ver2.prg" size="4194304" crc="b97a0dc7" sha1="bace32d73184df914113de5336e29a7a6f4c03fa" offset="0" status="baddump" />
|
||||
<rom name="ic1_ver2.prg" size="4194304" crc="b97a0dc7" sha1="bace32d73184df914113de5336e29a7a6f4c03fa" offset="0" />
|
||||
</dataarea>
|
||||
<!-- 8k VRAM on cartridge -->
|
||||
<dataarea name="vram" size="8192">
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<!-- CoolBoy AEF-390 8bit Console, B8VPCBVer03 20130703 0401E2015897A -->
|
||||
<software name="mc_8x6cb" supported="no">
|
||||
<description>888888 in 1 (Coolboy AEF-390)</description>
|
||||
<year>19??</year>
|
||||
<publisher><unknown></publisher>
|
||||
<part name="cart" interface="nes_cart">
|
||||
<feature name="slot" value="onebus" />
|
||||
<feature name="pcb" value="UNL-OneBus" />
|
||||
<dataarea name="prg" size="4194304">
|
||||
<rom name="888888-in-1 (coolboy aef-390 8bit console, b8vpcbver03 20130703 0401e2015897a)(unl)[u][!].prg" size="4194304" crc="ca4bd948" sha1="cfd6c0b03bb432de43d070100031b223c9ee7496" offset="00000" status="baddump" />
|
||||
</dataarea>
|
||||
<!-- 8k VRAM on cartridge -->
|
||||
<dataarea name="vram" size="8192">
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<!-- PXP2 8Bit Slim Station -->
|
||||
<software name="mc_9x6ss" supported="no">
|
||||
<description>999999 in 1 (PXP2 Slim Station)</description>
|
||||
<year>19??</year>
|
||||
<publisher><unknown></publisher>
|
||||
<part name="cart" interface="nes_cart">
|
||||
<feature name="slot" value="onebus" />
|
||||
<feature name="pcb" value="UNL-OneBus" />
|
||||
<dataarea name="prg" size="4194304">
|
||||
<rom name="s29gl032.u3" size="4194304" crc="9f4194e8" sha1="bd2a356aea56188ea78169095cbbe603d00e0063" offset="00000" />
|
||||
</dataarea>
|
||||
<!-- 8k VRAM on cartridge -->
|
||||
<dataarea name="vram" size="8192">
|
||||
|
@ -1,51 +1,12 @@
|
||||
<?xml version="1.0"?>
|
||||
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
|
||||
|
||||
<softwarelist name="osborne1" description="Osborne-1 floppies">
|
||||
|
||||
<software name="osmosis" supported="no"><!-- boot error -->
|
||||
<description>Osmosis CP/M Disk Emulation System v1.0</description>
|
||||
<year>1983</year>
|
||||
<publisher>Osmosis Computer</publisher>
|
||||
<info name="release" value="198303??"/>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
<feature name="disk_serial" value="1690" />
|
||||
<feature name="disk_label" value="Osmosis CP/M Disk Emulation System for the Osborne 1 Microcomputer" />
|
||||
<dataarea name="flop" size="3154">
|
||||
<rom name="osmo-emu.td0" size="3154" crc="5040c443" sha1="49fc78621b7a9356ebe9ed88fe8ceb1dd9befdbf" offset="0" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="dddist" supported="no"><!-- boot error -->
|
||||
<description>Double Density Distribution v1.4</description>
|
||||
<software name="amcall">
|
||||
<description>AMCALL (v2.06)</description>
|
||||
<year>1982</year>
|
||||
<publisher>Osmosis Computer</publisher>
|
||||
<info name="release" value="198210??"/>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
<feature name="disk_serial" value="2121" />
|
||||
<feature name="disk_label" value="Double Density Distribution" />
|
||||
<dataarea name="flop" size="834">
|
||||
<rom name="osmos-dd.td0" size="834" crc="8b47a452" sha1="1a4746512678b498dce28f28f96396ba31043ccc" offset="0" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="rt60a" supported="no"><!-- boot error -->
|
||||
<description>RT-60A Real Time Clock Software v2.7</description><!-- for the RT-60A Real Time Clock, rom dump needed -->
|
||||
<year>19??</year>
|
||||
<publisher>JG Communications</publisher>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
<feature name="disk_label" value="RT-60A Software" />
|
||||
<dataarea name="flop" size="13793">
|
||||
<rom name="rt-60a.td0" size="13793" crc="241b2497" sha1="1385701061152202db14550f1aad6cd4b190286f" offset="0" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="amcall" supported="no">
|
||||
<description>Auto MicroCALL Communications Program</description>
|
||||
<year>1982</year>
|
||||
<publisher>MicroCALL SERVICES</publisher>
|
||||
<publisher>MicroCALL Services</publisher>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
<dataarea name="flop" size="40392">
|
||||
<rom name="os1mcal.td0" size="40392" crc="ee61a8e9" sha1="1ad5d000e1865ebf7118cbd2fbeee581b3ad226f" offset="0" />
|
||||
@ -53,10 +14,11 @@
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="amcalla" cloneof="amcall" supported="no"><!-- boot error -->
|
||||
<description>AMCALL v2.06 (Alt)</description>
|
||||
<software name="amcalla" cloneof="amcall">
|
||||
<description>AMCALL (v2.06, Alt)</description>
|
||||
<year>1982</year>
|
||||
<publisher>MicroCALL Services</publisher>
|
||||
<info name="usage" value="Requires CP/M disk in drive A"/>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
<feature name="disk_serial" value="1113" />
|
||||
<feature name="part_number" value="2B50002-00" />
|
||||
@ -79,10 +41,11 @@
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="mileston" supported="no"><!-- boot error -->
|
||||
<description>Milestone v1.09</description>
|
||||
<software name="mileston">
|
||||
<description>Milestone (Rev 1.09)</description>
|
||||
<year>1981</year>
|
||||
<publisher>Organic Software</publisher>
|
||||
<info name="usage" value="Requires CP/M disk in drive A"/>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
<feature name="disk_serial" value="302997" />
|
||||
<feature name="part_number" value="2G011501-00" />
|
||||
@ -99,10 +62,11 @@
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="interrog" supported="no"><!-- boot error -->
|
||||
<software name="interrog">
|
||||
<description>Interrogator</description>
|
||||
<year>1984</year>
|
||||
<publisher>Dysan</publisher>
|
||||
<info name="usage" value="Requires CP/M disk in drive A"/>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
<feature name="disk_label" value="Drive Diagnostic Program" />
|
||||
<dataarea name="flop" size="35037">
|
||||
@ -111,10 +75,11 @@
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="microlnk" supported="no"><!-- boot error -->
|
||||
<description>The Micro Link</description>
|
||||
<software name="microlnk">
|
||||
<description>The Micro Link (v2.3)</description>
|
||||
<year>1981</year>
|
||||
<publisher>Wordcraft</publisher>
|
||||
<info name="usage" value="Requires CP/M disk in drive A"/>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
<feature name="disk_serial" value="000835" />
|
||||
<dataarea name="flop" size="6835">
|
||||
@ -123,8 +88,8 @@
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="diag" supported="no"><!-- Bdos Err on A: Select -->
|
||||
<description>Diagnostics?</description>
|
||||
<software name="sysconf">
|
||||
<description>Osborne-1 System Confidence Test (v2.04)</description>
|
||||
<year>19??</year>
|
||||
<publisher><unknown></publisher>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
@ -134,8 +99,20 @@
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="sysconf" supported="no"><!-- cpm plus formatted? -->
|
||||
<description>Osborne-1 System Confidence Test v2.00</description>
|
||||
<software name="sysconfa" cloneof="sysconf">
|
||||
<description>Osborne-1 System Confidence Test (v2.04, Alt)</description>
|
||||
<year>19??</year>
|
||||
<publisher><unknown></publisher>
|
||||
<info name="usage" value="Requires CP/M disk in drive A"/>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
<dataarea name="flop" size="46760">
|
||||
<rom name="os1dias.td0" size="46760" crc="04b4bec8" sha1="d764df88e9f18ca67823f41797bd536e2d4cc606" offset="0" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="sysconfb" cloneof="sysconf" supported="no"> <!-- cpm plus formatted? -->
|
||||
<description>Osborne-1 System Confidence Test (v2.00)</description>
|
||||
<year>19??</year>
|
||||
<publisher><unknown></publisher>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
@ -145,8 +122,8 @@
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="cpm">
|
||||
<description>CP/M for Osborne I v2.20</description>
|
||||
<software name="actcpm">
|
||||
<description>60K CP/M vers 2.20 for Osborne </description>
|
||||
<year>19??</year>
|
||||
<publisher>Australian Computer & Telecommunications</publisher>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
@ -156,8 +133,8 @@
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="basic" supported="no">
|
||||
<description>Osborne 1 BASIC</description>
|
||||
<software name="basic80">
|
||||
<description>BASIC-80 (Rev. 5.21)</description>
|
||||
<year>1981</year>
|
||||
<publisher>Microsoft</publisher>
|
||||
<info name="release" value="19810529"/>
|
||||
@ -168,12 +145,11 @@
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="dbase2" supported="no">
|
||||
<description>dBase II</description>
|
||||
<software name="dbase2">
|
||||
<description>dBase II (v2.3)</description>
|
||||
<year>1982</year>
|
||||
<publisher><unknown></publisher>
|
||||
<info name="release" value="19820106"/>
|
||||
<info name="version" value="2.3" />
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
<dataarea name="flop" size="56706">
|
||||
<rom name="os1dbase.td0" size="56706" crc="1266f67c" sha1="641c271af3681a00e7a2750e20d7fabcaa5adb9f" offset="0" />
|
||||
@ -181,20 +157,9 @@
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="conftest" supported="no">
|
||||
<description>Osbourne 1 System Confidence Test</description>
|
||||
<year>19??</year>
|
||||
<publisher><unknown></publisher>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
<dataarea name="flop" size="46760">
|
||||
<rom name="os1dias.td0" size="46760" crc="04b4bec8" sha1="d764df88e9f18ca67823f41797bd536e2d4cc606" offset="0" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="mdm740" supported="no">
|
||||
<software name="mdm740">
|
||||
<description>MDM740 modem program</description>
|
||||
<year>1985</year>
|
||||
<year>1984</year>
|
||||
<publisher><unknown></publisher>
|
||||
<info name="programmer" value="Irvin M. Hoff"/>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
@ -204,21 +169,10 @@
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="sysdisku" cloneof="sysdisk" supported="no">
|
||||
<description>Osborne 1 System Disk (upgrade rom?)</description>
|
||||
<year>19??</year>
|
||||
<publisher><unknown></publisher>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
<dataarea name="flop" size="57670">
|
||||
<rom name="os1sysd.td0" size="57670" crc="8b67b9cc" sha1="ab49f0ed731e197940b46bf79c6536a9f622d3bb" offset="0" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="sysdisk" supported="no">
|
||||
<description>Osborne 1 System Disk</description>
|
||||
<year>19??</year>
|
||||
<publisher><unknown></publisher>
|
||||
<software name="cpm22">
|
||||
<description>60k CP/M v2.2</description>
|
||||
<year>1981</year>
|
||||
<publisher>Digital Research</publisher>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
<dataarea name="flop" size="49640">
|
||||
<rom name="os1syss.td0" size="49640" crc="47fcb5a7" sha1="287c56f0083303768eea526c98a098b04f0749be" offset="0" />
|
||||
@ -226,7 +180,18 @@
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="utils" supported="no">
|
||||
<software name="cpm22a" cloneof="cpm22">
|
||||
<description>60k CP/M v2.2 (Alt)</description>
|
||||
<year>1981</year>
|
||||
<publisher>Digital Research</publisher>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
<dataarea name="flop" size="57670">
|
||||
<rom name="os1sysd.td0" size="57670" crc="8b67b9cc" sha1="ab49f0ed731e197940b46bf79c6536a9f622d3bb" offset="0" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="utils">
|
||||
<description>Utilities</description>
|
||||
<year>19??</year>
|
||||
<publisher><unknown></publisher>
|
||||
@ -237,10 +202,11 @@
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="xutils" supported="no">
|
||||
<description>Extended Utilities</description><!-- Bdos Err on A: Select -->
|
||||
<software name="xutils">
|
||||
<description>Extended Utilities</description>
|
||||
<year>19??</year>
|
||||
<publisher><unknown></publisher>
|
||||
<info name="usage" value="Requires CP/M disk in drive A"/>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
<dataarea name="flop" size="35382">
|
||||
<rom name="os1xutls.td0" size="35382" crc="630d7091" sha1="a8bc164cf8cb4f5fba49422ac10447ecacbb60dd" offset="0" />
|
||||
@ -248,8 +214,8 @@
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="wordstar" supported="no">
|
||||
<description>Wordstar</description>
|
||||
<software name="wordstar">
|
||||
<description>Wordstar (rel. 2.26)</description>
|
||||
<year>1981</year>
|
||||
<publisher>Micropro International</publisher>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
@ -259,7 +225,7 @@
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="blank" supported="no">
|
||||
<software name="blank">
|
||||
<description>Osborne 1 blank disk</description>
|
||||
<year>19??</year>
|
||||
<publisher><unknown></publisher>
|
||||
@ -269,4 +235,49 @@
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<!-- how are these used? maybe they are bad dumps? -->
|
||||
|
||||
<software name="osmosis" supported="no">
|
||||
<description>Osmosis CP/M Disk Emulation System (v1.0)</description>
|
||||
<year>1983</year>
|
||||
<publisher>Osmosis Computer</publisher>
|
||||
<info name="release" value="198303??"/>
|
||||
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
<feature name="disk_serial" value="1690" />
|
||||
<feature name="disk_label" value="Osmosis CP/M Disk Emulation System for the Osborne 1 Microcomputer" />
|
||||
<dataarea name="flop" size="3154">
|
||||
<rom name="osmo-emu.td0" size="3154" crc="5040c443" sha1="49fc78621b7a9356ebe9ed88fe8ceb1dd9befdbf" offset="0" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="dddist" supported="no">
|
||||
<description>Double Density Distribution (v1.4)</description>
|
||||
<year>1982</year>
|
||||
<publisher>Osmosis Computer</publisher>
|
||||
<info name="release" value="198210??"/>
|
||||
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
<feature name="disk_serial" value="2121" />
|
||||
<feature name="disk_label" value="Double Density Distribution" />
|
||||
<dataarea name="flop" size="834">
|
||||
<rom name="osmos-dd.td0" size="834" crc="8b47a452" sha1="1a4746512678b498dce28f28f96396ba31043ccc" offset="0" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="rt60a" supported="no">
|
||||
<description>RT-60A Real Time Clock Software (v2.7)</description> <!-- for the RT-60A Real Time Clock, rom dump needed -->
|
||||
<year>19??</year>
|
||||
<publisher>JG Communications</publisher>
|
||||
<part name="flop1" interface="floppy_5_25">
|
||||
<feature name="disk_label" value="RT-60A Software" />
|
||||
<dataarea name="flop" size="13793">
|
||||
<rom name="rt-60a.td0" size="13793" crc="241b2497" sha1="1385701061152202db14550f1aad6cd4b190286f" offset="0" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
</softwarelist>
|
2212
hash/psx.xml
Normal file → Executable file
2212
hash/psx.xml
Normal file → Executable file
File diff suppressed because it is too large
Load Diff
10579
hash/tvc_flop.xml
Normal file
10579
hash/tvc_flop.xml
Normal file
File diff suppressed because it is too large
Load Diff
@ -714,6 +714,17 @@ V.Smile Smartbooks
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="alphaprk" supported="no">
|
||||
<description>Alphabet Park Adventure (USA)</description>
|
||||
<year>200?</year>
|
||||
<publisher>VTech</publisher>
|
||||
<part name="cart" interface="vsmile_cart">
|
||||
<dataarea name="rom" size="8388608">
|
||||
<rom name="52-92000.bin" size="8388608" crc="69ef24ff" sha1="82b89bdc5e9050e4152866fc774d3996f9836d65" offset="0" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="ariel" supported="no">
|
||||
<description>Arielle Die Meerjungfrau - Arielles aufregendes Abenteuer (Ger)</description>
|
||||
<year>200?</year>
|
||||
@ -761,6 +772,17 @@ V.Smile Smartbooks
|
||||
</software>
|
||||
|
||||
<software name="cinderla" supported="no">
|
||||
<description>Cinderella - Cinderella's Magic Wishes (USA)</description>
|
||||
<year>200?</year>
|
||||
<publisher>VTech</publisher>
|
||||
<part name="cart" interface="vsmile_cart">
|
||||
<dataarea name="rom" size="8388608">
|
||||
<rom name="52-92240.bin" size="8388608" crc="2723728c" sha1="32fd6a5b9718ccc7e10e64046d7ac320cfa47362" offset="0" />
|
||||
</dataarea>
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="cinderlag" cloneof="cinderla" supported="no">
|
||||
<description>Cinderella - Lernen im Märchenland (Ger, Rev. 1)</description>
|
||||
<year>200?</year>
|
||||
<publisher>VTech</publisher>
|
||||
@ -771,7 +793,7 @@ V.Smile Smartbooks
|
||||
</part>
|
||||
</software>
|
||||
|
||||
<software name="cinderla1" cloneof="cinderla" supported="no">
|
||||
<software name="cinderlag1" cloneof="cinderla" supported="no">
|
||||
<description>Cinderella - Lernen im Märchenland (Ger, Rev. 0)</description>
|
||||
<year>200?</year>
|
||||
<publisher>VTech</publisher>
|
||||
|
@ -16,6 +16,7 @@
|
||||
*/
|
||||
|
||||
#include "sc499.h"
|
||||
#include "formats/ioprocs.h"
|
||||
|
||||
#define VERBOSE 0
|
||||
|
||||
@ -1307,16 +1308,16 @@ void sc499_ctape_image_device::write_block(int block_num, UINT8 *ptr)
|
||||
|
||||
bool sc499_ctape_image_device::call_load()
|
||||
{
|
||||
if (software_entry() == NULL)
|
||||
{
|
||||
m_ctape_data.resize(length());
|
||||
fread(m_ctape_data, length());
|
||||
}
|
||||
else
|
||||
{
|
||||
m_ctape_data.resize(get_software_region_length("ctape"));
|
||||
memcpy(m_ctape_data, get_software_region("ctape"), get_software_region_length("ctape"));
|
||||
}
|
||||
UINT32 size;
|
||||
io_generic io;
|
||||
io.file = (device_image_interface *)this;
|
||||
io.procs = &image_ioprocs;
|
||||
io.filler = 0xff;
|
||||
|
||||
size = io_generic_size(&io);
|
||||
m_ctape_data.resize(size);
|
||||
|
||||
io_generic_read(&io, m_ctape_data, 0, size);
|
||||
|
||||
return IMAGE_INIT_PASS;
|
||||
}
|
||||
|
@ -31,8 +31,7 @@ public:
|
||||
|
||||
// image-level overrides
|
||||
virtual bool call_load();
|
||||
// virtual bool call_softlist_load(software_list_device &swlist, const char *swname, const rom_entry *start_entry) { return load_software(swlist, swname, start_entry); }
|
||||
virtual bool call_softlist_load(software_list_device &swlist, const char *swname, const rom_entry *start_entry) { printf("%s\n", swname); return load_software(swlist, swname, start_entry); }
|
||||
virtual bool call_softlist_load(software_list_device &swlist, const char *swname, const rom_entry *start_entry) { return load_software(swlist, swname, start_entry); }
|
||||
virtual void call_unload();
|
||||
virtual iodevice_t image_type() const { return IO_MAGTAPE; }
|
||||
|
||||
|
@ -63,7 +63,7 @@ public:
|
||||
virtual void device_reset();
|
||||
virtual void device_config_complete();
|
||||
|
||||
void clock_w(bool state) { if(m_clock && !m_sel && !state && !m_pad) do_card(); m_clock = state; }
|
||||
void clock_w(bool state) { if(!m_clock && !m_sel && state && !m_pad) do_card(); m_clock = state; }
|
||||
void sel_w(bool state);
|
||||
bool rx_r() { return m_rx; }
|
||||
bool ack_r() { return m_ack; }
|
||||
|
@ -79,9 +79,9 @@ void psx_multitap_device::set_tx_line(bool tx, int port)
|
||||
dev = m_portd;
|
||||
break;
|
||||
}
|
||||
dev->clock_w(1);
|
||||
dev->tx_w(tx);
|
||||
dev->clock_w(0);
|
||||
dev->tx_w(tx);
|
||||
dev->clock_w(1);
|
||||
}
|
||||
|
||||
bool psx_multitap_device::get_rx_line(int port)
|
||||
|
@ -76,8 +76,8 @@
|
||||
#define ALTO2_DISPLAY_HEIGHT 808 //!< number of visible scanlines per frame; 808 really, but there are some empty lines?
|
||||
#define ALTO2_DISPLAY_WIDTH 606 //!< visible width of the display; 38 x 16 bit words - 2 pixels
|
||||
#define ALTO2_DISPLAY_VISIBLE_WORDS ((ALTO2_DISPLAY_WIDTH+15)/16) //!< visible words per scanline
|
||||
#define ALTO2_DISPLAY_BITCLOCK 20160000ll //!< display bit clock in in Hertz (20.16MHz)
|
||||
#define ALTO2_DISPLAY_BITTIME(n) (U64(1000000000000)*(n)/ALTO2_DISPLAY_BITCLOCK) //!< display bit time in in pico seconds (~= 49.6031ns)
|
||||
#define ALTO2_DISPLAY_BITCLOCK 20160000ll //!< display bit clock in Hertz (20.16MHz)
|
||||
#define ALTO2_DISPLAY_BITTIME(n) (U64(1000000000000)*(n)/ALTO2_DISPLAY_BITCLOCK) //!< display bit time in pico seconds (~= 49.6031ns)
|
||||
#define ALTO2_DISPLAY_SCANLINE_TIME ALTO2_DISPLAY_BITTIME(ALTO2_DISPLAY_TOTAL_WIDTH)//!< time for a scanline in pico seconds (768 * 49.6031ns ~= 38095.1808ns)
|
||||
#define ALTO2_DISPLAY_VISIBLE_TIME ALTO2_DISPLAY_BITTIME(ALTO2_DISPLAY_WIDTH) //!< time of the visible part of a scanline in pico seconds (606 * 49.6031ns ~= 30059.4786ns)
|
||||
#define ALTO2_DISPLAY_WORD_TIME ALTO2_DISPLAY_BITTIME(16) //!< time for a word in pico seconds (16 pixels * 49.6031ns ~= 793.6496ns)
|
||||
|
@ -416,7 +416,7 @@ void alto2_cpu_device::eth_wakeup()
|
||||
* polynomials listed in Tabel I by applying the appropriate logic levels
|
||||
* to the select pins S0, S1 and S2.
|
||||
*
|
||||
* Teh 'F401 consists of a 16-bit register, a Read Only Memory (ROM) and
|
||||
* The 'F401 consists of a 16-bit register, a Read Only Memory (ROM) and
|
||||
* associated control circuitry as shown in the block diagram. The
|
||||
* polynomial control code presented at inputs S0, S1 and S2 is decoded
|
||||
* by the ROM, selecting the desired polynomial by establishing shift
|
||||
|
122
src/emu/cpu/arc/arc.c
Normal file
122
src/emu/cpu/arc/arc.c
Normal file
@ -0,0 +1,122 @@
|
||||
/*********************************\
|
||||
|
||||
ARCtangent (A4) core
|
||||
ARC == Argonaut RISC Core
|
||||
|
||||
(this is a skeleton core)
|
||||
|
||||
\*********************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "debugger.h"
|
||||
#include "arc.h"
|
||||
|
||||
|
||||
const device_type ARC = &device_creator<arc_device>;
|
||||
|
||||
|
||||
arc_device::arc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: cpu_device(mconfig, ARC, "ARCtangent A4", tag, owner, clock, "arc", __FILE__)
|
||||
, m_program_config("program", ENDIANNESS_BIG, 32, 24, 0) // some docs describe these as 'middle endian'?!
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
offs_t arc_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
|
||||
{
|
||||
extern CPU_DISASSEMBLE( arc );
|
||||
return CPU_DISASSEMBLE_NAME(arc)(this, buffer, pc, oprom, opram, options);
|
||||
}
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
void arc_device::unimplemented_opcode(UINT16 op)
|
||||
{
|
||||
fatalerror("arc: unknown opcode %04x at %04x\n", op, m_pc << 2);
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
UINT32 arc_device::READ32(UINT32 address)
|
||||
{
|
||||
return m_program->read_dword(address << 2);
|
||||
}
|
||||
|
||||
void arc_device::WRITE32(UINT32 address, UINT32 data)
|
||||
{
|
||||
m_program->write_dword(address << 2, data);
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
void arc_device::device_start()
|
||||
{
|
||||
m_pc = 0;
|
||||
|
||||
m_debugger_temp = 0;
|
||||
|
||||
m_program = &space(AS_PROGRAM);
|
||||
|
||||
state_add( 0, "PC", m_debugger_temp).callimport().callexport().formatstr("%08X");
|
||||
state_add(STATE_GENPC, "GENPC", m_debugger_temp).callexport().noshow();
|
||||
|
||||
m_icountptr = &m_icount;
|
||||
}
|
||||
|
||||
void arc_device::state_export(const device_state_entry &entry)
|
||||
{
|
||||
switch (entry.index())
|
||||
{
|
||||
case 0:
|
||||
m_debugger_temp = m_pc << 2;
|
||||
break;
|
||||
|
||||
case STATE_GENPC:
|
||||
m_debugger_temp = m_pc << 2;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void arc_device::state_import(const device_state_entry &entry)
|
||||
{
|
||||
switch (entry.index())
|
||||
{
|
||||
case 0:
|
||||
m_pc = (m_debugger_temp & 0xfffffffc) >> 2;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void arc_device::device_reset()
|
||||
{
|
||||
m_pc = 0x00000000;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
void arc_device::execute_set_input(int irqline, int state)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
|
||||
void arc_device::execute_run()
|
||||
{
|
||||
//UINT32 lres;
|
||||
//lres = 0;
|
||||
|
||||
while (m_icount > 0)
|
||||
{
|
||||
debugger_instruction_hook(this, m_pc<<2);
|
||||
|
||||
//UINT32 op = READ32(m_pc);
|
||||
|
||||
m_pc++;
|
||||
|
||||
m_icount--;
|
||||
}
|
||||
|
||||
}
|
73
src/emu/cpu/arc/arc.h
Normal file
73
src/emu/cpu/arc/arc.h
Normal file
@ -0,0 +1,73 @@
|
||||
/*********************************\
|
||||
|
||||
ARCtangent (A4) core
|
||||
ARC == Argonaut RISC Core
|
||||
|
||||
\*********************************/
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifndef __ARC_H__
|
||||
#define __ARC_H__
|
||||
|
||||
class arc_device : public cpu_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
arc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
|
||||
// device_execute_interface overrides
|
||||
virtual UINT32 execute_min_cycles() const { return 5; }
|
||||
virtual UINT32 execute_max_cycles() const { return 5; }
|
||||
virtual UINT32 execute_input_lines() const { return 0; }
|
||||
virtual void execute_run();
|
||||
virtual void execute_set_input(int inputnum, int state);
|
||||
|
||||
// device_memory_interface overrides
|
||||
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : NULL; }
|
||||
|
||||
// device_state_interface overrides
|
||||
virtual void state_import(const device_state_entry &entry);
|
||||
virtual void state_export(const device_state_entry &entry);
|
||||
|
||||
// device_disasm_interface overrides
|
||||
virtual UINT32 disasm_min_opcode_bytes() const { return 4; }
|
||||
virtual UINT32 disasm_max_opcode_bytes() const { return 4; }
|
||||
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
|
||||
|
||||
private:
|
||||
address_space_config m_program_config;
|
||||
|
||||
// 0 - 28 = r00 - r28 (General Purpose Registers)
|
||||
// 29 = r29 (ILINK1)
|
||||
// 30 = r30 (ILINE2)
|
||||
// 31 = r31 (BLINK)
|
||||
// 32- 59 = r32 - r59 (Reserved Registers)
|
||||
// 60 = LPCOUNT
|
||||
// 61 = Short Immediate Data Indicator Settings Flag
|
||||
// 62 = Long Immediate Data Indicator
|
||||
// 63 = Short Immediate Data Indicator NOT Settings Flag
|
||||
UINT32 m_pc;
|
||||
//UINT32 m_r[64];
|
||||
|
||||
|
||||
address_space *m_program;
|
||||
int m_icount;
|
||||
|
||||
UINT32 m_debugger_temp;
|
||||
|
||||
void unimplemented_opcode(UINT16 op);
|
||||
inline UINT32 READ32(UINT32 address);
|
||||
inline void WRITE32(UINT32 address, UINT32 data);
|
||||
};
|
||||
|
||||
|
||||
extern const device_type ARC;
|
||||
|
||||
|
||||
#endif /* __ARC_H__ */
|
222
src/emu/cpu/arc/arcdasm.c
Normal file
222
src/emu/cpu/arc/arcdasm.c
Normal file
@ -0,0 +1,222 @@
|
||||
/*********************************\
|
||||
|
||||
ARCtangent A4 disassembler
|
||||
|
||||
\*********************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include <stdarg.h>
|
||||
|
||||
static char *output;
|
||||
|
||||
static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
|
||||
{
|
||||
va_list vl;
|
||||
|
||||
va_start(vl, fmt);
|
||||
vsprintf(output, fmt, vl);
|
||||
va_end(vl);
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
static const char *basic[0x20] =
|
||||
{
|
||||
/* 00 */ "LD r+r",
|
||||
/* 01 */ "LD r+o",
|
||||
/* 02 */ "ST r+o",
|
||||
/* 03 */ "extended",
|
||||
/* 04 */ "B",
|
||||
/* 05 */ "BL",
|
||||
/* 06 */ "LPcc",
|
||||
/* 07 */ "Jcc JLcc",
|
||||
/* 08 */ "ADD",
|
||||
/* 09 */ "ADC",
|
||||
/* 0a */ "SUB",
|
||||
/* 0b */ "SBC",
|
||||
/* 0c */ "AND",
|
||||
/* 0d */ "OR",
|
||||
/* 0e */ "BIC",
|
||||
/* 0f */ "XOR",
|
||||
/* 10 */ "ASL",
|
||||
/* 11 */ "LSR",
|
||||
/* 12 */ "ASR",
|
||||
/* 13 */ "ROR",
|
||||
/* 14 */ "MUL64",
|
||||
/* 15 */ "MULU64",
|
||||
/* 16 */ "undefined",
|
||||
/* 17 */ "undefined",
|
||||
/* 18 */ "undefined",
|
||||
/* 19 */ "undefined",
|
||||
/* 1a */ "undefined",
|
||||
/* 1b */ "undefined",
|
||||
/* 1c */ "undefined",
|
||||
/* 1d */ "undefined",
|
||||
/* 1e */ "MAX",
|
||||
/* 1f */ "MIN"
|
||||
};
|
||||
|
||||
static const char *conditions[0x20] =
|
||||
{
|
||||
/* 00 */ "AL", // (aka RA - Always)
|
||||
/* 01 */ "EQ", // (aka Z - Zero
|
||||
/* 02 */ "NE", // (aka NZ - Non-Zero)
|
||||
/* 03 */ "PL", // (aka P - Positive)
|
||||
/* 04 */ "MI", // (aka N - Negative)
|
||||
/* 05 */ "CS", // (aka C, LO - Carry set / Lower than) (unsigned)
|
||||
/* 06 */ "CC", // (aka CC, NC, HS - Carry Clear / Higher or Same) (unsigned)
|
||||
/* 07 */ "VS", // (aka V - Overflow set)
|
||||
/* 08 */ "VC", // (aka NV - Overflow clear)
|
||||
/* 09 */ "GT", // ( - Greater than) (signed)
|
||||
/* 0a */ "GE", // ( - Greater than or Equal) (signed)
|
||||
/* 0b */ "LT", // ( - Less than) (signed)
|
||||
/* 0c */ "LE", // ( - Less than or Equal) (signed)
|
||||
/* 0d */ "HI", // ( - Higher than) (unsigned)
|
||||
/* 0e */ "LS", // ( - Lower or Same) (unsigned)
|
||||
/* 0f */ "PNZ",// ( - Positive non-0 value)
|
||||
/* 10 */ "0x10 Reserved", // possible CPU implementation specifics
|
||||
/* 11 */ "0x11 Reserved",
|
||||
/* 12 */ "0x12 Reserved",
|
||||
/* 13 */ "0x13 Reserved",
|
||||
/* 14 */ "0x14 Reserved",
|
||||
/* 15 */ "0x15 Reserved",
|
||||
/* 16 */ "0x16 Reserved",
|
||||
/* 17 */ "0x17 Reserved",
|
||||
/* 18 */ "0x18 Reserved",
|
||||
/* 19 */ "0x19 Reserved",
|
||||
/* 1a */ "0x1a Reserved",
|
||||
/* 1b */ "0x1b Reserved",
|
||||
/* 1c */ "0x1c Reserved",
|
||||
/* 1d */ "0x1d Reserved",
|
||||
/* 1e */ "0x1e Reserved",
|
||||
/* 1f */ "0x1f Reserved"
|
||||
};
|
||||
|
||||
static const char *delaytype[0x4] =
|
||||
{
|
||||
"ND", // NO DELAY - execute next instruction only when NOT jumping
|
||||
"D", // always execute next instruction
|
||||
"JD", // only execute next instruction when jumping
|
||||
"Res!", // reserved / invalid
|
||||
};
|
||||
|
||||
static const char *regnames[0x40] =
|
||||
{
|
||||
/* 0x00 */ "r00",
|
||||
/* 0x01 */ "r01",
|
||||
/* 0x02 */ "r02",
|
||||
/* 0x03 */ "r03",
|
||||
/* 0x04 */ "r04",
|
||||
/* 0x05 */ "r05",
|
||||
/* 0x06 */ "r06",
|
||||
/* 0x07 */ "r07",
|
||||
/* 0x08 */ "r08",
|
||||
/* 0x09 */ "r09",
|
||||
/* 0x0a */ "r10",
|
||||
/* 0x0b */ "r11",
|
||||
/* 0x0c */ "r12",
|
||||
/* 0x0d */ "r13",
|
||||
/* 0x0e */ "r14",
|
||||
/* 0x0f */ "r15",
|
||||
|
||||
/* 0x10 */ "r16",
|
||||
/* 0x11 */ "r17",
|
||||
/* 0x12 */ "r18",
|
||||
/* 0x13 */ "r19",
|
||||
/* 0x14 */ "r20",
|
||||
/* 0x15 */ "r21",
|
||||
/* 0x16 */ "r22",
|
||||
/* 0x17 */ "r23",
|
||||
/* 0x18 */ "r24",
|
||||
/* 0x19 */ "r25",
|
||||
/* 0x1a */ "r26",
|
||||
/* 0x1b */ "r27",
|
||||
/* 0x1c */ "r28",
|
||||
/* 0x1d */ "ILINK1",
|
||||
/* 0x1e */ "ILINK2",
|
||||
/* 0x1f */ "BLINK",
|
||||
|
||||
/* 0x20 */ "r32res", // reserved for manufacturer specific extensions
|
||||
/* 0x21 */ "r33res",
|
||||
/* 0x22 */ "r34res",
|
||||
/* 0x23 */ "r35res",
|
||||
/* 0x24 */ "r36res",
|
||||
/* 0x25 */ "r37res",
|
||||
/* 0x26 */ "r38res",
|
||||
/* 0x27 */ "r39res",
|
||||
/* 0x28 */ "r40res",
|
||||
/* 0x29 */ "r41res",
|
||||
/* 0x2a */ "r42res",
|
||||
/* 0x2b */ "r43res",
|
||||
/* 0x2c */ "r44res",
|
||||
/* 0x2d */ "r45res",
|
||||
/* 0x2e */ "r46res",
|
||||
/* 0x2f */ "r47res",
|
||||
|
||||
/* 0x30 */ "r48res",
|
||||
/* 0x31 */ "r49res",
|
||||
/* 0x32 */ "r50res",
|
||||
/* 0x33 */ "r51res",
|
||||
/* 0x34 */ "r52res",
|
||||
/* 0x35 */ "r53res",
|
||||
/* 0x36 */ "r54res",
|
||||
/* 0x37 */ "r55res",
|
||||
/* 0x38 */ "r56res",
|
||||
/* 0x39 */ "r57res",
|
||||
/* 0x3a */ "r58res",
|
||||
/* 0x3b */ "r59res",
|
||||
/* 0x3c */ "LPCOUNT",
|
||||
/* 0x3d */ "sImm F",
|
||||
/* 0x3e */ "lImm",
|
||||
/* 0x3f */ "sImm NF",
|
||||
};
|
||||
|
||||
#define ARC_CONDITION ((op & 0x0000001f) >> 0 ) // aka Q
|
||||
|
||||
// used in jumps
|
||||
#define ARC_BRANCH_DELAY ((op & 0x00000060) >> 5 ) // aka N
|
||||
#define ARC_BRANCH_ADDR ((op & 0x07ffff80) >> 7 ) // aka L
|
||||
|
||||
#define ARC_OPERATION ((op & 0xf8000000) >> 27)
|
||||
|
||||
#define ARC_REGOP_DEST ((op & 0x07e00000) >> 21 ) // aka A
|
||||
#define ARC_REGOP_OP1 ((op & 0x001f8000) >> 15 ) // aka B
|
||||
#define ARC_REGOP_OP2 ((op & 0x00007e00) >> 9 ) // aka C
|
||||
#define ARC_REGOP_SHIMM ((op & 0x000001ff) >> 0 ) // aka D
|
||||
|
||||
|
||||
CPU_DISASSEMBLE(arc)
|
||||
{
|
||||
UINT32 op = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
|
||||
op = BIG_ENDIANIZE_INT32(op);
|
||||
|
||||
output = buffer;
|
||||
|
||||
UINT8 opcode = ARC_OPERATION;
|
||||
|
||||
switch (opcode)
|
||||
{
|
||||
case 0x04: // B
|
||||
case 0x05: // BL
|
||||
print("%s(%s)(%s) %08x", basic[opcode], conditions[ARC_CONDITION], delaytype[ARC_BRANCH_DELAY], (ARC_BRANCH_ADDR<<2)+pc+4);
|
||||
break;
|
||||
|
||||
case 0x08: // ADD
|
||||
// todo, short / long immediate formats
|
||||
print("%s %s , %s , %s (%08x)", basic[opcode], regnames[ARC_REGOP_DEST], regnames[ARC_REGOP_OP1], regnames[ARC_REGOP_OP2], op &~ 0xfffffe00);
|
||||
break;
|
||||
|
||||
|
||||
default:
|
||||
print("%s (%08x)", basic[opcode], op &~ 0xf8000000);
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
|
||||
return 4 | DASMFLAG_SUPPORTED;
|
||||
}
|
143
src/emu/cpu/arcompact/arcompact.c
Normal file
143
src/emu/cpu/arcompact/arcompact.c
Normal file
@ -0,0 +1,143 @@
|
||||
/*********************************\
|
||||
|
||||
ARCompact Core
|
||||
|
||||
The following procesors use the ARCompact instruction set
|
||||
|
||||
- ARCtangent-A5
|
||||
- ARC 600
|
||||
- ARC 700
|
||||
|
||||
(this is a skeleton core)
|
||||
|
||||
ARCompact is a 32-bit CPU that freely mixes 32-bit and 16-bit instructions
|
||||
various user customizations could be made as with the ARC A4 based processors
|
||||
these include custom instructions and registers.
|
||||
|
||||
\*********************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "debugger.h"
|
||||
#include "arcompact.h"
|
||||
|
||||
|
||||
const device_type ARCA5 = &device_creator<arcompact_device>;
|
||||
|
||||
|
||||
arcompact_device::arcompact_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: cpu_device(mconfig, ARCA5, "ARCtangent-A5", tag, owner, clock, "arca5", __FILE__)
|
||||
, m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0) // some docs describe these as 'middle endian'?!
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
offs_t arcompact_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
|
||||
{
|
||||
extern CPU_DISASSEMBLE( arcompact );
|
||||
return CPU_DISASSEMBLE_NAME(arcompact)(this, buffer, pc, oprom, opram, options);
|
||||
}
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
void arcompact_device::unimplemented_opcode(UINT16 op)
|
||||
{
|
||||
fatalerror("ARCOMPACT: unknown opcode %04x at %04x\n", op, m_pc << 2);
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
UINT32 arcompact_device::READ32(UINT32 address)
|
||||
{
|
||||
return m_program->read_dword(address << 2);
|
||||
}
|
||||
|
||||
void arcompact_device::WRITE32(UINT32 address, UINT32 data)
|
||||
{
|
||||
m_program->write_dword(address << 2, data);
|
||||
}
|
||||
|
||||
UINT16 arcompact_device::READ16(UINT32 address)
|
||||
{
|
||||
return m_program->read_word(address << 1);
|
||||
}
|
||||
|
||||
void arcompact_device::WRITE16(UINT32 address, UINT16 data)
|
||||
{
|
||||
m_program->write_word(address << 1, data);
|
||||
}
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
void arcompact_device::device_start()
|
||||
{
|
||||
m_pc = 0;
|
||||
|
||||
m_debugger_temp = 0;
|
||||
|
||||
m_program = &space(AS_PROGRAM);
|
||||
|
||||
state_add( 0, "PC", m_debugger_temp).callimport().callexport().formatstr("%08X");
|
||||
state_add(STATE_GENPC, "GENPC", m_debugger_temp).callexport().noshow();
|
||||
|
||||
m_icountptr = &m_icount;
|
||||
}
|
||||
|
||||
void arcompact_device::state_export(const device_state_entry &entry)
|
||||
{
|
||||
switch (entry.index())
|
||||
{
|
||||
case 0:
|
||||
m_debugger_temp = m_pc << 1;
|
||||
break;
|
||||
|
||||
case STATE_GENPC:
|
||||
m_debugger_temp = m_pc << 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void arcompact_device::state_import(const device_state_entry &entry)
|
||||
{
|
||||
switch (entry.index())
|
||||
{
|
||||
case 0:
|
||||
m_pc = (m_debugger_temp & 0xfffffffe) >> 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void arcompact_device::device_reset()
|
||||
{
|
||||
m_pc = 0x00000000;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
void arcompact_device::execute_set_input(int irqline, int state)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
|
||||
void arcompact_device::execute_run()
|
||||
{
|
||||
//UINT32 lres;
|
||||
//lres = 0;
|
||||
|
||||
while (m_icount > 0)
|
||||
{
|
||||
debugger_instruction_hook(this, m_pc<<2);
|
||||
|
||||
//UINT32 op = READ32(m_pc);
|
||||
|
||||
|
||||
m_pc++;
|
||||
|
||||
m_icount--;
|
||||
}
|
||||
|
||||
}
|
65
src/emu/cpu/arcompact/arcompact.h
Normal file
65
src/emu/cpu/arcompact/arcompact.h
Normal file
@ -0,0 +1,65 @@
|
||||
/*********************************\
|
||||
|
||||
ARCompact Core
|
||||
|
||||
\*********************************/
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifndef __ARCOMPACT_H__
|
||||
#define __ARCOMPACT_H__
|
||||
|
||||
class arcompact_device : public cpu_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
arcompact_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
|
||||
// device_execute_interface overrides
|
||||
virtual UINT32 execute_min_cycles() const { return 5; }
|
||||
virtual UINT32 execute_max_cycles() const { return 5; }
|
||||
virtual UINT32 execute_input_lines() const { return 0; }
|
||||
virtual void execute_run();
|
||||
virtual void execute_set_input(int inputnum, int state);
|
||||
|
||||
// device_memory_interface overrides
|
||||
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : NULL; }
|
||||
|
||||
// device_state_interface overrides
|
||||
virtual void state_import(const device_state_entry &entry);
|
||||
virtual void state_export(const device_state_entry &entry);
|
||||
|
||||
// device_disasm_interface overrides
|
||||
virtual UINT32 disasm_min_opcode_bytes() const { return 2; }
|
||||
virtual UINT32 disasm_max_opcode_bytes() const { return 4; }
|
||||
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
|
||||
|
||||
private:
|
||||
address_space_config m_program_config;
|
||||
|
||||
UINT32 m_pc;
|
||||
|
||||
address_space *m_program;
|
||||
int m_icount;
|
||||
|
||||
UINT32 m_debugger_temp;
|
||||
|
||||
void unimplemented_opcode(UINT16 op);
|
||||
inline UINT32 READ32(UINT32 address);
|
||||
inline void WRITE32(UINT32 address, UINT32 data);
|
||||
inline UINT16 READ16(UINT32 address);
|
||||
inline void WRITE16(UINT32 address, UINT16 data);
|
||||
|
||||
|
||||
};
|
||||
|
||||
|
||||
extern const device_type ARCA5;
|
||||
|
||||
|
||||
#endif /* __ARCOMPACT_H__ */
|
378
src/emu/cpu/arcompact/arcompactdasm.c
Normal file
378
src/emu/cpu/arcompact/arcompactdasm.c
Normal file
@ -0,0 +1,378 @@
|
||||
/*********************************\
|
||||
|
||||
ARCompact disassembler
|
||||
|
||||
\*********************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include <stdarg.h>
|
||||
|
||||
static char *output;
|
||||
|
||||
static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
|
||||
{
|
||||
va_list vl;
|
||||
|
||||
va_start(vl, fmt);
|
||||
vsprintf(output, fmt, vl);
|
||||
va_end(vl);
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
|
||||
static const char *basic[0x20] =
|
||||
{
|
||||
/* opcode below are 32-bit mode */
|
||||
/* 00 */ "Bcc",
|
||||
/* 01 */ "BLcc/BRcc",
|
||||
/* 02 */ "LD r+o",
|
||||
/* 03 */ "ST r+o",
|
||||
/* 04 */ "op a,b,c (basecase)", // basecase ops
|
||||
/* 05 */ "op a,b,c (05 ARC ext)", // ARC processor specific extensions
|
||||
/* 06 */ "op a,b,c (06 ARC ext)",
|
||||
/* 07 */ "op a,b,c (07 User ext)", // User speciifc extensions
|
||||
/* 08 */ "op a,b,c (08 User ext)",
|
||||
/* 09 */ "op a,b,c (09 Market ext)", // Market specific extensions
|
||||
/* 0a */ "op a,b,c (0a Market ext)",
|
||||
/* 0b */ "op a,b,c (0b Market ext)",
|
||||
/* opcodes below are 16-bit mode */
|
||||
/* 0c */ "Load/Add reg-reg",
|
||||
/* 0d */ "Add/Sub/Shft imm",
|
||||
/* 0e */ "Mov/Cmp/Add",
|
||||
/* 0f */ "op_S b,b,c", // single ops
|
||||
/* 10 */ "LD_S",
|
||||
/* 11 */ "LDB_S",
|
||||
/* 12 */ "LDW_S",
|
||||
/* 13 */ "LSW_S.X",
|
||||
/* 14 */ "ST_S",
|
||||
/* 15 */ "STB_S",
|
||||
/* 16 */ "STW_S",
|
||||
/* 17 */ "Shift/Sub/Bit",
|
||||
/* 18 */ "Stack Instr",
|
||||
/* 19 */ "GP Instr",
|
||||
/* 1a */ "PCL Instr",
|
||||
/* 1b */ "MOV_S",
|
||||
/* 1c */ "ADD_S/CMP_S",
|
||||
/* 1d */ "BRcc_S",
|
||||
/* 1e */ "Bcc_S",
|
||||
/* 1f */ "BL_S"
|
||||
};
|
||||
|
||||
// condition codes (basic ones are the same as arc
|
||||
static const char *conditions[0x20] =
|
||||
{
|
||||
/* 00 */ "AL", // (aka RA - Always)
|
||||
/* 01 */ "EQ", // (aka Z - Zero
|
||||
/* 02 */ "NE", // (aka NZ - Non-Zero)
|
||||
/* 03 */ "PL", // (aka P - Positive)
|
||||
/* 04 */ "MI", // (aka N - Negative)
|
||||
/* 05 */ "CS", // (aka C, LO - Carry set / Lower than) (unsigned)
|
||||
/* 06 */ "CC", // (aka CC, NC, HS - Carry Clear / Higher or Same) (unsigned)
|
||||
/* 07 */ "VS", // (aka V - Overflow set)
|
||||
/* 08 */ "VC", // (aka NV - Overflow clear)
|
||||
/* 09 */ "GT", // ( - Greater than) (signed)
|
||||
/* 0a */ "GE", // ( - Greater than or Equal) (signed)
|
||||
/* 0b */ "LT", // ( - Less than) (signed)
|
||||
/* 0c */ "LE", // ( - Less than or Equal) (signed)
|
||||
/* 0d */ "HI", // ( - Higher than) (unsigned)
|
||||
/* 0e */ "LS", // ( - Lower or Same) (unsigned)
|
||||
/* 0f */ "PNZ",// ( - Positive non-0 value)
|
||||
/* 10 */ "0x10 Reserved", // possible CPU implementation specifics
|
||||
/* 11 */ "0x11 Reserved",
|
||||
/* 12 */ "0x12 Reserved",
|
||||
/* 13 */ "0x13 Reserved",
|
||||
/* 14 */ "0x14 Reserved",
|
||||
/* 15 */ "0x15 Reserved",
|
||||
/* 16 */ "0x16 Reserved",
|
||||
/* 17 */ "0x17 Reserved",
|
||||
/* 18 */ "0x18 Reserved",
|
||||
/* 19 */ "0x19 Reserved",
|
||||
/* 1a */ "0x1a Reserved",
|
||||
/* 1b */ "0x1b Reserved",
|
||||
/* 1c */ "0x1c Reserved",
|
||||
/* 1d */ "0x1d Reserved",
|
||||
/* 1e */ "0x1e Reserved",
|
||||
/* 1f */ "0x1f Reserved"
|
||||
};
|
||||
|
||||
static const char *table01_01_0x[0x10] =
|
||||
{
|
||||
/* 00 */ "BREQ",
|
||||
/* 01 */ "BRNE",
|
||||
/* 02 */ "BRLT",
|
||||
/* 03 */ "BRGE",
|
||||
/* 04 */ "BRLO",
|
||||
/* 05 */ "BRHS",
|
||||
/* 06 */ "<reserved>",
|
||||
/* 07 */ "<reserved>",
|
||||
/* 08 */ "<reserved>",
|
||||
/* 09 */ "<reserved>",
|
||||
/* 0a */ "<reserved>",
|
||||
/* 0b */ "<reserved>",
|
||||
/* 0c */ "<reserved>",
|
||||
/* 0d */ "<reserved>",
|
||||
/* 0e */ "<BBIT0>",
|
||||
/* 0f */ "<BBIT1>"
|
||||
};
|
||||
|
||||
static const char *table18[0x8] =
|
||||
{
|
||||
/* 00 */ "LD_S (SP)",
|
||||
/* 01 */ "LDB_S (SP)",
|
||||
/* 02 */ "ST_S (SP)",
|
||||
/* 03 */ "STB_S (SP)",
|
||||
/* 04 */ "ADD_S (SP)",
|
||||
/* 05 */ "ADD_S/SUB_S (SP)",
|
||||
/* 06 */ "POP_S (SP)",
|
||||
/* 07 */ "PUSH_S (SP)",
|
||||
|
||||
};
|
||||
|
||||
static const char *table0f[0x20] =
|
||||
{
|
||||
/* 00 */ "SOPs", // Sub Operation (another table..) ( table0f_00 )
|
||||
/* 01 */ "0x01 <illegal>",
|
||||
/* 02 */ "SUB_S",
|
||||
/* 03 */ "0x03 <illegal>",
|
||||
/* 04 */ "AND_S",
|
||||
/* 05 */ "OR_S",
|
||||
/* 06 */ "BIC_S",
|
||||
/* 07 */ "XOR_S",
|
||||
/* 08 */ "0x08 <illegal>",
|
||||
/* 09 */ "0x09 <illegal>",
|
||||
/* 0a */ "0x0a <illegal>",
|
||||
/* 0b */ "TST_S",
|
||||
/* 0c */ "MUL64_S",
|
||||
/* 0d */ "SEXB_S",
|
||||
/* 0e */ "SEXW_S",
|
||||
/* 0f */ "EXTB_S",
|
||||
/* 10 */ "EXTW_S",
|
||||
/* 11 */ "ABS_S",
|
||||
/* 12 */ "NOT_S",
|
||||
/* 13 */ "NEG_S",
|
||||
/* 14 */ "ADD1_S",
|
||||
/* 15 */ "ADD2_S>",
|
||||
/* 16 */ "ADD3_S",
|
||||
/* 17 */ "0x17 <illegal>",
|
||||
/* 18 */ "ASL_S (multiple)",
|
||||
/* 19 */ "LSR_S (multiple)",
|
||||
/* 1a */ "ASR_S (multiple)",
|
||||
/* 1b */ "ASL_S (single)",
|
||||
/* 1c */ "LSR_S (single)",
|
||||
/* 1d */ "ASR_S (single)",
|
||||
/* 1e */ "TRAP (not a5?)",
|
||||
/* 1f */ "BRK_S" // 0x7fff only?
|
||||
};
|
||||
|
||||
static const char *table0f_00[0x8] =
|
||||
{
|
||||
/* 00 */ "J_S",
|
||||
/* 01 */ "J_S.D",
|
||||
/* 02 */ "JL_S",
|
||||
/* 03 */ "JL_S.D",
|
||||
/* 04 */ "0x04 <illegal>",
|
||||
/* 05 */ "0x05 <illegal>",
|
||||
/* 06 */ "SUB_S.NE",
|
||||
/* 07 */ "ZOPs", // Sub Operations (yet another table..) ( table0f_00_07 )
|
||||
};
|
||||
|
||||
static const char *table0f_00_07[0x8] =
|
||||
{
|
||||
/* 00 */ "NOP_S",
|
||||
/* 01 */ "UNIMP_S", // unimplemented (not a5?)
|
||||
/* 02 */ "0x02 <illegal>",
|
||||
/* 03 */ "0x03 <illegal>",
|
||||
/* 04 */ "JEQ_S [BLINK]",
|
||||
/* 05 */ "JNE_S [BLINK]",
|
||||
/* 06 */ "J_S [BLINK]",
|
||||
/* 07 */ "J_S.D [BLINK]",
|
||||
};
|
||||
|
||||
#define ARCOMPACT_OPERATION ((op & 0xf800) >> 11)
|
||||
|
||||
CPU_DISASSEMBLE(arcompact)
|
||||
{
|
||||
int size = 2;
|
||||
|
||||
UINT32 op = oprom[2] | (oprom[3] << 8);
|
||||
output = buffer;
|
||||
|
||||
UINT8 instruction = ARCOMPACT_OPERATION;
|
||||
|
||||
if (instruction < 0x0c)
|
||||
{
|
||||
size = 4;
|
||||
op <<= 16;
|
||||
op |= oprom[0] | (oprom[1] << 8);
|
||||
|
||||
switch (instruction)
|
||||
{
|
||||
case 0x00:
|
||||
if (op & 0x00010000)
|
||||
{ // Branch Unconditionally Far
|
||||
// 00000 ssssssssss 1 SSSSSSSSSS N R TTTT
|
||||
INT32 address = (op & 0x07fe0000) >> 17;
|
||||
address |= ((op & 0x0000ffc0) >> 6) << 10;
|
||||
address |= ((op & 0x0000000f) >> 0) << 20;
|
||||
if (address & 0x800000) address = -(address&0x7fffff);
|
||||
|
||||
print("B %08x (%08x)", pc + (address *2) + 2, op & ~0xffffffcf );
|
||||
}
|
||||
else
|
||||
{ // Branch Conditionally
|
||||
// 00000 ssssssssss 0 SSSSSSSSSS N QQQQQ
|
||||
INT32 address = (op & 0x07fe0000) >> 17;
|
||||
address |= ((op & 0x0000ffc0) >> 6) << 10;
|
||||
if (address & 0x800000) address = -(address&0x7fffff);
|
||||
|
||||
UINT8 condition = op & 0x0000001f;
|
||||
|
||||
print("B(%s) %08x (%08x)", conditions[condition], pc + (address *2) + 2, op & ~0xffffffdf );
|
||||
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
case 0x01:
|
||||
if (op & 0x00010000)
|
||||
{
|
||||
if (op & 0x00000010)
|
||||
{ // Branch on Compare / Bit Test - Register-Immediate
|
||||
// 00001 bbb sssssss 1 S BBB UUUUUU N 1 iiii
|
||||
UINT8 subinstr = op & 0x0000000f;
|
||||
INT32 address = (op & 0x00fe0000) >> 17;
|
||||
address |= ((op & 0x00008000) >> 15) << 7;
|
||||
if (address & 0x80) address = -(address&0x7f);
|
||||
|
||||
|
||||
print("%s (reg-imm) %08x (%08x)", table01_01_0x[subinstr], pc + (address *2) + 4, op & ~0xf8fe800f);
|
||||
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
// Branch on Compare / Bit Test - Register-Register
|
||||
// 00001 bbb sssssss 1 S BBB CCCCCC N 0 iiii
|
||||
UINT8 subinstr = op & 0x0000000f;
|
||||
INT32 address = (op & 0x00fe0000) >> 17;
|
||||
address |= ((op & 0x00008000) >> 15) << 7;
|
||||
if (address & 0x80) address = -(address&0x7f);
|
||||
|
||||
print("%s (reg-reg) %08x (%08x)", table01_01_0x[subinstr], pc + (address *2) + 4, op & ~0xf8fe800f);
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
if (op & 0x00020000)
|
||||
{ // Branch and Link Unconditionally Far
|
||||
// 00001 sssssssss 10 SSSSSSSSSS N R TTTT
|
||||
INT32 address = (op & 0x07fc0000) >> 17;
|
||||
address |= ((op & 0x0000ffc0) >> 6) << 10;
|
||||
address |= ((op & 0x0000000f) >> 0) << 20;
|
||||
if (address & 0x800000) address = -(address&0x7fffff);
|
||||
|
||||
print("BL %08x (%08x)", pc + (address *2) + 2, op & ~0xffffffcf );
|
||||
}
|
||||
else
|
||||
{ // Branch and Link Conditionally
|
||||
// 00001 sssssssss 00 SSSSSSSSSS N QQQQQ
|
||||
INT32 address = (op & 0x07fc0000) >> 17;
|
||||
address |= ((op & 0x0000ffc0) >> 6) << 10;
|
||||
if (address & 0x800000) address = -(address&0x7fffff);
|
||||
|
||||
UINT8 condition = op & 0x0000001f;
|
||||
|
||||
print("BL(%s) %08x (%08x)", conditions[condition], pc + (address *2) + 2, op & ~0xffffffdf );
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
print("%s (%08x)", basic[instruction], op & ~0xf8000000 );
|
||||
break;
|
||||
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
size = 2;
|
||||
|
||||
switch (instruction)
|
||||
{
|
||||
case 0x0f:
|
||||
{
|
||||
// General Register Instructions (16-bit)
|
||||
// 01111 bbb ccc iiiii
|
||||
UINT8 subinstr = (op & 0x01f) >> 0;
|
||||
//print("%s (%04x)", table0f[subinstr], op & ~0xf81f);
|
||||
|
||||
#if 1
|
||||
switch (subinstr)
|
||||
{
|
||||
|
||||
default:
|
||||
print("%s (%04x)", table0f[subinstr], op & ~0xf81f);
|
||||
break;
|
||||
|
||||
case 0x00:
|
||||
{
|
||||
// General Operations w/ Register
|
||||
// 01111 bbb iii 00000
|
||||
UINT8 subinstr2 = (op & 0x00e0) >> 5;
|
||||
|
||||
switch (subinstr2)
|
||||
{
|
||||
default:
|
||||
print("%s (%04x)", table0f_00[subinstr2], op & ~0xf8ff);
|
||||
break;
|
||||
|
||||
case 0x7:
|
||||
{
|
||||
// General Operations w/o Register
|
||||
// 01111 iii 111 00000
|
||||
UINT8 subinstr3 = (op & 0x0700) >> 8;
|
||||
|
||||
print("%s (%04x)", table0f_00_07[subinstr3], op & ~0xffff);
|
||||
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
break;
|
||||
|
||||
}
|
||||
|
||||
|
||||
case 0x18:
|
||||
{
|
||||
// Stack Pointer Based Instructions (16-bit)
|
||||
// 11000 bbb iii uuuuu
|
||||
UINT8 subinstr = (op & 0x00e0) >> 5;
|
||||
print("%s (%04x)", table18[subinstr], op & ~0xf8e0);
|
||||
break;
|
||||
|
||||
}
|
||||
|
||||
default:
|
||||
print("%s (%04x)", basic[instruction], op & ~0xf800);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
return size | DASMFLAG_SUPPORTED;
|
||||
}
|
@ -79,6 +79,33 @@ endif
|
||||
|
||||
$(CPUOBJ)/8x300/8x300.o: $(CPUSRC)/8x300/8x300.c \
|
||||
$(CPUSRC)/8x300/8x300.h
|
||||
#-------------------------------------------------
|
||||
# ARCangent A4
|
||||
#@src/emu/cpu/arc/arc.h,CPUS += ARC
|
||||
#-------------------------------------------------
|
||||
|
||||
ifneq ($(filter ARC,$(CPUS)),)
|
||||
OBJDIRS += $(CPUOBJ)/arc
|
||||
CPUOBJS += $(CPUOBJ)/arc/arc.o
|
||||
DASMOBJS += $(CPUOBJ)/arc/arcdasm.o
|
||||
endif
|
||||
|
||||
$(CPUOBJ)/arc/arc.o: $(CPUSRC)/arc/arc.c \
|
||||
$(CPUSRC)/arc/arc.h
|
||||
|
||||
#-------------------------------------------------
|
||||
# ARcompact (ARCtangent-A5, ARC 600, ARC 700)
|
||||
#@src/emu/cpu/arc/arc.h,CPUS += ARCOMPACT
|
||||
#-------------------------------------------------
|
||||
|
||||
ifneq ($(filter ARCOMPACT,$(CPUS)),)
|
||||
OBJDIRS += $(CPUOBJ)/arcompact
|
||||
CPUOBJS += $(CPUOBJ)/arcompact/arcompact.o
|
||||
DASMOBJS += $(CPUOBJ)/arcompact/arcompactdasm.o
|
||||
endif
|
||||
|
||||
$(CPUOBJ)/arcompact/arcompact.o: $(CPUSRC)/arcompact/arcompact.c \
|
||||
$(CPUSRC)/arcompact/arcompact.h
|
||||
|
||||
#-------------------------------------------------
|
||||
# Acorn ARM series
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -1,5 +1,5 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Miodrag Milanovic
|
||||
// copyright-holders:Juergen Buchmueller <pullmoll@t-online.de>
|
||||
#ifndef __PPS4_H__
|
||||
#define __PPS4_H__
|
||||
|
||||
@ -9,11 +9,21 @@
|
||||
***************************************************************************/
|
||||
enum
|
||||
{
|
||||
PPS4_PC,
|
||||
PPS4_A,PPS4_X,PPS4_SA,PPS4_SB,PPS4_B,
|
||||
PPS4_GENPC = STATE_GENPC,
|
||||
PPS4_GENSP = STATE_GENSP,
|
||||
PPS4_GENPCBASE = STATE_GENPCBASE
|
||||
PPS4_PC,
|
||||
PPS4_A,
|
||||
PPS4_X,
|
||||
PPS4_SA,
|
||||
PPS4_SB,
|
||||
PPS4_B,
|
||||
PPS4_Skip,
|
||||
PPS4_SAG,
|
||||
PPS4_I2,
|
||||
PPS4_Ip,
|
||||
PPS4_GENPC = STATE_GENPC,
|
||||
PPS4_GENSP = STATE_GENSP,
|
||||
PPS4_GENPCBASE = STATE_GENPCBASE,
|
||||
PPS4_PORT_A = 256,
|
||||
PPS4_PORT_B = 257
|
||||
};
|
||||
|
||||
/***************************************************************************
|
||||
@ -26,69 +36,131 @@ enum
|
||||
|
||||
extern const device_type PPS4;
|
||||
|
||||
|
||||
class pps4_device : public cpu_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
pps4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
// construction/destruction
|
||||
pps4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
// device-level overrides
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
|
||||
// device_execute_interface overrides
|
||||
virtual UINT32 execute_min_cycles() const { return 1; }
|
||||
virtual UINT32 execute_max_cycles() const { return 2; }
|
||||
virtual UINT32 execute_input_lines() const { return 0; }
|
||||
virtual UINT32 execute_default_irq_vector() const { return 0; }
|
||||
virtual void execute_run();
|
||||
// device_execute_interface overrides
|
||||
virtual UINT32 execute_min_cycles() const { return 1; }
|
||||
virtual UINT32 execute_max_cycles() const { return 3; }
|
||||
virtual UINT32 execute_input_lines() const { return 0; }
|
||||
virtual UINT32 execute_default_irq_vector() const { return 0; }
|
||||
virtual void execute_run();
|
||||
|
||||
// device_memory_interface overrides
|
||||
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const
|
||||
{
|
||||
return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : ( (spacenum == AS_DATA) ? &m_data_config : NULL ) );
|
||||
}
|
||||
// device_memory_interface overrides
|
||||
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const
|
||||
{
|
||||
return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : ( (spacenum == AS_DATA) ? &m_data_config : NULL ) );
|
||||
}
|
||||
|
||||
// device_state_interface overrides
|
||||
void state_string_export(const device_state_entry &entry, astring &string);
|
||||
// device_state_interface overrides
|
||||
void state_string_export(const device_state_entry &entry, astring &string);
|
||||
|
||||
// device_disasm_interface overrides
|
||||
virtual UINT32 disasm_min_opcode_bytes() const { return 1; }
|
||||
virtual UINT32 disasm_max_opcode_bytes() const { return 2; }
|
||||
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
|
||||
// device_disasm_interface overrides
|
||||
virtual UINT32 disasm_min_opcode_bytes() const { return 1; }
|
||||
virtual UINT32 disasm_max_opcode_bytes() const { return 2; }
|
||||
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
|
||||
|
||||
private:
|
||||
address_space_config m_program_config;
|
||||
address_space_config m_data_config;
|
||||
address_space_config m_io_config;
|
||||
address_space_config m_program_config;
|
||||
address_space_config m_data_config;
|
||||
address_space_config m_io_config;
|
||||
|
||||
UINT8 m_A; // Accumulator
|
||||
UINT8 m_X;
|
||||
address_space *m_program;
|
||||
direct_read_data *m_direct;
|
||||
address_space *m_data;
|
||||
address_space *m_io;
|
||||
int m_icount;
|
||||
|
||||
PAIR m_P;
|
||||
PAIR m_SA;
|
||||
PAIR m_SB;
|
||||
PAIR m_B; // BU + BM + BL
|
||||
UINT8 m_A; //!< Accumulator A(4:1)
|
||||
UINT8 m_X; //!< X register X(4:1)
|
||||
UINT16 m_P; //!< program counter P(12:1)
|
||||
UINT16 m_SA; //!< Shift register SA(12:1)
|
||||
UINT16 m_SB; //!< Shift register SB(12:1)
|
||||
UINT8 m_Skip; //!< Skip next instruction
|
||||
UINT16 m_SAG; //!< Special address generation mask
|
||||
UINT16 m_B; //!< B register B(12:1) (BL, BM and BH)
|
||||
UINT8 m_C; //!< Carry flip-flop
|
||||
UINT8 m_FF1; //!< Flip-flop 1
|
||||
UINT8 m_FF2; //!< Flip-flop 2
|
||||
UINT8 m_I; //!< Most recent instruction I(8:1)
|
||||
UINT8 m_I2; //!< Most recent parameter I2(8:1)
|
||||
UINT8 m_Ip; //!< Previous instruction I(8:1)
|
||||
|
||||
UINT8 m_C; // Carry flag
|
||||
UINT8 m_FF1; // Flip-flop 1
|
||||
UINT8 m_FF2; // Flip-flop 2
|
||||
//! return the contents of B register (made of BU, BM and BL)
|
||||
inline UINT16 B() const;
|
||||
|
||||
address_space *m_program;
|
||||
direct_read_data *m_direct;
|
||||
address_space *m_data;
|
||||
address_space *m_io;
|
||||
//! return memory at address B(12:1)
|
||||
inline UINT8 M();
|
||||
|
||||
int m_icount;
|
||||
//! write to memory at address B(12:1)
|
||||
inline void W(UINT8 data);
|
||||
|
||||
inline UINT8 ROP();
|
||||
inline UINT8 ARG();
|
||||
inline void DO_SKIP();
|
||||
void execute_one(int opcode);
|
||||
//! return the next opcode (also in m_I)
|
||||
inline UINT8 ROP();
|
||||
|
||||
//! return the next argument (also in m_I2)
|
||||
inline UINT8 ARG();
|
||||
|
||||
void iAD(); //!< Add
|
||||
void iADC(); //!< Add with carry-in
|
||||
void iADSK(); //!< Add and skip on carry-out
|
||||
void iADCSK(); //!< Add with carry-in and skip on carry-out
|
||||
void iADI(); //!< Add immediate
|
||||
void iDC(); //!< Decimal correction
|
||||
void iAND(); //!< Logical AND
|
||||
void iOR(); //!< Logical OR
|
||||
void iEOR(); //!< Logical Exclusive-OR
|
||||
void iCOMP(); //!< Complement
|
||||
void iSC(); //!< Set Carry flip-flop
|
||||
void iRC(); //!< Reset Carry flip-flop
|
||||
void iSF1(); //!< Set FF1
|
||||
void iRF1(); //!< Reset FF1
|
||||
void iSF2(); //!< Set FF2
|
||||
void iRF2(); //!< Reset FF2
|
||||
void iLD(); //!< Load accumulator from memory
|
||||
void iEX(); //!< Exchange accumulator and memory
|
||||
void iEXD(); //!< Exchange accumulator and memory and decrement BL
|
||||
void iLDI(); //!< Load accumulator immediate
|
||||
void iLAX(); //!< Load accumulator from X register
|
||||
void iLXA(); //!< Load X register from accumulator
|
||||
void iLABL(); //!< Load accumulator with BL
|
||||
void iLBMX(); //!< Load BM with X
|
||||
void iLBUA(); //!< Load BU with A
|
||||
void iXABL(); //!< Exchange accumulator and BL
|
||||
void iXBMX(); //!< Exchange BM and X registers
|
||||
void iXAX(); //!< Exchange accumulator and X
|
||||
void iXS(); //!< Eychange SA and SB registers
|
||||
void iCYS(); //!< Cycle SA register and accumulaor
|
||||
void iLB(); //!< Load B indirect
|
||||
void iLBL(); //!< Load B long
|
||||
void iINCB(); //!< Increment BL
|
||||
void iDECB(); //!< Decrement BL
|
||||
void iT(); //!< Transfer
|
||||
void iTM(); //!< Transfer and mark indirect
|
||||
void iTL(); //!< Transfer long
|
||||
void iTML(); //!< Transfer and mark long
|
||||
void iSKC(); //!< Skip on carry flip-flop
|
||||
void iSKZ(); //!< Skip on accumulator zero
|
||||
void iSKBI(); //!< Skip if BL equal to immediate
|
||||
void iSKF1(); //!< Skip if FF1 equals 1
|
||||
void iSKF2(); //!< Skip if FF2 equals 1
|
||||
void iRTN(); //!< Return
|
||||
void iRTNSK(); //!< Return and skip
|
||||
void iIOL(); //!< Input/Output long
|
||||
void iDIA(); //!< Discrete input group A
|
||||
void iDIB(); //!< Discrete input group B
|
||||
void iDOA(); //!< Discrete output group A
|
||||
void iSAG(); //!< Special address generation
|
||||
|
||||
void execute_one(); //!< execute one instruction
|
||||
};
|
||||
|
||||
|
||||
#endif
|
||||
#endif // __PPS4_H__
|
||||
|
@ -1,135 +1,432 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Miodrag Milanovic
|
||||
// copyright-holders:Juergen Buchmueller <pullmoll@t-online.de>
|
||||
/*****************************************************************************
|
||||
*
|
||||
* pps4dasm.c
|
||||
*
|
||||
* Rockwell PPS-4 CPU Disassembly
|
||||
*
|
||||
*
|
||||
* TODO: double verify all opcodes with t_Ixx flags
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
|
||||
#define OP(A) oprom[(A) - PC]
|
||||
#define ARG(A) opram[(A) - PC]
|
||||
|
||||
typedef enum pps4_token_e {
|
||||
t_AD, t_ADC, t_ADSK, t_ADCSK, t_ADI,
|
||||
t_DC, t_AND, t_OR, t_EOR, t_COMP,
|
||||
t_SC, t_RC, t_SF1, t_RF1, t_SF2,
|
||||
t_RF2, t_LD, t_EX, t_EXD, t_LDI,
|
||||
t_LAX, t_LXA, t_LABL, t_LBMX, t_LBUA,
|
||||
t_XABL, t_XBMX, t_XAX, t_XS, t_CYS,
|
||||
t_LB, t_LBL, t_INCB, t_DECB, t_T,
|
||||
t_TM, t_TL, t_TML, t_SKC, t_SKZ,
|
||||
t_SKBI, t_SKF1, t_SKF2, t_RTN, t_RTNSK,
|
||||
t_IOL, t_DIA, t_DIB, t_DOA, t_SAG,
|
||||
t_COUNT,
|
||||
t_MASK = (1 << 6) - 1,
|
||||
t_I3c = 1 << 6, /* immediate 3 bit constant, complemented */
|
||||
t_I4 = 1 << 7, /* immediate 4 bit constant */
|
||||
t_I4c = 1 << 8, /* immediate 4 bit constant, complemented */
|
||||
t_I4p = 1 << 9, /* immediate 4 bit offset into page 3 */
|
||||
t_I6p = 1 << 10, /* immediate 6 bit constant; address in current page */
|
||||
t_I8 = 1 << 11, /* immediate 8 bit constant (I/O port number) */
|
||||
t_I8c = 1 << 12, /* immediate 8 bit constant inverted */
|
||||
t_OVER = 1 << 13, /* Debugger step over (CALL) */
|
||||
t_OUT = 1 << 14 /* Debugger step out (RETURN) */
|
||||
} pps4_token_e;
|
||||
|
||||
static const char *token_str[t_COUNT] = {
|
||||
"ad", /* add */
|
||||
"adc", /* add with carry-in */
|
||||
"adsk", /* add and skip on carry-out */
|
||||
"adcsk", /* add with carry-in and skip on carry-out */
|
||||
"adi", /* add immediate */
|
||||
"dc", /* decimal correction */
|
||||
"and", /* logical and */
|
||||
"or", /* logical or */
|
||||
"eor", /* logical exclusive-orf */
|
||||
"comp", /* complement */
|
||||
"sc", /* set C flip-flop */
|
||||
"rc", /* reset C flip-flop */
|
||||
"sf1", /* set FF1 flip-flop */
|
||||
"rf1", /* reset FF1 flip-flop */
|
||||
"sf2", /* set FF2 flip-flop */
|
||||
"rf2", /* reset FF2 flip-flop */
|
||||
"ld", /* load accumulator from memory */
|
||||
"ex", /* exchange accumulator and memory */
|
||||
"exd", /* exchange accumulator and memory and decrement BL */
|
||||
"ldi", /* load accumulator immediate */
|
||||
"lax", /* load accumulator from X register */
|
||||
"lxa", /* load X register from accumulator */
|
||||
"labl", /* load accumulator with BL */
|
||||
"lbmx", /* load BM with X */
|
||||
"lbua", /* load BU with A */
|
||||
"xabl", /* exchange accumulator and BL */
|
||||
"xbmx", /* exchange BM and X */
|
||||
"xax", /* exchange accumulator and X */
|
||||
"xs", /* exchange SA and SB */
|
||||
"cys", /* cycle SA register and accumulator */
|
||||
"lb", /* load B indirect */
|
||||
"lbl", /* load B long */
|
||||
"incb", /* increment BL */
|
||||
"decb", /* decrement BL */
|
||||
"t", /* transfer */
|
||||
"tm", /* transfer and mark indirect */
|
||||
"tl", /* transfer long */
|
||||
"tml", /* transfer and mark long */
|
||||
"skc", /* skip on C flip-flop equals 1 */
|
||||
"skz", /* skip on accumulator zero */
|
||||
"skbi", /* skip on BL equal to immediate */
|
||||
"skf1", /* skip on FF1 flip-flop equals 1 */
|
||||
"skf2", /* skip on FF2 flip-flop equals 1 */
|
||||
"rtn", /* return */
|
||||
"rtnsk", /* return and skip */
|
||||
"iol", /* input/output long */
|
||||
"dia", /* discrete input group A */
|
||||
"dib", /* discrete input group B */
|
||||
"doa", /* discrete output */
|
||||
"sag" /* special address generation */
|
||||
};
|
||||
|
||||
static const UINT16 table[] = {
|
||||
/* 00 */ t_LBL | t_I8c,
|
||||
/* 01 */ t_TML | t_I4 | t_I8,
|
||||
/* 02 */ t_TML | t_I4 | t_I8,
|
||||
/* 03 */ t_TML | t_I4 | t_I8,
|
||||
/* 04 */ t_LBUA,
|
||||
/* 05 */ t_RTN | t_OUT,
|
||||
/* 06 */ t_XS,
|
||||
/* 07 */ t_RTNSK | t_OUT,
|
||||
/* 08 */ t_ADCSK,
|
||||
/* 09 */ t_ADSK,
|
||||
/* 0a */ t_ADC,
|
||||
/* 0b */ t_AD,
|
||||
/* 0c */ t_EOR,
|
||||
/* 0d */ t_AND,
|
||||
/* 0e */ t_COMP,
|
||||
/* 0f */ t_OR,
|
||||
|
||||
/* 10 */ t_LBMX,
|
||||
/* 11 */ t_LABL,
|
||||
/* 12 */ t_LAX,
|
||||
/* 13 */ t_SAG,
|
||||
/* 14 */ t_SKF2,
|
||||
/* 15 */ t_SKC,
|
||||
/* 16 */ t_SKF1,
|
||||
/* 17 */ t_INCB,
|
||||
/* 18 */ t_XBMX,
|
||||
/* 19 */ t_XABL,
|
||||
/* 1a */ t_XAX,
|
||||
/* 1b */ t_LXA,
|
||||
/* 1c */ t_IOL | t_I8,
|
||||
/* 1d */ t_DOA,
|
||||
/* 1e */ t_SKZ,
|
||||
/* 1f */ t_DECB,
|
||||
|
||||
/* 20 */ t_SC,
|
||||
/* 21 */ t_SF2,
|
||||
/* 22 */ t_SF1,
|
||||
/* 23 */ t_DIB,
|
||||
/* 24 */ t_RC,
|
||||
/* 25 */ t_RF2,
|
||||
/* 26 */ t_RF1,
|
||||
/* 27 */ t_DIA,
|
||||
/* 28 */ t_EXD | t_I3c,
|
||||
/* 29 */ t_EXD | t_I3c,
|
||||
/* 2a */ t_EXD | t_I3c,
|
||||
/* 2b */ t_EXD | t_I3c,
|
||||
/* 2c */ t_EXD | t_I3c,
|
||||
/* 2d */ t_EXD | t_I3c,
|
||||
/* 2e */ t_EXD | t_I3c,
|
||||
/* 2f */ t_EXD | t_I3c,
|
||||
|
||||
/* 30 */ t_LD | t_I3c,
|
||||
/* 31 */ t_LD | t_I3c,
|
||||
/* 32 */ t_LD | t_I3c,
|
||||
/* 33 */ t_LD | t_I3c,
|
||||
/* 34 */ t_LD | t_I3c,
|
||||
/* 35 */ t_LD | t_I3c,
|
||||
/* 36 */ t_LD | t_I3c,
|
||||
/* 37 */ t_LD | t_I3c,
|
||||
/* 38 */ t_EX | t_I3c,
|
||||
/* 39 */ t_EX | t_I3c,
|
||||
/* 3a */ t_EX | t_I3c,
|
||||
/* 3b */ t_EX | t_I3c,
|
||||
/* 3c */ t_EX | t_I3c,
|
||||
/* 3d */ t_EX | t_I3c,
|
||||
/* 3e */ t_EX | t_I3c,
|
||||
/* 3f */ t_EX | t_I3c,
|
||||
|
||||
/* 40 */ t_SKBI | t_I4,
|
||||
/* 41 */ t_SKBI | t_I4,
|
||||
/* 42 */ t_SKBI | t_I4,
|
||||
/* 43 */ t_SKBI | t_I4,
|
||||
/* 44 */ t_SKBI | t_I4,
|
||||
/* 45 */ t_SKBI | t_I4,
|
||||
/* 46 */ t_SKBI | t_I4,
|
||||
/* 47 */ t_SKBI | t_I4,
|
||||
/* 48 */ t_SKBI | t_I4,
|
||||
/* 49 */ t_SKBI | t_I4,
|
||||
/* 4a */ t_SKBI | t_I4,
|
||||
/* 4b */ t_SKBI | t_I4,
|
||||
/* 4c */ t_SKBI | t_I4,
|
||||
/* 4d */ t_SKBI | t_I4,
|
||||
/* 4e */ t_SKBI | t_I4,
|
||||
/* 4f */ t_SKBI | t_I4,
|
||||
|
||||
/* 50 */ t_TL | t_I4 | t_I8 | t_OVER,
|
||||
/* 51 */ t_TL | t_I4 | t_I8 | t_OVER,
|
||||
/* 52 */ t_TL | t_I4 | t_I8 | t_OVER,
|
||||
/* 53 */ t_TL | t_I4 | t_I8 | t_OVER,
|
||||
/* 54 */ t_TL | t_I4 | t_I8 | t_OVER,
|
||||
/* 55 */ t_TL | t_I4 | t_I8 | t_OVER,
|
||||
/* 56 */ t_TL | t_I4 | t_I8 | t_OVER,
|
||||
/* 57 */ t_TL | t_I4 | t_I8 | t_OVER,
|
||||
/* 58 */ t_TL | t_I4 | t_I8 | t_OVER,
|
||||
/* 59 */ t_TL | t_I4 | t_I8 | t_OVER,
|
||||
/* 5a */ t_TL | t_I4 | t_I8 | t_OVER,
|
||||
/* 5b */ t_TL | t_I4 | t_I8 | t_OVER,
|
||||
/* 5c */ t_TL | t_I4 | t_I8 | t_OVER,
|
||||
/* 5d */ t_TL | t_I4 | t_I8 | t_OVER,
|
||||
/* 5e */ t_TL | t_I4 | t_I8 | t_OVER,
|
||||
/* 5f */ t_TL | t_I4 | t_I8 | t_OVER,
|
||||
|
||||
/* 60 */ t_ADI | t_I4c,
|
||||
/* 61 */ t_ADI | t_I4c,
|
||||
/* 62 */ t_ADI | t_I4c,
|
||||
/* 63 */ t_ADI | t_I4c,
|
||||
/* 64 */ t_ADI | t_I4c,
|
||||
/* 65 */ t_DC,
|
||||
/* 66 */ t_ADI | t_I4c,
|
||||
/* 67 */ t_ADI | t_I4c,
|
||||
/* 68 */ t_ADI | t_I4c,
|
||||
/* 69 */ t_ADI | t_I4c,
|
||||
/* 6a */ t_ADI | t_I4c,
|
||||
/* 6b */ t_ADI | t_I4c,
|
||||
/* 6c */ t_ADI | t_I4c,
|
||||
/* 6d */ t_ADI | t_I4c,
|
||||
/* 6e */ t_ADI | t_I4c,
|
||||
/* 6f */ t_CYS,
|
||||
|
||||
/* 70 */ t_LDI | t_I4c,
|
||||
/* 71 */ t_LDI | t_I4c,
|
||||
/* 72 */ t_LDI | t_I4c,
|
||||
/* 73 */ t_LDI | t_I4c,
|
||||
/* 74 */ t_LDI | t_I4c,
|
||||
/* 75 */ t_LDI | t_I4c,
|
||||
/* 76 */ t_LDI | t_I4c,
|
||||
/* 77 */ t_LDI | t_I4c,
|
||||
/* 78 */ t_LDI | t_I4c,
|
||||
/* 79 */ t_LDI | t_I4c,
|
||||
/* 7a */ t_LDI | t_I4c,
|
||||
/* 7b */ t_LDI | t_I4c,
|
||||
/* 7c */ t_LDI | t_I4c,
|
||||
/* 7d */ t_LDI | t_I4c,
|
||||
/* 7e */ t_LDI | t_I4c,
|
||||
/* 7f */ t_LDI | t_I4c,
|
||||
|
||||
/* 80 */ t_T | t_I6p,
|
||||
/* 81 */ t_T | t_I6p,
|
||||
/* 82 */ t_T | t_I6p,
|
||||
/* 83 */ t_T | t_I6p,
|
||||
/* 84 */ t_T | t_I6p,
|
||||
/* 85 */ t_T | t_I6p,
|
||||
/* 86 */ t_T | t_I6p,
|
||||
/* 87 */ t_T | t_I6p,
|
||||
/* 88 */ t_T | t_I6p,
|
||||
/* 89 */ t_T | t_I6p,
|
||||
/* 8a */ t_T | t_I6p,
|
||||
/* 8b */ t_T | t_I6p,
|
||||
/* 8c */ t_T | t_I6p,
|
||||
/* 8d */ t_T | t_I6p,
|
||||
/* 8e */ t_T | t_I6p,
|
||||
/* 8f */ t_T | t_I6p,
|
||||
|
||||
/* 90 */ t_T | t_I6p,
|
||||
/* 91 */ t_T | t_I6p,
|
||||
/* 92 */ t_T | t_I6p,
|
||||
/* 93 */ t_T | t_I6p,
|
||||
/* 94 */ t_T | t_I6p,
|
||||
/* 95 */ t_T | t_I6p,
|
||||
/* 96 */ t_T | t_I6p,
|
||||
/* 97 */ t_T | t_I6p,
|
||||
/* 98 */ t_T | t_I6p,
|
||||
/* 99 */ t_T | t_I6p,
|
||||
/* 9a */ t_T | t_I6p,
|
||||
/* 9b */ t_T | t_I6p,
|
||||
/* 9c */ t_T | t_I6p,
|
||||
/* 9d */ t_T | t_I6p,
|
||||
/* 9e */ t_T | t_I6p,
|
||||
/* 9f */ t_T | t_I6p,
|
||||
|
||||
/* a0 */ t_T | t_I6p,
|
||||
/* a1 */ t_T | t_I6p,
|
||||
/* a2 */ t_T | t_I6p,
|
||||
/* a3 */ t_T | t_I6p,
|
||||
/* a4 */ t_T | t_I6p,
|
||||
/* a5 */ t_T | t_I6p,
|
||||
/* a6 */ t_T | t_I6p,
|
||||
/* a7 */ t_T | t_I6p,
|
||||
/* a8 */ t_T | t_I6p,
|
||||
/* a9 */ t_T | t_I6p,
|
||||
/* aa */ t_T | t_I6p,
|
||||
/* ab */ t_T | t_I6p,
|
||||
/* ac */ t_T | t_I6p,
|
||||
/* ad */ t_T | t_I6p,
|
||||
/* ae */ t_T | t_I6p,
|
||||
/* af */ t_T | t_I6p,
|
||||
|
||||
/* b0 */ t_T | t_I6p,
|
||||
/* b1 */ t_T | t_I6p,
|
||||
/* b2 */ t_T | t_I6p,
|
||||
/* b3 */ t_T | t_I6p,
|
||||
/* b4 */ t_T | t_I6p,
|
||||
/* b5 */ t_T | t_I6p,
|
||||
/* b6 */ t_T | t_I6p,
|
||||
/* b7 */ t_T | t_I6p,
|
||||
/* b8 */ t_T | t_I6p,
|
||||
/* b9 */ t_T | t_I6p,
|
||||
/* ba */ t_T | t_I6p,
|
||||
/* bb */ t_T | t_I6p,
|
||||
/* bc */ t_T | t_I6p,
|
||||
/* bd */ t_T | t_I6p,
|
||||
/* be */ t_T | t_I6p,
|
||||
/* bf */ t_T | t_I6p,
|
||||
|
||||
/* c0 */ t_LB | t_I4p,
|
||||
/* c1 */ t_LB | t_I4p,
|
||||
/* c2 */ t_LB | t_I4p,
|
||||
/* c3 */ t_LB | t_I4p,
|
||||
/* c4 */ t_LB | t_I4p,
|
||||
/* c5 */ t_LB | t_I4p,
|
||||
/* c6 */ t_LB | t_I4p,
|
||||
/* c7 */ t_LB | t_I4p,
|
||||
/* c8 */ t_LB | t_I4p,
|
||||
/* c9 */ t_LB | t_I4p,
|
||||
/* ca */ t_LB | t_I4p,
|
||||
/* cb */ t_LB | t_I4p,
|
||||
/* cc */ t_LB | t_I4p,
|
||||
/* cd */ t_LB | t_I4p,
|
||||
/* ce */ t_LB | t_I4p,
|
||||
/* cf */ t_LB | t_I4p,
|
||||
|
||||
/* d0 */ t_TM | t_I6p | t_OVER,
|
||||
/* d1 */ t_TM | t_I6p | t_OVER,
|
||||
/* d2 */ t_TM | t_I6p | t_OVER,
|
||||
/* d3 */ t_TM | t_I6p | t_OVER,
|
||||
/* d4 */ t_TM | t_I6p | t_OVER,
|
||||
/* d5 */ t_TM | t_I6p | t_OVER,
|
||||
/* d6 */ t_TM | t_I6p | t_OVER,
|
||||
/* d7 */ t_TM | t_I6p | t_OVER,
|
||||
/* d8 */ t_TM | t_I6p | t_OVER,
|
||||
/* d9 */ t_TM | t_I6p | t_OVER,
|
||||
/* da */ t_TM | t_I6p | t_OVER,
|
||||
/* db */ t_TM | t_I6p | t_OVER,
|
||||
/* dc */ t_TM | t_I6p | t_OVER,
|
||||
/* dd */ t_TM | t_I6p | t_OVER,
|
||||
/* de */ t_TM | t_I6p | t_OVER,
|
||||
/* df */ t_TM | t_I6p | t_OVER,
|
||||
|
||||
/* e0 */ t_TM | t_I6p | t_OVER,
|
||||
/* e1 */ t_TM | t_I6p | t_OVER,
|
||||
/* e2 */ t_TM | t_I6p | t_OVER,
|
||||
/* e3 */ t_TM | t_I6p | t_OVER,
|
||||
/* e4 */ t_TM | t_I6p | t_OVER,
|
||||
/* e5 */ t_TM | t_I6p | t_OVER,
|
||||
/* e6 */ t_TM | t_I6p | t_OVER,
|
||||
/* e7 */ t_TM | t_I6p | t_OVER,
|
||||
/* e8 */ t_TM | t_I6p | t_OVER,
|
||||
/* e9 */ t_TM | t_I6p | t_OVER,
|
||||
/* ea */ t_TM | t_I6p | t_OVER,
|
||||
/* eb */ t_TM | t_I6p | t_OVER,
|
||||
/* ec */ t_TM | t_I6p | t_OVER,
|
||||
/* ed */ t_TM | t_I6p | t_OVER,
|
||||
/* ee */ t_TM | t_I6p | t_OVER,
|
||||
/* ef */ t_TM | t_I6p | t_OVER,
|
||||
|
||||
/* f0 */ t_TM | t_I6p | t_OVER,
|
||||
/* f1 */ t_TM | t_I6p | t_OVER,
|
||||
/* f2 */ t_TM | t_I6p | t_OVER,
|
||||
/* f3 */ t_TM | t_I6p | t_OVER,
|
||||
/* f4 */ t_TM | t_I6p | t_OVER,
|
||||
/* f5 */ t_TM | t_I6p | t_OVER,
|
||||
/* f6 */ t_TM | t_I6p | t_OVER,
|
||||
/* f7 */ t_TM | t_I6p | t_OVER,
|
||||
/* f8 */ t_TM | t_I6p | t_OVER,
|
||||
/* f9 */ t_TM | t_I6p | t_OVER,
|
||||
/* fa */ t_TM | t_I6p | t_OVER,
|
||||
/* fb */ t_TM | t_I6p | t_OVER,
|
||||
/* fc */ t_TM | t_I6p | t_OVER,
|
||||
/* fd */ t_TM | t_I6p | t_OVER,
|
||||
/* fe */ t_TM | t_I6p | t_OVER,
|
||||
/* ff */ t_TM | t_I6p | t_OVER
|
||||
};
|
||||
|
||||
CPU_DISASSEMBLE( pps4 )
|
||||
{
|
||||
UINT32 flags = 0;
|
||||
unsigned PC = pc;
|
||||
UINT8 op;
|
||||
switch (op = OP(pc++))
|
||||
{
|
||||
// Arithmetic instructions
|
||||
case 0x0b: sprintf (buffer,"ad"); break;
|
||||
case 0x0a: sprintf (buffer,"adc"); break;
|
||||
case 0x09: sprintf (buffer,"adsk"); break;
|
||||
case 0x08: sprintf (buffer,"adcsk"); break;
|
||||
case 0x60: case 0x61: case 0x62: case 0x63:
|
||||
case 0x64: case 0x66: case 0x67: case 0x68:
|
||||
case 0x69: case 0x6a: case 0x6b: case 0x6c:
|
||||
case 0x6d: case 0x6e:
|
||||
sprintf (buffer,"adi %01x",(op & 0x0f)); break;
|
||||
case 0x65: sprintf (buffer,"dc"); break;
|
||||
// Logical instructions
|
||||
case 0x0d: sprintf (buffer,"and"); break;
|
||||
case 0x0f: sprintf (buffer,"or"); break;
|
||||
case 0x0c: sprintf (buffer,"eor"); break;
|
||||
case 0x0e: sprintf (buffer,"comp"); break;
|
||||
// Data transfer instructions
|
||||
case 0x20: sprintf (buffer,"sc"); break;
|
||||
case 0x24: sprintf (buffer,"rc"); break;
|
||||
case 0x22: sprintf (buffer,"sf1"); break;
|
||||
case 0x26: sprintf (buffer,"rf1"); break;
|
||||
case 0x21: sprintf (buffer,"sf2"); break;
|
||||
case 0x25: sprintf (buffer,"rf2"); break;
|
||||
case 0x30: case 0x31: case 0x32: case 0x33:
|
||||
case 0x34: case 0x35: case 0x36: case 0x37:
|
||||
sprintf (buffer,"ld %01x",(op & 0x07)); break;
|
||||
case 0x38: case 0x39: case 0x3a: case 0x3b:
|
||||
case 0x3c: case 0x3d: case 0x3e: case 0x3f:
|
||||
sprintf (buffer,"ex %01x",(op & 0x07)); break;
|
||||
case 0x28: case 0x29: case 0x2a: case 0x2b:
|
||||
case 0x2c: case 0x2d: case 0x2e: case 0x2f:
|
||||
sprintf (buffer,"exd %01x",(op & 0x07)); break;
|
||||
case 0x70: case 0x71: case 0x72: case 0x73:
|
||||
case 0x74: case 0x75: case 0x76: case 0x77:
|
||||
sprintf (buffer,"ldi %01x",(op & 0x0f)); break;
|
||||
case 0x12: sprintf (buffer,"lax"); break;
|
||||
case 0x1b: sprintf (buffer,"lxa"); break;
|
||||
case 0x11: sprintf (buffer,"labl"); break;
|
||||
case 0x10: sprintf (buffer,"lbmx"); break;
|
||||
case 0x04: sprintf (buffer,"lbua"); break;
|
||||
case 0x19: sprintf (buffer,"xabl"); break;
|
||||
case 0x18: sprintf (buffer,"xbmx"); break;
|
||||
case 0x1a: sprintf (buffer,"xax"); break;
|
||||
case 0x06: sprintf (buffer,"xs"); break;
|
||||
case 0x6f: sprintf (buffer,"cys"); break;
|
||||
case 0xc0: case 0xc1: case 0xc2: case 0xc3:
|
||||
case 0xc4: case 0xc5: case 0xc6: case 0xc7:
|
||||
case 0xc8: case 0xc9: case 0xca: case 0xcb:
|
||||
case 0xcc: case 0xcd: case 0xce: case 0xcf:
|
||||
sprintf (buffer,"lb %02x",ARG(pc)); pc++; break;
|
||||
case 0x00: sprintf (buffer,"lbl %02x",ARG(pc)); pc++; break;
|
||||
case 0x17: sprintf (buffer,"incb"); break;
|
||||
case 0x1f: sprintf (buffer,"decb"); break;
|
||||
// Control transfer instructions
|
||||
case 0x80: case 0x81: case 0x82: case 0x83:
|
||||
case 0x84: case 0x85: case 0x86: case 0x87:
|
||||
case 0x88: case 0x89: case 0x8a: case 0x8b:
|
||||
case 0x8c: case 0x8d: case 0x8e: case 0x8f:
|
||||
case 0x90: case 0x91: case 0x92: case 0x93:
|
||||
case 0x94: case 0x95: case 0x96: case 0x97:
|
||||
case 0x98: case 0x99: case 0x9a: case 0x9b:
|
||||
case 0x9c: case 0x9d: case 0x9e: case 0x9f:
|
||||
case 0xa0: case 0xa1: case 0xa2: case 0xa3:
|
||||
case 0xa4: case 0xa5: case 0xa6: case 0xa7:
|
||||
case 0xa8: case 0xa9: case 0xaa: case 0xab:
|
||||
case 0xac: case 0xad: case 0xae: case 0xaf:
|
||||
case 0xb0: case 0xb1: case 0xb2: case 0xb3:
|
||||
case 0xb4: case 0xb5: case 0xb6: case 0xb7:
|
||||
case 0xb8: case 0xb9: case 0xba: case 0xbb:
|
||||
case 0xbc: case 0xbd: case 0xbe: case 0xbf:
|
||||
sprintf (buffer,"t %02x",(op & 0x3f)); break;
|
||||
case 0xd0: case 0xd1: case 0xd2: case 0xd3:
|
||||
case 0xd4: case 0xd5: case 0xd6: case 0xd7:
|
||||
case 0xd8: case 0xd9: case 0xda: case 0xdb:
|
||||
case 0xdc: case 0xdd: case 0xde: case 0xdf:
|
||||
case 0xe0: case 0xe1: case 0xe2: case 0xe3:
|
||||
case 0xe4: case 0xe5: case 0xe6: case 0xe7:
|
||||
case 0xe8: case 0xe9: case 0xea: case 0xeb:
|
||||
case 0xec: case 0xed: case 0xee: case 0xef:
|
||||
case 0xf0: case 0xf1: case 0xf2: case 0xf3:
|
||||
case 0xf4: case 0xf5: case 0xf6: case 0xf7:
|
||||
case 0xf8: case 0xf9: case 0xfa: case 0xfb:
|
||||
case 0xfc: case 0xfd: case 0xfe: case 0xff:
|
||||
sprintf (buffer,"tm %02x %02x",(op & 0x3f),ARG(pc)); pc++; break;
|
||||
case 0x50: case 0x51: case 0x52: case 0x53:
|
||||
case 0x54: case 0x55: case 0x56: case 0x57:
|
||||
case 0x58: case 0x59: case 0x5a: case 0x5b:
|
||||
case 0x5c: case 0x5d: case 0x5e: case 0x5f:
|
||||
sprintf (buffer,"tl %01x %02x",(op & 0x0f),ARG(pc)); pc++; break;
|
||||
case 0x01: case 0x02: case 0x03:
|
||||
sprintf (buffer,"tml %02x",ARG(pc)); pc++; break;
|
||||
case 0x15: sprintf (buffer,"skc"); break;
|
||||
case 0x1e: sprintf (buffer,"skz"); break;
|
||||
case 0x40: case 0x41: case 0x42: case 0x43:
|
||||
case 0x44: case 0x45: case 0x46: case 0x47:
|
||||
case 0x48: case 0x49: case 0x4a: case 0x4b:
|
||||
case 0x4c: case 0x4d: case 0x4e: case 0x4f:
|
||||
sprintf (buffer,"skbi %01x",(op & 0x0f)); break;
|
||||
case 0x16: sprintf (buffer,"skf1"); break;
|
||||
case 0x14: sprintf (buffer,"skf2"); break;
|
||||
case 0x05: sprintf (buffer,"rtn"); break;
|
||||
case 0x07: sprintf (buffer,"rtnsk"); break;
|
||||
// Input/Output instructions
|
||||
case 0x1c: sprintf (buffer,"iol %02x",ARG(pc)); pc++; break;
|
||||
case 0x27: sprintf (buffer,"dia"); break;
|
||||
case 0x23: sprintf (buffer,"dib"); break;
|
||||
case 0x1d: sprintf (buffer,"doa"); break;
|
||||
// Special instructions
|
||||
case 0x13: sprintf (buffer,"sag"); break;
|
||||
}
|
||||
UINT32 flags = 0;
|
||||
unsigned PC = pc;
|
||||
UINT8 op = OP(pc++);
|
||||
UINT32 tok = table[op];
|
||||
char *dst = 0;
|
||||
|
||||
return (pc - PC) | flags | DASMFLAG_SUPPORTED;
|
||||
if (0 == (tok & t_MASK))
|
||||
sprintf(buffer, "%s", token_str[tok & t_MASK]);
|
||||
else
|
||||
dst = buffer + sprintf(buffer, "%-7s", token_str[tok & t_MASK]);
|
||||
|
||||
if (tok & t_I3c) {
|
||||
// 3 bit immediate, complemented
|
||||
UINT8 i = ~op & 7;
|
||||
if (0 != i) // only print if non-zero
|
||||
dst += sprintf(dst, "%x", i);
|
||||
}
|
||||
|
||||
if (tok & t_I4) {
|
||||
// 4 bit immediate
|
||||
UINT8 i = op & 15;
|
||||
dst += sprintf(dst, "%x", i);
|
||||
}
|
||||
|
||||
if (tok & t_I4c) {
|
||||
// 4 bit immediate, complemented
|
||||
UINT8 i = ~op & 15;
|
||||
dst += sprintf(dst, "%x", i);
|
||||
}
|
||||
|
||||
if (tok & t_I4p) {
|
||||
// 4 bit immediate offset into page 3
|
||||
UINT8 i = op & 15;
|
||||
dst += sprintf(dst, "[%x]", 0x0c0 | i);
|
||||
}
|
||||
|
||||
if (tok & t_I6p) {
|
||||
// 6 bit immediate offset into current page
|
||||
UINT8 i = op & 63;
|
||||
dst += sprintf(dst, "%x", (PC & ~63) | i);
|
||||
}
|
||||
|
||||
if (tok & t_I8) {
|
||||
// 8 bit immediate I/O port address
|
||||
UINT8 arg = ARG(pc++);
|
||||
dst += sprintf(dst, "%02x", arg);
|
||||
}
|
||||
|
||||
if (tok & t_I8c) {
|
||||
// 8 bit immediate offset into page
|
||||
UINT16 arg = ~ARG(pc++) & 255;
|
||||
dst += sprintf(dst, "%03x", arg);
|
||||
}
|
||||
|
||||
if (tok & t_OVER) // TL or TML
|
||||
flags |= DASMFLAG_STEP_OVER;
|
||||
|
||||
if (tok & t_OUT) // RTN or RTNSK
|
||||
flags |= DASMFLAG_STEP_OUT;
|
||||
|
||||
return (pc - PC) | flags | DASMFLAG_SUPPORTED;
|
||||
}
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -1,61 +1,65 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Wilbert Pol, hap
|
||||
/*
|
||||
|
||||
TMS0980/TMS1000-family MCU cores
|
||||
|
||||
*/
|
||||
#ifndef _TMS0980_H_
|
||||
#define _TMS0980_H_
|
||||
|
||||
|
||||
/* Registers */
|
||||
enum {
|
||||
TMS0980_PC=1, TMS0980_SR, TMS0980_PA, TMS0980_PB,
|
||||
TMS0980_A, TMS0980_X, TMS0980_Y, TMS0980_STATUS
|
||||
};
|
||||
#include "emu.h"
|
||||
#include "machine/pla.h"
|
||||
|
||||
|
||||
#define MCFG_TMS1XXX_OUTPUT_PLA(_pla) \
|
||||
tms1xxx_cpu_device::set_output_pla(*device, _pla);
|
||||
|
||||
#define MCFG_TMS1XXX_READ_K(_devcb) \
|
||||
tms1xxx_cpu_device::set_read_k(*device, DEVCB_##_devcb);
|
||||
#define MCFG_TMS1XXX_READ_K_CB(_devcb) \
|
||||
tms1xxx_cpu_device::set_read_k_callback(*device, DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_TMS1XXX_WRITE_O(_devcb) \
|
||||
tms1xxx_cpu_device::set_write_o(*device, DEVCB_##_devcb);
|
||||
#define MCFG_TMS1XXX_WRITE_O_CB(_devcb) \
|
||||
tms1xxx_cpu_device::set_write_o_callback(*device, DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_TMS1XXX_WRITE_R(_devcb) \
|
||||
tms1xxx_cpu_device::set_write_r(*device, DEVCB_##_devcb);
|
||||
#define MCFG_TMS1XXX_WRITE_R_CB(_devcb) \
|
||||
tms1xxx_cpu_device::set_write_r_callback(*device, DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_TMS1XXX_POWER_OFF_CB(_devcb) \
|
||||
tms1xxx_cpu_device::set_power_off_callback(*device, DEVCB_##_devcb);
|
||||
|
||||
|
||||
class tms1xxx_cpu_device : public cpu_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
tms1xxx_cpu_device( const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock
|
||||
, const UINT32* decode_table, UINT16 o_mask, UINT16 r_mask, UINT8 pc_size, UINT8 byte_size, UINT8 x_bits
|
||||
, int program_addrbus_width, address_map_constructor program, int data_addrbus_width, address_map_constructor data, const char *shortname, const char *source)
|
||||
: cpu_device( mconfig, type, name, tag, owner, clock, shortname, source)
|
||||
, m_program_config("program", ENDIANNESS_BIG, byte_size > 8 ? 16 : 8, program_addrbus_width, 0, program )
|
||||
, m_data_config("data", ENDIANNESS_BIG, 8, data_addrbus_width, 0, data )
|
||||
, m_pc(0)
|
||||
, m_pa(0)
|
||||
, m_sr(0)
|
||||
, m_pb(0)
|
||||
, m_a(0)
|
||||
, m_x(0)
|
||||
, m_y(0)
|
||||
, m_status(0)
|
||||
, m_o_mask( o_mask )
|
||||
, m_r_mask( r_mask )
|
||||
, m_pc_size( pc_size )
|
||||
, m_byte_size( byte_size )
|
||||
, m_x_bits( x_bits )
|
||||
, m_decode_table( decode_table )
|
||||
, c_output_pla( NULL )
|
||||
, m_read_k( *this )
|
||||
, m_write_o( *this )
|
||||
, m_write_r( *this )
|
||||
tms1xxx_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock
|
||||
, UINT8 o_pins, UINT8 r_pins, UINT8 k_pins, UINT8 pc_bits, UINT8 byte_bits, UINT8 x_bits
|
||||
, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
|
||||
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
|
||||
, m_program_config("program", ENDIANNESS_BIG, byte_bits > 8 ? 16 : 8, prgwidth, 0, program)
|
||||
, m_data_config("data", ENDIANNESS_BIG, 8, datawidth, 0, data)
|
||||
, m_mpla(*this, "mpla")
|
||||
, m_ipla(*this, "ipla")
|
||||
, m_opla(*this, "opla")
|
||||
, m_spla(*this, "spla")
|
||||
, m_o_pins(o_pins)
|
||||
, m_r_pins(r_pins)
|
||||
, m_k_pins(k_pins)
|
||||
, m_pc_bits(pc_bits)
|
||||
, m_byte_bits(byte_bits)
|
||||
, m_x_bits(x_bits)
|
||||
, c_output_pla(NULL)
|
||||
, m_read_k(*this)
|
||||
, m_write_o(*this)
|
||||
, m_write_r(*this)
|
||||
, m_power_off(*this)
|
||||
{ }
|
||||
|
||||
// static configuration helpers
|
||||
template<class _Object> static devcb_base &set_read_k(device_t &device, _Object object) { return downcast<tms1xxx_cpu_device &>(device).m_read_k.set_callback(object); }
|
||||
template<class _Object> static devcb_base &set_write_o(device_t &device, _Object object) { return downcast<tms1xxx_cpu_device &>(device).m_write_o.set_callback(object); }
|
||||
template<class _Object> static devcb_base &set_write_r(device_t &device, _Object object) { return downcast<tms1xxx_cpu_device &>(device).m_write_r.set_callback(object); }
|
||||
template<class _Object> static devcb_base &set_read_k_callback(device_t &device, _Object object) { return downcast<tms1xxx_cpu_device &>(device).m_read_k.set_callback(object); }
|
||||
template<class _Object> static devcb_base &set_write_o_callback(device_t &device, _Object object) { return downcast<tms1xxx_cpu_device &>(device).m_write_o.set_callback(object); }
|
||||
template<class _Object> static devcb_base &set_write_r_callback(device_t &device, _Object object) { return downcast<tms1xxx_cpu_device &>(device).m_write_r.set_callback(object); }
|
||||
template<class _Object> static devcb_base &set_power_off_callback(device_t &device, _Object object) { return downcast<tms1xxx_cpu_device &>(device).m_power_off.set_callback(object); }
|
||||
static void set_output_pla(device_t &device, const UINT16 *output_pla) { downcast<tms1xxx_cpu_device &>(device).c_output_pla = output_pla; }
|
||||
|
||||
protected:
|
||||
@ -65,62 +69,96 @@ protected:
|
||||
|
||||
// device_execute_interface overrides
|
||||
virtual UINT32 execute_min_cycles() const { return 1; }
|
||||
virtual UINT32 execute_max_cycles() const { return 6; }
|
||||
virtual UINT32 execute_max_cycles() const { return 1; }
|
||||
virtual UINT32 execute_input_lines() const { return 1; }
|
||||
virtual void execute_run();
|
||||
|
||||
// device_memory_interface overrides
|
||||
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_DATA ) ? &m_data_config : NULL ); }
|
||||
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return(spacenum == AS_PROGRAM) ? &m_program_config :((spacenum == AS_DATA) ? &m_data_config : NULL); }
|
||||
|
||||
// device_disasm_interface overrides
|
||||
virtual UINT32 disasm_min_opcode_bytes() const { return 1; }
|
||||
virtual UINT32 disasm_max_opcode_bytes() const { return 1; }
|
||||
|
||||
void next_pc();
|
||||
void set_cki_bus();
|
||||
void execute_fixed_opcode();
|
||||
|
||||
virtual void write_o_output(UINT8 data);
|
||||
virtual UINT8 read_k_input();
|
||||
virtual void set_cki_bus();
|
||||
virtual void read_opcode();
|
||||
|
||||
virtual void op_sbit();
|
||||
virtual void op_rbit();
|
||||
virtual void op_setr();
|
||||
virtual void op_rstr();
|
||||
virtual void op_tdo();
|
||||
virtual void op_clo();
|
||||
virtual void op_ldx();
|
||||
virtual void op_comx();
|
||||
virtual void op_comx8();
|
||||
virtual void op_ldp();
|
||||
|
||||
virtual void op_comc();
|
||||
virtual void op_xda();
|
||||
virtual void op_off();
|
||||
virtual void op_seac();
|
||||
virtual void op_reac();
|
||||
virtual void op_sal();
|
||||
virtual void op_sbl();
|
||||
|
||||
address_space_config m_program_config;
|
||||
address_space_config m_data_config;
|
||||
|
||||
UINT8 m_prev_pc; /* previous program counter */
|
||||
UINT8 m_prev_pa; /* previous page address register */
|
||||
UINT8 m_pc; /* program counter is a 7 bit register on tms0980, 6 bit register on tms1000/1070/1200/1270/1100/1300 */
|
||||
UINT8 m_pa; /* page address register is a 4 bit register */
|
||||
UINT8 m_sr; /* subroutine return register is a 7 bit register */
|
||||
UINT8 m_pb; /* page buffer register is a 4 bit register */
|
||||
UINT8 m_a; /* Accumulator is a 4 bit register (?) */
|
||||
UINT8 m_x; /* X-register is a 2, 3, or 4 bit register */
|
||||
UINT8 m_y; /* Y-register is a 4 bit register */
|
||||
UINT8 m_dam; /* DAM register is a 4 bit register */
|
||||
UINT8 m_ca; /* Chapter address bit */
|
||||
UINT8 m_cb; /* Chapter buffer bit */
|
||||
UINT8 m_cs; /* Chapter subroutine bit */
|
||||
optional_device<pla_device> m_mpla;
|
||||
optional_device<pla_device> m_ipla;
|
||||
optional_device<pla_device> m_opla;
|
||||
optional_device<pla_device> m_spla;
|
||||
|
||||
UINT8 m_pc; // 6 or 7-bit program counter
|
||||
UINT8 m_sr; // 6 or 7-bit subroutine return register
|
||||
UINT8 m_pa; // 4-bit page address register
|
||||
UINT8 m_pb; // 4-bit page buffer register
|
||||
UINT8 m_a; // 4-bit accumulator
|
||||
UINT8 m_x; // 2,3,or 4-bit RAM X register
|
||||
UINT8 m_y; // 4-bit RAM Y register
|
||||
UINT8 m_ca; // chapter address bit
|
||||
UINT8 m_cb; // chapter buffer bit
|
||||
UINT8 m_cs; // chapter subroutine bit
|
||||
UINT16 m_r;
|
||||
UINT8 m_o;
|
||||
UINT8 m_cki_bus; /* CKI bus */
|
||||
UINT8 m_p; /* adder p-input */
|
||||
UINT8 m_n; /* adder n-input */
|
||||
UINT8 m_adder_result; /* adder result */
|
||||
UINT8 m_carry_in; /* carry in */
|
||||
UINT16 m_o;
|
||||
UINT8 m_cki_bus;
|
||||
UINT8 m_c4;
|
||||
UINT8 m_p; // 4-bit adder p(lus)-input
|
||||
UINT8 m_n; // 4-bit adder n(egative)-input
|
||||
UINT8 m_adder_out; // adder result
|
||||
UINT8 m_carry_in; // adder carry-in bit
|
||||
UINT8 m_carry_out; // adder carry-out bit
|
||||
UINT8 m_status;
|
||||
UINT8 m_status_latch;
|
||||
UINT8 m_special_status;
|
||||
UINT8 m_call_latch;
|
||||
UINT8 m_add_latch;
|
||||
UINT8 m_branch_latch;
|
||||
int m_subcycle;
|
||||
UINT8 m_eac; // end around carry bit
|
||||
UINT8 m_clatch; // call latch bit
|
||||
UINT8 m_add; // add latch bit
|
||||
UINT8 m_bl; // branch latch bit
|
||||
|
||||
UINT8 m_ram_in;
|
||||
UINT8 m_dam_in;
|
||||
int m_ram_out; // signed!
|
||||
UINT8 m_ram_address;
|
||||
UINT16 m_ram_data;
|
||||
UINT16 m_rom_address;
|
||||
UINT16 m_opcode;
|
||||
UINT32 m_decode;
|
||||
UINT32 m_fixed;
|
||||
UINT32 m_micro;
|
||||
int m_subcycle;
|
||||
int m_icount;
|
||||
UINT16 m_o_mask; /* mask to determine the number of O outputs */
|
||||
UINT16 m_r_mask; /* mask to determine the number of R outputs */
|
||||
UINT8 m_pc_size; /* how bits in the PC register */
|
||||
UINT8 m_byte_size; /* 8 or 9 bit bytes */
|
||||
UINT8 m_x_bits; /* determine the number of bits in the X register */
|
||||
const UINT32 *m_decode_table;
|
||||
|
||||
UINT8 m_o_pins; // how many O pins
|
||||
UINT8 m_r_pins; // how many R pins
|
||||
UINT8 m_k_pins; // how many K pins
|
||||
UINT8 m_pc_bits; // how many program counter bits
|
||||
UINT8 m_byte_bits; // how many bits per 'byte'
|
||||
UINT8 m_x_bits; // how many X register bits
|
||||
|
||||
address_space *m_program;
|
||||
address_space *m_data;
|
||||
|
||||
@ -128,47 +166,38 @@ protected:
|
||||
devcb_read8 m_read_k;
|
||||
devcb_write16 m_write_o;
|
||||
devcb_write16 m_write_r;
|
||||
devcb_write_line m_power_off;
|
||||
|
||||
UINT32 m_o_mask;
|
||||
UINT32 m_r_mask;
|
||||
UINT32 m_k_mask;
|
||||
UINT32 m_pc_mask;
|
||||
UINT32 m_x_mask;
|
||||
|
||||
// lookup tables
|
||||
dynamic_array<UINT32> m_fixed_decode;
|
||||
dynamic_array<UINT32> m_micro_decode;
|
||||
dynamic_array<UINT32> m_micro_direct;
|
||||
};
|
||||
|
||||
|
||||
class tms0980_cpu_device : public tms1xxx_cpu_device
|
||||
{
|
||||
public:
|
||||
tms0980_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
// device_state_interface overrides
|
||||
void state_string_export(const device_state_entry &entry, astring &string);
|
||||
|
||||
// device_disasm_interface overrides
|
||||
virtual UINT32 disasm_min_opcode_bytes() const { return 2; }
|
||||
virtual UINT32 disasm_max_opcode_bytes() const { return 2; }
|
||||
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
|
||||
};
|
||||
|
||||
|
||||
class tms1000_cpu_device : public tms1xxx_cpu_device
|
||||
{
|
||||
public:
|
||||
tms1000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
tms1000_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT16 o_mask, UINT16 r_mask, const char *shortname, const char *source);
|
||||
tms1000_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 o_pins, UINT8 r_pins, UINT8 k_pins, UINT8 pc_bits, UINT8 byte_bits, UINT8 x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
|
||||
|
||||
protected:
|
||||
// device_state_interface overrides
|
||||
// overrides
|
||||
virtual void device_reset();
|
||||
virtual machine_config_constructor device_mconfig_additions() const;
|
||||
|
||||
void state_string_export(const device_state_entry &entry, astring &string);
|
||||
|
||||
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
|
||||
};
|
||||
|
||||
|
||||
class tms0970_cpu_device : public tms1000_cpu_device
|
||||
{
|
||||
public:
|
||||
tms0970_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
};
|
||||
|
||||
|
||||
class tms1070_cpu_device : public tms1000_cpu_device
|
||||
{
|
||||
public:
|
||||
@ -183,27 +212,24 @@ public:
|
||||
};
|
||||
|
||||
|
||||
class tms1270_cpu_device : public tms1000_cpu_device
|
||||
{
|
||||
public:
|
||||
tms1270_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
};
|
||||
|
||||
|
||||
class tms1100_cpu_device : public tms1xxx_cpu_device
|
||||
class tms1100_cpu_device : public tms1000_cpu_device
|
||||
{
|
||||
public:
|
||||
tms1100_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
tms1100_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT16 o_mask, UINT16 r_mask, const char *shortname, const char *source);
|
||||
tms1100_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 o_pins, UINT8 r_pins, UINT8 k_pins, UINT8 pc_bits, UINT8 byte_bits, UINT8 x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
|
||||
|
||||
protected:
|
||||
// device_state_interface overrides
|
||||
// overrides
|
||||
virtual void device_reset();
|
||||
|
||||
void state_string_export(const device_state_entry &entry, astring &string);
|
||||
|
||||
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
|
||||
|
||||
virtual void op_setr();
|
||||
virtual void op_rstr();
|
||||
};
|
||||
|
||||
|
||||
class tms1300_cpu_device : public tms1100_cpu_device
|
||||
{
|
||||
public:
|
||||
@ -211,17 +237,57 @@ public:
|
||||
};
|
||||
|
||||
|
||||
/* 9-bit family */
|
||||
extern const device_type TMS0980;
|
||||
class tms0970_cpu_device : public tms1000_cpu_device
|
||||
{
|
||||
public:
|
||||
tms0970_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
tms0970_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 o_pins, UINT8 r_pins, UINT8 k_pins, UINT8 pc_bits, UINT8 byte_bits, UINT8 x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
|
||||
|
||||
protected:
|
||||
// overrides
|
||||
virtual void device_reset();
|
||||
virtual machine_config_constructor device_mconfig_additions() const;
|
||||
|
||||
virtual void write_o_output(UINT8 data);
|
||||
|
||||
virtual void op_setr();
|
||||
virtual void op_tdo();
|
||||
};
|
||||
|
||||
|
||||
class tms0980_cpu_device : public tms0970_cpu_device
|
||||
{
|
||||
public:
|
||||
tms0980_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
// overrides
|
||||
virtual void device_reset();
|
||||
|
||||
void state_string_export(const device_state_entry &entry, astring &string);
|
||||
virtual machine_config_constructor device_mconfig_additions() const;
|
||||
|
||||
virtual UINT32 disasm_min_opcode_bytes() const { return 2; }
|
||||
virtual UINT32 disasm_max_opcode_bytes() const { return 2; }
|
||||
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
|
||||
|
||||
virtual void set_cki_bus();
|
||||
virtual void read_opcode();
|
||||
|
||||
virtual void op_comx();
|
||||
private:
|
||||
UINT32 decode_micro(UINT8 sel);
|
||||
};
|
||||
|
||||
|
||||
|
||||
/* 8-bit family */
|
||||
extern const device_type TMS1000;
|
||||
extern const device_type TMS0970;
|
||||
extern const device_type TMS1070;
|
||||
extern const device_type TMS1200;
|
||||
extern const device_type TMS1270;
|
||||
extern const device_type TMS1100;
|
||||
extern const device_type TMS1300;
|
||||
extern const device_type TMS0970;
|
||||
extern const device_type TMS0980;
|
||||
|
||||
|
||||
#endif /* _TMS0980_H_ */
|
||||
|
@ -927,10 +927,18 @@ rgb_t raw_to_rgb_converter::RRRRGGGGBBBBRGBx_decoder(UINT32 raw)
|
||||
return rgb_t(r, g, b);
|
||||
}
|
||||
|
||||
rgb_t raw_to_rgb_converter::xRGBRRRRGGGGBBBB_decoder(UINT32 raw)
|
||||
rgb_t raw_to_rgb_converter::xRGBRRRRGGGGBBBB_bit0_decoder(UINT32 raw)
|
||||
{
|
||||
UINT8 r = pal5bit(((raw >> 7) & 0x1e) | ((raw >> 14) & 0x01));
|
||||
UINT8 g = pal5bit(((raw >> 3) & 0x1e) | ((raw >> 13) & 0x01));
|
||||
UINT8 b = pal5bit(((raw << 1) & 0x1e) | ((raw >> 12) & 0x01));
|
||||
return rgb_t(r, g, b);
|
||||
}
|
||||
|
||||
rgb_t raw_to_rgb_converter::xRGBRRRRGGGGBBBB_bit4_decoder(UINT32 raw)
|
||||
{
|
||||
UINT8 r = pal5bit(((raw >> 8) & 0x0f) | ((raw >> 10) & 0x10));
|
||||
UINT8 g = pal5bit(((raw >> 4) & 0x0f) | ((raw >> 9) & 0x10));
|
||||
UINT8 b = pal5bit(((raw >> 0) & 0x0f) | ((raw >> 8) & 0x10));
|
||||
return rgb_t(r, g, b);
|
||||
}
|
||||
|
@ -143,7 +143,8 @@
|
||||
#define PALETTE_FORMAT_RRRRRGGGGGBBBBBx raw_to_rgb_converter(2, &raw_to_rgb_converter::standard_rgb_decoder<5,5,5, 11,6,1>)
|
||||
#define PALETTE_FORMAT_GGGGGRRRRRBBBBBx raw_to_rgb_converter(2, &raw_to_rgb_converter::standard_rgb_decoder<5,5,5, 6,11,1>)
|
||||
#define PALETTE_FORMAT_RRRRGGGGBBBBRGBx raw_to_rgb_converter(2, &raw_to_rgb_converter::RRRRGGGGBBBBRGBx_decoder)
|
||||
#define PALETTE_FORMAT_xRGBRRRRGGGGBBBB raw_to_rgb_converter(2, &raw_to_rgb_converter::xRGBRRRRGGGGBBBB_decoder)
|
||||
#define PALETTE_FORMAT_xRGBRRRRGGGGBBBB_bit0 raw_to_rgb_converter(2, &raw_to_rgb_converter::xRGBRRRRGGGGBBBB_bit0_decoder)
|
||||
#define PALETTE_FORMAT_xRGBRRRRGGGGBBBB_bit4 raw_to_rgb_converter(2, &raw_to_rgb_converter::xRGBRRRRGGGGBBBB_bit4_decoder)
|
||||
|
||||
// standard 5-6-5 formats
|
||||
#define PALETTE_FORMAT_RRRRRGGGGGGBBBBB raw_to_rgb_converter(2, &raw_to_rgb_converter::standard_rgb_decoder<5,6,5, 11,5,0>)
|
||||
@ -307,7 +308,8 @@ public:
|
||||
static rgb_t BBGGRRII_decoder(UINT32 raw);
|
||||
static rgb_t IRRRRRGGGGGBBBBB_decoder(UINT32 raw);
|
||||
static rgb_t RRRRGGGGBBBBRGBx_decoder(UINT32 raw); // bits 3/2/1 are LSb
|
||||
static rgb_t xRGBRRRRGGGGBBBB_decoder(UINT32 raw); // bits 14/13/12 are LSb
|
||||
static rgb_t xRGBRRRRGGGGBBBB_bit0_decoder(UINT32 raw); // bits 14/13/12 are LSb
|
||||
static rgb_t xRGBRRRRGGGGBBBB_bit4_decoder(UINT32 raw); // bits 14/13/12 are MSb
|
||||
|
||||
private:
|
||||
// internal data
|
||||
|
@ -206,6 +206,32 @@ int lua_engine::l_emu_gamename(lua_State *L)
|
||||
return 1;
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// emu_romname - returns rom base name
|
||||
//-------------------------------------------------
|
||||
|
||||
int lua_engine::l_emu_romname(lua_State *L)
|
||||
{
|
||||
lua_pushstring(L, luaThis->machine().basename());
|
||||
return 1;
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// emu_pause/emu_unpause - pause/unpause game
|
||||
//-------------------------------------------------
|
||||
|
||||
int lua_engine::l_emu_pause(lua_State *L)
|
||||
{
|
||||
luaThis->machine().pause();
|
||||
return 0;
|
||||
}
|
||||
|
||||
int lua_engine::l_emu_unpause(lua_State *L)
|
||||
{
|
||||
luaThis->machine().resume();
|
||||
return 0;
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// emu_keypost - post keys to natural keyboard
|
||||
//-------------------------------------------------
|
||||
@ -496,6 +522,7 @@ void lua_engine::initialize()
|
||||
luabridge::getGlobalNamespace (m_lua_state)
|
||||
.beginNamespace ("emu")
|
||||
.addCFunction ("gamename", l_emu_gamename )
|
||||
.addCFunction ("romname", l_emu_romname )
|
||||
.addCFunction ("keypost", l_emu_keypost )
|
||||
.addCFunction ("hook_output", l_emu_hook_output )
|
||||
.addCFunction ("time", l_emu_time )
|
||||
@ -503,6 +530,8 @@ void lua_engine::initialize()
|
||||
.addCFunction ("after", l_emu_after )
|
||||
.addCFunction ("exit", l_emu_exit )
|
||||
.addCFunction ("start", l_emu_start )
|
||||
.addCFunction ("pause", l_emu_pause )
|
||||
.addCFunction ("unpause", l_emu_unpause )
|
||||
.beginClass <machine_manager> ("manager")
|
||||
.addFunction ("machine", &machine_manager::machine)
|
||||
.addFunction ("options", &machine_manager::options)
|
||||
|
@ -79,10 +79,13 @@ private:
|
||||
static int l_emu_wait(lua_State *L);
|
||||
static int l_emu_time(lua_State *L);
|
||||
static int l_emu_gamename(lua_State *L);
|
||||
static int l_emu_romname(lua_State *L);
|
||||
static int l_emu_keypost(lua_State *L);
|
||||
static int l_emu_hook_output(lua_State *L);
|
||||
static int l_emu_exit(lua_State *L);
|
||||
static int l_emu_start(lua_State *L);
|
||||
static int l_emu_pause(lua_State *L);
|
||||
static int l_emu_unpause(lua_State *L);
|
||||
|
||||
void resume(void *L, INT32 param);
|
||||
void report_errors(int status);
|
||||
|
@ -226,6 +226,9 @@ private:
|
||||
inline INT32 round_coordinate(_BaseType value)
|
||||
{
|
||||
INT32 result = poly_floor(value);
|
||||
|
||||
if ((value > 0) && (result < 0))
|
||||
return INT_MAX-1;
|
||||
return result + (value - _BaseType(result) > _BaseType(0.5));
|
||||
}
|
||||
|
||||
|
@ -1466,7 +1466,7 @@ void floppy_image_format_t::generate_track(const desc_e *desc, int track, int he
|
||||
break;
|
||||
|
||||
case TRACK_ID_VICTOR_GCR5:
|
||||
gcr5_w(buffer, offset, 10, 1 + track + (head * 0x80));
|
||||
gcr5_w(buffer, offset, 10, track + (head * 0x80));
|
||||
break;
|
||||
|
||||
case HEAD_ID:
|
||||
|
@ -39,6 +39,62 @@
|
||||
Interleave factor 3
|
||||
cell 2.13 usec
|
||||
|
||||
|
||||
Boot Disc Label Format
|
||||
Track 0 Sector 0
|
||||
|
||||
Byte
|
||||
Offset Name Description
|
||||
|
||||
0 System disc ID literally, ff,00h for a system
|
||||
disc
|
||||
|
||||
2 Load address paragraph to load booted
|
||||
program at. If zero then boot
|
||||
loads in high memory.
|
||||
|
||||
4 Length paragraph count to load.
|
||||
|
||||
6 Entry offset I.P. value for transfer of
|
||||
control.
|
||||
|
||||
8 Entry segment C.S. value for transfer of
|
||||
control.
|
||||
|
||||
10 I.D. disc identifier.
|
||||
|
||||
18 Part number system identifier - displayed
|
||||
by early versions of boot.
|
||||
|
||||
26 Sector size byte count for sectors.
|
||||
|
||||
28 Data start first data sector on disc
|
||||
(absolute sectors).
|
||||
|
||||
30 Boot start first absolute sector of
|
||||
program for boot to load at
|
||||
'load address' for 'length'
|
||||
paragraphs.
|
||||
|
||||
32 Flags indicators:
|
||||
bit meaning
|
||||
15-12 interleave factor
|
||||
(0-15)
|
||||
0 0=single sided
|
||||
1=double sided
|
||||
|
||||
34 Disc type 00 = CP/M
|
||||
01 = MS-DOS
|
||||
|
||||
35 Reserved
|
||||
|
||||
38 Speed table information for speed control
|
||||
proc.
|
||||
|
||||
56 Zone table high track for each zone.
|
||||
|
||||
71 Sector/track sectors per track for each
|
||||
zone.
|
||||
*/
|
||||
|
||||
#include "emu.h"
|
||||
@ -84,6 +140,71 @@ int victor9k_format::identify(io_generic *io, UINT32 form_factor)
|
||||
return 0;
|
||||
}
|
||||
|
||||
void victor9k_format::log_boot_sector(UINT8 *data)
|
||||
{
|
||||
// System disc ID
|
||||
logerror("System disc: %s\n", ((data[0] == 0xff) && (data[1] == 0x00)) ? "yes" : "no");
|
||||
|
||||
// Load address
|
||||
logerror("Load address: %04x\n", (data[1] << 8) | data[2]);
|
||||
|
||||
// Length
|
||||
logerror("Length: %04x\n", (data[3] << 8) | data[4]);
|
||||
|
||||
// Entry offset
|
||||
logerror("Entry offset: %04x\n", (data[5] << 8) | data[6]);
|
||||
|
||||
// Entry segment
|
||||
logerror("Entry segment: %04x\n", (data[7] << 8) | data[8]);
|
||||
|
||||
// I.D.
|
||||
//logerror("I.D.: %s\n", data[10]);
|
||||
|
||||
// Part number
|
||||
//logerror("Part number: %s\n", data[18]);
|
||||
|
||||
// Sector size
|
||||
logerror("Sector size: %04x\n", (data[25] << 8) | data[26]);
|
||||
|
||||
// Data start
|
||||
logerror("Data start: %04x\n", (data[27] << 8) | data[28]);
|
||||
|
||||
// Boot start
|
||||
logerror("Boot start: %04x\n", (data[29] << 8) | data[30]);
|
||||
|
||||
// Flags
|
||||
logerror("%s sided\n", BIT(data[33], 0) ? "Double" : "Single");
|
||||
logerror("Interleave factor: %u\n", data[32] >> 4);
|
||||
|
||||
// Disc type
|
||||
switch (data[34]) {
|
||||
case 0x00: logerror("Disc type: CP/M\n"); break;
|
||||
case 0x01: logerror("Disc type: MS-DOS\n"); break;
|
||||
default: logerror("Disc type: unknown\n"); break;
|
||||
}
|
||||
|
||||
// Speed table
|
||||
logerror("Speed table: ");
|
||||
for (int i = 38; i < 56; i++) {
|
||||
logerror("%02x ", data[i]);
|
||||
}
|
||||
logerror("\n");
|
||||
|
||||
// Zone table
|
||||
logerror("Zone table: ");
|
||||
for (int i = 56; i < 71; i++) {
|
||||
logerror("%02x ", data[i]);
|
||||
}
|
||||
logerror("\n");
|
||||
|
||||
// Sector/track
|
||||
logerror("Sector/track: ");
|
||||
for (int i = 71; i < 86; i++) {
|
||||
logerror("%02x ", data[i]);
|
||||
}
|
||||
logerror("\n");
|
||||
}
|
||||
|
||||
floppy_image_format_t::desc_e* victor9k_format::get_sector_desc(const format &f, int ¤t_size, int sector_count)
|
||||
{
|
||||
static floppy_image_format_t::desc_e desc[] = {
|
||||
@ -141,6 +262,8 @@ bool victor9k_format::load(io_generic *io, UINT32 form_factor, floppy_image *ima
|
||||
|
||||
io_generic_read(io, img, 0, size);
|
||||
|
||||
log_boot_sector(img);
|
||||
|
||||
int track_offset = 0;
|
||||
|
||||
for (int head = 0; head < f.head_count; head++) {
|
||||
@ -207,8 +330,8 @@ const int victor9k_format::sectors_per_track[2][80] =
|
||||
18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18,
|
||||
17, 17, 17, 17, 17, 17, 17, 17, 17, 17, 17,
|
||||
16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
|
||||
15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15,
|
||||
14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
|
||||
15, 15, 15, 15, 15, 15, 15, 15, 15, 15,
|
||||
14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
|
||||
13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13,
|
||||
12, 12, 12, 12, 12, 12, 12, 12, 12
|
||||
},
|
||||
|
@ -33,6 +33,7 @@ public:
|
||||
|
||||
int find_size(io_generic *io, UINT32 form_factor);
|
||||
virtual int identify(io_generic *io, UINT32 form_factor);
|
||||
void log_boot_sector(UINT8 *data);
|
||||
floppy_image_format_t::desc_e* get_sector_desc(const format &f, int ¤t_size, int sector_count);
|
||||
void build_sector_description(const format &f, UINT8 *sectdata, offs_t sect_offs, desc_s *sectors, int sector_count) const;
|
||||
virtual bool load(io_generic *io, UINT32 form_factor, floppy_image *image);
|
||||
|
@ -184,7 +184,7 @@
|
||||
#define SET_INPUT_FULL() (m_latch_control &= ~LCTRL_INPUT_EMPTY)
|
||||
|
||||
|
||||
/* These are the some of the control register, we dont use them all */
|
||||
/* These are some of the control registers. We don't use them all */
|
||||
enum
|
||||
{
|
||||
IDMA_CONTROL_REG = 0, /* 3fe0 */
|
||||
|
@ -1030,7 +1030,7 @@ void gottlieb_sound_r2_device::device_timer(emu_timer &timer, device_timer_id id
|
||||
m_nmi_state = 1;
|
||||
nmi_state_update();
|
||||
|
||||
// set a timer to turn it off again on hte next SOUND_CLOCK/16
|
||||
// set a timer to turn it off again on the next SOUND_CLOCK/16
|
||||
timer_set(attotime::from_hz(SOUND2_CLOCK/16), TID_NMI_CLEAR);
|
||||
|
||||
// adjust the NMI timer for the next time
|
||||
|
@ -28,7 +28,7 @@ Game number : A30
|
||||
Vintage : 1984
|
||||
Game serial/model number : M4300006B ?
|
||||
|
||||
I dont have the wiring harness for this board, so dont know if it works.
|
||||
I don't have the wiring harness for this board, so don't know if it works.
|
||||
One GFX ROM is bad though.
|
||||
See A30-26.u23\A30-26.txt for details about the bad ROM.
|
||||
To summarise:
|
||||
|
@ -2098,7 +2098,7 @@ static MACHINE_CONFIG_START( alpha68k_II, alpha68k_state )
|
||||
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", alpha68k_II)
|
||||
MCFG_PALETTE_ADD("palette", 2048)
|
||||
MCFG_PALETTE_FORMAT(xRGBRRRRGGGGBBBB)
|
||||
MCFG_PALETTE_FORMAT(xRGBRRRRGGGGBBBB_bit0)
|
||||
|
||||
MCFG_VIDEO_START_OVERRIDE(alpha68k_state,alpha68k)
|
||||
|
||||
@ -2151,7 +2151,7 @@ static MACHINE_CONFIG_START( alpha68k_II_gm, alpha68k_state )
|
||||
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", alpha68k_II)
|
||||
MCFG_PALETTE_ADD("palette", 2048)
|
||||
MCFG_PALETTE_FORMAT(xRGBRRRRGGGGBBBB)
|
||||
MCFG_PALETTE_FORMAT(xRGBRRRRGGGGBBBB_bit0)
|
||||
|
||||
MCFG_VIDEO_START_OVERRIDE(alpha68k_state,alpha68k)
|
||||
|
||||
@ -2197,7 +2197,7 @@ static MACHINE_CONFIG_START( alpha68k_V, alpha68k_state )
|
||||
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", alpha68k_V)
|
||||
MCFG_PALETTE_ADD("palette", 4096)
|
||||
MCFG_PALETTE_FORMAT(xRGBRRRRGGGGBBBB)
|
||||
MCFG_PALETTE_FORMAT(xRGBRRRRGGGGBBBB_bit0)
|
||||
|
||||
MCFG_VIDEO_START_OVERRIDE(alpha68k_state,alpha68k)
|
||||
|
||||
@ -2243,7 +2243,7 @@ static MACHINE_CONFIG_START( alpha68k_V_sb, alpha68k_state )
|
||||
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", alpha68k_V)
|
||||
MCFG_PALETTE_ADD("palette", 4096)
|
||||
MCFG_PALETTE_FORMAT(xRGBRRRRGGGGBBBB)
|
||||
MCFG_PALETTE_FORMAT(xRGBRRRRGGGGBBBB_bit0)
|
||||
|
||||
MCFG_VIDEO_START_OVERRIDE(alpha68k_state,alpha68k)
|
||||
|
||||
|
@ -41,7 +41,7 @@ REF. 020419
|
||||
Notes:
|
||||
SH4 - Hitachi HD6417750S SH4 CPU (BGA)
|
||||
K4S643232 - Samsung K4S643232E-TC70 64M x 32-bit SDRAM (TSSOP86)
|
||||
GFX - Unknown BGA graphics chip (heatsinked)
|
||||
GFX - NEC PowerVR Neon 250
|
||||
FLASH.IC* - Samsung K9F2808U0B 128MBit (16M + 512k Spare x 8-bit) FlashROM (TSOP48)
|
||||
EPF10K50 - Altera Flex EPF10K50EQC240-3 FPGA (QFP240)
|
||||
EPC1PC8 - Altera EPC1PC8 FPGA Configuration Device (DIP8)
|
||||
@ -56,6 +56,36 @@ Notes:
|
||||
|
||||
*/
|
||||
|
||||
/*
|
||||
|
||||
notes from DEMUL team
|
||||
|
||||
Smashing Drive needs a working SH4 MMU emulation, ATV Track does not.
|
||||
|
||||
Audio - is a simple buffered DAC.
|
||||
frequency is 32kHz
|
||||
data written by CPU to buffer have such meaning:
|
||||
offs 0 - s16 bass channel 0
|
||||
offs 2 - s16 bass channel 1
|
||||
offs 4 - s16 left channel
|
||||
offs 6 - s16 right channel
|
||||
and so on
|
||||
|
||||
buffer is 2x32bytes
|
||||
then it becomes (I suppose half) empty - SH4 IRL5 IRQ generated
|
||||
|
||||
|
||||
"control registers" (Smashing Drive)
|
||||
0 - read - various statuses, returning -1 is OK
|
||||
write - enable slave CPU, gpu, etc most of bits is unclear
|
||||
4 - r/w - communication port (for cabinet linking), returning 0 is OK
|
||||
also there some bits on SH4 PDTRA port, I'll hook it later by myself
|
||||
|
||||
about clocks - SH4s is clocked at 33000000*6
|
||||
but unlike to DC/AW/Naomi SH4 'peripheral clock' (at which works TMU timers and other internal stuff) is 1/6 from CPU clock, not 1/4
|
||||
|
||||
*/
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/sh4/sh4.h"
|
||||
#include "debugger.h"
|
||||
@ -71,8 +101,8 @@ public:
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_subcpu(*this, "subcpu") { }
|
||||
|
||||
DECLARE_READ64_MEMBER(area1_r);
|
||||
DECLARE_WRITE64_MEMBER(area1_w);
|
||||
DECLARE_READ64_MEMBER(control_r);
|
||||
DECLARE_WRITE64_MEMBER(control_w);
|
||||
DECLARE_READ64_MEMBER(area2_r);
|
||||
DECLARE_WRITE64_MEMBER(area2_w);
|
||||
DECLARE_READ64_MEMBER(area3_r);
|
||||
@ -94,6 +124,19 @@ public:
|
||||
|
||||
required_device<sh4_device> m_maincpu;
|
||||
required_device<sh4_device> m_subcpu;
|
||||
protected:
|
||||
bool m_slaverun;
|
||||
};
|
||||
|
||||
|
||||
class smashdrv_state : public atvtrack_state
|
||||
{
|
||||
public:
|
||||
smashdrv_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: atvtrack_state(mconfig, type, tag) { }
|
||||
|
||||
virtual void machine_start();
|
||||
virtual void machine_reset();
|
||||
};
|
||||
|
||||
void atvtrack_state::logbinary(UINT32 data,int high=31,int low=0)
|
||||
@ -126,7 +169,7 @@ inline UINT32 atvtrack_state::decode64_32(offs_t offset64, UINT64 data, UINT64 m
|
||||
return 0;
|
||||
}
|
||||
|
||||
READ64_MEMBER(atvtrack_state::area1_r)
|
||||
READ64_MEMBER(atvtrack_state::control_r)
|
||||
{
|
||||
UINT32 addr;
|
||||
|
||||
@ -139,7 +182,7 @@ READ64_MEMBER(atvtrack_state::area1_r)
|
||||
return -1;
|
||||
}
|
||||
|
||||
WRITE64_MEMBER(atvtrack_state::area1_w)
|
||||
WRITE64_MEMBER(atvtrack_state::control_w)
|
||||
{
|
||||
UINT32 addr, dat; //, old;
|
||||
|
||||
@ -148,9 +191,10 @@ WRITE64_MEMBER(atvtrack_state::area1_w)
|
||||
// old = m_area1_data[addr];
|
||||
m_area1_data[addr] = dat;
|
||||
if (addr == (0x00020000-0x00020000)/4) {
|
||||
if (data & 4) {
|
||||
if ((data & 4) && m_slaverun)
|
||||
m_subcpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
||||
}
|
||||
else
|
||||
m_subcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||
}
|
||||
logerror("Write %08x at %08x ",dat, 0x20000+addr*4+0);
|
||||
logbinary(dat);
|
||||
@ -299,6 +343,10 @@ WRITE64_MEMBER(atvtrack_state::ioport_w)
|
||||
#endif
|
||||
|
||||
if (offset == SH4_IOPORT_16/8) {
|
||||
if ((data & 0xf000) == 0x7000) {
|
||||
if (data & 0x0100)
|
||||
m_slaverun = true;
|
||||
}
|
||||
logerror("SH4 16bit i/o port write ");
|
||||
logbinary((UINT32)data,15,0);
|
||||
logerror("\n");
|
||||
@ -358,22 +406,59 @@ void atvtrack_state::machine_reset()
|
||||
m_subcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||
}
|
||||
|
||||
|
||||
void smashdrv_state::machine_start()
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
void smashdrv_state::machine_reset()
|
||||
{
|
||||
m_slaverun = false;
|
||||
m_subcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||
}
|
||||
|
||||
// ATV Track
|
||||
|
||||
static ADDRESS_MAP_START( atvtrack_main_map, AS_PROGRAM, 64, atvtrack_state )
|
||||
AM_RANGE(0x00000000, 0x000003ff) AM_RAM AM_SHARE("sharedmem")
|
||||
AM_RANGE(0x00020000, 0x00020007) AM_READWRITE(area1_r, area1_w)
|
||||
AM_RANGE(0x00020000, 0x00020007) AM_READWRITE(control_r, control_w) // control registers
|
||||
// AM_RANGE(0x00020040, 0x0002007f) // audio DAC buffer
|
||||
AM_RANGE(0x14000000, 0x14000007) AM_READWRITE(area2_r, area2_w) // data
|
||||
AM_RANGE(0x14100000, 0x14100007) AM_READWRITE(area3_r, area3_w) // command
|
||||
AM_RANGE(0x14200000, 0x14200007) AM_READWRITE(area4_r, area4_w) // address
|
||||
AM_RANGE(0x0c000000, 0x0cffffff) AM_RAM
|
||||
AM_RANGE(0x0c000000, 0x0c7fffff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( atvtrack_main_port, AS_IO, 64, atvtrack_state )
|
||||
AM_RANGE(0x00, 0x1f) AM_READWRITE(ioport_r, ioport_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
// Smashing Drive
|
||||
|
||||
static ADDRESS_MAP_START( smashdrv_main_map, AS_PROGRAM, 64, smashdrv_state )
|
||||
AM_RANGE(0x00000000, 0x03ffffff) AM_ROM
|
||||
AM_RANGE(0x0c000000, 0x0c7fffff) AM_RAM
|
||||
AM_RANGE(0x10000000, 0x100003ff) AM_RAM AM_SHARE("sharedmem")
|
||||
AM_RANGE(0x10000400, 0x10000407) AM_READWRITE(control_r, control_w) // control registers
|
||||
|
||||
// 0x10000400 - 0x1000043F control registers
|
||||
// 0x10000440 - 0x1000047F Audio DAC buffer
|
||||
AM_RANGE(0x14000000, 0x143fffff) AM_ROM AM_REGION("data", 0)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( smashdrv_main_port, AS_IO, 64, smashdrv_state )
|
||||
AM_RANGE(0x00, 0x1f) AM_READWRITE(ioport_r, ioport_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
// Sub CPU (same for both games)
|
||||
|
||||
static ADDRESS_MAP_START( atvtrack_sub_map, AS_PROGRAM, 64, atvtrack_state )
|
||||
AM_RANGE(0x00000000, 0x000003ff) AM_RAM AM_SHARE("sharedmem")
|
||||
AM_RANGE(0x0c000000, 0x0cffffff) AM_RAM
|
||||
// 0x14000000 - 0x1400xxxx GPU registers
|
||||
AM_RANGE(0x18000000, 0x19ffffff) AM_RAM
|
||||
// 0x18000000 - 0x19FFFFFF GPU RAM (32MB)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( atvtrack_sub_port, AS_IO, 64, atvtrack_state )
|
||||
@ -427,9 +512,16 @@ static MACHINE_CONFIG_START( atvtrack, atvtrack_state )
|
||||
MCFG_SCREEN_UPDATE_DRIVER(atvtrack_state, screen_update_atvtrack)
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 0x1000)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_DERIVED_CLASS( smashdrv, atvtrack, smashdrv_state )
|
||||
MCFG_CPU_MODIFY("maincpu")
|
||||
MCFG_CPU_PROGRAM_MAP(smashdrv_main_map)
|
||||
MCFG_CPU_IO_MAP(smashdrv_main_port)
|
||||
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
ROM_START( atvtrack )
|
||||
ROM_REGION( 0x4200000, "maincpu", ROMREGION_ERASEFF) // NAND roms, contain additional data hence the sizes
|
||||
ROM_LOAD32_BYTE("15.bin", 0x0000000, 0x1080000, CRC(84eaede7) SHA1(6e6230165c3bb35e49c660dfd0d07c132ed89e6a) )
|
||||
@ -489,15 +581,18 @@ REF 010131
|
||||
*/
|
||||
|
||||
ROM_START( smashdrv )
|
||||
ROM_REGION( 0x4000000, "maincpu", ROMREGION_ERASEFF)
|
||||
ROM_REGION64_LE( 0x0400000, "data", ROMREGION_ERASEFF)
|
||||
ROM_LOAD("prg.ic23", 0x0000000, 0x0400000, CRC(5cc6d3ac) SHA1(0c8426774212d891796b59c95b8c70f64db5b67a) )
|
||||
ROM_LOAD("sdra.ic15", 0x1000000, 0x1000000, CRC(cf702287) SHA1(84cd83c339831deff15fe5fcc353e0b596667500) )
|
||||
ROM_LOAD("sdrb.ic14", 0x2000000, 0x1000000, CRC(39b76f0e) SHA1(529943b6075925e5f72c6e966796e04b2c33686c) )
|
||||
ROM_LOAD("sdrc.ic20", 0x3000000, 0x1000000, CRC(c9021dd7) SHA1(1d08aab433614810af858a0fc5d7f03c7b782237) )
|
||||
|
||||
ROM_REGION( 0x4000000, "maincpu", ROMREGION_ERASEFF)
|
||||
ROM_LOAD32_WORD("sdra.ic15", 0x00000000, 0x01000000, CRC(cf702287) SHA1(84cd83c339831deff15fe5fcc353e0b596667500) )
|
||||
ROM_LOAD32_WORD("sdrb.ic14", 0x00000002, 0x01000000, CRC(39b76f0e) SHA1(529943b6075925e5f72c6e966796e04b2c33686c) )
|
||||
ROM_LOAD32_WORD("sdrc.ic20", 0x02000000, 0x01000000, CRC(c9021dd7) SHA1(1d08aab433614810af858a0fc5d7f03c7b782237) )
|
||||
// ic21 unpopulated
|
||||
ROM_END
|
||||
|
||||
GAME( 2002, atvtrack, 0, atvtrack, atvtrack, driver_device, 0, ROT0, "Gaelco", "ATV Track (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
|
||||
GAME( 2002, atvtracka, atvtrack, atvtrack, atvtrack, driver_device, 0, ROT0, "Gaelco", "ATV Track (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
|
||||
|
||||
// not the same HW, but has dual SH4 at least
|
||||
GAME( 2000, smashdrv, 0, atvtrack, atvtrack, driver_device, 0, ROT0, "Gaelco", "Smashing Drive", GAME_NOT_WORKING | GAME_NO_SOUND )
|
||||
// almost identical PCB, FlashROM mapping and master registers addresses different
|
||||
GAME( 2000, smashdrv, 0, smashdrv, atvtrack, driver_device, 0, ROT0, "Gaelco", "Smashing Drive", GAME_NOT_WORKING | GAME_NO_SOUND )
|
||||
|
@ -281,7 +281,7 @@ static INPUT_PORTS_START( botanici )
|
||||
|
||||
PORT_MODIFY("P2") // only seems to have 2 coin slots
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNKNOWN ) // this must be ACTIVE_HIGH or the game fails after you complete a level, protection?
|
||||
|
||||
PORT_MODIFY("DSW") // dipswitches are a bit messy on this set
|
||||
PORT_DIPNAME( 0x04, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:3")
|
||||
|
@ -584,7 +584,7 @@ UINT16 sc4_state::bfm_sc4_68307_portb_r(address_space &space, bool dedicated, UI
|
||||
else
|
||||
{
|
||||
// generating certain interrupts expects the bit 0x8000 to be set here
|
||||
// but it's set ot dedicated i/o, not general purpose, source?
|
||||
// but it's set to dedicated i/o, not general purpose, source?
|
||||
return 0x8040;
|
||||
}
|
||||
}
|
||||
|
@ -366,8 +366,10 @@ static MACHINE_CONFIG_START( bionicc, bionicc_state )
|
||||
MCFG_SCREEN_PALETTE("palette")
|
||||
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", bionicc)
|
||||
MCFG_PALETTE_ADD("palette", 1024)
|
||||
|
||||
MCFG_DEVICE_ADD("spritegen", TIGEROAD_SPRITE, 0)
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 1024)
|
||||
|
||||
MCFG_BUFFERED_SPRITERAM16_ADD("spriteram")
|
||||
|
||||
|
@ -367,7 +367,7 @@ ROM_START( bottom9 )
|
||||
ROM_LOAD32_BYTE( "891e09d", 0x40002, 0x10000, CRC(4e1335e6) SHA1(b892ab40a41978a89658ea2e7aabe9b073430b5d) )
|
||||
ROM_LOAD32_BYTE( "891e09b", 0x40003, 0x10000, CRC(b6f914fb) SHA1(e95f3e899c2ead15ef8a529dbc67e8f4a0f88bdd) )
|
||||
|
||||
ROM_REGION( 0x100000, "k051960", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
|
||||
ROM_REGION( 0x100000, "k051960", 0 ) /* graphics ( don't dispose as the program can read them, 0 ) */
|
||||
ROM_LOAD32_BYTE( "891e06e", 0x00000, 0x10000, CRC(0b04db1c) SHA1(0beae7bb8da49379915c0253ce03091eb71a58b5) ) /* sprites */
|
||||
ROM_LOAD32_BYTE( "891e06a", 0x00001, 0x10000, CRC(5ee37327) SHA1(f63ddaf63af06ea5421b0361315940582ef57922) )
|
||||
ROM_LOAD32_BYTE( "891e05e", 0x00002, 0x10000, CRC(b356e729) SHA1(2cda591415b0f139fdb1f80c349d432bb0579d8e) )
|
||||
@ -424,7 +424,7 @@ ROM_START( bottom9n )
|
||||
ROM_LOAD32_BYTE( "891e09d", 0x40002, 0x10000, CRC(4e1335e6) SHA1(b892ab40a41978a89658ea2e7aabe9b073430b5d) )
|
||||
ROM_LOAD32_BYTE( "891e09b", 0x40003, 0x10000, CRC(b6f914fb) SHA1(e95f3e899c2ead15ef8a529dbc67e8f4a0f88bdd) )
|
||||
|
||||
ROM_REGION( 0x100000, "k051960", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
|
||||
ROM_REGION( 0x100000, "k051960", 0 ) /* graphics ( don't dispose as the program can read them, 0 ) */
|
||||
ROM_LOAD32_BYTE( "891e06e", 0x00000, 0x10000, CRC(0b04db1c) SHA1(0beae7bb8da49379915c0253ce03091eb71a58b5) ) /* sprites */
|
||||
ROM_LOAD32_BYTE( "891e06a", 0x00001, 0x10000, CRC(5ee37327) SHA1(f63ddaf63af06ea5421b0361315940582ef57922) )
|
||||
ROM_LOAD32_BYTE( "891e05e", 0x80002, 0x10000, CRC(b356e729) SHA1(2cda591415b0f139fdb1f80c349d432bb0579d8e) )
|
||||
|
@ -320,7 +320,7 @@ static ADDRESS_MAP_START( exctsccr_main_map, AS_PROGRAM, 8, champbas_state )
|
||||
AM_RANGE(0xa002, 0xa002) AM_WRITE(champbas_gfxbank_w)
|
||||
AM_RANGE(0xa003, 0xa003) AM_WRITE(champbas_flipscreen_w)
|
||||
AM_RANGE(0xa006, 0xa006) AM_WRITE(champbas_mcu_halt_w)
|
||||
AM_RANGE(0xa007, 0xa007) AM_WRITENOP /* This is also MCU control, but i dont need it */
|
||||
AM_RANGE(0xa007, 0xa007) AM_WRITENOP /* This is also MCU control, but I don't need it */
|
||||
|
||||
AM_RANGE(0xa040, 0xa06f) AM_WRITEONLY AM_SHARE("spriteram") /* Sprite pos */
|
||||
AM_RANGE(0xa080, 0xa080) AM_WRITE(soundlatch_byte_w)
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -548,7 +548,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, cps_state )
|
||||
AM_RANGE(0x800030, 0x800037) AM_WRITE(cps1_coinctrl_w)
|
||||
/* Forgotten Worlds has dial controls on B-board mapped at 800040-80005f. See DRIVER_INIT */
|
||||
AM_RANGE(0x800100, 0x80013f) AM_WRITE(cps1_cps_a_w) AM_SHARE("cps_a_regs") /* CPS-A custom */
|
||||
/* CPS-B custom is mapped by the PAL IOB2 on the B-board. SF2 revision "E" World and USA 910228 has it a a different
|
||||
/* CPS-B custom is mapped by the PAL IOB2 on the B-board. SF2 revision "E" World and USA 910228 has it at a different
|
||||
address, see DRIVER_INIT */
|
||||
AM_RANGE(0x800140, 0x80017f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) AM_SHARE("cps_b_regs")
|
||||
AM_RANGE(0x800180, 0x800187) AM_WRITE(cps1_soundlatch_w) /* Sound command */
|
||||
|
@ -1054,7 +1054,7 @@ DRIVER_INIT_MEMBER(crystal_state,evosocc)
|
||||
|
||||
The PIC uses a software UART bit banged on a single output pin of the main CPU:
|
||||
the data port is bit 0x20000000 on the PIO register, the same register where the EEPROM control lines are. The serial data is transmitted at 8 data bits, even parity, 1 stop bit. It's probably
|
||||
tricky to get it working properly because it doesn't rely on a clock signal, and so, the pic and main cpu must run in in parallel, and the bit lengths must match. The pic bit delay routine is just a loop.
|
||||
tricky to get it working properly because it doesn't rely on a clock signal, and so, the pic and main cpu must run in parallel, and the bit lengths must match. The pic bit delay routine is just a loop.
|
||||
also it seems that bit 0x40000000 is the PIC reset.
|
||||
|
||||
*/
|
||||
|
@ -11,6 +11,7 @@
|
||||
#include "emu.h"
|
||||
#include "cpu/z80/z80.h"
|
||||
#include "sound/okim6295.h"
|
||||
#include "machine/bankdev.h"
|
||||
|
||||
#define MCLK 16000000
|
||||
|
||||
@ -19,19 +20,33 @@ class cultures_state : public driver_device
|
||||
public:
|
||||
cultures_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag),
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_gfxdecode(*this, "gfxdecode"),
|
||||
m_vrambank(*this, "vrambank"),
|
||||
m_prgbank(*this, "prgbank"),
|
||||
m_okibank(*this, "okibank"),
|
||||
m_bg1_rom(*this, "bg1"),
|
||||
m_bg2_rom(*this, "bg2"),
|
||||
m_bg0_videoram(*this, "bg0_videoram"),
|
||||
m_bg0_regs_x(*this, "bg0_regs_x"),
|
||||
m_bg0_regs_y(*this, "bg0_regs_y"),
|
||||
m_bg1_regs_x(*this, "bg1_regs_x"),
|
||||
m_bg1_regs_y(*this, "bg1_regs_y"),
|
||||
m_bg2_regs_x(*this, "bg2_regs_x"),
|
||||
m_bg2_regs_y(*this, "bg2_regs_y"),
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_gfxdecode(*this, "gfxdecode"),
|
||||
m_palette(*this, "palette") { }
|
||||
m_bg2_regs_y(*this, "bg2_regs_y")
|
||||
{ }
|
||||
|
||||
/* devices */
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
required_device<address_map_bank_device> m_vrambank;
|
||||
required_memory_bank m_prgbank;
|
||||
required_memory_bank m_okibank;
|
||||
|
||||
UINT8 m_paletteram[0x4000];
|
||||
/* memory pointers */
|
||||
required_region_ptr<UINT16> m_bg1_rom;
|
||||
required_region_ptr<UINT16> m_bg2_rom;
|
||||
|
||||
required_shared_ptr<UINT8> m_bg0_videoram;
|
||||
required_shared_ptr<UINT8> m_bg0_regs_x;
|
||||
required_shared_ptr<UINT8> m_bg0_regs_y;
|
||||
@ -44,11 +59,9 @@ public:
|
||||
tilemap_t *m_bg0_tilemap;
|
||||
tilemap_t *m_bg1_tilemap;
|
||||
tilemap_t *m_bg2_tilemap;
|
||||
int m_video_bank;
|
||||
int m_irq_enable;
|
||||
int m_bg1_bank;
|
||||
int m_bg2_bank;
|
||||
int m_old_bank;
|
||||
DECLARE_WRITE8_MEMBER(cpu_bankswitch_w);
|
||||
DECLARE_WRITE8_MEMBER(bg0_videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(misc_w);
|
||||
@ -61,30 +74,25 @@ public:
|
||||
virtual void video_start();
|
||||
UINT32 screen_update_cultures(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
INTERRUPT_GEN_MEMBER(cultures_interrupt);
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
required_device<palette_device> m_palette;
|
||||
};
|
||||
|
||||
|
||||
|
||||
TILE_GET_INFO_MEMBER(cultures_state::get_bg1_tile_info)
|
||||
{
|
||||
UINT8 *region = memregion("gfx3")->base() + 0x200000 + 0x80000 * m_bg1_bank;
|
||||
int code = region[tile_index * 2] + (region[tile_index * 2 + 1] << 8);
|
||||
SET_TILE_INFO_MEMBER(2, code, code >> 12, 0);
|
||||
int const code = m_bg1_rom[0x200000/2 + m_bg1_bank * 0x80000/2 + tile_index];
|
||||
SET_TILE_INFO_MEMBER(1, code, code >> 12, 0);
|
||||
}
|
||||
|
||||
TILE_GET_INFO_MEMBER(cultures_state::get_bg2_tile_info)
|
||||
{
|
||||
UINT8 *region = memregion("gfx2")->base() + 0x200000 + 0x80000 * m_bg2_bank;
|
||||
int code = region[tile_index * 2] + (region[tile_index * 2 + 1] << 8);
|
||||
SET_TILE_INFO_MEMBER(1, code, code >> 12, 0);
|
||||
int const code = m_bg2_rom[0x200000/2 + m_bg2_bank * 0x80000/2 + tile_index];
|
||||
SET_TILE_INFO_MEMBER(2, code, code >> 12, 0);
|
||||
}
|
||||
|
||||
TILE_GET_INFO_MEMBER(cultures_state::get_bg0_tile_info)
|
||||
{
|
||||
int code = m_bg0_videoram[tile_index * 2] + (m_bg0_videoram[tile_index * 2 + 1] << 8);
|
||||
int const code = m_bg0_videoram[tile_index * 2] + (m_bg0_videoram[tile_index * 2 + 1] << 8);
|
||||
SET_TILE_INFO_MEMBER(0, code, code >> 12, 0);
|
||||
}
|
||||
|
||||
@ -97,13 +105,13 @@ void cultures_state::video_start()
|
||||
m_bg1_tilemap->set_transparent_pen(0);
|
||||
m_bg0_tilemap->set_transparent_pen(0);
|
||||
|
||||
m_bg0_tilemap->set_scrolldx(502, 10);
|
||||
m_bg1_tilemap->set_scrolldx(502, 10);
|
||||
m_bg2_tilemap->set_scrolldx(502, 10);
|
||||
m_bg0_tilemap->set_scrolldx(502, -118);
|
||||
m_bg1_tilemap->set_scrolldx(502, -118);
|
||||
m_bg2_tilemap->set_scrolldx(502, -118);
|
||||
|
||||
m_bg0_tilemap->set_scrolldy(255, 0);
|
||||
m_bg1_tilemap->set_scrolldy(255, 0);
|
||||
m_bg2_tilemap->set_scrolldy(255, 0);
|
||||
m_bg0_tilemap->set_scrolldy(255, -16);
|
||||
m_bg1_tilemap->set_scrolldy(255, -16);
|
||||
m_bg2_tilemap->set_scrolldy(255, -16);
|
||||
}
|
||||
|
||||
UINT32 cultures_state::screen_update_cultures(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
@ -137,46 +145,20 @@ UINT32 cultures_state::screen_update_cultures(screen_device &screen, bitmap_ind1
|
||||
|
||||
WRITE8_MEMBER(cultures_state::cpu_bankswitch_w)
|
||||
{
|
||||
membank("bank1")->set_entry(data & 0x0f);
|
||||
m_video_bank = ~data & 0x20;
|
||||
m_prgbank->set_entry(data & 0x0f);
|
||||
m_vrambank->set_bank((data & 0x20)>>5);
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(cultures_state::bg0_videoram_w)
|
||||
{
|
||||
if (m_video_bank == 0)
|
||||
{
|
||||
int r, g, b, datax;
|
||||
m_paletteram[offset] = data;
|
||||
offset >>= 1;
|
||||
datax = m_paletteram[offset * 2] + 256 * m_paletteram[offset * 2 + 1];
|
||||
|
||||
r = ((datax >> 7) & 0x1e) | ((datax & 0x4000) ? 0x1 : 0);
|
||||
g = ((datax >> 3) & 0x1e) | ((datax & 0x2000) ? 0x1 : 0);
|
||||
b = ((datax << 1) & 0x1e) | ((datax & 0x1000) ? 0x1 : 0);
|
||||
|
||||
m_palette->set_pen_color(offset, pal5bit(r), pal5bit(g), pal5bit(b));
|
||||
}
|
||||
else
|
||||
{
|
||||
m_bg0_videoram[offset] = data;
|
||||
m_bg0_tilemap->mark_tile_dirty(offset >> 1);
|
||||
}
|
||||
m_bg0_videoram[offset] = data;
|
||||
m_bg0_tilemap->mark_tile_dirty(offset >> 1);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(cultures_state::misc_w)
|
||||
{
|
||||
int new_bank = data & 0xf;
|
||||
|
||||
if (m_old_bank != new_bank)
|
||||
{
|
||||
// oki banking
|
||||
UINT8 *src = memregion("oki")->base() + 0x40000 + 0x20000 * new_bank;
|
||||
UINT8 *dst = memregion("oki")->base() + 0x20000;
|
||||
memcpy(dst, src, 0x20000);
|
||||
|
||||
m_old_bank = new_bank;
|
||||
}
|
||||
|
||||
m_okibank->set_entry(data&0x0f);
|
||||
m_irq_enable = data & 0x80;
|
||||
}
|
||||
|
||||
@ -196,10 +178,21 @@ WRITE8_MEMBER(cultures_state::bg_bank_w)
|
||||
coin_counter_w(machine(), 0, data & 0x10);
|
||||
}
|
||||
|
||||
|
||||
static ADDRESS_MAP_START( oki_map, AS_0, 8, cultures_state )
|
||||
AM_RANGE(0x00000, 0x1ffff) AM_ROM
|
||||
AM_RANGE(0x20000, 0x3ffff) AM_ROMBANK("okibank")
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( vrambank_map, AS_PROGRAM, 8, cultures_state )
|
||||
AM_RANGE(0x0000, 0x3fff) AM_RAM_WRITE(bg0_videoram_w) AM_SHARE("bg0_videoram")
|
||||
AM_RANGE(0x4000, 0x6fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( cultures_map, AS_PROGRAM, 8, cultures_state )
|
||||
AM_RANGE(0x0000, 0x3fff) AM_ROM
|
||||
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
|
||||
AM_RANGE(0x8000, 0xbfff) AM_RAM_WRITE(bg0_videoram_w) AM_SHARE("bg0_videoram")
|
||||
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("prgbank")
|
||||
AM_RANGE(0x8000, 0xbfff) AM_DEVICE("vrambank", address_map_bank_device, amap8)
|
||||
AM_RANGE(0xc000, 0xdfff) AM_RAM
|
||||
AM_RANGE(0xf000, 0xffff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
@ -364,9 +357,9 @@ static const gfx_layout gfxlayout =
|
||||
};
|
||||
|
||||
static GFXDECODE_START( culture )
|
||||
GFXDECODE_ENTRY("gfx1", 0, gfxlayout, 0x0000, 0x10 )
|
||||
GFXDECODE_ENTRY("gfx2", 0, gfxlayout, 0x1000, 0x10 )
|
||||
GFXDECODE_ENTRY("gfx3", 0, gfxlayout, 0x1000, 0x10 )
|
||||
GFXDECODE_ENTRY("bg0", 0, gfxlayout, 0x0000, 16 )
|
||||
GFXDECODE_ENTRY("bg1", 0, gfxlayout, 0x1000, 8 )
|
||||
GFXDECODE_ENTRY("bg2", 0, gfxlayout, 0x1000, 8 )
|
||||
GFXDECODE_END
|
||||
|
||||
INTERRUPT_GEN_MEMBER(cultures_state::cultures_interrupt)
|
||||
@ -377,13 +370,10 @@ INTERRUPT_GEN_MEMBER(cultures_state::cultures_interrupt)
|
||||
|
||||
void cultures_state::machine_start()
|
||||
{
|
||||
UINT8 *ROM = memregion("maincpu")->base();
|
||||
m_prgbank->configure_entries(0, 16, memregion("maincpu")->base(), 0x4000);
|
||||
m_okibank->configure_entries(0, 0x200000 / 0x20000, memregion("oki")->base(), 0x20000);
|
||||
m_okibank->set_entry(0);
|
||||
|
||||
membank("bank1")->configure_entries(0, 16, &ROM[0x0000], 0x4000);
|
||||
|
||||
save_item(NAME(m_paletteram));
|
||||
save_item(NAME(m_old_bank));
|
||||
save_item(NAME(m_video_bank));
|
||||
save_item(NAME(m_irq_enable));
|
||||
save_item(NAME(m_bg1_bank));
|
||||
save_item(NAME(m_bg2_bank));
|
||||
@ -391,13 +381,15 @@ void cultures_state::machine_start()
|
||||
|
||||
void cultures_state::machine_reset()
|
||||
{
|
||||
m_old_bank = -1;
|
||||
m_video_bank = 0;
|
||||
m_okibank->set_entry(0);
|
||||
m_vrambank->set_bank(1);
|
||||
m_irq_enable = 0;
|
||||
m_bg1_bank = 0;
|
||||
m_bg2_bank = 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START( cultures, cultures_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
@ -406,6 +398,13 @@ static MACHINE_CONFIG_START( cultures, cultures_state )
|
||||
MCFG_CPU_IO_MAP(cultures_io_map)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", cultures_state, cultures_interrupt)
|
||||
|
||||
MCFG_DEVICE_ADD("vrambank", ADDRESS_MAP_BANK, 0)
|
||||
MCFG_DEVICE_PROGRAM_MAP(vrambank_map)
|
||||
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE)
|
||||
MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8)
|
||||
MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(15)
|
||||
MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000)
|
||||
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
@ -417,14 +416,16 @@ static MACHINE_CONFIG_START( cultures, cultures_state )
|
||||
MCFG_SCREEN_PALETTE("palette")
|
||||
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", culture)
|
||||
MCFG_PALETTE_ADD("palette", 0x2000)
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 0x3000/2)
|
||||
MCFG_PALETTE_FORMAT(xRGBRRRRGGGGBBBB_bit0)
|
||||
|
||||
/* sound hardware */
|
||||
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||
|
||||
MCFG_OKIM6295_ADD("oki", (MCLK/1024)*132, OKIM6295_PIN7_HIGH) // clock frequency & pin 7 not verified
|
||||
MCFG_OKIM6295_ADD("oki", MCLK/8, OKIM6295_PIN7_HIGH) // clock frequency & pin 7 not verified
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
|
||||
MCFG_DEVICE_ADDRESS_MAP(AS_0, oki_map)
|
||||
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
/*
|
||||
@ -471,23 +472,23 @@ ROM_START( cultures )
|
||||
ROM_REGION( 0x40000, "maincpu", 0 )
|
||||
ROM_LOAD( "ma01.u12", 0x000000, 0x040000, CRC(f57417b3) SHA1(9a2a50222f54e5da9bc5c66863b8be16e33b171f) )
|
||||
|
||||
ROM_REGION( 0x300000, "gfx1", 0 )
|
||||
ROM_REGION( 0x400000, "bg0", ROMREGION_ERASE00 )
|
||||
ROM_LOAD( "bg0c.u45", 0x000000, 0x200000, CRC(ad2e1263) SHA1(b28a3d82aaa0421a7b4df837814147b109e7d1a5) )
|
||||
ROM_LOAD( "bg0c2.u46", 0x200000, 0x100000, CRC(97c71c09) SHA1(ffbcee1d9cb39d0824f3aa652c3a24579113cf2e) )
|
||||
|
||||
ROM_REGION( 0x400000, "gfx2", ROMREGION_ERASE00 )
|
||||
ROM_LOAD( "bg1c.u80", 0x000000, 0x200000, CRC(9ab99bd9) SHA1(bce41b6f5d83c8262ba8d37b2dfcd5d7a5e7ace7) )
|
||||
ROM_LOAD( "bg2t.u79", 0x200000, 0x100000, CRC(0610a79f) SHA1(9fc6b2e5c573ed682b2f7fa462c8f42ff99da5ba) )
|
||||
/* 0x300000 - 0x3fffff empty */
|
||||
|
||||
ROM_REGION( 0x400000, "gfx3", ROMREGION_ERASE00 )
|
||||
ROM_REGION16_LE( 0x400000, "bg1", ROMREGION_ERASE00 )
|
||||
ROM_LOAD( "bg2c.u68", 0x000000, 0x200000, CRC(fa598644) SHA1(532249e456c34f18a787d5a028df82f2170f604d) )
|
||||
ROM_LOAD( "bg1t.u67", 0x200000, 0x100000, CRC(d2e594ee) SHA1(a84b5ab62dec1867d433ccaeb1381e7593958cf0) )
|
||||
/* 0x300000 - 0x3fffff empty */
|
||||
|
||||
ROM_REGION( 0x240000, "oki", 0 )
|
||||
ROM_LOAD( "pcm.u87", 0x040000, 0x200000, CRC(84206475) SHA1(d1423bd5c7425e121fb4e7845cf57801e9afa7b3) )
|
||||
ROM_RELOAD( 0x000000, 0x020000 )
|
||||
ROM_REGION16_LE( 0x400000, "bg2", ROMREGION_ERASE00 )
|
||||
ROM_LOAD( "bg1c.u80", 0x000000, 0x200000, CRC(9ab99bd9) SHA1(bce41b6f5d83c8262ba8d37b2dfcd5d7a5e7ace7) )
|
||||
ROM_LOAD( "bg2t.u79", 0x200000, 0x100000, CRC(0610a79f) SHA1(9fc6b2e5c573ed682b2f7fa462c8f42ff99da5ba) )
|
||||
/* 0x300000 - 0x3fffff empty */
|
||||
|
||||
ROM_REGION( 0x200000, "oki", 0 )
|
||||
ROM_LOAD( "pcm.u87", 0x000000, 0x200000, CRC(84206475) SHA1(d1423bd5c7425e121fb4e7845cf57801e9afa7b3) )
|
||||
ROM_END
|
||||
|
||||
|
||||
|
@ -142,7 +142,7 @@ static INPUT_PORTS_START( dietgo )
|
||||
PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) // Demo_Sounds ) )
|
||||
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) // Players dont move in attract mode if on!?
|
||||
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) // Players don't move in attract mode if on!?
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
|
||||
|
@ -1694,7 +1694,7 @@ GAME( 19??, ec_fltr, 0 , ecoinfr, ecoinfr_barx, ecoinfr_state, eco
|
||||
GAME( 19??, ec_rdht7, 0 , ecoinfr, ecoinfr_barx, ecoinfr_state, ecoinfrmab, ROT0, "Concept Games Ltd", "Red Hot 7 (MAB PCB?) (Concept Games Ltd) (?)" , GAME_FLAGS)
|
||||
GAME( 19??, ec_unkt, 0 , ecoinfr, ecoinfr_barx, ecoinfr_state, ecoinfrmab, ROT0, "Concept Games Ltd", "unknown 'T' (MAB PCB?) (Concept Games Ltd) (?)" , GAME_FLAGS)
|
||||
|
||||
//These look more like some variant of Astra Gaming hardware than the MAB PCB, but I can't be sure. Certainly they dont seem to be on the base hardware
|
||||
//These look more like some variant of Astra Gaming hardware than the MAB PCB, but I can't be sure. Certainly they don't seem to be on the base hardware
|
||||
GAME( 19??, ec_gold7, 0 , ecoinfr, ecoinfr_barx, ecoinfr_state, ecoinfrmab, ROT0, "Concept Games Ltd", "Golden 7 (Concept Games Ltd) (?)" , GAME_FLAGS)
|
||||
GAME( 19??, ec_mgbel, 0 , ecoinfr, ecoinfr_barx, ecoinfr_state, ecoinfrmab, ROT0, "Concept Games Ltd", "Megabell (Concept Games Ltd) (?)" , GAME_FLAGS)
|
||||
GAME( 19??, ec_jackb, 0 , ecoinfr, ecoinfr_barx, ecoinfr_state, ecoinfrmab, ROT0, "Concept Games Ltd", "Jackpot Bars (MAB PCB?) (Concept Games Ltd) (?)" , GAME_FLAGS)
|
||||
|
@ -523,7 +523,7 @@ WRITE16_MEMBER(gaelco3d_state::tms_comm_w)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
/* These are the some of the control register, we dont use them all */
|
||||
/* These are some of the control registers. We don't use them all */
|
||||
enum
|
||||
{
|
||||
S1_AUTOBUF_REG = 15,
|
||||
@ -663,7 +663,7 @@ WRITE32_MEMBER(gaelco3d_state::adsp_tx_callback)
|
||||
/* get the base value, since we need to keep it around for wrapping */
|
||||
source -= m_adsp_incs;
|
||||
|
||||
/* make it go back one so we dont lose the first sample */
|
||||
/* make it go back one so we don't lose the first sample */
|
||||
m_adsp->set_state_int(ADSP2100_I0 + m_adsp_ireg, source);
|
||||
|
||||
/* save it as it is now */
|
||||
|
@ -71,7 +71,9 @@ Notes:
|
||||
PISCES - NEC uPD78324 series MCU with 32k internal rom. Clock 13.500MHz [27/2] on pins 51 & 52
|
||||
VSync - 59.1856Hz
|
||||
HSync - 15.625kHz
|
||||
|
||||
|
||||
(TODO: VTOTAL = 264, HTOTAL = 432, pixel clock 27 MHz / 4)
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
@ -120,6 +122,13 @@ WRITE16_MEMBER(galpani2_state::galpani2_eeprom_w)
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
void galpani2_state::machine_start()
|
||||
{
|
||||
UINT8 *ROM = memregion("subdata")->base();
|
||||
membank("subdatabank")->configure_entries(0, 0x2000000/0x0800000, ROM, 0x0800000);
|
||||
membank("subdatabank")->set_entry(0);
|
||||
|
||||
}
|
||||
|
||||
void galpani2_state::machine_reset()
|
||||
{
|
||||
@ -337,21 +346,23 @@ static ADDRESS_MAP_START( galpani2_mem1, AS_PROGRAM, 16, galpani2_state )
|
||||
AM_RANGE(0x300000, 0x301fff) AM_RAM // ?
|
||||
AM_RANGE(0x302000, 0x303fff) AM_RAM AM_SHARE("spriteram") // Sprites
|
||||
AM_RANGE(0x304000, 0x30401f) AM_DEVREADWRITE("kan_spr", kaneko16_sprite_device, kaneko16_sprites_regs_r, kaneko16_sprites_regs_w)
|
||||
AM_RANGE(0x308000, 0x308001) AM_WRITENOP // ? 0 at startup
|
||||
AM_RANGE(0x30c000, 0x30c001) AM_WRITENOP // ? hblank effect ?
|
||||
AM_RANGE(0x310000, 0x3101ff) AM_RAM_WRITE(galpani2_palette_0_w) AM_SHARE("palette.0") // ?
|
||||
// AM_RANGE(0x308000, 0x308001) AM_WRITENOP // ? 0 at startup
|
||||
// AM_RANGE(0x30c000, 0x30c001) AM_WRITENOP // ? hblank effect ?
|
||||
AM_RANGE(0x310000, 0x3101ff) AM_RAM_DEVWRITE("bg8palette", palette_device, write) AM_SHARE("bg8palette") // ?
|
||||
AM_RANGE(0x314000, 0x314001) AM_WRITENOP // ? flip backgrounds ?
|
||||
AM_RANGE(0x318000, 0x318001) AM_READWRITE(galpani2_eeprom_r, galpani2_eeprom_w) // EEPROM
|
||||
AM_RANGE(0x380000, 0x387fff) AM_RAM // Palette?
|
||||
AM_RANGE(0x388000, 0x38ffff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") // Palette
|
||||
AM_RANGE(0x390000, 0x3901ff) AM_WRITENOP // ? at startup of service mode
|
||||
// AM_RANGE(0x390000, 0x3901ff) AM_WRITENOP // ? at startup of service mode
|
||||
|
||||
AM_RANGE(0x400000, 0x43ffff) AM_RAM_WRITE(galpani2_bg8_0_w) AM_SHARE("bg8.0") // Background 0
|
||||
AM_RANGE(0x400000, 0x43ffff) AM_RAM AM_SHARE("bg8.0") // Background 0
|
||||
AM_RANGE(0x440000, 0x440001) AM_RAM AM_SHARE("bg8_scrollx.0") // Background 0 Scroll X
|
||||
AM_RANGE(0x480000, 0x480001) AM_RAM AM_SHARE("bg8_scrolly.0") // Background 0 Scroll Y
|
||||
AM_RANGE(0x4c0000, 0x4c0001) AM_WRITENOP // ? 0 at startup only
|
||||
AM_RANGE(0x500000, 0x53ffff) AM_RAM_WRITE(galpani2_bg8_1_w) AM_SHARE("bg8.1") // Background 1
|
||||
// AM_RANGE(0x4c0000, 0x4c0001) AM_WRITENOP // ? 0 at startup only
|
||||
AM_RANGE(0x500000, 0x53ffff) AM_RAM AM_SHARE("bg8.1") // Background 1
|
||||
AM_RANGE(0x540000, 0x540001) AM_RAM AM_SHARE("bg8_scrollx.1") // Background 1 Scroll X
|
||||
AM_RANGE(0x580000, 0x580001) AM_RAM AM_SHARE("bg8_scrolly.1") // Background 1 Scroll Y
|
||||
// AM_RANGE(0x5c0000, 0x5c0001) AM_WRITENOP // ? 0 at startup only
|
||||
|
||||
AM_RANGE(0x540572, 0x540573) AM_READNOP // ? galpani2 at F0A4
|
||||
AM_RANGE(0x54057a, 0x54057b) AM_READNOP // ? galpani2 at F148
|
||||
@ -363,9 +374,7 @@ static ADDRESS_MAP_START( galpani2_mem1, AS_PROGRAM, 16, galpani2_state )
|
||||
AM_RANGE(0x5405c2, 0x5405c3) AM_READNOP // ? galpani2 at F0A4 and F148
|
||||
AM_RANGE(0x5405ca, 0x5405cb) AM_READNOP // ? galpani2 at F148
|
||||
|
||||
AM_RANGE(0x580000, 0x580001) AM_RAM AM_SHARE("bg8_scrolly.1") // Background 1 Scroll Y
|
||||
AM_RANGE(0x5c0000, 0x5c0001) AM_WRITENOP // ? 0 at startup only
|
||||
AM_RANGE(0x600000, 0x600001) AM_WRITENOP // Watchdog
|
||||
AM_RANGE(0x600000, 0x600001) AM_NOP // Watchdog
|
||||
AM_RANGE(0x640000, 0x640001) AM_WRITE8(galpani2_mcu_init_w, 0x00ff ) // ? 0 before resetting and at startup, Reset mcu ?
|
||||
AM_RANGE(0x680000, 0x680001) AM_WRITE8(galpani2_mcu_nmi1_w, 0x00ff) // ? 0 -> 1 -> 0 (lev 5) / 0 -> $10 -> 0
|
||||
AM_RANGE(0x6c0000, 0x6c0001) AM_WRITE8(galpani2_coin_lockout_w, 0xff00 ) // Coin + Card Lockout
|
||||
@ -389,31 +398,28 @@ ADDRESS_MAP_END
|
||||
***************************************************************************/
|
||||
|
||||
|
||||
READ16_MEMBER(galpani2_state::galpani2_bankedrom_r)
|
||||
WRITE16_MEMBER(galpani2_state::subdatabank_select_w)
|
||||
{
|
||||
UINT16 *ROM = (UINT16 *) memregion( "user1" )->base();
|
||||
size_t len = memregion( "user1" )->bytes() / 2;
|
||||
data &= mem_mask;
|
||||
|
||||
offset += (0x800000/2) * (*m_rombank & 0x0003);
|
||||
|
||||
if ( offset < len ) return ROM[offset];
|
||||
else return 0xffff; //floating bus for absent ROMs
|
||||
if (data & 0xfffc) printf("subdatabank_select_w %04x\n", data);
|
||||
membank("subdatabank")->set_entry(data&3);
|
||||
}
|
||||
|
||||
|
||||
static ADDRESS_MAP_START( galpani2_mem2, AS_PROGRAM, 16, galpani2_state )
|
||||
AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
|
||||
AM_RANGE(0x100000, 0x13ffff) AM_RAM AM_SHARE("ram2") // Work RAM
|
||||
AM_RANGE(0x400000, 0x4fffff) AM_RAM_WRITE(galpani2_bg15_w) AM_SHARE("bg15") // bg15
|
||||
AM_RANGE(0x500000, 0x5fffff) AM_RAM // bg15
|
||||
AM_RANGE(0x600000, 0x600001) AM_NOP // ? 0 at startup only
|
||||
AM_RANGE(0x640000, 0x640001) AM_WRITENOP // ? 0 at startup only
|
||||
AM_RANGE(0x680000, 0x680001) AM_WRITENOP // ? 0 at startup only
|
||||
AM_RANGE(0x6c0000, 0x6c0001) AM_WRITENOP // ? 0 at startup only
|
||||
AM_RANGE(0x700000, 0x700001) AM_WRITENOP // Watchdog
|
||||
AM_RANGE(0x400000, 0x5fffff) AM_RAM AM_SHARE("bg15") // bg15
|
||||
// AM_RANGE(0x600000, 0x600001) AM_NOP // ? 0 at startup only
|
||||
// AM_RANGE(0x640000, 0x640001) AM_WRITENOP // ? 0 at startup only
|
||||
// AM_RANGE(0x680000, 0x680001) AM_WRITENOP // ? 0 at startup only
|
||||
// AM_RANGE(0x6c0000, 0x6c0001) AM_WRITENOP // ? 0 at startup only
|
||||
AM_RANGE(0x700000, 0x700001) AM_NOP // Watchdog
|
||||
// AM_RANGE(0x740000, 0x740001) AM_WRITENOP // ? Reset mcu
|
||||
AM_RANGE(0x780000, 0x780001) AM_WRITE8(galpani2_mcu_nmi2_w, 0x00ff) // ? 0 -> 1 -> 0 (lev 5)
|
||||
AM_RANGE(0x7c0000, 0x7c0001) AM_WRITEONLY AM_SHARE("rombank") // Rom Bank
|
||||
AM_RANGE(0x800000, 0xffffff) AM_READ(galpani2_bankedrom_r ) // Banked ROM
|
||||
AM_RANGE(0x7c0000, 0x7c0001) AM_WRITE(subdatabank_select_w) // Rom Bank
|
||||
AM_RANGE(0x800000, 0xffffff) AM_ROMBANK("subdatabank")
|
||||
ADDRESS_MAP_END
|
||||
|
||||
/***************************************************************************
|
||||
@ -514,7 +520,7 @@ static INPUT_PORTS_START( galpani2 )
|
||||
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
// PORT_SERVICE_NO_TOGGLE( 0x2000, IP_ACTIVE_LOW )
|
||||
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_SERVICE2 ) // this button is used in gp2se as an alt way to bring up the service menu, booting with it held down breaks the game tho!
|
||||
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_TILT )
|
||||
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SERVICE1 )
|
||||
|
||||
@ -626,12 +632,17 @@ static MACHINE_CONFIG_START( galpani2, galpani2_state )
|
||||
MCFG_SCREEN_SIZE(320, 256)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 320-1, 0, 256-1-16)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(galpani2_state, screen_update_galpani2)
|
||||
MCFG_SCREEN_PALETTE("palette")
|
||||
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", galpani2)
|
||||
MCFG_PALETTE_ADD("palette", 0x4000 + 0x200 + 0x8000) // sprites, bg8, bg15
|
||||
MCFG_PALETTE_ADD("palette", 0x4000) // sprites
|
||||
MCFG_PALETTE_FORMAT(xGGGGGRRRRRBBBBB)
|
||||
MCFG_PALETTE_INIT_OWNER(galpani2_state, galpani2)
|
||||
|
||||
MCFG_PALETTE_ADD("bg8palette", 0x200/2) // bg8
|
||||
MCFG_PALETTE_FORMAT(xGGGGGRRRRRBBBBB)
|
||||
|
||||
MCFG_PALETTE_ADD("bgpalette", 32768) /* 32768 static colors for the bg */
|
||||
MCFG_PALETTE_FORMAT(xGGGGGRRRRRBBBBB)
|
||||
MCFG_PALETTE_INIT_OWNER(galpani2_state,galpani2)
|
||||
|
||||
MCFG_DEVICE_ADD_KC002_SPRITES
|
||||
kaneko16_sprite_device::set_offsets(*device, 0x10000 - 0x16c0 + 0xc00, 0);
|
||||
@ -731,7 +742,7 @@ ROM_START( galpani2 )
|
||||
ROM_LOAD16_BYTE( "g002a2.u64-1", 0x000000, 0x020000, CRC(c0b94eaf) SHA1(4f3a65b238b31ee8d256b7025253f01eaf6e55d5) )
|
||||
ROM_LOAD16_BYTE( "g003a2.u63-1", 0x000001, 0x020000, CRC(0d30725d) SHA1(d4614f9ffb930c4ea36cb3fbacffe63060e92402) )
|
||||
|
||||
ROM_REGION16_BE( 0x2000000, "user1", 0 ) /* Backgrounds (CPU2) */
|
||||
ROM_REGION16_BE( 0x2000000, "subdata", ROMREGION_ERASEFF ) /* Backgrounds (CPU2) */
|
||||
ROM_LOAD( "gp2-300a.052", 0x0000000, 0x100000, CRC(09ebedba) SHA1(3c06614633f0da03facb5199deac492b8ce07257) )
|
||||
ROM_LOAD( "gp2-300b.053", 0x0100000, 0x100000, CRC(d7d12920) SHA1(4b6e01cc0ac5192758f4b3d26f102905b2b5e8ac) )
|
||||
ROM_LOAD( "gp2-301.035", 0x0200000, 0x200000, CRC(e71e749d) SHA1(420c4c085e89d9641a84e34fa870df2bc02165b6) )
|
||||
@ -777,7 +788,7 @@ ROM_START( galpani2e )
|
||||
ROM_LOAD16_BYTE( "g002a1-u125-1.bin", 0x000000, 0x020000, CRC(100e76b3) SHA1(24a259ee427cd7a6e487520a712dc7ef632dc5d6) )
|
||||
ROM_LOAD16_BYTE( "g003a1-u126-1.bin", 0x000001, 0x020000, CRC(0efe7835) SHA1(c7eecacdf101c0515da504cc77512f27b61b2ab7) )
|
||||
|
||||
ROM_REGION16_BE( 0x2000000, "user1", 0 ) /* Backgrounds (CPU2) */
|
||||
ROM_REGION16_BE( 0x2000000, "subdata", ROMREGION_ERASEFF ) /* Backgrounds (CPU2) */
|
||||
ROM_LOAD( "gp2-300a.052", 0x0000000, 0x100000, CRC(09ebedba) SHA1(3c06614633f0da03facb5199deac492b8ce07257) )
|
||||
ROM_LOAD( "gp2-300b.053", 0x0100000, 0x100000, CRC(d7d12920) SHA1(4b6e01cc0ac5192758f4b3d26f102905b2b5e8ac) )
|
||||
ROM_LOAD( "gp2-301.035", 0x0200000, 0x200000, CRC(e71e749d) SHA1(420c4c085e89d9641a84e34fa870df2bc02165b6) )
|
||||
@ -824,7 +835,7 @@ ROM_START( galpani2i )
|
||||
ROM_LOAD16_BYTE( "g002a2.u64-1", 0x000000, 0x020000, CRC(c0b94eaf) SHA1(4f3a65b238b31ee8d256b7025253f01eaf6e55d5) )
|
||||
ROM_LOAD16_BYTE( "g003a2.u63-1", 0x000001, 0x020000, CRC(0d30725d) SHA1(d4614f9ffb930c4ea36cb3fbacffe63060e92402) )
|
||||
|
||||
ROM_REGION16_BE( 0x2000000, "user1", 0 ) /* Backgrounds (CPU2) */
|
||||
ROM_REGION16_BE( 0x2000000, "subdata", ROMREGION_ERASEFF ) /* Backgrounds (CPU2) */
|
||||
ROM_LOAD( "gp2-300a.052", 0x0000000, 0x100000, CRC(09ebedba) SHA1(3c06614633f0da03facb5199deac492b8ce07257) )
|
||||
ROM_LOAD( "gp2-300b.053", 0x0100000, 0x100000, CRC(d7d12920) SHA1(4b6e01cc0ac5192758f4b3d26f102905b2b5e8ac) )
|
||||
ROM_LOAD( "gp2-301.035", 0x0200000, 0x200000, CRC(e71e749d) SHA1(420c4c085e89d9641a84e34fa870df2bc02165b6) )
|
||||
@ -873,7 +884,7 @@ ROM_START( galpani2gs ) // basically the same as the Italy set but with differen
|
||||
ROM_LOAD16_BYTE( "g003g1.u65-2", 0x000000, 0x020000, CRC(c0b94eaf) SHA1(4f3a65b238b31ee8d256b7025253f01eaf6e55d5) )
|
||||
ROM_LOAD16_BYTE( "g002g1.u64-2", 0x000001, 0x020000, CRC(0d30725d) SHA1(d4614f9ffb930c4ea36cb3fbacffe63060e92402) )
|
||||
|
||||
ROM_REGION16_BE( 0x2000000, "user1", 0 ) /* Backgrounds (CPU2) */
|
||||
ROM_REGION16_BE( 0x2000000, "subdata", ROMREGION_ERASEFF ) /* Backgrounds (CPU2) */
|
||||
ROM_LOAD( "gp2-300a.052", 0x0000000, 0x100000, CRC(09ebedba) SHA1(3c06614633f0da03facb5199deac492b8ce07257) )
|
||||
ROM_LOAD( "gp2-300b.053", 0x0100000, 0x100000, CRC(d7d12920) SHA1(4b6e01cc0ac5192758f4b3d26f102905b2b5e8ac) )
|
||||
ROM_LOAD( "gp2-301.035", 0x0200000, 0x200000, CRC(e71e749d) SHA1(420c4c085e89d9641a84e34fa870df2bc02165b6) )
|
||||
@ -921,7 +932,7 @@ ROM_START( galpani2g )
|
||||
ROM_LOAD16_BYTE( "g002t1.125", 0x000000, 0x020000, CRC(a3034e1c) SHA1(493e4be36f2aea0083d5d37e16486ed66dab952e) )
|
||||
ROM_LOAD16_BYTE( "g003t1.126", 0x000001, 0x020000, CRC(20d3a2ad) SHA1(93450e5a23456c242ebf1a3560013a17c6b05354) )
|
||||
|
||||
ROM_REGION16_BE( 0x2000000, "user1", 0 ) /* Backgrounds (CPU2) */
|
||||
ROM_REGION16_BE( 0x2000000, "subdata", ROMREGION_ERASEFF ) /* Backgrounds (CPU2) */
|
||||
ROM_LOAD16_BYTE( "g300a0.u44-00", 0x0000000, 0x080000, CRC(50406294) SHA1(fc1165b7b31a44ab204cd5ac3e7b2733ed6b1534) )
|
||||
ROM_LOAD16_BYTE( "g300a1.u41-00", 0x0000001, 0x080000, CRC(d26b7c4f) SHA1(b491170010977ba1e5111893937cc6bab0539e7d) )
|
||||
ROM_LOAD16_BYTE( "g300b0.u45-00", 0x0100000, 0x080000, CRC(9637934c) SHA1(d3b39d9f44825bdf24d4aa39ca32035bc5af4905) )
|
||||
@ -973,7 +984,7 @@ ROM_START( galpani2e2 )
|
||||
ROM_LOAD16_BYTE( "g002i1.125", 0x000000, 0x020000, CRC(a3034e1c) SHA1(493e4be36f2aea0083d5d37e16486ed66dab952e) )
|
||||
ROM_LOAD16_BYTE( "g003i1.126", 0x000001, 0x020000, CRC(20d3a2ad) SHA1(93450e5a23456c242ebf1a3560013a17c6b05354) )
|
||||
|
||||
ROM_REGION16_BE( 0x2000000, "user1", 0 ) /* Backgrounds (CPU2) */
|
||||
ROM_REGION16_BE( 0x2000000, "subdata", ROMREGION_ERASEFF ) /* Backgrounds (CPU2) */
|
||||
ROM_LOAD16_BYTE( "g300a0.u44-00", 0x0000000, 0x080000, CRC(50406294) SHA1(fc1165b7b31a44ab204cd5ac3e7b2733ed6b1534) )
|
||||
ROM_LOAD16_BYTE( "g300a1.u41-00", 0x0000001, 0x080000, CRC(d26b7c4f) SHA1(b491170010977ba1e5111893937cc6bab0539e7d) )
|
||||
ROM_LOAD16_BYTE( "g300b0.u45-00", 0x0100000, 0x080000, CRC(9637934c) SHA1(d3b39d9f44825bdf24d4aa39ca32035bc5af4905) )
|
||||
@ -1025,7 +1036,7 @@ ROM_START( galpani2t )
|
||||
ROM_LOAD16_BYTE( "g002t1.125", 0x000000, 0x020000, CRC(a3034e1c) SHA1(493e4be36f2aea0083d5d37e16486ed66dab952e) )
|
||||
ROM_LOAD16_BYTE( "g003t1.126", 0x000001, 0x020000, CRC(20d3a2ad) SHA1(93450e5a23456c242ebf1a3560013a17c6b05354) )
|
||||
|
||||
ROM_REGION16_BE( 0x2000000, "user1", 0 ) /* Backgrounds (CPU2) */
|
||||
ROM_REGION16_BE( 0x2000000, "subdata", ROMREGION_ERASEFF ) /* Backgrounds (CPU2) */
|
||||
ROM_LOAD( "gp2-300a.052", 0x0000000, 0x100000, CRC(09ebedba) SHA1(3c06614633f0da03facb5199deac492b8ce07257) )
|
||||
ROM_LOAD( "gp2-300b.053", 0x0100000, 0x100000, CRC(d7d12920) SHA1(4b6e01cc0ac5192758f4b3d26f102905b2b5e8ac) )
|
||||
ROM_LOAD( "gp2-301.035", 0x0200000, 0x200000, CRC(e71e749d) SHA1(420c4c085e89d9641a84e34fa870df2bc02165b6) )
|
||||
@ -1090,7 +1101,7 @@ ROM_START( galpani2j )
|
||||
ROM_LOAD16_BYTE( "g002j1.64", 0x000000, 0x020000, CRC(5e523829) SHA1(dad11e4a3348c988ff658609cf78a3fbee58064e) )
|
||||
ROM_LOAD16_BYTE( "g003j1.63", 0x000001, 0x020000, CRC(2a0d5f89) SHA1(0a7031c4b8b7bc757da25250dbb5fa1004205aeb) )
|
||||
|
||||
ROM_REGION16_BE( 0x2000000, "user1", 0 ) /* Backgrounds (CPU2) */
|
||||
ROM_REGION16_BE( 0x2000000, "subdata", ROMREGION_ERASEFF ) /* Backgrounds (CPU2) */
|
||||
ROM_LOAD( "gp2-300j.175", 0x000000, 0x200000, CRC(3a0afc1d) SHA1(91fba9074cc3c28e919053f0ea07b28d88b2ce5f) )
|
||||
ROM_LOAD( "gp2-301j.176", 0x200000, 0x200000, CRC(5b6d1709) SHA1(a7d35247fe71895f2b6169409aa0bdaef446804c) )
|
||||
ROM_LOAD16_BYTE( "gp2-302a.177", 0x400000, 0x100000, CRC(311fa273) SHA1(c2adeac45be701f6f474841755fac4347d44f844) )
|
||||
@ -1121,7 +1132,7 @@ ROM_START( gp2se )
|
||||
ROM_LOAD16_BYTE( "g002j4.u64", 0x000000, 0x020000, CRC(bcd4edd9) SHA1(17ae6fbf75d8e5333133737de926a36f5cd29661) )
|
||||
ROM_LOAD16_BYTE( "g003j4.u63", 0x000001, 0x020000, CRC(2fbe0194) SHA1(52da771ba813b27ec1a996b237c14dab9b33db82) )
|
||||
|
||||
ROM_REGION16_BE( 0x2000000, "user1", 0 ) /* Backgrounds (CPU2) */
|
||||
ROM_REGION16_BE( 0x2000000, "subdata", ROMREGION_ERASEFF ) /* Backgrounds (CPU2) */
|
||||
ROM_LOAD( "gp2-300-j-0071.u175", 0x000000, 0x200000, CRC(3a0afc1d) SHA1(91fba9074cc3c28e919053f0ea07b28d88b2ce5f) )
|
||||
ROM_LOAD( "gp2-301-j-0072.u176", 0x200000, 0x200000, CRC(5b6d1709) SHA1(a7d35247fe71895f2b6169409aa0bdaef446804c) )
|
||||
ROM_LOAD16_BYTE( "gp2-302a-0057.u177", 0x400000, 0x100000, CRC(311fa273) SHA1(c2adeac45be701f6f474841755fac4347d44f844) )
|
||||
@ -1158,7 +1169,7 @@ ROM_START( gp2quiz )
|
||||
ROM_LOAD16_BYTE( "g002e3.u64-3", 0x000000, 0x020000, CRC(5e523829) SHA1(dad11e4a3348c988ff658609cf78a3fbee58064e) )
|
||||
ROM_LOAD16_BYTE( "g003e3.u63-3", 0x000001, 0x020000, CRC(2a0d5f89) SHA1(0a7031c4b8b7bc757da25250dbb5fa1004205aeb) )
|
||||
|
||||
ROM_REGION16_BE( 0x2000000, "user1", 0 ) /* Backgrounds (CPU2) */
|
||||
ROM_REGION16_BE( 0x2000000, "subdata", ROMREGION_ERASEFF ) /* Backgrounds (CPU2) */
|
||||
ROM_LOAD( "gp2-300-j-0071.u175", 0x000000, 0x200000, CRC(3a0afc1d) SHA1(91fba9074cc3c28e919053f0ea07b28d88b2ce5f) )
|
||||
ROM_LOAD( "gp2-301-j-0072.u176", 0x200000, 0x200000, CRC(5b6d1709) SHA1(a7d35247fe71895f2b6169409aa0bdaef446804c) )
|
||||
ROM_LOAD16_BYTE( "gp2-302a-0057.u177", 0x400000, 0x100000, CRC(311fa273) SHA1(c2adeac45be701f6f474841755fac4347d44f844) )
|
||||
|
@ -70,252 +70,290 @@ ToDo:
|
||||
#include "cpu/pps4/pps4.h"
|
||||
//#include "gts1.lh"
|
||||
|
||||
#define VERBOSE 1
|
||||
|
||||
#if VERBOSE
|
||||
#define LOG(x) logerror x
|
||||
#else
|
||||
#define LOG(x)
|
||||
#endif
|
||||
|
||||
class gts1_state : public genpin_class
|
||||
{
|
||||
public:
|
||||
gts1_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: genpin_class(mconfig, type, tag)
|
||||
, m_maincpu(*this, "maincpu")
|
||||
{ }
|
||||
gts1_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: genpin_class(mconfig, type, tag)
|
||||
, m_maincpu(*this, "maincpu")
|
||||
{ }
|
||||
|
||||
DECLARE_DRIVER_INIT(gts1);
|
||||
DECLARE_DRIVER_INIT(gts1);
|
||||
DECLARE_READ8_MEMBER (gts1_pa_r);
|
||||
DECLARE_WRITE8_MEMBER(gts1_pa_w);
|
||||
DECLARE_WRITE8_MEMBER(gts1_pb_w);
|
||||
private:
|
||||
virtual void machine_reset();
|
||||
required_device<cpu_device> m_maincpu;
|
||||
virtual void machine_reset();
|
||||
required_device<cpu_device> m_maincpu;
|
||||
UINT8 m_6351_addr;
|
||||
};
|
||||
|
||||
|
||||
static ADDRESS_MAP_START( gts1_map, AS_PROGRAM, 8, gts1_state )
|
||||
AM_RANGE(0x0000, 0x0fff) AM_ROM
|
||||
AM_RANGE(0x0000, 0x0fff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( gts1_data, AS_DATA, 8, gts1_state )
|
||||
AM_RANGE(0x0000, 0x0fff) AM_RAM // not correct
|
||||
AM_RANGE(0x0000, 0x0fff) AM_RAM // not correct
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( gts1_io, AS_IO, 8, gts1_state )
|
||||
AM_RANGE(0x0000, 0x00ff) AM_RAM // connects to all the other chips
|
||||
AM_RANGE(0x0000, 0x00ff) AM_RAM // connects to all the other chips
|
||||
AM_RANGE(0x0100, 0x0100) AM_READ (gts1_pa_r) AM_WRITE(gts1_pa_w)
|
||||
AM_RANGE(0x0101, 0x0101) AM_WRITE(gts1_pb_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static INPUT_PORTS_START( gts1 )
|
||||
PORT_START("DSW0")
|
||||
PORT_DIPNAME( 0x01, 0x00, "S01")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x02, 0x00, "S02")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x04, 0x00, "S03")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x08, 0x00, "S04")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x10, 0x00, "S05")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x20, 0x20, "S06")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( No ))
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Yes ))
|
||||
PORT_DIPNAME( 0x40, 0x40, "S07")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( No ))
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Yes ))
|
||||
PORT_DIPNAME( 0x80, 0x80, "S08")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( No ))
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Yes ))
|
||||
PORT_START("DSW0")
|
||||
PORT_DIPNAME( 0x01, 0x00, "S01")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x02, 0x00, "S02")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x04, 0x00, "S03")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x08, 0x00, "S04")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x10, 0x00, "S05")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x20, 0x20, "S06")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( No ))
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Yes ))
|
||||
PORT_DIPNAME( 0x40, 0x40, "S07")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( No ))
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Yes ))
|
||||
PORT_DIPNAME( 0x80, 0x80, "S08")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( No ))
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Yes ))
|
||||
|
||||
PORT_START("DSW1")
|
||||
PORT_DIPNAME( 0x01, 0x00, "S09")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x02, 0x00, "S10")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x04, 0x00, "S11")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x08, 0x00, "S12")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x10, 0x00, "S13")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x20, 0x00, "S14")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Yes ))
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( No ))
|
||||
PORT_DIPNAME( 0x40, 0x40, "S15")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( No ))
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Yes ))
|
||||
PORT_DIPNAME( 0x80, 0x00, "S16")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( No ))
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Yes ))
|
||||
PORT_START("DSW1")
|
||||
PORT_DIPNAME( 0x01, 0x00, "S09")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x02, 0x00, "S10")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x04, 0x00, "S11")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x08, 0x00, "S12")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x10, 0x00, "S13")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x20, 0x00, "S14")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Yes ))
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( No ))
|
||||
PORT_DIPNAME( 0x40, 0x40, "S15")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( No ))
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Yes ))
|
||||
PORT_DIPNAME( 0x80, 0x00, "S16")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( No ))
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Yes ))
|
||||
|
||||
PORT_START("DSW2")
|
||||
PORT_DIPNAME( 0x01, 0x00, "S17")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x02, 0x00, "S18")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x04, 0x00, "S19")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x08, 0x00, "S20")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x10, 0x00, "S21")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x20, 0x00, "S22")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x40, 0x00, "S23")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x80, 0x00, "S24")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ))
|
||||
PORT_START("DSW2")
|
||||
PORT_DIPNAME( 0x01, 0x00, "S17")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x02, 0x00, "S18")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x04, 0x00, "S19")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x08, 0x00, "S20")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x10, 0x00, "S21")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x20, 0x00, "S22")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x40, 0x00, "S23")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x80, 0x00, "S24")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ))
|
||||
INPUT_PORTS_END
|
||||
|
||||
void gts1_state::machine_reset()
|
||||
{
|
||||
m_6351_addr = 0;
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(gts1_state,gts1)
|
||||
{
|
||||
}
|
||||
|
||||
READ8_MEMBER (gts1_state::gts1_pa_r)
|
||||
{
|
||||
// return ROM nibble
|
||||
UINT8 *ROM = memregion("maincpu")->base();
|
||||
UINT8 data = ROM[0x2000 + m_6351_addr] & 0x0f;
|
||||
LOG(("%s: ROM[%03x]:%02x\n", __FUNCTION__, m_6351_addr, data));
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gts1_state::gts1_pa_w)
|
||||
{
|
||||
// write address lines 7-4
|
||||
m_6351_addr = (m_6351_addr & 0x0f) | ((data & 0x0f) << 4);
|
||||
LOG(("%s: ROM hi:%x addr:%02x\n", __FUNCTION__, data & 0x0f, m_6351_addr));
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gts1_state::gts1_pb_w)
|
||||
{
|
||||
// write address lines 3-0
|
||||
m_6351_addr = (m_6351_addr & 0xf0) | (data & 0x0f);
|
||||
LOG(("%s: ROM lo:%x addr:%02x\n", __FUNCTION__, data & 0x0f, m_6351_addr));
|
||||
}
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START( gts1, gts1_state )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", PPS4, XTAL_3_579545MHz / 18) // divided in the CPU
|
||||
MCFG_CPU_PROGRAM_MAP(gts1_map)
|
||||
MCFG_CPU_DATA_MAP(gts1_data)
|
||||
MCFG_CPU_IO_MAP(gts1_io)
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", PPS4, XTAL_3_579545MHz / 18) // divided in the CPU
|
||||
MCFG_CPU_PROGRAM_MAP(gts1_map)
|
||||
MCFG_CPU_DATA_MAP(gts1_data)
|
||||
MCFG_CPU_IO_MAP(gts1_io)
|
||||
|
||||
//MCFG_NVRAM_ADD_0FILL("nvram")
|
||||
//MCFG_NVRAM_ADD_0FILL("nvram")
|
||||
|
||||
/* Video */
|
||||
//MCFG_DEFAULT_LAYOUT(layout_gts1)
|
||||
/* Video */
|
||||
//MCFG_DEFAULT_LAYOUT(layout_gts1)
|
||||
|
||||
/* Sound */
|
||||
MCFG_FRAGMENT_ADD( genpin_audio )
|
||||
/* Sound */
|
||||
MCFG_FRAGMENT_ADD( genpin_audio )
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
ROM_START( gts1 )
|
||||
ROM_REGION( 0x10000, "maincpu", 0 )
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_REGION( 0x10000, "maincpu", 0 )
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_END
|
||||
|
||||
ROM_START( gts1s )
|
||||
ROM_REGION( 0x10000, "maincpu", 0 )
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_REGION( 0x10000, "maincpu", 0 )
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_END
|
||||
|
||||
/*-------------------------------------------------------------------
|
||||
/ Asteroid Annie and the Aliens (12/1980) #442
|
||||
/-------------------------------------------------------------------*/
|
||||
ROM_START(astannie)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("442.cpu", 0x2000, 0x0400, CRC(579521e0) SHA1(b1b19473e1ca3373955ee96104b87f586c4c311c))
|
||||
ROM_REGION(0x10000, "cpu2", 0)
|
||||
ROM_LOAD("442.snd", 0x0400, 0x0400, CRC(c70195b4) SHA1(ff06197f07111d6a4b8942dcfe8d2279bda6f281))
|
||||
ROM_RELOAD( 0x0800, 0x0400)
|
||||
ROM_LOAD("6530sys1.bin", 0x0c00, 0x0400, CRC(b7831321) SHA1(c94f4bee97854d0373653a6867016e27d3fc1340))
|
||||
ROM_RELOAD( 0xfc00, 0x0400)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("442.cpu", 0x2000, 0x0400, CRC(579521e0) SHA1(b1b19473e1ca3373955ee96104b87f586c4c311c))
|
||||
ROM_REGION(0x10000, "cpu2", 0)
|
||||
ROM_LOAD("442.snd", 0x0400, 0x0400, CRC(c70195b4) SHA1(ff06197f07111d6a4b8942dcfe8d2279bda6f281))
|
||||
ROM_RELOAD( 0x0800, 0x0400)
|
||||
ROM_LOAD("6530sys1.bin", 0x0c00, 0x0400, CRC(b7831321) SHA1(c94f4bee97854d0373653a6867016e27d3fc1340))
|
||||
ROM_RELOAD( 0xfc00, 0x0400)
|
||||
ROM_END
|
||||
|
||||
/*-------------------------------------------------------------------
|
||||
/ Buck Rogers (01/1980) #437
|
||||
/-------------------------------------------------------------------*/
|
||||
ROM_START(buckrgrs)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("437.cpu", 0x2000, 0x0400, CRC(e57d9278) SHA1(dfc4ebff1e14b9a074468671a8e5ac7948d5b352))
|
||||
ROM_REGION(0x10000, "cpu2", 0)
|
||||
ROM_LOAD("437.snd", 0x0400, 0x0400, CRC(732b5a27) SHA1(7860ea54e75152246c3ac3205122d750b243b40c))
|
||||
ROM_RELOAD( 0x0800, 0x0400)
|
||||
ROM_LOAD("6530sys1.bin", 0x0c00, 0x0400, CRC(b7831321) SHA1(c94f4bee97854d0373653a6867016e27d3fc1340))
|
||||
ROM_RELOAD( 0xfc00, 0x0400)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("437.cpu", 0x2000, 0x0400, CRC(e57d9278) SHA1(dfc4ebff1e14b9a074468671a8e5ac7948d5b352))
|
||||
ROM_REGION(0x10000, "cpu2", 0)
|
||||
ROM_LOAD("437.snd", 0x0400, 0x0400, CRC(732b5a27) SHA1(7860ea54e75152246c3ac3205122d750b243b40c))
|
||||
ROM_RELOAD( 0x0800, 0x0400)
|
||||
ROM_LOAD("6530sys1.bin", 0x0c00, 0x0400, CRC(b7831321) SHA1(c94f4bee97854d0373653a6867016e27d3fc1340))
|
||||
ROM_RELOAD( 0xfc00, 0x0400)
|
||||
ROM_END
|
||||
|
||||
/*-------------------------------------------------------------------
|
||||
/ Charlie's Angels (11/1978) #425
|
||||
/-------------------------------------------------------------------*/
|
||||
ROM_START(charlies)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("425.cpu", 0x2000, 0x0400, CRC(928b4279) SHA1(51096d45e880d6a8263eaeaa0cdab0f61ad2f58d))
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("425.cpu", 0x2000, 0x0400, CRC(928b4279) SHA1(51096d45e880d6a8263eaeaa0cdab0f61ad2f58d))
|
||||
ROM_END
|
||||
/*-------------------------------------------------------------------
|
||||
/ Cleopatra (11/1977) #409
|
||||
/-------------------------------------------------------------------*/
|
||||
ROM_START(cleoptra)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("409.cpu", 0x2000, 0x0400, CRC(8063ff71) SHA1(205f09f067bf79544d2ce2a48d23259901f935dd))
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("409.cpu", 0x2000, 0x0400, CRC(8063ff71) SHA1(205f09f067bf79544d2ce2a48d23259901f935dd))
|
||||
ROM_END
|
||||
|
||||
/*-------------------------------------------------------------------
|
||||
/ Close Encounters of the Third Kind (10/1978) #424
|
||||
/-------------------------------------------------------------------*/
|
||||
ROM_START(closeenc)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("424.cpu", 0x2000, 0x0400, CRC(a7a5dd13) SHA1(223c67b9484baa719c91de52b363ff22813db160))
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("424.cpu", 0x2000, 0x0400, CRC(a7a5dd13) SHA1(223c67b9484baa719c91de52b363ff22813db160))
|
||||
ROM_END
|
||||
|
||||
/*-------------------------------------------------------------------
|
||||
/ Count-Down (05/1979) #422
|
||||
/-------------------------------------------------------------------*/
|
||||
ROM_START(countdwn)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("422.cpu", 0x2000, 0x0400, CRC(51bc2df0) SHA1(d4b555d106c6b4e420b0fcd1df8871f869476c22))
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("422.cpu", 0x2000, 0x0400, CRC(51bc2df0) SHA1(d4b555d106c6b4e420b0fcd1df8871f869476c22))
|
||||
ROM_END
|
||||
|
||||
/*-------------------------------------------------------------------
|
||||
/ Dragon (10/1978) #419
|
||||
/-------------------------------------------------------------------*/
|
||||
ROM_START(dragon)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("419.cpu", 0x2000, 0x0400, CRC(018d9b3a) SHA1(da37ef5017c71bc41bdb1f30d3fd7ac3b7e1ee7e))
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("419.cpu", 0x2000, 0x0400, CRC(018d9b3a) SHA1(da37ef5017c71bc41bdb1f30d3fd7ac3b7e1ee7e))
|
||||
ROM_END
|
||||
|
||||
/*-------------------------------------------------------------------
|
||||
/ Genie (11/1979) #435
|
||||
/-------------------------------------------------------------------*/
|
||||
ROM_START(geniep)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("435.cpu", 0x2000, 0x0400, CRC(7749fd92) SHA1(9cd3e799842392e3939877bf295759c27f199e58))
|
||||
ROM_REGION(0x10000, "cpu2", 0)
|
||||
ROM_LOAD("435.snd", 0x0400, 0x0400, CRC(4a98ceed) SHA1(f1d7548e03107033c39953ee04b043b5301dbb47))
|
||||
ROM_RELOAD( 0x0800, 0x0400)
|
||||
ROM_LOAD("6530sys1.bin", 0x0c00, 0x0400, CRC(b7831321) SHA1(c94f4bee97854d0373653a6867016e27d3fc1340))
|
||||
ROM_RELOAD( 0xfc00, 0x0400)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("435.cpu", 0x2000, 0x0400, CRC(7749fd92) SHA1(9cd3e799842392e3939877bf295759c27f199e58))
|
||||
ROM_REGION(0x10000, "cpu2", 0)
|
||||
ROM_LOAD("435.snd", 0x0400, 0x0400, CRC(4a98ceed) SHA1(f1d7548e03107033c39953ee04b043b5301dbb47))
|
||||
ROM_RELOAD( 0x0800, 0x0400)
|
||||
ROM_LOAD("6530sys1.bin", 0x0c00, 0x0400, CRC(b7831321) SHA1(c94f4bee97854d0373653a6867016e27d3fc1340))
|
||||
ROM_RELOAD( 0xfc00, 0x0400)
|
||||
ROM_END
|
||||
|
||||
/*-------------------------------------------------------------------
|
||||
/ Joker Poker (08/1978) #417
|
||||
/-------------------------------------------------------------------*/
|
||||
ROM_START(jokrpokr)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("417.cpu", 0x2000, 0x0400, CRC(33dade08) SHA1(23b8dbd7b6c84b806fc0d2da95478235cbf9f80a))
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("417.cpu", 0x2000, 0x0400, CRC(33dade08) SHA1(23b8dbd7b6c84b806fc0d2da95478235cbf9f80a))
|
||||
ROM_END
|
||||
|
||||
/*-------------------------------------------------------------------
|
||||
@ -325,12 +363,12 @@ ROM_END
|
||||
/ L'Hexagone (04/1986)
|
||||
/-------------------------------------------------------------------*/
|
||||
ROM_START(hexagone)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("435.cpu", 0x2000, 0x0400, CRC(7749fd92) SHA1(9cd3e799842392e3939877bf295759c27f199e58))
|
||||
ROM_REGION(0x10000, "cpu2", 0)
|
||||
ROM_LOAD("hexagone.bin", 0, 0x4000, CRC(002b5464) SHA1(e2d971c4e85b4fb6580c2d3945c9946ea0cebc2e))
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("435.cpu", 0x2000, 0x0400, CRC(7749fd92) SHA1(9cd3e799842392e3939877bf295759c27f199e58))
|
||||
ROM_REGION(0x10000, "cpu2", 0)
|
||||
ROM_LOAD("hexagone.bin", 0, 0x4000, CRC(002b5464) SHA1(e2d971c4e85b4fb6580c2d3945c9946ea0cebc2e))
|
||||
ROM_END
|
||||
/*-------------------------------------------------------------------
|
||||
/ Movie
|
||||
@ -340,25 +378,25 @@ ROM_END
|
||||
/ Pinball Pool (08/1979) #427
|
||||
/-------------------------------------------------------------------*/
|
||||
ROM_START(pinpool)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("427.cpu", 0x2000, 0x0400, CRC(c496393d) SHA1(e91d9596aacdb4277fa200a3f8f9da099c278f32))
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("427.cpu", 0x2000, 0x0400, CRC(c496393d) SHA1(e91d9596aacdb4277fa200a3f8f9da099c278f32))
|
||||
ROM_END
|
||||
|
||||
/*-------------------------------------------------------------------
|
||||
/ Roller Disco (02/1980) #440
|
||||
/-------------------------------------------------------------------*/
|
||||
ROM_START(roldisco)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("440.cpu", 0x2000, 0x0400, CRC(bc50631f) SHA1(6aa3124d09fc4e369d087a5ad6dd1737ace55e41))
|
||||
ROM_REGION(0x10000, "cpu2", 0)
|
||||
ROM_LOAD("440.snd", 0x0400, 0x0400, CRC(4a0a05ae) SHA1(88f21b5638494d8e78dc0b6b7d69873b76b5f75d))
|
||||
ROM_RELOAD( 0x0800, 0x0400)
|
||||
ROM_LOAD("6530sys1.bin", 0x0c00, 0x0400, CRC(b7831321) SHA1(c94f4bee97854d0373653a6867016e27d3fc1340))
|
||||
ROM_RELOAD( 0xfc00, 0x0400)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("440.cpu", 0x2000, 0x0400, CRC(bc50631f) SHA1(6aa3124d09fc4e369d087a5ad6dd1737ace55e41))
|
||||
ROM_REGION(0x10000, "cpu2", 0)
|
||||
ROM_LOAD("440.snd", 0x0400, 0x0400, CRC(4a0a05ae) SHA1(88f21b5638494d8e78dc0b6b7d69873b76b5f75d))
|
||||
ROM_RELOAD( 0x0800, 0x0400)
|
||||
ROM_LOAD("6530sys1.bin", 0x0c00, 0x0400, CRC(b7831321) SHA1(c94f4bee97854d0373653a6867016e27d3fc1340))
|
||||
ROM_RELOAD( 0xfc00, 0x0400)
|
||||
ROM_END
|
||||
|
||||
/*-------------------------------------------------------------------
|
||||
@ -369,17 +407,17 @@ ROM_END
|
||||
/ Sinbad (05/1978) #412
|
||||
/-------------------------------------------------------------------*/
|
||||
ROM_START(sinbad)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("412.cpu", 0x2000, 0x0400, CRC(84a86b83) SHA1(f331f2ffd7d1b279b4ffbb939aa8649e723f5fac))
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("412.cpu", 0x2000, 0x0400, CRC(84a86b83) SHA1(f331f2ffd7d1b279b4ffbb939aa8649e723f5fac))
|
||||
ROM_END
|
||||
|
||||
ROM_START(sinbadn)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("412no1.cpu", 0x2000, 0x0400, CRC(f5373f5f) SHA1(027840501416ff01b2adf07188c7d667adf3ad5f))
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("412no1.cpu", 0x2000, 0x0400, CRC(f5373f5f) SHA1(027840501416ff01b2adf07188c7d667adf3ad5f))
|
||||
ROM_END
|
||||
|
||||
/*-------------------------------------------------------------------
|
||||
@ -390,65 +428,65 @@ ROM_END
|
||||
/ Solar Ride (02/1979) #421
|
||||
/-------------------------------------------------------------------*/
|
||||
ROM_START(solaride)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("421.cpu", 0x2000, 0x0400, CRC(6b5c5da6) SHA1(a09b7009473be53586f53f48b7bfed9a0c5ecd55))
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("421.cpu", 0x2000, 0x0400, CRC(6b5c5da6) SHA1(a09b7009473be53586f53f48b7bfed9a0c5ecd55))
|
||||
ROM_END
|
||||
|
||||
/*-------------------------------------------------------------------
|
||||
/ The Incredible Hulk (10/1979) #433
|
||||
/-------------------------------------------------------------------*/
|
||||
ROM_START(hulk)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("433.cpu", 0x2000, 0x0400, CRC(c05d2b52) SHA1(393fe063b029246317c90ee384db95a84d61dbb7))
|
||||
ROM_REGION(0x10000, "cpu2", 0)
|
||||
ROM_LOAD("433.snd", 0x0400, 0x0400, CRC(20cd1dff) SHA1(93e7c47ff7051c3c0dc9f8f95aa33ba094e7cf25))
|
||||
ROM_RELOAD( 0x0800, 0x0400)
|
||||
ROM_LOAD("6530sys1.bin", 0x0c00, 0x0400, CRC(b7831321) SHA1(c94f4bee97854d0373653a6867016e27d3fc1340))
|
||||
ROM_RELOAD( 0xfc00, 0x0400)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("433.cpu", 0x2000, 0x0400, CRC(c05d2b52) SHA1(393fe063b029246317c90ee384db95a84d61dbb7))
|
||||
ROM_REGION(0x10000, "cpu2", 0)
|
||||
ROM_LOAD("433.snd", 0x0400, 0x0400, CRC(20cd1dff) SHA1(93e7c47ff7051c3c0dc9f8f95aa33ba094e7cf25))
|
||||
ROM_RELOAD( 0x0800, 0x0400)
|
||||
ROM_LOAD("6530sys1.bin", 0x0c00, 0x0400, CRC(b7831321) SHA1(c94f4bee97854d0373653a6867016e27d3fc1340))
|
||||
ROM_RELOAD( 0xfc00, 0x0400)
|
||||
ROM_END
|
||||
|
||||
/*-------------------------------------------------------------------
|
||||
/ Torch (02/1980) #438
|
||||
/-------------------------------------------------------------------*/
|
||||
ROM_START(torch)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("438.cpu", 0x2000, 0x0400, CRC(2d396a64) SHA1(38a1862771500faa471071db08dfbadc6e8759e8))
|
||||
ROM_REGION(0x10000, "cpu2", 0)
|
||||
ROM_LOAD("438.snd", 0x0400, 0x0400, CRC(a9619b48) SHA1(1906bc1b059bf31082e3b4546f5a30159479ad3c))
|
||||
ROM_RELOAD( 0x0800, 0x0400)
|
||||
ROM_LOAD("6530sys1.bin", 0x0c00, 0x0400, CRC(b7831321) SHA1(c94f4bee97854d0373653a6867016e27d3fc1340))
|
||||
ROM_RELOAD( 0xfc00, 0x0400)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("438.cpu", 0x2000, 0x0400, CRC(2d396a64) SHA1(38a1862771500faa471071db08dfbadc6e8759e8))
|
||||
ROM_REGION(0x10000, "cpu2", 0)
|
||||
ROM_LOAD("438.snd", 0x0400, 0x0400, CRC(a9619b48) SHA1(1906bc1b059bf31082e3b4546f5a30159479ad3c))
|
||||
ROM_RELOAD( 0x0800, 0x0400)
|
||||
ROM_LOAD("6530sys1.bin", 0x0c00, 0x0400, CRC(b7831321) SHA1(c94f4bee97854d0373653a6867016e27d3fc1340))
|
||||
ROM_RELOAD( 0xfc00, 0x0400)
|
||||
ROM_END
|
||||
|
||||
/*-------------------------------------------------------------------
|
||||
/ Totem (10/1979) #429
|
||||
/-------------------------------------------------------------------*/
|
||||
ROM_START(totem)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("429.cpu", 0x2000, 0x0400, CRC(7885a384) SHA1(1770662af7d48ad8297097a9877c5c497119978d))
|
||||
ROM_REGION(0x10000, "cpu2", 0)
|
||||
ROM_LOAD("429.snd", 0x0400, 0x0400, CRC(5d1b7ed4) SHA1(4a584f880e907fb21da78f3b3a0617f20599688f))
|
||||
ROM_RELOAD( 0x0800, 0x0400)
|
||||
ROM_LOAD("6530sys1.bin", 0x0c00, 0x0400, CRC(b7831321) SHA1(c94f4bee97854d0373653a6867016e27d3fc1340))
|
||||
ROM_RELOAD( 0xfc00, 0x0400)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("429.cpu", 0x2000, 0x0400, CRC(7885a384) SHA1(1770662af7d48ad8297097a9877c5c497119978d))
|
||||
ROM_REGION(0x10000, "cpu2", 0)
|
||||
ROM_LOAD("429.snd", 0x0400, 0x0400, CRC(5d1b7ed4) SHA1(4a584f880e907fb21da78f3b3a0617f20599688f))
|
||||
ROM_RELOAD( 0x0800, 0x0400)
|
||||
ROM_LOAD("6530sys1.bin", 0x0c00, 0x0400, CRC(b7831321) SHA1(c94f4bee97854d0373653a6867016e27d3fc1340))
|
||||
ROM_RELOAD( 0xfc00, 0x0400)
|
||||
ROM_END
|
||||
|
||||
/*-------------------------------------------------------------------
|
||||
/ System 1 Test prom
|
||||
/-------------------------------------------------------------------*/
|
||||
ROM_START(sys1test)
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("test.cpu", 0x2000, 0x0400, CRC(8b0704bb) SHA1(5f0eb8d5af867b815b6012c9d078927398efe6d8))
|
||||
ROM_REGION(0x10000, "maincpu", 0)
|
||||
ROM_LOAD("u5_cf.bin", 0x0000, 0x0800, CRC(e0d4b405) SHA1(17aadd79c0dcbb336aadd5d203bc6ca866492345))
|
||||
ROM_LOAD("u4_ce.bin", 0x0800, 0x0800, CRC(4cd312dd) SHA1(31245daa9972ef8652caee69986585bb8239e86e))
|
||||
ROM_LOAD("test.cpu", 0x2000, 0x0400, CRC(8b0704bb) SHA1(5f0eb8d5af867b815b6012c9d078927398efe6d8))
|
||||
ROM_END
|
||||
|
||||
|
||||
|
@ -12,12 +12,12 @@ a IGS game use IGS036 chip
|
||||
IGS036 could be a upgraded version of IGS027A
|
||||
but with GFX processor integrated
|
||||
|
||||
I dont know the CPU core (should ARM based due to fail test)
|
||||
the chip has internal rom build-in
|
||||
the the FLASH(u33, EV29LV160AB-90PCR) is external rom and encrypted
|
||||
if the external rom decrypted then we can
|
||||
I don't know the CPU core (should be ARM based due to fail test)
|
||||
the chip has internal rom built-in
|
||||
the FLASH(u33, EV29LV160AB-90PCR) is external rom and encrypted
|
||||
if the external rom is decrypted then we can
|
||||
try to trojan the internal rom
|
||||
here we offer several revision a same game to see
|
||||
here we offer several revisions of the same game to see
|
||||
if anyone could find any clue, these 4 revision can
|
||||
be programmed and running on a same PCB.
|
||||
===================================================
|
||||
|
@ -24,13 +24,47 @@ The familiar PIC is still present on the back of the system and likely decrypts
|
||||
On this red box the CPU is a Celeron D at 2.8GHz. RAM is 512M DDR PC3200
|
||||
The box has Sega number 845-0001D-02
|
||||
|
||||
|
||||
Security
|
||||
--------
|
||||
|
||||
The security seems to work in multiple steps. The information there
|
||||
is a combination of our research and things found on the internet.
|
||||
|
||||
- At boot, the bios unlocks the CF card through an IDE 0x82 command
|
||||
with a currently unknown key. There is also a hardware heartbeat
|
||||
signal on the IDE bus to avoid hotswapping.
|
||||
|
||||
- The system boots on the CF which holds a customized Montavista linux.
|
||||
|
||||
- The CF system can either install the game (from the DVD) or start it (on the HD)
|
||||
|
||||
- The DVD is decrypted (probably on-the-fly with aesloop) using a
|
||||
fixed system key (all the dvd images start identically).
|
||||
|
||||
- The PIC includes an AES-CBC engine and has as data an IV, a key,
|
||||
some game-specific identification information, and two pre and
|
||||
post-whitening values. Everything but the key is dumpable through
|
||||
commands, but the key seems well-protected. It's not realistic to
|
||||
decrypt very large amounts of data through it though, the bandwidth
|
||||
would be way too low.
|
||||
|
||||
- The HD is probably unlocked by the CF and bootstrap code is
|
||||
decrypted through the PIC. That code in turn loop-decrypts/mounts all the
|
||||
data needed from the partition (probably /usr, /X11R6 and /home).
|
||||
|
||||
Currently, we do not have access to the CF image, making it impossible
|
||||
to do a complete boot/install.
|
||||
|
||||
|
||||
Lindbergh Game List
|
||||
-------------------
|
||||
Security
|
||||
Game Dongle Sticker PIC Number DVD Code
|
||||
------------------------------------------------------------------------------------------
|
||||
2 Spicy 253-5508-0491 317-0491-COM DVP-0027A
|
||||
*2 Spicy 253-5508-0491 317-0491-COM DVP-0027A
|
||||
After Burner Climax (EXPORT) 253-5508-0440A ^317-0440-COM DVP-0009
|
||||
After Burner Climax CE ? ? DVP-0031A
|
||||
Ami-Gyo ? ? ?
|
||||
Answer X Answer ? ? ?
|
||||
Answer X Answer 1.1 ? ? ?
|
||||
@ -40,28 +74,41 @@ Game Dongle Sticker PIC Number
|
||||
Club Majesty Formal ? ? ?
|
||||
Derby Owners Club 2008: Feel the Rush ? ? DVP-0047A
|
||||
Derby Owners Club 2008: Feel the Rush V2.0 ? ? ?
|
||||
Ghost Squad Evolution ? ? ?
|
||||
*Ghost Squad Evolution ? ? ?
|
||||
Harley Davidson: King of the Road ? ? ?
|
||||
Hummer Extreme ? ? ?
|
||||
Initial D Arcade Stage 4 ? ? DVP-0019
|
||||
Initial D Arcade Stage 4 (rev B) 253-5508-0486E 317-0486-COM DVP-0030B
|
||||
*Initial D Arcade Stage 4 (rev C) 253-5508-0486E 317-0486-COM DVP-0030C
|
||||
*Initial D Arcade Stage 4 (rev D) 253-5508-0486E 317-0486-COM DVP-0030D
|
||||
Initial D Arcade Stage 4 (rev A) ? ? DVP-0019A
|
||||
Initial D Arcade Stage 4 (rev B) ? ? DVP-0019B
|
||||
Initial D Arcade Stage 4 (rev D) ? ? DVP-0019D
|
||||
Initial D Arcade Stage 4 (rev G) ? ? DVP-0019G
|
||||
Initial D4 ? ? DVP-0030
|
||||
Initial D4 (rev B) 253-5508-0486E 317-0486-COM DVP-0030B
|
||||
*Initial D4 (rev C) 253-5508-0486E 317-0486-COM DVP-0030C
|
||||
*Initial D4 (rev D) 253-5508-0486E 317-0486-COM DVP-0030D
|
||||
Initial D Arcade Stage 5 ? ? ?
|
||||
Let's Go Jungle (EXPORT) 253-5508-0442 317-0442-COM DVP-0011
|
||||
MJ4 ? ? ?
|
||||
Outrun 2 Special Tours (EXPORT) 253-5508-0452 317-0452-COM ?
|
||||
Primeval Hunt ? ? DVP-0048A
|
||||
OutRun 2 Special Tours (EXPORT) 253-5508-0452 317-0452-COM ?
|
||||
OutRun 2 SP SDX ? ? DVP-0015A
|
||||
*Primeval Hunt 253-5508-0512 317-0512-COM DVP-0048A
|
||||
R-Tuned: Ultimate Street Racing ? ? DVP-0060
|
||||
*Rambo (EXPORT) 253-5508-0540 ^317-0540-COM DVP-0069
|
||||
*Sega Race TV (EXPORT) 253-5508-0504 ^317-0504-COM DVP-0044
|
||||
SEGA Network Taisen Mahjong MJ4 (rev A) ? ? DVP-0049A
|
||||
SEGA Network Taisen Mahjong MJ4 (rev F) ? ? DVP-0049F
|
||||
SEGA Network Taisen Mahjong MJ4 (rev G) ? ? DVP-0049G
|
||||
*SEGA-Race TV (EXPORT) 253-5508-0504 ^317-0504-COM DVP-0044
|
||||
StarHorse 2: Fifth Expansion (rev D) ? ? DVP-0082D
|
||||
StarHorse 2: Fifth Expansion (rev E) ? ? DVP-0082E
|
||||
*The House Of The Dead 4 (EXPORT) 253-5508-0427 ^317-0427-COM DVP-0003A
|
||||
The House Of The Dead EX (JAPAN) 253-5508-0550 ^317-0550-JPN ?
|
||||
The House Of the Dead 4 Special ? ? ?
|
||||
Virtua Fighter 5 (EXPORT) 253-5508-0438 317-0438-COM ?
|
||||
*VBIOS Update ? ? DVP-0021B
|
||||
VBIOS Update [For VTF] ? ? DVP-0023A
|
||||
Virtua Fighter 5 (EXPORT) 253-5508-0438 317-0438-COM DVP-0008E
|
||||
Virtua Tennis 3 (Power Smash 3) ? ? DVP-0005
|
||||
Virtua Tennis 3 (Power Smash 3) (EXPORT) 253-5508-0434 ^317-0434-COM DVP-0005A
|
||||
*Virtua Tennis 3 (JAPAN) 253-5508-0506 317-0506-JPN DVP-0005C
|
||||
*VBIOS Update ? ? DVP-0021B
|
||||
WCC Football Intercontinental Clubs 2006-2007 ? ? ?
|
||||
WCC Football Intercontinental Clubs 2007-2008 ? ? ?
|
||||
WCC Football Intercontinental Clubs 2008-2009 ? ? ?
|
||||
@ -134,7 +181,8 @@ Notes:
|
||||
P/N: 0A30209 BA17730E6B
|
||||
Serial: EETNGM0G
|
||||
CF SLOT - Accepts a compact flash card. The card is required to boot the system.
|
||||
Revision C and E have been seen. There may be other revisions out there.
|
||||
Revision C and E have been seen. StarHorse 2 has it's own special card.
|
||||
There may be other revisions out there.
|
||||
Sticker: LINDBERGH
|
||||
MDA-C0004A
|
||||
REV. C
|
||||
@ -356,21 +404,172 @@ static MACHINE_CONFIG_START(lindbergh, lindbergh_state)
|
||||
MCFG_AC97_ADD( ":pci:1f.5", 0x808625a6, 0x02, 0x103382c0)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
#define LINDBERGH_BIOS \
|
||||
ROM_REGION32_LE(0x100000, ":pci:1f.0", 0) /* PC bios, location 3j7 */ \
|
||||
ROM_SYSTEM_BIOS(0, "bios0", "6.0.0010 alternate version") \
|
||||
ROMX_LOAD("6.0.0010a.bin", 0x00000, 0x100000, CRC(10dd9b76) SHA1(1fdf1f921bc395846a7c3180fbdbc4ca287a9670), ROM_BIOS(1) ) \
|
||||
ROM_SYSTEM_BIOS(1, "bios1", "6.0.0009") \
|
||||
ROMX_LOAD("6.0.0009.bin", 0x00000, 0x100000, CRC(5ffdfbf8) SHA1(605bc4967b749b4e6d13fc2ebb845ba956a259a7), ROM_BIOS(2) ) \
|
||||
ROM_SYSTEM_BIOS(2, "bios2", "6.0.0010") \
|
||||
ROMX_LOAD("6.0.0010.bin", 0x00000, 0x100000, CRC(ea2bf888) SHA1(c9c5b6f0d4f4f36620939b15dd2f128a74347e37), ROM_BIOS(3) ) \
|
||||
\
|
||||
ROM_REGION(0x400000, ":pci:1e.0:03.0", 0) /* Baseboard MPC firmware */ \
|
||||
ROM_LOAD("fpr-24370b.ic6", 0x000000, 0x400000, CRC(c3b021a4) SHA1(1b6938a50fe0e4ae813864649eb103838c399ac0)) \
|
||||
\
|
||||
ROM_REGION32_LE(0x10000, ":pci:01.0:00.0", 0) /* Geforce bios extension (custom or standard?) */ \
|
||||
ROM_LOAD("vid_bios.u504", 0x00000, 0x10000, CRC(f78d14d7) SHA1(f129787e487984edd23bf344f2e9500c85052275)) \
|
||||
|
||||
ROM_START(lindbios)
|
||||
ROM_REGION32_LE(0x100000, ":pci:1f.0", 0) // PC bios, location 3j7
|
||||
ROM_SYSTEM_BIOS(0, "bios0", "6.0.0010 alternate version")
|
||||
ROMX_LOAD("6.0.0010a.bin", 0x00000, 0x100000, CRC(10dd9b76) SHA1(1fdf1f921bc395846a7c3180fbdbc4ca287a9670), ROM_BIOS(1) )
|
||||
ROM_SYSTEM_BIOS(1, "bios1", "6.0.0009")
|
||||
ROMX_LOAD("6.0.0009.bin", 0x00000, 0x100000, CRC(5ffdfbf8) SHA1(605bc4967b749b4e6d13fc2ebb845ba956a259a7), ROM_BIOS(2) )
|
||||
ROM_SYSTEM_BIOS(2, "bios2", "6.0.0010")
|
||||
ROMX_LOAD("6.0.0010.bin", 0x00000, 0x100000, CRC(ea2bf888) SHA1(c9c5b6f0d4f4f36620939b15dd2f128a74347e37), ROM_BIOS(3) )
|
||||
|
||||
|
||||
ROM_REGION(0x400000, ":pci:1e.0:03.0", 0) // Baseboard MPC firmware
|
||||
ROM_LOAD("fpr-24370b.ic6", 0x000000, 0x400000, CRC(c3b021a4) SHA1(1b6938a50fe0e4ae813864649eb103838c399ac0))
|
||||
|
||||
ROM_REGION32_LE(0x10000, ":pci:01.0:00.0", 0) // Geforce bios extension (custom or standard?)
|
||||
ROM_LOAD("vid_bios.u504", 0x00000, 0x10000, CRC(f78d14d7) SHA1(f129787e487984edd23bf344f2e9500c85052275))
|
||||
LINDBERGH_BIOS
|
||||
ROM_END
|
||||
|
||||
GAME(1999, lindbios, 0, lindbergh, 0, driver_device, 0, ROT0, "Sega Lindbergh", "Sega Lindbergh Bios", GAME_IS_SKELETON)
|
||||
ROM_START(hotd4)
|
||||
LINDBERGH_BIOS
|
||||
|
||||
ROM_REGION(0x2000, ":pic", 0) // PIC security 253-5508-0427 / 317-0427-COM
|
||||
ROM_LOAD("317-0427-com.bin", 0, 0x2000, CRC(ef4a120c) SHA1(fcc0386fa708af9e010e40e1d259a6bd95e8b9e2))
|
||||
|
||||
DISK_REGION("dvd")
|
||||
DISK_IMAGE_READONLY("dvp-0003a", 0, SHA1(46544e28735f55418dd78bd19446093874438264))
|
||||
ROM_END
|
||||
|
||||
ROM_START(vf5)
|
||||
LINDBERGH_BIOS
|
||||
|
||||
ROM_REGION(0x2000, ":pic", 0) // PIC security 253-5508-0438 / 317-0438-COM
|
||||
ROM_LOAD("317-0438-com.bin", 0, 0x2000, CRC(9aeb15d3) SHA1(405ddc44b2b40b72cfe2a081a0d5e43ceb9a380e))
|
||||
|
||||
DISK_REGION("dvd")
|
||||
DISK_IMAGE_READONLY("dvp-0008e", 0, NO_DUMP)
|
||||
ROM_END
|
||||
|
||||
ROM_START(abclimax)
|
||||
LINDBERGH_BIOS
|
||||
|
||||
ROM_REGION(0x2000, ":pic", 0) // PIC security 253-5508-0440 / 317-0440-COM
|
||||
ROM_LOAD("317-0440-com.bin", 0, 0x2000, CRC(8d09e717) SHA1(6b25982f7042541874115d33ea5d0c028140a962))
|
||||
|
||||
DISK_REGION("dvd")
|
||||
DISK_IMAGE_READONLY("dvp-0009", 0, NO_DUMP)
|
||||
ROM_END
|
||||
|
||||
ROM_START(letsgoju)
|
||||
LINDBERGH_BIOS
|
||||
|
||||
ROM_REGION(0x2000, ":pic", 0) // PIC security 253-5508-0442 / 317-0442-COM
|
||||
ROM_LOAD("317-0442-com.bin", 0, 0x2000, CRC(b706efbb) SHA1(97c2b65e521113c5201f0b588fcb37a39148a637))
|
||||
|
||||
DISK_REGION("dvd")
|
||||
DISK_IMAGE_READONLY("dvp-0011", 0, NO_DUMP)
|
||||
ROM_END
|
||||
|
||||
ROM_START(outr2sdx)
|
||||
LINDBERGH_BIOS
|
||||
|
||||
ROM_REGION(0x2000, ":pic", 0) // PIC security 253-5508-0452 / 317-0452-COM (to verify, may be the one for OutRun 2 Special Tours)
|
||||
ROM_LOAD("317-0452-com.bin", 0, 0x2000, CRC(f5b7bb3f) SHA1(6b179b255b3d29e5ce61902eeae4da07177a2943))
|
||||
|
||||
DISK_REGION("dvd")
|
||||
DISK_IMAGE_READONLY("dvp-0015a", 0, NO_DUMP)
|
||||
ROM_END
|
||||
|
||||
ROM_START(psmash3)
|
||||
LINDBERGH_BIOS
|
||||
|
||||
ROM_REGION(0x2000, ":pic", 0) // PIC security 253-5508-0434 / 317-0434-COM
|
||||
ROM_LOAD("317-0434-com.bin", 0, 0x2000, CRC(70e3b202) SHA1(4925a288f937d54529abe6ef467c9c23674e47f0))
|
||||
|
||||
DISK_REGION("dvd")
|
||||
DISK_IMAGE_READONLY("dvp-0005a", 0, NO_DUMP)
|
||||
ROM_END
|
||||
|
||||
ROM_START(vtennis3)
|
||||
LINDBERGH_BIOS
|
||||
|
||||
ROM_REGION(0x2000, ":pic", 0) // PIC security 253-5508-0506 / 317-0506-JPN
|
||||
ROM_LOAD("317-0506-jpn.bin", 0, 0x2000, NO_DUMP)
|
||||
|
||||
DISK_REGION("dvd")
|
||||
DISK_IMAGE_READONLY("dvp-0005c", 0, SHA1(1fd689753c4b70dff0286cb7f623ee7fd439db62))
|
||||
ROM_END
|
||||
|
||||
|
||||
ROM_START(initiad4)
|
||||
LINDBERGH_BIOS
|
||||
|
||||
ROM_REGION(0x2000, ":pic", 0) // PIC security 253-5508-0486E / 317-0486-COM
|
||||
ROM_LOAD("317-0846-com.bin", 0, 0x2000, NO_DUMP)
|
||||
|
||||
DISK_REGION("dvd")
|
||||
DISK_IMAGE_READONLY("dvp-0030d", 0, SHA1(e43e6d22fab4eceb81db8309e4634e049d9c41e6))
|
||||
ROM_END
|
||||
|
||||
ROM_START(initiad4c)
|
||||
LINDBERGH_BIOS
|
||||
|
||||
ROM_REGION(0x2000, ":pic", 0) // PIC security 253-5508-0486E / 317-0486-COM
|
||||
ROM_LOAD("317-0846-com.bin", 0, 0x2000, NO_DUMP)
|
||||
|
||||
DISK_REGION("dvd")
|
||||
DISK_IMAGE_READONLY("dvp-0030c", 0, SHA1(b1919f28539afec4c4bc52357e5210a090b5ae32))
|
||||
ROM_END
|
||||
|
||||
ROM_START(segartv)
|
||||
LINDBERGH_BIOS
|
||||
|
||||
ROM_REGION(0x2000, ":pic", 0) // PIC security 253-5508-0504 / 317-0504-COM
|
||||
ROM_LOAD("317-0504-com.bin", 0, 0x2000, CRC(ae7eaea8) SHA1(187e417e0b5543d95245364b547925426aa9f80e))
|
||||
|
||||
DISK_REGION("dvd")
|
||||
DISK_IMAGE_READONLY("dvp-0044", 0, SHA1(914aa23ece8aaf0f1942f77272b3a87d10f7a7db))
|
||||
ROM_END
|
||||
|
||||
ROM_START(hotdex)
|
||||
LINDBERGH_BIOS
|
||||
|
||||
ROM_REGION(0x2000, ":pic", 0) // PIC security 253-5508-0550 / 317-0550-JPN
|
||||
ROM_LOAD("317-0550-jpn.bin", 0, 0x2000, CRC(7e247f13) SHA1(d416b0e7742b32eb31443967e84ef93fc9e56dfb))
|
||||
|
||||
DISK_REGION("dvd")
|
||||
DISK_IMAGE_READONLY("hotdex", 0, NO_DUMP)
|
||||
ROM_END
|
||||
|
||||
ROM_START(rambo)
|
||||
LINDBERGH_BIOS
|
||||
|
||||
ROM_REGION(0x2000, ":pic", 0) // PIC security 253-5508-0540 / 317-0540-COM
|
||||
ROM_LOAD("317-0540-com.bin", 0, 0x2000, CRC(fd9a7bc0) SHA1(140b05573e25a41c1237c7a96c8e099efbfd75b8))
|
||||
|
||||
DISK_REGION("dvd")
|
||||
DISK_IMAGE_READONLY("dvp-0069", 0, SHA1(1f3401b652c45db2b843360aff9cda862c2832c0))
|
||||
ROM_END
|
||||
|
||||
ROM_START(hummerxt)
|
||||
LINDBERGH_BIOS
|
||||
|
||||
ROM_REGION(0x2000, ":pic", 0) // PIC security id unknown
|
||||
ROM_LOAD("hummerextreme.bin", 0, 0x2000, CRC(524bc69a) SHA1(c79b6bd384196c169e40e623f4c80c8b9eb11f81))
|
||||
ROM_END
|
||||
|
||||
ROM_START(lbvbiosu)
|
||||
LINDBERGH_BIOS
|
||||
|
||||
DISK_REGION("dvd")
|
||||
DISK_IMAGE_READONLY("dvp-0021b", 0, SHA1(362ac028ba19ba4762678953a033034a5ee8ad53))
|
||||
ROM_END
|
||||
|
||||
GAME(1999, lindbios, 0, lindbergh, 0, driver_device, 0, ROT0, "Sega", "Sega Lindbergh Bios", GAME_IS_BIOS_ROOT)
|
||||
GAME(2005, hotd4, lindbios, lindbergh, 0, driver_device, 0, ROT0, "Sega", "House of the Dead 4 (Export)", GAME_NOT_WORKING|GAME_UNEMULATED_PROTECTION|GAME_NO_SOUND)
|
||||
GAME(2005, vf5, lindbios, lindbergh, 0, driver_device, 0, ROT0, "Sega", "Virtua Fighter 5 (Export)", GAME_NOT_WORKING|GAME_UNEMULATED_PROTECTION|GAME_NO_SOUND)
|
||||
GAME(2006, abclimax, lindbios, lindbergh, 0, driver_device, 0, ROT0, "Sega", "After Burner Climax (Export)", GAME_NOT_WORKING|GAME_UNEMULATED_PROTECTION|GAME_NO_SOUND)
|
||||
GAME(2006, letsgoju, lindbios, lindbergh, 0, driver_device, 0, ROT0, "Sega", "Let's Go Jungle (Export)", GAME_NOT_WORKING|GAME_UNEMULATED_PROTECTION|GAME_NO_SOUND)
|
||||
GAME(2006, outr2sdx, lindbios, lindbergh, 0, driver_device, 0, ROT0, "Sega", "Outrun 2 SP SDX", GAME_NOT_WORKING|GAME_UNEMULATED_PROTECTION|GAME_NO_SOUND)
|
||||
GAME(2006, psmash3, lindbios, lindbergh, 0, driver_device, 0, ROT0, "Sega", "Power Smash 3 / Virtua Tennis 3 (Export)", GAME_NOT_WORKING|GAME_UNEMULATED_PROTECTION|GAME_NO_SOUND)
|
||||
GAME(2006, vtennis3, lindbios, lindbergh, 0, driver_device, 0, ROT0, "Sega", "Virtua Tennis 3 (Japan)", GAME_NOT_WORKING|GAME_UNEMULATED_PROTECTION|GAME_NO_SOUND)
|
||||
GAME(2007, initiad4, lindbios, lindbergh, 0, driver_device, 0, ROT0, "Sega", "Initial D4 (Rev D)", GAME_NOT_WORKING|GAME_UNEMULATED_PROTECTION|GAME_NO_SOUND)
|
||||
GAME(2007, initiad4c, initiad4, lindbergh, 0, driver_device, 0, ROT0, "Sega", "Initial D4 (Rev C)", GAME_NOT_WORKING|GAME_UNEMULATED_PROTECTION|GAME_NO_SOUND)
|
||||
GAME(2007, segartv, lindbios, lindbergh, 0, driver_device, 0, ROT0, "Sega", "Sega Race-TV (Export)", GAME_NOT_WORKING|GAME_UNEMULATED_PROTECTION|GAME_NO_SOUND)
|
||||
GAME(2008, hotdex, lindbios, lindbergh, 0, driver_device, 0, ROT0, "Sega", "House of the Dead EX (Japan)", GAME_NOT_WORKING|GAME_UNEMULATED_PROTECTION|GAME_NO_SOUND)
|
||||
GAME(2008, rambo, lindbios, lindbergh, 0, driver_device, 0, ROT0, "Sega", "Rambo (Export)", GAME_NOT_WORKING|GAME_UNEMULATED_PROTECTION|GAME_NO_SOUND)
|
||||
GAME(2009, hummerxt, lindbios, lindbergh, 0, driver_device, 0, ROT0, "Sega", "Hummer Extreme", GAME_NOT_WORKING|GAME_UNEMULATED_PROTECTION|GAME_NO_SOUND)
|
||||
GAME(200?, lbvbiosu, lindbios, lindbergh, 0, driver_device, 0, ROT0, "Sega", "VBios updater", GAME_NOT_WORKING|GAME_UNEMULATED_PROTECTION|GAME_NO_SOUND)
|
||||
|
@ -2152,12 +2152,6 @@ DRIVER_INIT_MEMBER(m62_state,ldrun4)
|
||||
|
||||
DRIVER_INIT_MEMBER(m62_state,kidniki)
|
||||
{
|
||||
UINT8 *ROM = memregion("maincpu")->base();
|
||||
|
||||
/* in Kid Niki, bank 0 has code falling from 7fff to 8000, */
|
||||
/* so I have to copy it there because bank switching wouldn't catch it */
|
||||
memcpy(ROM + 0x08000, ROM + 0x10000, 0x2000);
|
||||
|
||||
/* configure memory banks */
|
||||
membank("bank1")->configure_entries(0, 16, memregion("maincpu")->base() + 0x10000, 0x2000);
|
||||
}
|
||||
|
@ -26,112 +26,41 @@ TODO:
|
||||
#include "sound/sn76496.h"
|
||||
#include "includes/mjkjidai.h"
|
||||
|
||||
/* Start of ADPCM custom chip code */
|
||||
|
||||
const device_type MJKJIDAI = &device_creator<mjkjidai_adpcm_device>;
|
||||
|
||||
mjkjidai_adpcm_device::mjkjidai_adpcm_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: device_t(mconfig, MJKJIDAI, "Mahjong Kyou Jidai ADPCM Custom", tag, owner, clock, "mjkjidai_adpcm", __FILE__),
|
||||
device_sound_interface(mconfig, *this),
|
||||
m_stream(NULL),
|
||||
m_current(0),
|
||||
m_end(0),
|
||||
m_nibble(0),
|
||||
m_playing(0),
|
||||
m_base(NULL)
|
||||
{
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_config_complete - perform any
|
||||
// operations now that the configuration is
|
||||
// complete
|
||||
//-------------------------------------------------
|
||||
|
||||
void mjkjidai_adpcm_device::device_config_complete()
|
||||
{
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_start - device-specific startup
|
||||
//-------------------------------------------------
|
||||
|
||||
void mjkjidai_adpcm_device::device_start()
|
||||
{
|
||||
m_playing = 0;
|
||||
m_stream = machine().sound().stream_alloc(*this, 0, 1, clock());
|
||||
m_base = machine().root_device().memregion("adpcm")->base();
|
||||
m_adpcm.reset();
|
||||
|
||||
save_item(NAME(m_current));
|
||||
save_item(NAME(m_end));
|
||||
save_item(NAME(m_nibble));
|
||||
save_item(NAME(m_playing));
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// sound_stream_update - handle a stream update
|
||||
//-------------------------------------------------
|
||||
|
||||
void mjkjidai_adpcm_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples)
|
||||
{
|
||||
stream_sample_t *dest = outputs[0];
|
||||
|
||||
while (m_playing && samples > 0)
|
||||
{
|
||||
int val = (m_base[m_current] >> m_nibble) & 15;
|
||||
|
||||
m_nibble ^= 4;
|
||||
if (m_nibble == 4)
|
||||
{
|
||||
m_current++;
|
||||
if (m_current >= m_end)
|
||||
m_playing = 0;
|
||||
}
|
||||
|
||||
*dest++ = m_adpcm.clock(val) << 4;
|
||||
samples--;
|
||||
}
|
||||
while (samples > 0)
|
||||
{
|
||||
*dest++ = 0;
|
||||
samples--;
|
||||
}
|
||||
}
|
||||
|
||||
void mjkjidai_adpcm_device::mjkjidai_adpcm_play (int offset, int length)
|
||||
{
|
||||
m_current = offset;
|
||||
m_end = offset + length/2;
|
||||
m_nibble = 4;
|
||||
m_playing = 1;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(mjkjidai_state::adpcm_w)
|
||||
{
|
||||
m_mjk_adpcm->mjkjidai_adpcm_play ((data & 0x07) * 0x1000, 0x1000 * 2);
|
||||
m_adpcm_pos = (data & 0x07) * 0x1000 * 2;
|
||||
m_adpcm_end = m_adpcm_pos + 0x1000 * 2;
|
||||
m_msm->reset_w(0);
|
||||
}
|
||||
/* End of ADPCM custom chip code */
|
||||
|
||||
|
||||
READ8_MEMBER(mjkjidai_state::keyboard_r)
|
||||
WRITE_LINE_MEMBER(mjkjidai_state::adpcm_int)
|
||||
{
|
||||
int res = 0x3f,i;
|
||||
static const char *const keynames[] = { "PL2_1", "PL2_2", "PL2_3", "PL2_4", "PL2_5", "PL2_6", "PL1_1", "PL1_2", "PL1_3", "PL1_4", "PL1_5", "PL1_6" };
|
||||
|
||||
// logerror("%04x: keyboard_r\n", space.device().safe_pc());
|
||||
|
||||
for (i = 0; i < 12; i++)
|
||||
if (m_adpcm_pos >= m_adpcm_end)
|
||||
{
|
||||
if (~m_keyb & (1 << i))
|
||||
m_msm->reset_w(1);
|
||||
}
|
||||
else
|
||||
{
|
||||
UINT8 const data = m_adpcmrom[m_adpcm_pos / 2];
|
||||
m_msm->data_w(m_adpcm_pos & 1 ? data & 0xf : data >> 4);
|
||||
m_adpcm_pos++;
|
||||
}
|
||||
}
|
||||
|
||||
CUSTOM_INPUT_MEMBER(mjkjidai_state::keyboard_r)
|
||||
{
|
||||
int res = 0x3f;
|
||||
|
||||
for (int i = 0; i < 12; i++)
|
||||
{
|
||||
if (~m_keyb & (0x800 >> i))
|
||||
{
|
||||
res = ioport(keynames[i])->read() & 0x3f;
|
||||
res = m_row[i]->read();
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
res |= (ioport("IN3")->read() & 0xc0);
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
@ -152,21 +81,18 @@ static ADDRESS_MAP_START( mjkjidai_map, AS_PROGRAM, 8, mjkjidai_state )
|
||||
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
|
||||
AM_RANGE(0xc000, 0xcfff) AM_RAM
|
||||
AM_RANGE(0xd000, 0xdfff) AM_RAM AM_SHARE("nvram") // cleared and initialized on startup if bit 6 of port 00 is 0
|
||||
AM_RANGE(0xe000, 0xe01f) AM_RAM AM_SHARE("spriteram1") // shared with tilemap ram
|
||||
AM_RANGE(0xe800, 0xe81f) AM_RAM AM_SHARE("spriteram2") // shared with tilemap ram
|
||||
AM_RANGE(0xf000, 0xf01f) AM_RAM AM_SHARE("spriteram3") // shared with tilemap ram
|
||||
AM_RANGE(0xe000, 0xf7ff) AM_RAM_WRITE(mjkjidai_videoram_w) AM_SHARE("videoram")
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( mjkjidai_io_map, AS_IO, 8, mjkjidai_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0x00, 0x00) AM_READ(keyboard_r)
|
||||
AM_RANGE(0x00, 0x00) AM_READ_PORT("KEYBOARD")
|
||||
AM_RANGE(0x01, 0x01) AM_READNOP // ???
|
||||
AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2")
|
||||
AM_RANGE(0x01, 0x02) AM_WRITE(keyboard_select_w)
|
||||
AM_RANGE(0x10, 0x10) AM_WRITE(mjkjidai_ctrl_w) // rom bank, coin counter, flip screen etc
|
||||
AM_RANGE(0x11, 0x11) AM_READ_PORT("IN0")
|
||||
AM_RANGE(0x12, 0x12) AM_READ_PORT("IN1")
|
||||
AM_RANGE(0x11, 0x11) AM_READ_PORT("DSW1")
|
||||
AM_RANGE(0x12, 0x12) AM_READ_PORT("DSW2")
|
||||
AM_RANGE(0x20, 0x20) AM_DEVWRITE("sn1", sn76489_device, write)
|
||||
AM_RANGE(0x30, 0x30) AM_DEVWRITE("sn2", sn76489_device, write)
|
||||
AM_RANGE(0x40, 0x40) AM_WRITE(adpcm_w)
|
||||
@ -174,147 +100,146 @@ ADDRESS_MAP_END
|
||||
|
||||
|
||||
static INPUT_PORTS_START( mjkjidai )
|
||||
PORT_START("IN0")
|
||||
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
|
||||
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Flip_Screen ) )
|
||||
PORT_START("DSW1")
|
||||
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:1")
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
|
||||
PORT_START("IN1")
|
||||
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:2")
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:3")
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:4")
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:5")
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "Test Mode" ) PORT_DIPLOCATION("SW1:6")
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:7")
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:8")
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
|
||||
PORT_START("DSW2")
|
||||
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:1")
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:2")
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3")
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4")
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:5")
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:6")
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:7")
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:8")
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
|
||||
PORT_START("IN2")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) // service mode
|
||||
PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
PORT_SERVICE( 0x10, IP_ACTIVE_LOW )
|
||||
PORT_DIPNAME( 0x20, 0x20, "Statistics" )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START3 )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START4 )
|
||||
PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("IN3")
|
||||
PORT_START("KEYBOARD")
|
||||
PORT_BIT( 0x3f, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_CUSTOM_MEMBER(DEVICE_SELF, mjkjidai_state, keyboard_r, NULL)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_TILT ) // reinitialize NVRAM and reset the game
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
|
||||
|
||||
PORT_START("PL1_1")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
|
||||
PORT_BIT( 0x3e, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("PL1_2")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_KAN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_REACH )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_RON )
|
||||
PORT_BIT( 0x38, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("PL1_3")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_M )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_N )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_CHI )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_PON )
|
||||
PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("PL1_4")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_I )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_J )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_K )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_L )
|
||||
PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("PL1_5")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_E )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_F )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_G )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_H )
|
||||
PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("PL1_6")
|
||||
PORT_START("ROW.0")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_A )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_B )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_C )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_D )
|
||||
PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("PL2_1")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START2 )
|
||||
PORT_BIT( 0x3e, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
PORT_START("ROW.1")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_E )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_F )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_G )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_H )
|
||||
PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("PL2_2")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_RON ) PORT_PLAYER(2)
|
||||
PORT_START("ROW.2")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_I )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_J )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_K )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_L )
|
||||
PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("ROW.3")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_M )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_N )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_CHI )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_PON )
|
||||
PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("ROW.4")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_KAN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_REACH )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_RON )
|
||||
PORT_BIT( 0x38, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("PL2_3")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_M ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_N ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_CHI ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_PON ) PORT_PLAYER(2)
|
||||
PORT_START("ROW.5")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
|
||||
PORT_BIT( 0x3e, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("ROW.6")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_A ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_B ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_C ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_D ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("PL2_4")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_I ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_J ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_K ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_L ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("PL2_5")
|
||||
PORT_START("ROW.7")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_E ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_F ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_G ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_H ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("PL2_6")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_A ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_B ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_C ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_D ) PORT_PLAYER(2)
|
||||
PORT_START("ROW.8")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_I ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_J ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_K ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_L ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("ROW.9")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_M ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_N ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_CHI ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_PON ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("ROW.10")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_RON ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x38, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("ROW.11")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START2 )
|
||||
PORT_BIT( 0x3e, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
@ -350,10 +275,19 @@ GFXDECODE_END
|
||||
|
||||
INTERRUPT_GEN_MEMBER(mjkjidai_state::vblank_irq)
|
||||
{
|
||||
if(m_nmi_mask)
|
||||
if(m_nmi_enable)
|
||||
device.execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
|
||||
}
|
||||
|
||||
void mjkjidai_state::machine_start()
|
||||
{
|
||||
membank("bank1")->configure_entries(0, 4, memregion("maincpu")->base() + 0x8000, 0x4000);
|
||||
}
|
||||
|
||||
void mjkjidai_state::machine_reset()
|
||||
{
|
||||
m_adpcm_pos = m_adpcm_end = 0;
|
||||
}
|
||||
|
||||
static MACHINE_CONFIG_START( mjkjidai, mjkjidai_state )
|
||||
|
||||
@ -386,7 +320,9 @@ static MACHINE_CONFIG_START( mjkjidai, mjkjidai_state )
|
||||
MCFG_SOUND_ADD("sn2", SN76489, 10000000/4)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
|
||||
|
||||
MCFG_SOUND_ADD("adpcm", MJKJIDAI, 6000)
|
||||
MCFG_SOUND_ADD("msm", MSM5205, 384000)
|
||||
MCFG_MSM5205_VCLK_CB(WRITELINE(mjkjidai_state, adpcm_int))
|
||||
MCFG_MSM5205_PRESCALER_SELECTOR(MSM5205_S64_4B) /* 6kHz */
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
@ -399,11 +335,10 @@ MACHINE_CONFIG_END
|
||||
***************************************************************************/
|
||||
|
||||
ROM_START( mjkjidai )
|
||||
ROM_REGION( 0x1c000, "maincpu", 0 )
|
||||
ROM_REGION( 0x18000, "maincpu", 0 )
|
||||
ROM_LOAD( "mkj-00.14g", 0x00000, 0x8000, CRC(188a27e9) SHA1(2306ad112aaf8d9ac77a89d0e4c3a17f36945130) )
|
||||
ROM_LOAD( "mkj-01.15g", 0x08000, 0x4000, CRC(a6a5e9c7) SHA1(974f4343f4347a0065f833c1fdcc47e96d42932d) ) /* banked, there is code flowing from 7fff to this bank */
|
||||
ROM_CONTINUE( 0x10000, 0x4000 )
|
||||
ROM_LOAD( "mkj-02.16g", 0x14000, 0x8000, CRC(fb312927) SHA1(b71db72ba881474f9c2523d0617757889af9f28e) )
|
||||
ROM_LOAD( "mkj-01.15g", 0x08000, 0x8000, CRC(a6a5e9c7) SHA1(974f4343f4347a0065f833c1fdcc47e96d42932d) )
|
||||
ROM_LOAD( "mkj-02.16g", 0x10000, 0x8000, CRC(fb312927) SHA1(b71db72ba881474f9c2523d0617757889af9f28e) )
|
||||
|
||||
ROM_REGION( 0x30000, "gfx1", 0 )
|
||||
ROM_LOAD( "mkj-20.4e", 0x00000, 0x8000, CRC(8fc66bce) SHA1(4f1006bc5168e39eb7a1f6a4b3c3f5aaa3c1c7dd) )
|
||||
|
@ -1,6 +1,6 @@
|
||||
|
||||
/* The following sets are known to exist based on official documentation, but have not been dumped. */
|
||||
/* no other official sets are known to exist apart from these and hte ones in multfish.c */
|
||||
/* no other official sets are known to exist apart from these and the ones in multfish.c */
|
||||
|
||||
#if 0
|
||||
ROM_START( mfish ) // 021120
|
||||
|
@ -259,7 +259,7 @@ Crackin' DJ part 2 840-0068C 23674 20 (64Mb) pre
|
||||
Ferrari F355 Challenge (twin, prototype) no cart 22848P* 21 (64Mb) present 315-6206 317-0267-COM * flash-PCB have CRC 330B A417, the rest is the same as regular cart, not dumped but known to exist
|
||||
Ferrari F355 Challenge 2 (twin) no cart 23399 21 (64Mb) present 315-6206 317-0287-COM content is the same as regular 171-7919A cart
|
||||
House of the Dead 2 (prototype) no cart A1E2 21 (64Mb) present 315-6206 present no label on IC42
|
||||
Inu No Osanpo / Dog Walking (Rev A) 840-0073C 22294A 16 (64Mb) present 315-6206 317-0316-JPN requires 837-13844 JVS IO with special jumpers settings enabling rotary
|
||||
Inu No Osanpo / Dog Walking (Rev A) 840-0073C 22294A 16 (64Mb) present 315-6206 317-0316-JPN requires 837-13844 JVS IO with DIPSW 1 ON
|
||||
Maze of the Kings The (prototype) no cart * 21 (64Mb) present 315-6206 FRI * flash-PCB, not dumped but known to exist
|
||||
Samba de Amigo (prototype) no cart * 21 (64Mb) present 315-6206 317-0270-COM * instead of EPROM have tiny PCB with 2 flashroms on it
|
||||
Soul Surfer (Rev A) 840-0095C 23838C 21 (64Mb) present 315-6206 not present
|
||||
@ -335,7 +335,7 @@ Power Stone 2 841-0008C 23127 9 (64Mb)
|
||||
Puyo Puyo Da! 841-0006C 22206 20 (64Mb) ? 315-6213 ?
|
||||
Ring Out 4x4 840-0004C 21779 10 (64Mb) present 315-6213 317-0250-COM requires 2 JVS boards
|
||||
Samba de Amigo (Rev B) 840-0020C 22966B 16 (64Mb) present 315-6213 317-0270-COM will boot but requires special controller to play it
|
||||
Sega Marine Fishing 840-0027C 22221 10 (64Mb) ? 315-6213 not present ROM 3&4 not present. Requires fishing controller
|
||||
Sega Marine Fishing 840-0027C 22221 10 (64Mb) ? 315-6213 not present ROM 3&4 not present. Requires 837-13844 JVS IO with all DIPSW Off and fishing controller
|
||||
Sega Strike Fighter (Rev A, set 1) 840-0035C 23323A 20 (64Mb) present 315-6213 317-0281-COM have "Rev. A" label on case
|
||||
Sega Strike Fighter (Rev A, set 2) 840-0035C 23786A 20 (64Mb) present 315-6213 317-0281-COM have "Rev. A" label on PCB
|
||||
Sega Tetris 840-0018C 22909 6 (64Mb) present 315-6213 317-0268-COM
|
||||
@ -343,7 +343,7 @@ Slashout 840-0041C 23341 17 (64Mb)
|
||||
Spawn In the Demon's Hand (Rev B) 841-0005C 22977B 10 (64Mb) ? 315-6213 317-5051-COM joystick + 4 buttons
|
||||
Super Major League '99 840-0012C 22059 21 (64Mb) ? 315-6213 ?
|
||||
The Typing of the Dead (Rev A) 840-0026C 23021A 20 (64Mb) present 315-6213 not present
|
||||
Touch de UNO! / Unou Nouryoku Check Machine 840-0008C 22073 4 (64Mb) present 315-6213 317-0255-JPN requires special JVS board with touch input and printer
|
||||
Touch de UNO! / Unou Nouryoku Check Machine 840-0008C 22073 4 (64Mb) present 315-6213 317-0255-JPN requires 837-13844 JVS IO with DIPSW 5 On, ELO AccuTouch-compatible touch screen controller and special printer.
|
||||
Toy Fighter / Waffupu 840-0011C 22035 10 (64Mb) present 315-6212 317-0257-COM joystick + 3 buttons
|
||||
Virtua NBA 840-0021C-01 23073 21 (64Mb) present 315-6213 not present
|
||||
Virtua NBA (original) 840-0021C 22949 21 (64Mb) present 315-6213 317-0271-COM
|
||||
@ -460,7 +460,7 @@ Shootout Pool 840-0098C 23844 4 (64Mb)
|
||||
Shootout Pool Prize / The Medal (Rev A) 840-0128C 24065A 4 (64Mb) present 317-0367-COM requires Naomi-based hopper controller
|
||||
Shootout Pool Prize / The Medal Ver. B 840-0136C 24148 4 (64Mb) present 317-0367-COM requires Naomi-based or 837-14438 hopper controller
|
||||
SWP Hopper Board 840-0130C 24083 20 (64Mb) present 317-0339-COM Maskroms are not really used, they are recycled from other games; there is an additional 837-14381 IO board
|
||||
Touch de UNO! 2 840-0022C 23071 6 (64Mb) present 317-0276-JPN requires special JVS board with touch input and printer
|
||||
Touch de UNO! 2 840-0022C 23071 6 (64Mb) present 317-0276-JPN requires 837-13844 JVS IO with DIPSW 5 On, ELO AccuTouch-compatible touch screen controller and special printer.
|
||||
Virtua Fighter 4 Evolution 840-0106B 23934 20 (64Mb) present 317-0339-COM
|
||||
Virtua Tennis 2 / Power Smash 2 (Rev A) 840-0084C 22327A 18 (64Mb) present 317-0320-COM
|
||||
|
||||
@ -888,7 +888,10 @@ Notes:
|
||||
|-----------------------------|
|
||||
Notes: (most info taken from poor quality pics/scans, better info is needed)
|
||||
|
||||
JVS I/O board 2. Has both digital and analogue inputs.
|
||||
JVS I/O board 2. Supports digital and analogue inputs, rotary input,
|
||||
touch screens (ELO AccuTouch-compatible) and printer output using
|
||||
extended JVS commands. This features can be enabled or disabled
|
||||
by switching DIPSW 1-5.
|
||||
This board is used with F355, Ghost Squad, and many
|
||||
others including network/satellite games.
|
||||
|
||||
@ -909,7 +912,7 @@ Notes: (most info taken from poor quality pics/scans, better info is needed)
|
||||
IC7 - 27C512 EPROM with label 'EPR-22082' (DIP28)
|
||||
On plain 837-13844 (no -02) this is 'EPR-21868' (DIP28)
|
||||
IC8 - Sharp LH52256 32k x8 SRAM (SOP28)
|
||||
IC10 - Something by NEC? (QFP44)
|
||||
IC10 - NEC D71054GB programmable counter/timer (QFP44)
|
||||
OSC1 - 14.7456MHz
|
||||
OSC2 - 32MHz
|
||||
CNx - 6 pin connector
|
||||
@ -5631,10 +5634,8 @@ ROM_START( mushik2e )
|
||||
ROM_LOAD( "fpr-24333.ic8", 0x0000000, 0x4000000, CRC(a467b69c) SHA1(66a841b72ef1bb8cbabbfb1d14081b4dff14b1d3) )
|
||||
ROM_LOAD( "fpr-24334.ic9", 0x4000000, 0x4000000, CRC(13d2d1dc) SHA1(6a47cfaddf006e6ff46837fac956fbcc20619d79) )
|
||||
|
||||
// ROM_REGION( 4, "rom_key", 0 )
|
||||
// ROM_LOAD( "mushik2e-key.bin", 0, 4, CRC(b32a0633) SHA1(984c01e43cf359d8e8a0c6cb1a04c5dc3da47d39) )
|
||||
ROM_REGION( 20, "pic_readout", 0 ) // data obtained using a custom PIC reader
|
||||
ROM_LOAD( "317-0437-com.ic3", 0, 20, NO_DUMP )
|
||||
ROM_REGION( 0x800, "pic_readout", 0 )
|
||||
ROM_LOAD( "317-0437-com.ic3", 0, 0x800, BAD_DUMP CRC(b6e4f61a) SHA1(b5cae574170afa3889e01517f1c4429e207042b9) )
|
||||
|
||||
ROM_REGION(0x4, "boardid", ROMREGION_ERASEVAL(0x02))
|
||||
ROM_END
|
||||
@ -5648,10 +5649,8 @@ ROM_START( mushi2ea )
|
||||
ROM_LOAD( "epr-24357.ic7", 0x0000000, 0x0400000, CRC(a2236d58) SHA1(3746b9d3c0f7ecf6340619bb8bf01f170ac4efb7) ) // EPR mode, overwrite FPR data
|
||||
ROM_LOAD( "fpr-24334.ic9", 0x4000000, 0x4000000, CRC(13d2d1dc) SHA1(6a47cfaddf006e6ff46837fac956fbcc20619d79) )
|
||||
|
||||
// ROM_REGION( 4, "rom_key", 0 )
|
||||
// ROM_LOAD( "mushik2e-key.bin", 0, 4, CRC(b32a0633) SHA1(984c01e43cf359d8e8a0c6cb1a04c5dc3da47d39) )
|
||||
ROM_REGION( 20, "pic_readout", 0 ) // data obtained using a custom PIC reader
|
||||
ROM_LOAD( "317-0437-com.ic3", 0, 20, NO_DUMP )
|
||||
ROM_REGION( 0x800, "pic_readout", 0 )
|
||||
ROM_LOAD( "317-0437-com.ic3", 0, 0x800, BAD_DUMP CRC(b6e4f61a) SHA1(b5cae574170afa3889e01517f1c4429e207042b9) )
|
||||
|
||||
ROM_REGION(0x4, "boardid", ROMREGION_ERASEVAL(0x82))
|
||||
ROM_END
|
||||
@ -5664,10 +5663,8 @@ ROM_START( zunou )
|
||||
ROM_LOAD( "fpr-24338.ic8", 0x0000000, 0x4000000, CRC(1423c374) SHA1(e6a3f0eaccd13c161d07705bcd00f447f08fc186) )
|
||||
ROM_LOAD( "fpr-24339.ic9", 0x4000000, 0x4000000, CRC(11883792) SHA1(1782db04f74394f981f887ab1a95d687eb2c0b35) )
|
||||
|
||||
// ROM_REGION( 4, "rom_key", 0 )
|
||||
// ROM_LOAD( "zunou-key.bin", 0, 4, CRC(cbe35afb) SHA1(78877655800aae27661bf720e1c37d6c6f2e3d1c) )
|
||||
ROM_REGION( 20, "pic_readout", 0 ) // data obtained using a custom PIC reader
|
||||
ROM_LOAD( "317-0435-jpn.ic3", 0, 20, NO_DUMP )
|
||||
ROM_REGION( 0x800, "pic_readout", 0 )
|
||||
ROM_LOAD( "317-0435-jpn.ic3", 0, 0x800, BAD_DUMP CRC(b553d900) SHA1(ed1c3c2053f2c0e98cb5c4d99f93143a66c29e5c) )
|
||||
|
||||
ROM_REGION(0x4, "boardid", ROMREGION_ERASEVAL(0x02))
|
||||
ROM_END
|
||||
@ -5682,8 +5679,8 @@ ROM_START( sl2007 )
|
||||
ROM_LOAD( "fpr-24415.ic10", 0x8000000, 0x4000000, CRC(133c742c) SHA1(89f857a31731dc918afc72b6cb716f5c77cb9d6e) )
|
||||
ROM_LOAD( "fpr-24416.ic11", 0xc000000, 0x4000000, CRC(562fb88e) SHA1(172678e3e27cfad7f7e6217c4653a4ba119bfbdf) )
|
||||
|
||||
ROM_REGION( 20, "pic_readout", 0 ) // data obtained using a custom PIC reader
|
||||
ROM_LOAD( "317-5129-jpn.ic3", 0, 20, CRC(b6191cea) SHA1(13e14ff013bf2728203641303141c016e82b10a3) )
|
||||
ROM_REGION( 0x800, "pic_readout", 0 )
|
||||
ROM_LOAD( "317-5129-jpn.ic3", 0, 0x800, CRC(432ba30f) SHA1(4935a16d1075430799269ac7ac990066d44d815b) )
|
||||
|
||||
ROM_REGION(0x4, "boardid", ROMREGION_ERASEVAL(0x04))
|
||||
ROM_END
|
||||
@ -5698,8 +5695,8 @@ ROM_START( asndynmt )
|
||||
ROM_LOAD( "fpr-24384.ic10", 0x8000000, 0x4000000, CRC(2e9116c4) SHA1(58903a33c4ce72a1f75aefcab94393fc2e8bd2d9) )
|
||||
ROM_LOAD( "fpr-24385.ic11", 0xc000000, 0x4000000, CRC(2b79f45d) SHA1(db97d980bf1590df4b983a4b7786977687238ef5) )
|
||||
|
||||
ROM_REGION( 20, "pic_readout", 0 ) // data obtained using a custom PIC reader
|
||||
ROM_LOAD( "317-0495-com.ic3", 0, 20, CRC(675aca7b) SHA1(5127189e1f960abf9ed3f643158747d9abcaee1c) )
|
||||
ROM_REGION( 0x800, "pic_readout", 0 )
|
||||
ROM_LOAD( "317-0495-com.ic3", 0, 0x800, CRC(c229a59b) SHA1(497dcc1e4e52eb044a8b709edbd00126cef212b1) )
|
||||
|
||||
ROM_REGION(0x4, "boardid", ROMREGION_ERASEVAL(0x04))
|
||||
ROM_END
|
||||
@ -5714,8 +5711,8 @@ ROM_START( illvelo )
|
||||
ROM_LOAD( "fpr-24439.ic10", 0x8000000, 0x4000000, CRC(c02040f9) SHA1(27ad2cb45e8a516433917f060ca9798412bb95f7) )
|
||||
// IC11 Populated, Empty
|
||||
|
||||
ROM_REGION( 20, "pic_readout", 0 ) // data obtained using a custom PIC reader
|
||||
ROM_LOAD( "317-5131-jpn.ic3", 0, 20, CRC(44ab8ca9) SHA1(c17b10041e70590547ed010dc16a4dd2510fcc80) )
|
||||
ROM_REGION( 0x800, "pic_readout", 0 )
|
||||
ROM_LOAD( "317-5131-jpn.ic3", 0, 0x800, CRC(af4b38f2) SHA1(9b82f16a258854d7d618d60f9a610f7d47d67a78) )
|
||||
|
||||
ROM_REGION(0x4, "boardid", ROMREGION_ERASEVAL(0x04))
|
||||
ROM_END
|
||||
@ -5730,8 +5727,8 @@ ROM_START( mamonoro )
|
||||
ROM_LOAD( "ic10.bin", 0x8000000, 0x4000000, CRC(76fb945f) SHA1(448be0c3d9a7c3956dd51aca3c4d8d28f8cec227) )
|
||||
// IC11 Populated, Empty
|
||||
|
||||
ROM_REGION( 20, "pic_readout", 0 ) // data obtained using a custom PIC reader
|
||||
ROM_LOAD( "317-5132-jpn.ic3", 0, 20, CRC(f2089de5) SHA1(12af0681decb22bbfa4b3e01037c3503846f265a) )
|
||||
ROM_REGION( 0x800, "pic_readout", 0 )
|
||||
ROM_LOAD( "317-5132-jpn.ic3", 0, 0x800, CRC(d56e70a1) SHA1(fda1a2989f0fa3b0edeb292cdd4537d9b86af6f2) )
|
||||
|
||||
ROM_REGION(0x4, "boardid", ROMREGION_ERASEVAL(0x04))
|
||||
ROM_END
|
||||
@ -5748,8 +5745,8 @@ ROM_START( mbaa )
|
||||
ROM_LOAD( "ic12.bin", 0x10000000, 0x4000000, CRC(b8a6bff2) SHA1(befbc2e917b3107f1c4bfb9169623282ff97bfb2) )
|
||||
ROM_LOAD( "ic13.bin", 0x14000000, 0x4000000, CRC(4886329f) SHA1(6ccf6fb83cfdbef3f85f6c06e641c38ff434d605) )
|
||||
|
||||
ROM_REGION( 20, "pic_readout", 0 ) // data obtained using a custom PIC reader
|
||||
ROM_LOAD( "317-5133-jpn.ic3", 0, 20, CRC(3dc7d902) SHA1(bb70e80dff878bca3652088f3333079e0781f482) )
|
||||
ROM_REGION( 0x800, "pic_readout", 0 )
|
||||
ROM_LOAD( "317-5133-jpn.ic3", 0, 0x800, CRC(0f16d180) SHA1(9d4ae15aa54752cdbd8e279388b7f3ae20777172) )
|
||||
|
||||
ROM_REGION(0x4, "boardid", ROMREGION_ERASEVAL(0x06))
|
||||
ROM_END
|
||||
@ -5767,8 +5764,8 @@ ROM_START( mbaaa )
|
||||
ROM_LOAD( "ic12.bin", 0x10000000, 0x4000000, CRC(b8a6bff2) SHA1(befbc2e917b3107f1c4bfb9169623282ff97bfb2) )
|
||||
ROM_LOAD( "ic13.bin", 0x14000000, 0x4000000, CRC(4886329f) SHA1(6ccf6fb83cfdbef3f85f6c06e641c38ff434d605) )
|
||||
|
||||
ROM_REGION( 20, "pic_readout", 0 ) // data obtained using a custom PIC reader
|
||||
ROM_LOAD( "317-5133-jpn.ic3", 0, 20, CRC(3dc7d902) SHA1(bb70e80dff878bca3652088f3333079e0781f482) )
|
||||
ROM_REGION( 0x800, "pic_readout", 0 )
|
||||
ROM_LOAD( "317-5133-jpn.ic3", 0, 0x800, CRC(0f16d180) SHA1(9d4ae15aa54752cdbd8e279388b7f3ae20777172) )
|
||||
|
||||
ROM_REGION(0x4, "boardid", ROMREGION_ERASEVAL(0x86))
|
||||
ROM_END
|
||||
@ -5782,8 +5779,8 @@ ROM_START( radirgyn )
|
||||
ROM_LOAD( "ic9.bin", 0x4000000, 0x4000000, CRC(16cf2e7a) SHA1(ff7c6540e4507f84e3128ba03be4826ba504678c) )
|
||||
// IC10 and IC11 Populated, Empty
|
||||
|
||||
ROM_REGION( 20, "pic_readout", 0 ) // data obtained using a custom PIC reader
|
||||
ROM_LOAD( "317-5138-jpn.ic3", 0, 20, CRC(babcc420) SHA1(653cdcfa388426f4ce03c76506046ec6fd070562) )
|
||||
ROM_REGION( 0x800, "pic_readout", 0 )
|
||||
ROM_LOAD( "317-5138-jpn.ic3", 0, 0x800, CRC(93b7a03d) SHA1(7af7c8d436f61e57b9d5957431c6fc745442f74f) )
|
||||
|
||||
ROM_REGION(0x4, "boardid", ROMREGION_ERASEVAL(0x04))
|
||||
ROM_END
|
||||
@ -5797,8 +5794,8 @@ ROM_START( ausfache )
|
||||
ROM_LOAD( "ic9.bin", 0x4000000, 0x4000000, CRC(18c994d7) SHA1(159e1425b2fc645133814b0d26d93a90e9849b1a) )
|
||||
// IC10 and IC11 Populated, Empty
|
||||
|
||||
ROM_REGION( 20, "pic_readout", 0 ) // data obtained using a custom PIC reader
|
||||
ROM_LOAD( "317-5130-jpn.ic3", 0, 20, CRC(3e0c010b) SHA1(b6da97d4ecb228e73fb9a5ada837d0d6699ab0f1) )
|
||||
ROM_REGION( 0x800, "pic_readout", 0 )
|
||||
ROM_LOAD( "317-05130-jpn.ic3", 0, 0x800, CRC(eccdcd59) SHA1(9f374e0b37f18591c92c38c83c9310f2db0abf9c) )
|
||||
|
||||
ROM_REGION(0x4, "boardid", ROMREGION_ERASEVAL(0x04))
|
||||
ROM_END
|
||||
@ -5817,10 +5814,8 @@ ROM_START( manicpnc )
|
||||
ROM_REGION( 0x200000, "ioboard", 0) // touch screen I/O board, program disassembles as little-endian SH-4
|
||||
ROM_LOAD( "fpr24351.ic14", 0x000000, 0x200000, CRC(4d1b7b89) SHA1(965b8c6b5a2e7b3f1b1e2eac19c86000c3b66754) )
|
||||
|
||||
// ROM_REGION( 4, "rom_key", 0 )
|
||||
// ROM_LOAD( "pokasuka-key.bin", 0, 4, CRC(f00bcd61) SHA1(b8315b851656c2e0b7853979988d1c44eab0886b) )
|
||||
ROM_REGION( 20, "pic_readout", 0 ) // data obtained using a custom PIC reader
|
||||
ROM_LOAD( "317-0461-com.ic3", 0, 20, NO_DUMP )
|
||||
ROM_REGION( 0x800, "pic_readout", 0 )
|
||||
ROM_LOAD( "317-0461-com.ic3", 0, 0x800, BAD_DUMP CRC(c9282cdd) SHA1(23933e489d763515428e2714cc6e7676df1d5323) )
|
||||
|
||||
ROM_REGION(0x4, "boardid", ROMREGION_ERASEVAL(0x05))
|
||||
ROM_END
|
||||
@ -5839,10 +5834,8 @@ ROM_START( pokasuka )
|
||||
ROM_REGION( 0x200000, "ioboard", 0) // touch screen I/O board, program disassembles as little-endian SH-4
|
||||
ROM_LOAD( "fpr24351.ic14", 0x000000, 0x200000, CRC(4d1b7b89) SHA1(965b8c6b5a2e7b3f1b1e2eac19c86000c3b66754) )
|
||||
|
||||
// ROM_REGION( 4, "rom_key", 0 )
|
||||
// ROM_LOAD( "pokasuka-key.bin", 0, 4, CRC(f00bcd61) SHA1(b8315b851656c2e0b7853979988d1c44eab0886b) )
|
||||
ROM_REGION( 20, "pic_readout", 0 ) // data obtained using a custom PIC reader
|
||||
ROM_LOAD( "317-0461-com.ic3", 0, 20, NO_DUMP )
|
||||
ROM_REGION( 0x800, "pic_readout", 0 )
|
||||
ROM_LOAD( "317-0461-com.ic3", 0, 0x800, BAD_DUMP CRC(c9282cdd) SHA1(23933e489d763515428e2714cc6e7676df1d5323) )
|
||||
|
||||
ROM_REGION(0x4, "boardid", ROMREGION_ERASEVAL(0x05))
|
||||
ROM_END
|
||||
@ -5860,8 +5853,8 @@ ROM_START( rhytngk )
|
||||
ROM_LOAD( "fpr-24425.ic10", 0x08000000, 0x4000000, CRC(6223ebac) SHA1(64c0ec61c108acbb557e7d3837f578deba832cb6) )
|
||||
ROM_LOAD( "fpr-24426.ic11", 0x0c000000, 0x4000000, CRC(c78b0981) SHA1(f889acf9065566e11ff985a3b6c4824e364d57ae) )
|
||||
|
||||
ROM_REGION( 20, "pic_readout", 0 ) // data obtained using a custom PIC reader
|
||||
ROM_LOAD( "317-0503-jpn.ic3", 0, 20, CRC(69fc3f47) SHA1(3a887c62e93fa264b307c954eb39a4fca1bdfad6) )
|
||||
ROM_REGION( 0x800, "pic_readout", 0 )
|
||||
ROM_LOAD( "317-0503-jpn.ic3", 0, 0x800, CRC(6eb0976b) SHA1(d5d0fc09a0c0e3a8f2703c450f05f5082317fbe4) )
|
||||
|
||||
ROM_REGION(0x4, "boardid", ROMREGION_ERASEVAL(0x04))
|
||||
ROM_END
|
||||
|
@ -620,8 +620,8 @@ ROM_START( ridhero ) /* MVS AND AES VERSION */
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD16_WORD_SWAP( "006-p1.p1", 0x000000, 0x080000, CRC(d4aaf597) SHA1(34d35b71adb5bd06f4f1b50ffd9c58ab9c440a84) ) /* MB834200 */
|
||||
|
||||
ROM_REGION( 0x1000, "mcu", 0 ) /* Hitachi HD6301V1 MCU */
|
||||
ROM_LOAD( "hd6301v1p.com", 0x0000, 0x1000, NO_DUMP )
|
||||
ROM_REGION( 0x2000, "mcu", 0 ) /* Hitachi HD6301V1 MCU */
|
||||
ROM_LOAD( "rhcom.bin", 0x0000, 0x2000, CRC(e5cd6306) SHA1(f6bbb8ae562804d67e137290c765c3589fa334c0) ) // dumped from a prototype with external ROM, not 100% confirmed as being the same on a final, or other games (lbowling, trally)
|
||||
|
||||
NEO_SFIX_128K( "006-s1.s1", CRC(eb5189f0) SHA1(0239c342ea62e73140a2306052f226226461a478) ) /* TC531000 */
|
||||
|
||||
@ -649,8 +649,8 @@ ROM_START( ridheroh )
|
||||
ROM_LOAD16_WORD_SWAP( "006-pg1.p1", 0x000000, 0x080000, BAD_DUMP CRC(52445646) SHA1(647bb31f2f68453c1366cb6e2e867e37d1df7a54) )
|
||||
/* Chip label p1h does not exist, renamed temporarly to pg1, marked BAD_DUMP. This needs to be verified. */
|
||||
|
||||
ROM_REGION( 0x1000, "mcu", 0 ) /* Hitachi HD6301V1 MCU */
|
||||
ROM_LOAD( "hd6301v1p.com", 0x0000, 0x1000, NO_DUMP )
|
||||
ROM_REGION( 0x2000, "mcu", 0 ) /* Hitachi HD6301V1 MCU */
|
||||
ROM_LOAD( "rhcom.bin", 0x0000, 0x2000, CRC(e5cd6306) SHA1(f6bbb8ae562804d67e137290c765c3589fa334c0) ) // dumped from a prototype with external ROM, not 100% confirmed as being the same on a final, or other games (lbowling, trally)
|
||||
|
||||
NEO_SFIX_128K( "006-s1.s1", CRC(eb5189f0) SHA1(0239c342ea62e73140a2306052f226226461a478) ) /* TC531000 */
|
||||
|
||||
@ -2539,7 +2539,7 @@ ROM_START( fightfev ) /* MVS ONLY RELEASE */
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD16_WORD_SWAP( "060-p1.p1", 0x0000000, 0x100000, CRC(2a104b50) SHA1(3eb663d3df7074e1cdf4c0e450a35c9cf55d8979) ) /* VIC940800 */
|
||||
|
||||
NEO_SFIX_128K( "060-s1.s1", CRC(7f012104) SHA1(f366dcc3923655dff16ec08a40d5fce22a84257d) ) /* VIC930100 */
|
||||
NEO_SFIX_128K( "060-s1.s1", CRC(d62a72e9) SHA1(a23e4c4fd4ec11a7467ce41227c418b4dd1ef649) ) /* VIC930100 */
|
||||
|
||||
NEO_BIOS_AUDIO_128K( "060-m1.m1", CRC(0b7c4e65) SHA1(999a1e784de18db3f1332b30bc425836ea6970be) ) /* VIC930100 */
|
||||
|
||||
@ -2560,10 +2560,10 @@ ROM_START( fightfeva ) /* MVS ONLY RELEASE */
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD16_WORD_SWAP( "060-p1.p1", 0x0000000, 0x100000, CRC(2a104b50) SHA1(3eb663d3df7074e1cdf4c0e450a35c9cf55d8979) ) /* VIC940800 */
|
||||
/* the rom below acts as a patch to the program rom in the cart, replacing the first 512kb */
|
||||
ROM_LOAD16_WORD_SWAP( "060-epr.sp2", 0x000000, 0x080000, BAD_DUMP CRC(3032041b) SHA1(4b8ed2e6f74579ea35a53e06ccac42d6905b0f51) )
|
||||
/* P is on eprom, correct chip label unknown */
|
||||
ROM_LOAD16_WORD_SWAP( "1.sp2", 0x000000, 0x080000, CRC(3032041b) SHA1(4b8ed2e6f74579ea35a53e06ccac42d6905b0f51) )
|
||||
/* P is on eprom, has a Viccom logo at the top of the label with a circled '1' in the center */
|
||||
|
||||
NEO_SFIX_128K( "060-s1.s1", CRC(7f012104) SHA1(f366dcc3923655dff16ec08a40d5fce22a84257d) ) /* VIC930100 */
|
||||
NEO_SFIX_128K( "060-s1.s1", CRC(d62a72e9) SHA1(a23e4c4fd4ec11a7467ce41227c418b4dd1ef649) ) /* VIC930100 */
|
||||
|
||||
NEO_BIOS_AUDIO_128K( "060-m1.m1", CRC(0b7c4e65) SHA1(999a1e784de18db3f1332b30bc425836ea6970be) ) /* VIC930100 */
|
||||
|
||||
|
@ -930,7 +930,7 @@ ROM_END
|
||||
/******************************************************************************
|
||||
|
||||
Gfx ROMs in pkunwar have an unusual layout, where a high address bit
|
||||
(which is no the top bit) separates parts of the same tile.
|
||||
(which is not the top bit) separates parts of the same tile.
|
||||
|
||||
This all originates from Nova2001 apparently, which uses 0x2000 bytes ROMs for
|
||||
the graphics. When the number of tiles was increased, the same 0x2000 blocks
|
||||
|
@ -434,8 +434,8 @@ static ADDRESS_MAP_START( rdx_v33_map, AS_PROGRAM, 16, r2dx_v33_state )
|
||||
AM_RANGE(0x10000, 0x1efff) AM_RAM
|
||||
AM_RANGE(0x1f000, 0x1ffff) AM_RAM //_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
|
||||
|
||||
AM_RANGE(0x20000, 0x2ffff) AM_ROM AM_ROMBANK("bank1") AM_WRITENOP
|
||||
AM_RANGE(0x30000, 0xfffff) AM_ROM AM_ROMBANK("bank3") AM_WRITENOP
|
||||
AM_RANGE(0x20000, 0x2ffff) AM_ROMBANK("bank1") AM_WRITENOP
|
||||
AM_RANGE(0x30000, 0xfffff) AM_ROMBANK("bank3") AM_WRITENOP
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
@ -490,7 +490,7 @@ static ADDRESS_MAP_START( nzeroteam_base_map, AS_PROGRAM, 16, r2dx_v33_state )
|
||||
AM_RANGE(0x10000, 0x1efff) AM_RAM
|
||||
AM_RANGE(0x1f000, 0x1ffff) AM_RAM //_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
|
||||
|
||||
AM_RANGE(0x20000, 0xfffff) AM_ROM AM_REGION("mainprg", 0x20000 )
|
||||
AM_RANGE(0x20000, 0xfffff) AM_ROM AM_REGION("maincpu", 0x20000 )
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( nzerotea_map, AS_PROGRAM, 16, r2dx_v33_state )
|
||||
@ -846,10 +846,10 @@ DRIVER_INIT_MEMBER(r2dx_v33_state,rdx_v33)
|
||||
static const int spri[5] = { 0, 1, 2, 3, -1 };
|
||||
cur_spri = spri;
|
||||
|
||||
membank("bank1")->configure_entries(0, 0x40, memregion("mainprg")->base(), 0x10000);
|
||||
membank("bank1")->configure_entries(0, 0x40, memregion("maincpu")->base(), 0x10000);
|
||||
|
||||
membank("bank3")->configure_entry(0, memregion("mainprg")->base()+0x030000); // 0x30000 - 0xfffff bank for Raiden 2
|
||||
membank("bank3")->configure_entry(1, memregion("mainprg")->base()+0x230000); // 0x30000 - 0xfffff bank for Raiden DX
|
||||
membank("bank3")->configure_entry(0, memregion("maincpu")->base()+0x030000); // 0x30000 - 0xfffff bank for Raiden 2
|
||||
membank("bank3")->configure_entry(1, memregion("maincpu")->base()+0x230000); // 0x30000 - 0xfffff bank for Raiden DX
|
||||
|
||||
|
||||
raiden2_decrypt_sprites(machine());
|
||||
@ -958,18 +958,16 @@ Notes
|
||||
|
||||
|
||||
ROM_START( r2dx_v33 )
|
||||
ROM_REGION( 0x400000, "mainprg", 0 ) /* v33 main cpu */
|
||||
ROM_REGION( 0x400000, "maincpu", 0 ) /* v33 main cpu */
|
||||
ROM_LOAD("prg.223", 0x000000, 0x400000, CRC(b3dbcf98) SHA1(30d6ec2090531c8c579dff74c4898889902d7d87) )
|
||||
|
||||
ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF ) /* v33 main cpu */
|
||||
|
||||
ROM_REGION( 0x040000, "gfx1", 0 ) /* chars */
|
||||
ROM_LOAD( "fix.613", 0x000000, 0x040000, CRC(3da27e39) SHA1(3d446990bf36dd0a3f8fadb68b15bed54904c8b5) )
|
||||
|
||||
ROM_REGION( 0x400000, "gfx2", 0 ) /* background gfx */
|
||||
ROM_LOAD( "bg.612", 0x000000, 0x400000, CRC(162c61e9) SHA1(bd0a6a29804b84196ba6bf3402e9f30a25da9269) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "obj1.724", 0x000000, 0x400000, CRC(7d218985) SHA1(777241a533defcbea3d7e735f309478d260bad52) )
|
||||
ROM_LOAD32_WORD( "obj2.725", 0x000002, 0x400000, CRC(891b24d6) SHA1(74f89b47b1ba6b84ddd96d1fae92fddad0ace342) )
|
||||
|
||||
@ -984,18 +982,16 @@ ROM_START( r2dx_v33 )
|
||||
ROM_END
|
||||
|
||||
ROM_START( r2dx_v33_r2 )
|
||||
ROM_REGION( 0x400000, "mainprg", 0 ) /* v33 main cpu */
|
||||
ROM_REGION( 0x400000, "maincpu", 0 ) /* v33 main cpu */
|
||||
ROM_LOAD("prg.223", 0x000000, 0x400000, CRC(b3dbcf98) SHA1(30d6ec2090531c8c579dff74c4898889902d7d87) )
|
||||
|
||||
ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF ) /* v33 main cpu */
|
||||
|
||||
ROM_REGION( 0x040000, "gfx1", 0 ) /* chars */
|
||||
ROM_LOAD( "fix.613", 0x000000, 0x040000, CRC(3da27e39) SHA1(3d446990bf36dd0a3f8fadb68b15bed54904c8b5) )
|
||||
|
||||
ROM_REGION( 0x400000, "gfx2", 0 ) /* background gfx */
|
||||
ROM_LOAD( "bg.612", 0x000000, 0x400000, CRC(162c61e9) SHA1(bd0a6a29804b84196ba6bf3402e9f30a25da9269) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "obj1.724", 0x000000, 0x400000, CRC(7d218985) SHA1(777241a533defcbea3d7e735f309478d260bad52) )
|
||||
ROM_LOAD32_WORD( "obj2.725", 0x000002, 0x400000, CRC(891b24d6) SHA1(74f89b47b1ba6b84ddd96d1fae92fddad0ace342) )
|
||||
|
||||
@ -1012,12 +1008,10 @@ ROM_END
|
||||
|
||||
// uses dipswitches
|
||||
ROM_START( nzeroteam ) /* V33 SYSTEM TYPE_B hardware, uses SEI333 (AKA COPX-D3) for protection */
|
||||
ROM_REGION( 0x100000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x100000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD16_BYTE("prg1", 0x000000, 0x80000, CRC(3c7d9410) SHA1(25f2121b6c2be73f11263934266901ed5d64d2ee) )
|
||||
ROM_LOAD16_BYTE("prg2", 0x000001, 0x80000, CRC(6cba032d) SHA1(bf5d488cd578fff09e62e3650efdee7658033e3f) )
|
||||
|
||||
ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF ) /* v33 main cpu */
|
||||
|
||||
ROM_REGION( 0x20000, "math", 0 ) /* SEI333 (AKA COPX-D3) data */
|
||||
ROM_LOAD( "copx-d3.bin", 0x00000, 0x20000, CRC(fa2cf3ad) SHA1(13eee40704d3333874b6e3da9ee7d969c6dc662a) ) /* Not from this set, but same data as Zero Team 2000 & Raiden II New */
|
||||
|
||||
@ -1034,7 +1028,7 @@ ROM_START( nzeroteam ) /* V33 SYSTEM TYPE_B hardware, uses SEI333 (AKA COPX-D3)
|
||||
ROM_LOAD( "back-1", 0x000000, 0x100000, CRC(8b7f9219) SHA1(3412b6f8a4fe245e521ddcf185a53f2f4520eb57) ) /* Same as "MUSHA BACK-1" of other Zero Team sets */
|
||||
ROM_LOAD( "back-2", 0x100000, 0x080000, CRC(ce61c952) SHA1(52a843c8ba428b121fab933dd3b313b2894d80ac) ) /* Same as "MUSHA BACK-2" of other Zero Team sets */
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "obj-1", 0x000000, 0x200000, CRC(45be8029) SHA1(adc164f9dede9a86b96a4d709e9cba7d2ad0e564) ) /* Same as "MUSHA OBJ-1" of other Zero Team sets */
|
||||
ROM_LOAD32_WORD( "obj-2", 0x000002, 0x200000, CRC(cb61c19d) SHA1(151a2ce9c32f3321a974819e9b165dddc31c8153) ) /* Same as "MUSHA OBJ-2" of other Zero Team sets */
|
||||
|
||||
@ -1044,12 +1038,10 @@ ROM_END
|
||||
|
||||
// uses a 93c46a eeprom
|
||||
ROM_START( zerotm2k ) /* V33 SYSTEM TYPE_C VER2 hardware, uses SEI333 (AKA COPX-D3) for protection */
|
||||
ROM_REGION( 0x100000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x100000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD( "mt28f800b1.u0230", 0x000000, 0x100000, CRC(6ab49d8c) SHA1(d94ec9a46ff98a76c3372369246733268474de99) ) /* SMT rom, PCB silkscreened PRG01 */
|
||||
/* PCB has unpopulated socket space for two 27C040 at u0224 silkscreened PRG0 & u0226 silkscreened PRG1) */
|
||||
|
||||
ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF ) /* v33 main cpu */
|
||||
|
||||
ROM_REGION( 0x20000, "math", 0 ) /* SEI333 (AKA COPX-D3) data */
|
||||
ROM_LOAD( "mx27c1000mc.u0366", 0x00000, 0x20000, CRC(fa2cf3ad) SHA1(13eee40704d3333874b6e3da9ee7d969c6dc662a) ) /* PCB silkscreened 333ROM */
|
||||
|
||||
@ -1067,7 +1059,7 @@ ROM_START( zerotm2k ) /* V33 SYSTEM TYPE_C VER2 hardware, uses SEI333 (AKA COPX-
|
||||
ROM_LOAD( "mt28f400b1.u0619", 0x100000, 0x080000, CRC(266acee6) SHA1(2a9da66c313a7536c7fb393134b9df0bb122cb2b) ) /* SMT rom, PCB silkscreened BG3 */
|
||||
/* PCB has an unpopulated socket rom space for a LH535A00D at u0615 for alt BG3 location */
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (NOT encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (NOT encrypted) */
|
||||
ROM_LOAD32_WORD( "musha_obj-1a.u0729", 0x000000, 0x200000, CRC(9b2cf68c) SHA1(cd8cb277091bfa125fd0f68410de39f72f1c7047) ) /* PCB silkscreened OBJ1 */
|
||||
ROM_LOAD32_WORD( "musha_obj-2a.u0730", 0x000002, 0x200000, CRC(fcabee05) SHA1(b2220c0311b3bd2fd44fb56fff7c27bed0816fe9) ) /* PCB silkscreened OBJ2 */
|
||||
/* PCB has unpopulated rom space for two SMT roms at u0734 & u0736 for alt OBJ1 & OBJ2 locations) */
|
||||
|
@ -974,7 +974,7 @@ static ADDRESS_MAP_START( raiden2_mem, AS_PROGRAM, 16, raiden2_state )
|
||||
|
||||
AM_RANGE(0x20000, 0x2ffff) AM_ROMBANK("mainbank1")
|
||||
AM_RANGE(0x30000, 0x3ffff) AM_ROMBANK("mainbank2")
|
||||
AM_RANGE(0x40000, 0xfffff) AM_ROM AM_REGION("mainprg", 0x40000)
|
||||
AM_RANGE(0x40000, 0xfffff) AM_ROM AM_REGION("maincpu", 0x40000)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( raidendx_mem, AS_PROGRAM, 16, raiden2_state )
|
||||
@ -1013,7 +1013,7 @@ static ADDRESS_MAP_START( zeroteam_mem, AS_PROGRAM, 16, raiden2_state )
|
||||
|
||||
AM_RANGE(0x20000, 0x2ffff) AM_ROMBANK("mainbank1")
|
||||
AM_RANGE(0x30000, 0x3ffff) AM_ROMBANK("mainbank2")
|
||||
AM_RANGE(0x40000, 0xfffff) AM_ROM AM_REGION("mainprg", 0x40000)
|
||||
AM_RANGE(0x40000, 0xfffff) AM_ROM AM_REGION("maincpu", 0x40000)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( xsedae_mem, AS_PROGRAM, 16, raiden2_state )
|
||||
@ -1043,7 +1043,7 @@ static ADDRESS_MAP_START( xsedae_mem, AS_PROGRAM, 16, raiden2_state )
|
||||
|
||||
AM_RANGE(0x10000, 0x1ffff) AM_RAM
|
||||
|
||||
AM_RANGE(0x20000, 0xfffff) AM_ROM AM_REGION("mainprg", 0x20000)
|
||||
AM_RANGE(0x20000, 0xfffff) AM_ROM AM_REGION("maincpu", 0x20000)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
@ -1577,7 +1577,7 @@ differences amongst SND/u1110 roms:
|
||||
*/
|
||||
|
||||
ROM_START( raiden2 )
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD16_BYTE("prg0.u0211", 0x000000, 0x80000, CRC(09475ec4) SHA1(05027f2d8f9e11fcbd485659eda68ada286dae32) )
|
||||
ROM_RELOAD(0x100000, 0x80000)
|
||||
ROM_LOAD16_BYTE("prg1.u0212", 0x000001, 0x80000, CRC(4609b5f2) SHA1(272d2aa75b8ea4d133daddf42c4fc9089093df2e) )
|
||||
@ -1598,7 +1598,7 @@ ROM_START( raiden2 )
|
||||
ROM_LOAD( "raiden_2_seibu_bg-1.u0714", 0x000000, 0x200000, CRC(e61ad38e) SHA1(63b06cd38db946ad3fc5c1482dc863ef80b58fec) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD( "raiden_2_seibu_bg-2.u075", 0x200000, 0x200000, CRC(a694a4bb) SHA1(39c2614d0effc899fe58f735604283097769df77) ) /* Soldered MASK ROM */
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-1.u0811", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-2.u082", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-3.u0837", 0x400000, 0x200000, CRC(897a0322) SHA1(abb2737a2446da5b364fc2d96524b43d808f4126) ) /* Soldered MASK ROM */
|
||||
@ -1617,7 +1617,7 @@ ROM_END
|
||||
|
||||
|
||||
ROM_START( raiden2sw ) // original board with serial # 0008307
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD16_BYTE("seibu_1.u0211", 0x000000, 0x80000, CRC(09475ec4) SHA1(05027f2d8f9e11fcbd485659eda68ada286dae32) )
|
||||
ROM_RELOAD(0x100000, 0x80000)
|
||||
ROM_LOAD16_BYTE("seibu_2.u0212", 0x000001, 0x80000, CRC(59abc2ec) SHA1(45f2dbd2dd46f5da07dae0dc486772f8e61f4c43) )
|
||||
@ -1638,7 +1638,7 @@ ROM_START( raiden2sw ) // original board with serial # 0008307
|
||||
ROM_LOAD( "raiden_2_seibu_bg-1.u0714", 0x000000, 0x200000, CRC(e61ad38e) SHA1(63b06cd38db946ad3fc5c1482dc863ef80b58fec) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD( "raiden_2_seibu_bg-2.u075", 0x200000, 0x200000, CRC(a694a4bb) SHA1(39c2614d0effc899fe58f735604283097769df77) ) /* Soldered MASK ROM */
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-1.u0811", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-2.u082", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-3.u0837", 0x400000, 0x200000, CRC(897a0322) SHA1(abb2737a2446da5b364fc2d96524b43d808f4126) ) /* Soldered MASK ROM */
|
||||
@ -1674,7 +1674,7 @@ S5 U0724 27C1024 ROM7 966D
|
||||
*/
|
||||
|
||||
ROM_START( raiden2hk )
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD16_BYTE("prg0.u0211", 0x000000, 0x80000, CRC(09475ec4) SHA1(05027f2d8f9e11fcbd485659eda68ada286dae32) ) // rom1
|
||||
ROM_RELOAD(0x100000, 0x80000)
|
||||
ROM_LOAD16_BYTE("rom2e.u0212", 0x000001, 0x80000, CRC(458d619c) SHA1(842bf0eeb5d192a6b188f4560793db8dad697683) )
|
||||
@ -1695,7 +1695,7 @@ ROM_START( raiden2hk )
|
||||
ROM_LOAD( "raiden_2_seibu_bg-1.u0714", 0x000000, 0x200000, CRC(e61ad38e) SHA1(63b06cd38db946ad3fc5c1482dc863ef80b58fec) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD( "raiden_2_seibu_bg-2.u075", 0x200000, 0x200000, CRC(a694a4bb) SHA1(39c2614d0effc899fe58f735604283097769df77) ) /* Soldered MASK ROM */
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-1.u0811", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-2.u082", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-3.u0837", 0x400000, 0x200000, CRC(897a0322) SHA1(abb2737a2446da5b364fc2d96524b43d808f4126) ) /* Soldered MASK ROM */
|
||||
@ -1748,7 +1748,7 @@ CUSTOM: SEI150
|
||||
*/
|
||||
|
||||
ROM_START( raiden2j )
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD16_BYTE("prg0.u0211", 0x000000, 0x80000, CRC(09475ec4) SHA1(05027f2d8f9e11fcbd485659eda68ada286dae32) ) // rom1
|
||||
ROM_RELOAD(0x100000, 0x80000)
|
||||
ROM_LOAD16_BYTE("rom2j.u0212", 0x000001, 0x80000, CRC(e4e4fb4c) SHA1(7ccf33fe9a1cddf0c7e80d7ed66d615a828b3bb9) )
|
||||
@ -1769,7 +1769,7 @@ ROM_START( raiden2j )
|
||||
ROM_LOAD( "raiden_2_seibu_bg-1.u0714", 0x000000, 0x200000, CRC(e61ad38e) SHA1(63b06cd38db946ad3fc5c1482dc863ef80b58fec) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD( "raiden_2_seibu_bg-2.u075", 0x200000, 0x200000, CRC(a694a4bb) SHA1(39c2614d0effc899fe58f735604283097769df77) ) /* Soldered MASK ROM */
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-1.u0811", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-2.u082", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-3.u0837", 0x400000, 0x200000, CRC(897a0322) SHA1(abb2737a2446da5b364fc2d96524b43d808f4126) ) /* Soldered MASK ROM */
|
||||
@ -1787,7 +1787,7 @@ ROM_START( raiden2j )
|
||||
ROM_END
|
||||
|
||||
ROM_START( raiden2i )
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD16_BYTE("seibu1.u0211", 0x000000, 0x80000, CRC(c1fc70f5) SHA1(a054f5ae9583972c406d9cf871340d5e072d71a3) ) /* Italian set */
|
||||
ROM_RELOAD(0x100000, 0x80000)
|
||||
ROM_LOAD16_BYTE("seibu2.u0212", 0x000001, 0x80000, CRC(28d5365f) SHA1(21efe29c2d373229c2ff302d86e59c2c94fa6d03) )
|
||||
@ -1808,7 +1808,7 @@ ROM_START( raiden2i )
|
||||
ROM_LOAD( "raiden_2_seibu_bg-1.u0714", 0x000000, 0x200000, CRC(e61ad38e) SHA1(63b06cd38db946ad3fc5c1482dc863ef80b58fec) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD( "raiden_2_seibu_bg-2.u075", 0x200000, 0x200000, CRC(a694a4bb) SHA1(39c2614d0effc899fe58f735604283097769df77) ) /* Soldered MASK ROM */
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-1.u0811", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-2.u082", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-3.u0837", 0x400000, 0x200000, CRC(897a0322) SHA1(abb2737a2446da5b364fc2d96524b43d808f4126) ) /* Soldered MASK ROM */
|
||||
@ -1844,7 +1844,7 @@ http://www.gamefaqs.com/coinop/arcade/game/10729.html
|
||||
*/
|
||||
|
||||
ROM_START( raiden2e )
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD16_BYTE("r2_prg_0.u0211", 0x000000, 0x80000, CRC(2abc848c) SHA1(1df4276d0074fcf1267757fa0b525a980a520f3d) )
|
||||
ROM_RELOAD(0x100000, 0x80000)
|
||||
ROM_LOAD16_BYTE("r2_prg_1.u0212", 0x000001, 0x80000, CRC(509ade43) SHA1(7cdee7bb00a6a1c7899d10b96385d54c261f6f5a) )
|
||||
@ -1865,7 +1865,7 @@ ROM_START( raiden2e )
|
||||
ROM_LOAD( "raiden_2_seibu_bg-1.u0714", 0x000000, 0x200000, CRC(e61ad38e) SHA1(63b06cd38db946ad3fc5c1482dc863ef80b58fec) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD( "raiden_2_seibu_bg-2.u075", 0x200000, 0x200000, CRC(a694a4bb) SHA1(39c2614d0effc899fe58f735604283097769df77) ) /* Soldered MASK ROM */
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-1.u0811", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-2.u082", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-3.u0837", 0x400000, 0x200000, CRC(897a0322) SHA1(abb2737a2446da5b364fc2d96524b43d808f4126) ) /* Soldered MASK ROM */
|
||||
@ -1883,7 +1883,7 @@ ROM_START( raiden2e )
|
||||
ROM_END
|
||||
|
||||
ROM_START( raiden2ea )
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD16_BYTE("r2.1.u0211", 0x000000, 0x80000, CRC(d7041be4) SHA1(3cf97132fba6f7b00c9059265f4e9f0bf1505b71) )
|
||||
ROM_RELOAD(0x100000, 0x80000)
|
||||
ROM_LOAD16_BYTE("r2.2.u0212", 0x000001, 0x80000, CRC(bf7577ec) SHA1(98576af78760b8aef1ef3efe1ba963977c89d225) )
|
||||
@ -1904,7 +1904,7 @@ ROM_START( raiden2ea )
|
||||
ROM_LOAD( "raiden_2_seibu_bg-1.u0714", 0x000000, 0x200000, CRC(e61ad38e) SHA1(63b06cd38db946ad3fc5c1482dc863ef80b58fec) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD( "raiden_2_seibu_bg-2.u075", 0x200000, 0x200000, CRC(a694a4bb) SHA1(39c2614d0effc899fe58f735604283097769df77) ) /* Soldered MASK ROM */
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-1.u0811", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-2.u082", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-3.u0837", 0x400000, 0x200000, CRC(897a0322) SHA1(abb2737a2446da5b364fc2d96524b43d808f4126) ) /* Soldered MASK ROM */
|
||||
@ -1922,7 +1922,7 @@ ROM_START( raiden2ea )
|
||||
ROM_END
|
||||
|
||||
ROM_START( raiden2eu ) // same as raiden2ea, different region
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD16_BYTE("seibu_1.u0211", 0x000000, 0x80000, CRC(d7041be4) SHA1(3cf97132fba6f7b00c9059265f4e9f0bf1505b71) )
|
||||
ROM_RELOAD(0x100000, 0x80000)
|
||||
ROM_LOAD16_BYTE("seibu_2.u0212", 0x000001, 0x80000, CRC(beb71ddb) SHA1(471399ead1cdc27ac2a1139f9616f828efd14626) )
|
||||
@ -1943,7 +1943,7 @@ ROM_START( raiden2eu ) // same as raiden2ea, different region
|
||||
ROM_LOAD( "raiden_2_seibu_bg-1.u0714", 0x000000, 0x200000, CRC(e61ad38e) SHA1(63b06cd38db946ad3fc5c1482dc863ef80b58fec) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD( "raiden_2_seibu_bg-2.u075", 0x200000, 0x200000, CRC(a694a4bb) SHA1(39c2614d0effc899fe58f735604283097769df77) ) /* Soldered MASK ROM */
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-1.u0811", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-2.u082", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-3.u0837", 0x400000, 0x200000, CRC(897a0322) SHA1(abb2737a2446da5b364fc2d96524b43d808f4126) ) /* Soldered MASK ROM */
|
||||
@ -1961,7 +1961,7 @@ ROM_START( raiden2eu ) // same as raiden2ea, different region
|
||||
ROM_END
|
||||
|
||||
ROM_START( raiden2eua ) // sort of a mixture of raiden2e easy set with voice rom of raiden2ea and 2f and a unique sound rom
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("seibu__1.27c020j.u1210", 0x000000, 0x40000, CRC(ED1514E3) SHA1(296125BFE3C4F3033F7AA319DD8554BC978C4A00) )
|
||||
ROM_RELOAD(0x100000, 0x40000)
|
||||
ROM_LOAD32_BYTE("seibu__2.27c2001.u1211", 0x000001, 0x40000, CRC(BB6ECF2A) SHA1(D4F628E9D0ED2897654F05A8A2541E1ED3FAF8DD) )
|
||||
@ -1986,7 +1986,7 @@ ROM_START( raiden2eua ) // sort of a mixture of raiden2e easy set with voice rom
|
||||
ROM_LOAD( "raiden_2_seibu_bg-1.u0714", 0x000000, 0x200000, CRC(e61ad38e) SHA1(63b06cd38db946ad3fc5c1482dc863ef80b58fec) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD( "raiden_2_seibu_bg-2.u075", 0x200000, 0x200000, CRC(a694a4bb) SHA1(39c2614d0effc899fe58f735604283097769df77) ) /* Soldered MASK ROM */
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-1.u0811", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-2.u082", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-3.u0837", 0x400000, 0x200000, CRC(897a0322) SHA1(abb2737a2446da5b364fc2d96524b43d808f4126) ) /* Soldered MASK ROM */
|
||||
@ -2005,7 +2005,7 @@ ROM_END
|
||||
|
||||
|
||||
ROM_START( raiden2g ) // this is the same code revision as raiden2eua but a german region
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("raiden_2_1.bin", 0x000000, 0x40000, CRC(ed1514e3) SHA1(296125bfe3c4f3033f7aa319dd8554bc978c4a00) )
|
||||
ROM_RELOAD(0x100000, 0x40000)
|
||||
ROM_LOAD32_BYTE("raiden_2_2.bin", 0x000001, 0x40000, CRC(bb6ecf2a) SHA1(d4f628e9d0ed2897654f05a8a2541e1ed3faf8dd) )
|
||||
@ -2030,7 +2030,7 @@ ROM_START( raiden2g ) // this is the same code revision as raiden2eua but a germ
|
||||
ROM_LOAD( "raiden_2_seibu_bg-1.u0714", 0x000000, 0x200000, CRC(e61ad38e) SHA1(63b06cd38db946ad3fc5c1482dc863ef80b58fec) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD( "raiden_2_seibu_bg-2.u075", 0x200000, 0x200000, CRC(a694a4bb) SHA1(39c2614d0effc899fe58f735604283097769df77) ) /* Soldered MASK ROM */
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-1.u0811", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-2.u082", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-3.u0837", 0x400000, 0x200000, CRC(897a0322) SHA1(abb2737a2446da5b364fc2d96524b43d808f4126) ) /* Soldered MASK ROM */
|
||||
@ -2048,7 +2048,7 @@ ROM_START( raiden2g ) // this is the same code revision as raiden2eua but a germ
|
||||
ROM_END
|
||||
|
||||
ROM_START( raiden2nl )
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD16_BYTE("1_u0211.bin", 0x000000, 0x80000, CRC(53be3dd0) SHA1(304d118423e4085eea3b883bd625d90d21bb2054) )
|
||||
ROM_RELOAD(0x100000, 0x80000)
|
||||
ROM_LOAD16_BYTE("2_u0212.bin", 0x000001, 0x80000, CRC(88829c08) SHA1(ecdfbafeeffcd009bbc4cf5bf797bcd4b5bfcf50) )
|
||||
@ -2069,7 +2069,7 @@ ROM_START( raiden2nl )
|
||||
ROM_LOAD( "raiden_2_seibu_bg-1.u0714", 0x000000, 0x200000, CRC(e61ad38e) SHA1(63b06cd38db946ad3fc5c1482dc863ef80b58fec) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD( "raiden_2_seibu_bg-2.u075", 0x200000, 0x200000, CRC(a694a4bb) SHA1(39c2614d0effc899fe58f735604283097769df77) ) /* Soldered MASK ROM */
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-1.u0811", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-2.u082", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-3.u0837", 0x400000, 0x200000, CRC(897a0322) SHA1(abb2737a2446da5b364fc2d96524b43d808f4126) ) /* Soldered MASK ROM */
|
||||
@ -2088,7 +2088,7 @@ ROM_END
|
||||
|
||||
|
||||
ROM_START( raiden2u )
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD16_BYTE("1.u0211", 0x000000, 0x80000, CRC(b16df955) SHA1(9b7fd85cf2f2c9fea657f3c38abafa93673b3933) )
|
||||
ROM_RELOAD(0x100000, 0x80000)
|
||||
ROM_LOAD16_BYTE("2.u0212", 0x000001, 0x80000, CRC(2a14b112) SHA1(84cd9891b5be0b71b2bae3487ad38bed3045305e) )
|
||||
@ -2109,7 +2109,7 @@ ROM_START( raiden2u )
|
||||
ROM_LOAD( "raiden_2_seibu_bg-1.u0714", 0x000000, 0x200000, CRC(e61ad38e) SHA1(63b06cd38db946ad3fc5c1482dc863ef80b58fec) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD( "raiden_2_seibu_bg-2.u075", 0x200000, 0x200000, CRC(a694a4bb) SHA1(39c2614d0effc899fe58f735604283097769df77) ) /* Soldered MASK ROM */
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-1.u0811", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-2.u082", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Soldered MASK ROM */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-3.u0837", 0x400000, 0x200000, CRC(897a0322) SHA1(abb2737a2446da5b364fc2d96524b43d808f4126) ) /* Soldered MASK ROM */
|
||||
@ -2128,7 +2128,7 @@ ROM_END
|
||||
|
||||
|
||||
ROM_START( raiden2dx ) // this set is very weird, it's Raiden II on a Raiden DX board, I'm assuming for now that it uses Raiden DX graphics, but could be wrong.
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("u1210.bin", 0x000000, 0x80000, CRC(413241e0) SHA1(50fa501db91412baea474a8faf8ad483f3a119c7) )
|
||||
ROM_LOAD32_BYTE("prg1_u1211.bin", 0x000001, 0x80000, CRC(93491f56) SHA1(2239980fb7267906e4c3985703c2dc2932b23705) )
|
||||
ROM_LOAD32_BYTE("u129.bin", 0x000002, 0x80000, CRC(e0932b6c) SHA1(04f1ca885d220e802023042438f63e40e4106696) )
|
||||
@ -2150,7 +2150,7 @@ ROM_START( raiden2dx ) // this set is very weird, it's Raiden II on a Raiden DX
|
||||
ROM_LOAD( "dx_back1.1s", 0x000000, 0x200000, CRC(90970355) SHA1(d71d57cd550a800f583550365102adb7b1b779fc) )
|
||||
ROM_LOAD( "dx_back2.2s", 0x200000, 0x200000, CRC(5799af3e) SHA1(85d6532abd769da77bcba70bd2e77915af40f987) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "obj1", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "obj2", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "dx_obj3.4k", 0x400000, 0x200000, CRC(ba381227) SHA1(dfc4d659aca1722a981fa56a31afabe66f444d5d) )
|
||||
@ -2166,7 +2166,7 @@ ROM_END
|
||||
/* Raiden DX sets */
|
||||
|
||||
ROM_START( raidendx )
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("1d.4n", 0x000000, 0x80000, CRC(14d725fc) SHA1(f12806f64f069fdc4ee29b309a32f7ca00b36f93) )
|
||||
ROM_LOAD32_BYTE("2d.4p", 0x000001, 0x80000, CRC(5e7e45cb) SHA1(94eff893b5335c522f1c063c3175b9bac87b0a25) )
|
||||
ROM_LOAD32_BYTE("3d.6n", 0x000002, 0x80000, CRC(f0a47e67) SHA1(8cbd21993077b2e01295db6e343cae9e0e4bfefe) )
|
||||
@ -2187,7 +2187,7 @@ ROM_START( raidendx )
|
||||
ROM_LOAD( "dx_back1.1s", 0x000000, 0x200000, CRC(90970355) SHA1(d71d57cd550a800f583550365102adb7b1b779fc) )
|
||||
ROM_LOAD( "dx_back2.2s", 0x200000, 0x200000, CRC(5799af3e) SHA1(85d6532abd769da77bcba70bd2e77915af40f987) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "obj1", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "obj2", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "dx_obj3.4k", 0x400000, 0x200000, CRC(ba381227) SHA1(dfc4d659aca1722a981fa56a31afabe66f444d5d) )
|
||||
@ -2201,7 +2201,7 @@ ROM_START( raidendx )
|
||||
ROM_END
|
||||
|
||||
ROM_START( raidendxa1 )
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("dx_1h.4n", 0x000000, 0x80000, BAD_DUMP CRC(7624c36b) SHA1(84c17f2988031210d06536710e1eac558f4290a1) ) // bad
|
||||
ROM_LOAD32_BYTE("dx_2h.4p", 0x000001, 0x80000, CRC(4940fdf3) SHA1(c87e307ed7191802583bee443c7c8e4f4e33db25) )
|
||||
ROM_LOAD32_BYTE("dx_3h.6n", 0x000002, 0x80000, CRC(6c495bcf) SHA1(fb6153ecc443dabc829dda6f8d11234ad48de88a) )
|
||||
@ -2222,7 +2222,7 @@ ROM_START( raidendxa1 )
|
||||
ROM_LOAD( "dx_back1.1s", 0x000000, 0x200000, CRC(90970355) SHA1(d71d57cd550a800f583550365102adb7b1b779fc) )
|
||||
ROM_LOAD( "dx_back2.2s", 0x200000, 0x200000, CRC(5799af3e) SHA1(85d6532abd769da77bcba70bd2e77915af40f987) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "obj1", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "obj2", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "dx_obj3.4k", 0x400000, 0x200000, CRC(ba381227) SHA1(dfc4d659aca1722a981fa56a31afabe66f444d5d) )
|
||||
@ -2236,7 +2236,7 @@ ROM_START( raidendxa1 )
|
||||
ROM_END
|
||||
|
||||
ROM_START( raidendxa2 )
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("1d.bin", 0x000000, 0x80000, CRC(22b155ae) SHA1(388151e2c8fb301bd5bc66a974e9fe16816ae0bc) )
|
||||
ROM_LOAD32_BYTE("2d.bin", 0x000001, 0x80000, CRC(2be98ca8) SHA1(491e990405b0ad3de45bdbcc2453af9215ae19c8) )
|
||||
ROM_LOAD32_BYTE("3d.bin", 0x000002, 0x80000, CRC(b4785576) SHA1(aa5eee7b0c635c6d18a7fc1e037bf570a677dd90) )
|
||||
@ -2257,7 +2257,7 @@ ROM_START( raidendxa2 )
|
||||
ROM_LOAD( "dx_back1.1s", 0x000000, 0x200000, CRC(90970355) SHA1(d71d57cd550a800f583550365102adb7b1b779fc) )
|
||||
ROM_LOAD( "dx_back2.2s", 0x200000, 0x200000, CRC(5799af3e) SHA1(85d6532abd769da77bcba70bd2e77915af40f987) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "obj1", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "obj2", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "dx_obj3.4k", 0x400000, 0x200000, CRC(ba381227) SHA1(dfc4d659aca1722a981fa56a31afabe66f444d5d) )
|
||||
@ -2271,7 +2271,7 @@ ROM_START( raidendxa2 )
|
||||
ROM_END
|
||||
|
||||
ROM_START( raidendxk )
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("rdxj_1.bin", 0x000000, 0x80000, CRC(b5b32885) SHA1(fb3c592b2436d347103c17bd765176062be95fa2) )
|
||||
ROM_LOAD32_BYTE("rdxj_2.bin", 0x000001, 0x80000, CRC(7efd581d) SHA1(4609a0d8afb3d62a38b461089295efed47beea91) )
|
||||
ROM_LOAD32_BYTE("rdxj_3.bin", 0x000002, 0x80000, CRC(55ec0e1d) SHA1(6be7f268df51311a817c1c329a578b38abb659ae) )
|
||||
@ -2292,7 +2292,7 @@ ROM_START( raidendxk )
|
||||
ROM_LOAD( "dx_back1.1s", 0x000000, 0x200000, CRC(90970355) SHA1(d71d57cd550a800f583550365102adb7b1b779fc) )
|
||||
ROM_LOAD( "dx_back2.2s", 0x200000, 0x200000, CRC(5799af3e) SHA1(85d6532abd769da77bcba70bd2e77915af40f987) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "obj1", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "obj2", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "dx_obj3.4k", 0x400000, 0x200000, CRC(ba381227) SHA1(dfc4d659aca1722a981fa56a31afabe66f444d5d) )
|
||||
@ -2306,7 +2306,7 @@ ROM_START( raidendxk )
|
||||
ROM_END
|
||||
|
||||
ROM_START( raidendxu )
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("1a.u1210", 0x000000, 0x80000, CRC(53e63194) SHA1(a957330e14649cf46ad27fb99c460576c59e60b1) )
|
||||
ROM_LOAD32_BYTE("2a.u1211", 0x000001, 0x80000, CRC(ec8d1647) SHA1(5ceae132c6c09d6bb8565e9141ee1170bbdfd5fc) )
|
||||
ROM_LOAD32_BYTE("3a.u129", 0x000002, 0x80000, CRC(7dbfd73d) SHA1(43cb1dbc3ccbded64fc300c262d1fd528e0391a2) )
|
||||
@ -2327,7 +2327,7 @@ ROM_START( raidendxu )
|
||||
ROM_LOAD( "dx_back1.1s", 0x000000, 0x200000, CRC(90970355) SHA1(d71d57cd550a800f583550365102adb7b1b779fc) )
|
||||
ROM_LOAD( "dx_back2.2s", 0x200000, 0x200000, CRC(5799af3e) SHA1(85d6532abd769da77bcba70bd2e77915af40f987) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "obj1", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "obj2", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "dx_obj3.4k", 0x400000, 0x200000, CRC(ba381227) SHA1(dfc4d659aca1722a981fa56a31afabe66f444d5d) )
|
||||
@ -2341,7 +2341,7 @@ ROM_START( raidendxu )
|
||||
ROM_END
|
||||
|
||||
ROM_START( raidendxg )
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("1d.u1210", 0x000000, 0x80000, CRC(14d725fc) SHA1(f12806f64f069fdc4ee29b309a32f7ca00b36f93) )
|
||||
ROM_LOAD32_BYTE("2d.u1211", 0x000001, 0x80000, CRC(5e7e45cb) SHA1(94eff893b5335c522f1c063c3175b9bac87b0a25) )
|
||||
ROM_LOAD32_BYTE("3d.u129", 0x000002, 0x80000, CRC(f0a47e67) SHA1(8cbd21993077b2e01295db6e343cae9e0e4bfefe) )
|
||||
@ -2362,7 +2362,7 @@ ROM_START( raidendxg )
|
||||
ROM_LOAD( "dx_back-1.u075", 0x000000, 0x200000, CRC(90970355) SHA1(d71d57cd550a800f583550365102adb7b1b779fc) )
|
||||
ROM_LOAD( "dx_back-2.u0714", 0x200000, 0x200000, CRC(5799af3e) SHA1(85d6532abd769da77bcba70bd2e77915af40f987) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-1.u0811", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-2.u082", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "dx_obj-3.u0837", 0x400000, 0x200000, CRC(ba381227) SHA1(dfc4d659aca1722a981fa56a31afabe66f444d5d) )
|
||||
@ -2377,7 +2377,7 @@ ROM_END
|
||||
|
||||
|
||||
ROM_START( raidendxnl )
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("u1210_4n.bin", 0x000000, 0x80000, CRC(c589019a) SHA1(9bdd7f7d0bca16d67ba234d8a1fed5d2c8ab7191) )
|
||||
ROM_LOAD32_BYTE("u1211_4p.bin", 0x000001, 0x80000, CRC(b2222254) SHA1(b0e41d88111a96f0c0fb11b20ea99f436e8d493d) )
|
||||
ROM_LOAD32_BYTE("u129_6n.bin", 0x000002, 0x80000, CRC(60f04634) SHA1(50f1b721a017d879838d920cf5d5355aa024e09b) )
|
||||
@ -2398,7 +2398,7 @@ ROM_START( raidendxnl )
|
||||
ROM_LOAD( "dx_back-1.u075", 0x000000, 0x200000, CRC(90970355) SHA1(d71d57cd550a800f583550365102adb7b1b779fc) )
|
||||
ROM_LOAD( "dx_back-2.u0714", 0x200000, 0x200000, CRC(5799af3e) SHA1(85d6532abd769da77bcba70bd2e77915af40f987) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-1.u0811", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-2.u082", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "dx_obj-3.u0837", 0x400000, 0x200000, CRC(ba381227) SHA1(dfc4d659aca1722a981fa56a31afabe66f444d5d) )
|
||||
@ -2413,7 +2413,7 @@ ROM_END
|
||||
|
||||
|
||||
ROM_START( raidendxj )
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("rdxj_1.u1211", 0x000000, 0x80000, CRC(5af382e1) SHA1(a11fc181da322f484815f55a510ce7e6c7df2d60) )
|
||||
ROM_LOAD32_BYTE("rdxj_2.u0212", 0x000001, 0x80000, CRC(899966fc) SHA1(0f91c2b05a44afb4c4b74e115a8fa530fb6d6414) )
|
||||
ROM_LOAD32_BYTE("rdxj_3.u129", 0x000002, 0x80000, CRC(e7f08013) SHA1(1f99672d8fdbda847c6552da210c417b21ca78ac) )
|
||||
@ -2434,7 +2434,7 @@ ROM_START( raidendxj )
|
||||
ROM_LOAD( "dx_back-1.u075", 0x000000, 0x200000, CRC(90970355) SHA1(d71d57cd550a800f583550365102adb7b1b779fc) )
|
||||
ROM_LOAD( "dx_back-2.u0714", 0x200000, 0x200000, CRC(5799af3e) SHA1(85d6532abd769da77bcba70bd2e77915af40f987) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-1.u0811", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "raiden_2_seibu_obj-2.u082", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "dx_obj-3.u0837", 0x400000, 0x200000, CRC(ba381227) SHA1(dfc4d659aca1722a981fa56a31afabe66f444d5d) )
|
||||
@ -2450,7 +2450,7 @@ ROM_END
|
||||
|
||||
|
||||
ROM_START( raidendxch )
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("rdxc_1.u1210", 0x000000, 0x80000, CRC(2154c6ae) SHA1(dc794f8ddbd8a6267db37fe4e3ed44e06e9b84b7) )
|
||||
ROM_LOAD32_BYTE("rdxc_2.u1211", 0x000001, 0x80000, CRC(73bb74b7) SHA1(2f197adbe89d96c9e75054c568c380fdd2e80162))
|
||||
ROM_LOAD32_BYTE("rdxc_3.u129", 0x000002, 0x80000, CRC(50f0a6aa) SHA1(68579f8e73fe06b458368ac9cac0b33370cf3b4e))
|
||||
@ -2472,7 +2472,7 @@ ROM_START( raidendxch )
|
||||
ROM_LOAD( "dx_back1.1s", 0x000000, 0x200000, CRC(90970355) SHA1(d71d57cd550a800f583550365102adb7b1b779fc) )
|
||||
ROM_LOAD( "dx_back2.2s", 0x200000, 0x200000, CRC(5799af3e) SHA1(85d6532abd769da77bcba70bd2e77915af40f987) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
|
||||
ROM_LOAD32_WORD( "obj1", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "obj2", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Shared with original Raiden 2 */
|
||||
ROM_LOAD32_WORD( "dx_obj3.4k", 0x400000, 0x200000, CRC(ba381227) SHA1(dfc4d659aca1722a981fa56a31afabe66f444d5d) )
|
||||
@ -2579,7 +2579,7 @@ Notes:
|
||||
|
||||
|
||||
ROM_START( zeroteam ) // Fabtek, US licensee, displays 'USA' under zero team logo, board had serial 'Seibu Kaihatsu No. 0001468' on it, as well as AAMA 0458657
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("seibu__1.u024.5k", 0x000000, 0x40000, CRC(25aa5ba4) SHA1(40e6047620fbd195c87ac3763569af099096eff9) ) // alternate label "1"
|
||||
ROM_LOAD32_BYTE("seibu__3.u023.6k", 0x000002, 0x40000, CRC(ec79a12b) SHA1(515026a2fca92555284ac49818499af7395783d3) ) // alternate label "3"
|
||||
ROM_LOAD32_BYTE("seibu__2.u025.6l", 0x000001, 0x40000, CRC(54f3d359) SHA1(869744185746d55c60d2f48eabe384a8499e00fd) ) // alternate label "2"
|
||||
@ -2601,7 +2601,7 @@ ROM_START( zeroteam ) // Fabtek, US licensee, displays 'USA' under zero team log
|
||||
ROM_LOAD( "musha_back-1.u075.4s", 0x000000, 0x100000, CRC(8b7f9219) SHA1(3412b6f8a4fe245e521ddcf185a53f2f4520eb57) )
|
||||
ROM_LOAD( "musha_back-2.u0714.2s", 0x100000, 0x080000, CRC(ce61c952) SHA1(52a843c8ba428b121fab933dd3b313b2894d80ac) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", ROMREGION_ERASEFF ) /* sprite gfx (encrypted) (diff encrypt to raiden2? ) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", ROMREGION_ERASEFF ) /* sprite gfx (encrypted) (diff encrypt to raiden2? ) */
|
||||
ROM_LOAD32_WORD( "musha_obj-1.u0811.6f", 0x000000, 0x200000, CRC(45be8029) SHA1(adc164f9dede9a86b96a4d709e9cba7d2ad0e564) )
|
||||
ROM_LOAD32_WORD( "musha_obj-2.u082.5f", 0x000002, 0x200000, CRC(cb61c19d) SHA1(151a2ce9c32f3321a974819e9b165dddc31c8153) )
|
||||
|
||||
@ -2616,7 +2616,7 @@ ROM_START( zeroteam ) // Fabtek, US licensee, displays 'USA' under zero team log
|
||||
ROM_END
|
||||
|
||||
ROM_START( zeroteama ) // No licensee, original japan?
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("1.u024.5k", 0x000000, 0x40000, CRC(bd7b3f3a) SHA1(896413901a429d0efa3290f61920063c81730e9b) )
|
||||
ROM_LOAD32_BYTE("3.u023.6k", 0x000002, 0x40000, CRC(19e02822) SHA1(36c9b887eaa9b9b67d65c55e8f7eefd08fe0be15) )
|
||||
ROM_LOAD32_BYTE("2.u025.6l", 0x000001, 0x40000, CRC(0580b7e8) SHA1(d4416264aa5acdaa781ebcf51f128b3e665cc903) )
|
||||
@ -2638,7 +2638,7 @@ ROM_START( zeroteama ) // No licensee, original japan?
|
||||
ROM_LOAD( "musha_back-1.u075.4s", 0x000000, 0x100000, CRC(8b7f9219) SHA1(3412b6f8a4fe245e521ddcf185a53f2f4520eb57) )
|
||||
ROM_LOAD( "musha_back-2.u0714.2s", 0x100000, 0x080000, CRC(ce61c952) SHA1(52a843c8ba428b121fab933dd3b313b2894d80ac) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", ROMREGION_ERASEFF ) /* sprite gfx (encrypted) (diff encrypt to raiden2? ) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", ROMREGION_ERASEFF ) /* sprite gfx (encrypted) (diff encrypt to raiden2? ) */
|
||||
ROM_LOAD32_WORD( "musha_obj-1.u0811.6f", 0x000000, 0x200000, CRC(45be8029) SHA1(adc164f9dede9a86b96a4d709e9cba7d2ad0e564) )
|
||||
ROM_LOAD32_WORD( "musha_obj-2.u082.5f", 0x000002, 0x200000, CRC(cb61c19d) SHA1(151a2ce9c32f3321a974819e9b165dddc31c8153) )
|
||||
|
||||
@ -2660,7 +2660,7 @@ problem of the 3.6v lithium battery dying and the missing keys to cause the spri
|
||||
// sets, using the sound and char roms from us set and code from later japan set. This would make sense if it was dumped
|
||||
// from a 'fixed, suicide free' modified us board where someone swapped in the later suicideless japan code roms.
|
||||
ROM_START( zeroteamb ) // No licensee, later japan?
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("1b.u024.5k", 0x000000, 0x40000, CRC(157743d0) SHA1(f9c84c9025319f76807ef0e79f1ee1599f915b45) )
|
||||
ROM_LOAD32_BYTE("3b.u023.6k", 0x000002, 0x40000, CRC(fea7e4e8) SHA1(08c4bdff82362ae4bcf86fa56fcfc384bbf82b71) )
|
||||
ROM_LOAD32_BYTE("2b.u025.6l", 0x000001, 0x40000, CRC(21d68f62) SHA1(8aa85b38e8f36057ef6c7dce5a2878958ce93ce8) )
|
||||
@ -2682,7 +2682,7 @@ ROM_START( zeroteamb ) // No licensee, later japan?
|
||||
ROM_LOAD( "musha_back-1.u075.4s", 0x000000, 0x100000, CRC(8b7f9219) SHA1(3412b6f8a4fe245e521ddcf185a53f2f4520eb57) )
|
||||
ROM_LOAD( "musha_back-2.u0714.2s", 0x100000, 0x080000, CRC(ce61c952) SHA1(52a843c8ba428b121fab933dd3b313b2894d80ac) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", ROMREGION_ERASEFF ) /* sprite gfx (encrypted) (diff encrypt to raiden2? ) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", ROMREGION_ERASEFF ) /* sprite gfx (encrypted) (diff encrypt to raiden2? ) */
|
||||
ROM_LOAD32_WORD( "musha_obj-1.u0811.6f", 0x000000, 0x200000, CRC(45be8029) SHA1(adc164f9dede9a86b96a4d709e9cba7d2ad0e564) )
|
||||
ROM_LOAD32_WORD( "musha_obj-2.u082.5f", 0x000002, 0x200000, CRC(cb61c19d) SHA1(151a2ce9c32f3321a974819e9b165dddc31c8153) )
|
||||
|
||||
@ -2697,7 +2697,7 @@ ROM_START( zeroteamb ) // No licensee, later japan?
|
||||
ROM_END
|
||||
|
||||
ROM_START( zeroteamc ) // Liang Hwa, Taiwan licensee, no special word under logo on title
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("b1.u024.5k", 0x000000, 0x40000, CRC(528de3b9) SHA1(9ca8cdc0212f2540e852d20ab4c04f68b967d024) )
|
||||
ROM_LOAD32_BYTE("b3.u023.6k", 0x000002, 0x40000, CRC(3688739a) SHA1(f98f461fb8e7804b3b4020a5e3762d36d6458a62) )
|
||||
ROM_LOAD32_BYTE("b2.u025.6l", 0x000001, 0x40000, CRC(5176015e) SHA1(6b372564b2f1b1f56cae0c98f4ca588b784bfa3d) )
|
||||
@ -2719,7 +2719,7 @@ ROM_START( zeroteamc ) // Liang Hwa, Taiwan licensee, no special word under logo
|
||||
ROM_LOAD( "musha_back-1.u075.4s", 0x000000, 0x100000, CRC(8b7f9219) SHA1(3412b6f8a4fe245e521ddcf185a53f2f4520eb57) )
|
||||
ROM_LOAD( "musha_back-2.u0714.2s", 0x100000, 0x080000, CRC(ce61c952) SHA1(52a843c8ba428b121fab933dd3b313b2894d80ac) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", ROMREGION_ERASEFF ) /* sprite gfx (encrypted) (diff encrypt to raiden2? ) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", ROMREGION_ERASEFF ) /* sprite gfx (encrypted) (diff encrypt to raiden2? ) */
|
||||
ROM_LOAD32_WORD( "musha_obj-1.u0811.6f", 0x000000, 0x200000, CRC(45be8029) SHA1(adc164f9dede9a86b96a4d709e9cba7d2ad0e564) )
|
||||
ROM_LOAD32_WORD( "musha_obj-2.u082.5f", 0x000002, 0x200000, CRC(cb61c19d) SHA1(151a2ce9c32f3321a974819e9b165dddc31c8153) )
|
||||
|
||||
@ -2735,7 +2735,7 @@ ROM_END
|
||||
|
||||
ROM_START( zeroteamd ) // Dream Soft, Korea licensee, no special word under logo on title; board had serial 'no 1041' on it.
|
||||
// this is weird, on other zt sets the rom order is 1 3 2 4, but this one is 1 3 4 2. blame seibu or whoever marked the roms, which were labeled in pen
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("1.d.u024.5k", 0x000000, 0x40000, CRC(6CC279BE) SHA1(63143BA3105D24D133E60FFDB3EDC2CEB2D5DC5B) )
|
||||
ROM_LOAD32_BYTE("3.d.u023.6k", 0x000002, 0x40000, CRC(0212400D) SHA1(28F77B5FDDB9D724B735C3FF2255BD518B166E67) )
|
||||
ROM_LOAD32_BYTE("4.d.u025.6l", 0x000001, 0x40000, CRC(08813EBB) SHA1(454779CEC2FD0E71B72F7161E7D9334893EE42DE) )
|
||||
@ -2757,7 +2757,7 @@ ROM_START( zeroteamd ) // Dream Soft, Korea licensee, no special word under logo
|
||||
ROM_LOAD( "musha_back-1.u075.4s", 0x000000, 0x100000, CRC(8b7f9219) SHA1(3412b6f8a4fe245e521ddcf185a53f2f4520eb57) )
|
||||
ROM_LOAD( "musha_back-2.u0714.2s", 0x100000, 0x080000, CRC(ce61c952) SHA1(52a843c8ba428b121fab933dd3b313b2894d80ac) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", ROMREGION_ERASEFF ) /* sprite gfx (encrypted) (diff encrypt to raiden2? ) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", ROMREGION_ERASEFF ) /* sprite gfx (encrypted) (diff encrypt to raiden2? ) */
|
||||
ROM_LOAD32_WORD( "musha_obj-1.u0811.6f", 0x000000, 0x200000, CRC(45be8029) SHA1(adc164f9dede9a86b96a4d709e9cba7d2ad0e564) )
|
||||
ROM_LOAD32_WORD( "musha_obj-2.u082.5f", 0x000002, 0x200000, CRC(cb61c19d) SHA1(151a2ce9c32f3321a974819e9b165dddc31c8153) )
|
||||
|
||||
@ -2773,7 +2773,7 @@ ROM_END
|
||||
// A version of the above exists (which dr.kitty used to own) which DOES have 'Korea' under the logo on title, needs dumping
|
||||
|
||||
ROM_START( zeroteams ) // No license, displays 'Selection' under logo
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("1_sel.bin", 0x000000, 0x40000, CRC(d99d6273) SHA1(21dccd5d71c720b8364406835812b3c9defaff6c) )
|
||||
ROM_LOAD32_BYTE("3_sel.bin", 0x000002, 0x40000, CRC(0a9fe0b1) SHA1(3588fe19788f77d07e9b5ab8182b94362ffd0024) )
|
||||
ROM_LOAD32_BYTE("2_sel.bin", 0x000001, 0x40000, CRC(4e114e74) SHA1(fcccbb68c6b7ffe8d109ed3a1ec9120d338398f9) )
|
||||
@ -2795,7 +2795,7 @@ ROM_START( zeroteams ) // No license, displays 'Selection' under logo
|
||||
ROM_LOAD( "musha_back-1.u075.4s", 0x000000, 0x100000, CRC(8b7f9219) SHA1(3412b6f8a4fe245e521ddcf185a53f2f4520eb57) )
|
||||
ROM_LOAD( "musha_back-2.u0714.2s", 0x100000, 0x080000, CRC(ce61c952) SHA1(52a843c8ba428b121fab933dd3b313b2894d80ac) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", ROMREGION_ERASEFF ) /* sprite gfx (encrypted) (diff encrypt to raiden2? ) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", ROMREGION_ERASEFF ) /* sprite gfx (encrypted) (diff encrypt to raiden2? ) */
|
||||
ROM_LOAD32_WORD( "musha_obj-1.u0811.6f", 0x000000, 0x200000, CRC(45be8029) SHA1(adc164f9dede9a86b96a4d709e9cba7d2ad0e564) )
|
||||
ROM_LOAD32_WORD( "musha_obj-2.u082.5f", 0x000002, 0x200000, CRC(cb61c19d) SHA1(151a2ce9c32f3321a974819e9b165dddc31c8153) )
|
||||
|
||||
@ -2822,7 +2822,7 @@ Next, turn off power and reinsert the old code roms, and the pcb should now have
|
||||
*/
|
||||
|
||||
ROM_START( zeroteamsr )
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("zteam1.u24", 0x000000, 0x40000, CRC(c531e009) SHA1(731881fca3dc0a8269ecdd295ba7119d93c892e7) )
|
||||
ROM_LOAD32_BYTE("zteam3.u23", 0x000002, 0x40000, CRC(1f988808) SHA1(b1fcb8c96e57c4942bc032d42408d7289c6a3681) )
|
||||
ROM_LOAD32_BYTE("zteam2.u25", 0x000001, 0x40000, CRC(b7234b93) SHA1(35bc093e8ad4bce1d2130a392ed1b9487a5642a1) )
|
||||
@ -2844,7 +2844,7 @@ ROM_START( zeroteamsr )
|
||||
ROM_LOAD( "musha_back-1.u075.4s", 0x000000, 0x100000, CRC(8b7f9219) SHA1(3412b6f8a4fe245e521ddcf185a53f2f4520eb57) )
|
||||
ROM_LOAD( "musha_back-2.u0714.2s", 0x100000, 0x080000, CRC(ce61c952) SHA1(52a843c8ba428b121fab933dd3b313b2894d80ac) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", ROMREGION_ERASEFF ) /* sprite gfx (encrypted) (diff encrypt to raiden2? ) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", ROMREGION_ERASEFF ) /* sprite gfx (encrypted) (diff encrypt to raiden2? ) */
|
||||
ROM_LOAD32_WORD( "musha_obj-1.u0811.6f", 0x000000, 0x200000, CRC(45be8029) SHA1(adc164f9dede9a86b96a4d709e9cba7d2ad0e564) )
|
||||
ROM_LOAD32_WORD( "musha_obj-2.u082.5f", 0x000002, 0x200000, CRC(cb61c19d) SHA1(151a2ce9c32f3321a974819e9b165dddc31c8153) )
|
||||
|
||||
@ -2897,7 +2897,7 @@ Notes:
|
||||
*/
|
||||
|
||||
ROM_START( xsedae )
|
||||
ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
|
||||
ROM_REGION( 0x200000, "maincpu", 0 ) /* v30 main cpu */
|
||||
ROM_LOAD32_BYTE("1.u024", 0x000000, 0x40000, CRC(185437f9) SHA1(e46950b6a549d11dc57105dd7d9cb512a8ecbe70) )
|
||||
ROM_LOAD32_BYTE("2.u025", 0x000001, 0x40000, CRC(a2b052df) SHA1(e8bf9ab3d5d4e601ea9386e1f2d4e017b025407e) )
|
||||
ROM_LOAD32_BYTE("3.u023", 0x000002, 0x40000, CRC(293fd6c1) SHA1(8b1a231f4bedbf9c0f347330e13fdf092b9888b4) )
|
||||
@ -2920,7 +2920,7 @@ ROM_START( xsedae )
|
||||
ROM_LOAD( "bg-1.u075", 0x000000, 0x100000, CRC(ac087560) SHA1(b6473b20c55ec090961cfc46a024b3c5b707ec25) )
|
||||
ROM_LOAD( "7.u0714", 0x100000, 0x080000, CRC(296105dc) SHA1(c2b80d681646f504b03c2dde13e37b1d820f82d2) )
|
||||
|
||||
ROM_REGION( 0x800000, "gfx3", ROMREGION_ERASEFF ) /* sprite gfx (not encrypted) */
|
||||
ROM_REGION32_LE( 0x800000, "gfx3", ROMREGION_ERASEFF ) /* sprite gfx (not encrypted) */
|
||||
ROM_LOAD32_WORD( "obj-1.u0811", 0x000000, 0x200000, CRC(6ae993eb) SHA1(d9713c79eacb4b3ce5e82dd3ce39003e3a433d8f) )
|
||||
ROM_LOAD32_WORD( "obj-2.u082", 0x000002, 0x200000, CRC(26c806ee) SHA1(899a76a1b3f933c6f5cb6b5dcdf5b58e1b7e49c6) )
|
||||
|
||||
@ -2991,8 +2991,8 @@ DRIVER_INIT_MEMBER(raiden2_state,raiden2)
|
||||
init_blending(raiden_blended_colors);
|
||||
static const int spri[5] = { 0, 1, 2, 3, -1 };
|
||||
cur_spri = spri;
|
||||
membank("mainbank1")->configure_entries(0, 4, memregion("mainprg")->base(), 0x10000);
|
||||
membank("mainbank2")->configure_entries(0, 4, memregion("mainprg")->base(), 0x10000);
|
||||
membank("mainbank1")->configure_entries(0, 4, memregion("maincpu")->base(), 0x10000);
|
||||
membank("mainbank2")->configure_entries(0, 4, memregion("maincpu")->base(), 0x10000);
|
||||
raiden2_decrypt_sprites(machine());
|
||||
}
|
||||
|
||||
@ -3001,8 +3001,8 @@ DRIVER_INIT_MEMBER(raiden2_state,raidendx)
|
||||
init_blending(raiden_blended_colors);
|
||||
static const int spri[5] = { 0, 1, 2, 3, -1 };
|
||||
cur_spri = spri;
|
||||
membank("mainbank1")->configure_entries(0, 0x20, memregion("mainprg")->base(), 0x10000);
|
||||
membank("mainbank2")->configure_entries(0, 0x20, memregion("mainprg")->base(), 0x10000);
|
||||
membank("mainbank1")->configure_entries(0, 0x20, memregion("maincpu")->base(), 0x10000);
|
||||
membank("mainbank2")->configure_entries(0, 0x20, memregion("maincpu")->base(), 0x10000);
|
||||
raiden2_decrypt_sprites(machine());
|
||||
}
|
||||
|
||||
@ -3037,8 +3037,8 @@ DRIVER_INIT_MEMBER(raiden2_state,zeroteam)
|
||||
init_blending(zeroteam_blended_colors);
|
||||
static const int spri[5] = { -1, 0, 1, 2, 3 };
|
||||
cur_spri = spri;
|
||||
membank("mainbank1")->configure_entries(0, 4, memregion("mainprg")->base(), 0x10000);
|
||||
membank("mainbank2")->configure_entries(0, 4, memregion("mainprg")->base(), 0x10000);
|
||||
membank("mainbank1")->configure_entries(0, 4, memregion("maincpu")->base(), 0x10000);
|
||||
membank("mainbank2")->configure_entries(0, 4, memregion("maincpu")->base(), 0x10000);
|
||||
zeroteam_decrypt_sprites(machine());
|
||||
}
|
||||
|
||||
|
@ -45,8 +45,8 @@
|
||||
|
||||
How to play...
|
||||
|
||||
This Roulette allow up to 6 players. To start the machine, turn the Operator Key
|
||||
(the the Operator Key light will turn green). Whilest this key is turned ON, you
|
||||
This Roulette allows up to 6 players. To start the machine, turn the Operator Key
|
||||
(the Operator Key light will turn green). Whilst this key is turned ON, you
|
||||
can insert credits, play, and payout. Once the key is turned OFF (red light), you
|
||||
can play, but credits can't be entered/taken.
|
||||
|
||||
|
@ -50,10 +50,10 @@ MACHINE_RESET_MEMBER(relief_state,relief)
|
||||
{
|
||||
atarigen_state::machine_reset();
|
||||
|
||||
m_oki->set_bank_base(0);
|
||||
m_adpcm_bank = 0;
|
||||
m_okibank->set_entry(m_adpcm_bank);
|
||||
m_ym2413_volume = 15;
|
||||
m_overall_volume = 127;
|
||||
m_adpcm_bank_base = 0;
|
||||
}
|
||||
|
||||
|
||||
@ -85,12 +85,12 @@ WRITE16_MEMBER(relief_state::audio_control_w)
|
||||
{
|
||||
m_ym2413_volume = (data >> 1) & 15;
|
||||
set_ym2413_volume((m_ym2413_volume * m_overall_volume * 100) / (127 * 15));
|
||||
m_adpcm_bank_base = (0x040000 * ((data >> 6) & 3)) | (m_adpcm_bank_base & 0x100000);
|
||||
m_adpcm_bank = ((data >> 6) & 3) | (m_adpcm_bank & 4);
|
||||
}
|
||||
if (ACCESSING_BITS_8_15)
|
||||
m_adpcm_bank_base = (0x100000 * ((data >> 8) & 1)) | (m_adpcm_bank_base & 0x0c0000);
|
||||
m_adpcm_bank = (((data >> 8) & 1)<<2) | (m_adpcm_bank & 3);
|
||||
|
||||
m_oki->set_bank_base(m_adpcm_bank_base);
|
||||
m_okibank->set_entry(m_adpcm_bank);
|
||||
}
|
||||
|
||||
|
||||
@ -104,6 +104,10 @@ WRITE16_MEMBER(relief_state::audio_volume_w)
|
||||
}
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( oki_map, AS_0, 8, relief_state )
|
||||
AM_RANGE(0x00000, 0x1ffff) AM_ROMBANK("okibank")
|
||||
AM_RANGE(0x20000, 0x3ffff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
/*************************************
|
||||
@ -295,6 +299,7 @@ static MACHINE_CONFIG_START( relief, relief_state )
|
||||
|
||||
MCFG_OKIM6295_ADD("oki", ATARI_CLOCK_14MHz/4/3, OKIM6295_PIN7_LOW)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
|
||||
MCFG_DEVICE_ADDRESS_MAP(AS_0, oki_map)
|
||||
|
||||
MCFG_SOUND_ADD("ymsnd", YM2413, ATARI_CLOCK_14MHz/4)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
|
||||
@ -324,9 +329,9 @@ ROM_START( relief )
|
||||
ROM_LOAD( "136093-0028a.10d", 0x180000, 0x80000, CRC(55fb9111) SHA1(a95508f0831842fa79ca2fc168cfadc8c6d3fbd4) )
|
||||
ROM_LOAD16_BYTE( "136093-0029a.4d", 0x200001, 0x40000, CRC(e4593ff4) SHA1(7360ec7a65aabc90aa787dc30f39992e342495dd) )
|
||||
|
||||
ROM_REGION( 0x200000, "oki", 0 ) /* 2MB for ADPCM data */
|
||||
ROM_LOAD( "136093-0030a.9b", 0x100000, 0x80000, CRC(f4c567f5) SHA1(7e8c1d54d918b0b41625eacbaf6dcb5bd99d1949) )
|
||||
ROM_LOAD( "136093-0031a.10b", 0x180000, 0x80000, CRC(ba908d73) SHA1(a83afd86f4c39394cf624b728a87b8d8b6de1944) )
|
||||
ROM_REGION( 0x100000, "oki", 0 ) /* 2MB for ADPCM data */
|
||||
ROM_LOAD( "136093-0030a.9b", 0x000000, 0x80000, CRC(f4c567f5) SHA1(7e8c1d54d918b0b41625eacbaf6dcb5bd99d1949) )
|
||||
ROM_LOAD( "136093-0031a.10b", 0x080000, 0x80000, CRC(ba908d73) SHA1(a83afd86f4c39394cf624b728a87b8d8b6de1944) )
|
||||
|
||||
ROM_REGION( 0x800, "eeprom:eeprom", 0 )
|
||||
ROM_LOAD( "relief-eeprom.bin", 0x0000, 0x800, CRC(66069f60) SHA1(fac3797888f7ffe972f642aca44c6ca7d208c814) )
|
||||
@ -359,9 +364,9 @@ ROM_START( relief2 )
|
||||
ROM_LOAD( "136093-0028a.10d", 0x180000, 0x80000, CRC(55fb9111) SHA1(a95508f0831842fa79ca2fc168cfadc8c6d3fbd4) )
|
||||
ROM_LOAD16_BYTE( "136093-0029.4d", 0x200001, 0x40000, CRC(e4593ff4) SHA1(7360ec7a65aabc90aa787dc30f39992e342495dd) )
|
||||
|
||||
ROM_REGION( 0x200000, "oki", 0 ) /* 2MB for ADPCM data */
|
||||
ROM_LOAD( "136093-0030a.9b", 0x100000, 0x80000, CRC(f4c567f5) SHA1(7e8c1d54d918b0b41625eacbaf6dcb5bd99d1949) )
|
||||
ROM_LOAD( "136093-0031a.10b", 0x180000, 0x80000, CRC(ba908d73) SHA1(a83afd86f4c39394cf624b728a87b8d8b6de1944) )
|
||||
ROM_REGION( 0x100000, "oki", 0 ) /* 2MB for ADPCM data */
|
||||
ROM_LOAD( "136093-0030a.9b", 0x000000, 0x80000, CRC(f4c567f5) SHA1(7e8c1d54d918b0b41625eacbaf6dcb5bd99d1949) )
|
||||
ROM_LOAD( "136093-0031a.10b", 0x080000, 0x80000, CRC(ba908d73) SHA1(a83afd86f4c39394cf624b728a87b8d8b6de1944) )
|
||||
|
||||
ROM_REGION( 0x800, "eeprom:eeprom", 0 )
|
||||
ROM_LOAD( "relief2-eeprom.bin", 0x0000, 0x800, CRC(2131fc40) SHA1(72a9f5f6647fbc74e645b6639db2fdbfbe6456e2) )
|
||||
@ -393,9 +398,9 @@ ROM_START( relief3 )
|
||||
ROM_LOAD( "136093-0028a.10d", 0x180000, 0x80000, CRC(55fb9111) SHA1(a95508f0831842fa79ca2fc168cfadc8c6d3fbd4) )
|
||||
ROM_LOAD16_BYTE( "136093-0029.4d", 0x200001, 0x40000, CRC(e4593ff4) SHA1(7360ec7a65aabc90aa787dc30f39992e342495dd) )
|
||||
|
||||
ROM_REGION( 0x200000, "oki", 0 ) /* 2MB for ADPCM data */
|
||||
ROM_LOAD( "136093-0030a.9b", 0x100000, 0x80000, CRC(f4c567f5) SHA1(7e8c1d54d918b0b41625eacbaf6dcb5bd99d1949) )
|
||||
ROM_LOAD( "136093-0031a.10b", 0x180000, 0x80000, CRC(ba908d73) SHA1(a83afd86f4c39394cf624b728a87b8d8b6de1944) )
|
||||
ROM_REGION( 0x100000, "oki", 0 ) /* 2MB for ADPCM data */
|
||||
ROM_LOAD( "136093-0030a.9b", 0x000000, 0x80000, CRC(f4c567f5) SHA1(7e8c1d54d918b0b41625eacbaf6dcb5bd99d1949) )
|
||||
ROM_LOAD( "136093-0031a.10b", 0x080000, 0x80000, CRC(ba908d73) SHA1(a83afd86f4c39394cf624b728a87b8d8b6de1944) )
|
||||
|
||||
ROM_REGION( 0x800, "eeprom:eeprom", 0 )
|
||||
ROM_LOAD( "relief3-eeprom.bin", 0x0000, 0x800, CRC(2131fc40) SHA1(72a9f5f6647fbc74e645b6639db2fdbfbe6456e2) )
|
||||
@ -421,29 +426,12 @@ ROM_END
|
||||
|
||||
DRIVER_INIT_MEMBER(relief_state,relief)
|
||||
{
|
||||
UINT8 *sound_base = memregion("oki")->base();
|
||||
|
||||
/* expand the ADPCM data to avoid lots of memcpy's during gameplay */
|
||||
/* the upper 128k is fixed, the lower 128k is bankswitched */
|
||||
memcpy(&sound_base[0x000000], &sound_base[0x100000], 0x20000);
|
||||
memcpy(&sound_base[0x040000], &sound_base[0x100000], 0x20000);
|
||||
memcpy(&sound_base[0x080000], &sound_base[0x140000], 0x20000);
|
||||
memcpy(&sound_base[0x0c0000], &sound_base[0x160000], 0x20000);
|
||||
memcpy(&sound_base[0x100000], &sound_base[0x180000], 0x20000);
|
||||
memcpy(&sound_base[0x140000], &sound_base[0x1a0000], 0x20000);
|
||||
memcpy(&sound_base[0x180000], &sound_base[0x1c0000], 0x20000);
|
||||
memcpy(&sound_base[0x1c0000], &sound_base[0x1e0000], 0x20000);
|
||||
|
||||
memcpy(&sound_base[0x020000], &sound_base[0x120000], 0x20000);
|
||||
memcpy(&sound_base[0x060000], &sound_base[0x120000], 0x20000);
|
||||
memcpy(&sound_base[0x0a0000], &sound_base[0x120000], 0x20000);
|
||||
memcpy(&sound_base[0x0e0000], &sound_base[0x120000], 0x20000);
|
||||
memcpy(&sound_base[0x160000], &sound_base[0x120000], 0x20000);
|
||||
memcpy(&sound_base[0x1a0000], &sound_base[0x120000], 0x20000);
|
||||
memcpy(&sound_base[0x1e0000], &sound_base[0x120000], 0x20000);
|
||||
m_okibank->configure_entries(0, 8, memregion("oki")->base(), 0x20000);
|
||||
m_okibank->set_entry(0);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
|
@ -108,101 +108,62 @@ $8000 - $ffff ROM
|
||||
#include "includes/renegade.h"
|
||||
|
||||
|
||||
/********************************************************************************************/
|
||||
/**************************************************************************/
|
||||
/* ADPCM sound
|
||||
**
|
||||
** Inferred from the 6809 code and analogy with ddragon
|
||||
** NMI at end of sample is not needed in order for
|
||||
** playback to work, but seems to be what the code expects
|
||||
*/
|
||||
|
||||
const device_type RENEGADE_ADPCM = &device_creator<renegade_adpcm_device>;
|
||||
|
||||
renegade_adpcm_device::renegade_adpcm_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: device_t(mconfig, RENEGADE_ADPCM, "Renegade ADPCM Custom", tag, owner, clock, "renegade_adpcm", __FILE__),
|
||||
device_sound_interface(mconfig, *this),
|
||||
m_stream(NULL),
|
||||
m_current(0),
|
||||
m_end(0),
|
||||
m_nibble(0),
|
||||
m_playing(0),
|
||||
m_base(NULL)
|
||||
WRITE8_MEMBER(renegade_state::adpcm_start_w)
|
||||
{
|
||||
m_msm->reset_w(0);
|
||||
m_adpcm_playing = true;
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_config_complete - perform any
|
||||
// operations now that the configuration is
|
||||
// complete
|
||||
//-------------------------------------------------
|
||||
|
||||
void renegade_adpcm_device::device_config_complete()
|
||||
WRITE8_MEMBER(renegade_state::adpcm_addr_w)
|
||||
{
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_start - device-specific startup
|
||||
//-------------------------------------------------
|
||||
|
||||
void renegade_adpcm_device::device_start()
|
||||
{
|
||||
m_playing = 0;
|
||||
m_stream = machine().sound().stream_alloc(*this, 0, 1, clock());
|
||||
m_base = machine().root_device().memregion("adpcm")->base();
|
||||
m_adpcm.reset();
|
||||
|
||||
save_item(NAME(m_current));
|
||||
save_item(NAME(m_end));
|
||||
save_item(NAME(m_nibble));
|
||||
save_item(NAME(m_playing));
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// sound_stream_update - handle a stream update
|
||||
//-------------------------------------------------
|
||||
|
||||
void renegade_adpcm_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples)
|
||||
{
|
||||
stream_sample_t *dest = outputs[0];
|
||||
|
||||
while (m_playing && samples > 0)
|
||||
// table at $CB52 in audiocpu program:
|
||||
// 38 38 39 3A 3B 34 35 36 37 2C 2D 2E 2F
|
||||
//
|
||||
// bits 2-4 are active-low chip select; bit 5 is always set
|
||||
// (chip select for an unpopulated fourth ROM?)
|
||||
switch (data & 0x1c)
|
||||
{
|
||||
int val = (m_base[m_current] >> m_nibble) & 15;
|
||||
|
||||
m_nibble ^= 4;
|
||||
if (m_nibble == 4)
|
||||
{
|
||||
m_current++;
|
||||
if (m_current >= m_end)
|
||||
m_playing = 0;
|
||||
}
|
||||
|
||||
*dest++ = m_adpcm.clock(val) << 4;
|
||||
samples--;
|
||||
}
|
||||
while (samples > 0)
|
||||
{
|
||||
*dest++ = 0;
|
||||
samples--;
|
||||
case 0x18: m_adpcm_pos = 0 * 0x8000 * 2; break; // 110 -> ic33
|
||||
case 0x14: m_adpcm_pos = 1 * 0x8000 * 2; break; // 101 -> ic32
|
||||
case 0x0c: m_adpcm_pos = 2 * 0x8000 * 2; break; // 011 -> ic31
|
||||
default: m_adpcm_pos = m_adpcm_end = 0; return; // doesn't happen
|
||||
}
|
||||
// bits 0-1 are a13-a14
|
||||
m_adpcm_pos |= (data & 0x03) * 0x2000 * 2;
|
||||
// a0-a12 are driven by a binary counter; playback ends when it rolls over
|
||||
m_adpcm_end = m_adpcm_pos + 0x2000 * 2;
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(renegade_adpcm_device::play_w)
|
||||
WRITE8_MEMBER(renegade_state::adpcm_stop_w)
|
||||
{
|
||||
int offs = (data - 0x2c) * 0x2000;
|
||||
int len = 0x2000 * 2;
|
||||
m_msm->reset_w(1);
|
||||
m_adpcm_playing = false;
|
||||
}
|
||||
|
||||
/* kludge to avoid reading past end of ROM */
|
||||
if (offs + len > 0x20000)
|
||||
len = 0x1000;
|
||||
WRITE_LINE_MEMBER(renegade_state::adpcm_int)
|
||||
{
|
||||
if (!m_adpcm_playing) return;
|
||||
|
||||
if (offs >= 0 && offs+len <= 0x20000)
|
||||
if (m_adpcm_pos >= m_adpcm_end)
|
||||
{
|
||||
m_stream->update();
|
||||
m_adpcm.reset();
|
||||
|
||||
m_current = offs;
|
||||
m_end = offs + len/2;
|
||||
m_nibble = 4;
|
||||
m_playing = 1;
|
||||
m_msm->reset_w(1);
|
||||
m_adpcm_playing = false;
|
||||
m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
|
||||
}
|
||||
else
|
||||
logerror("out of range adpcm command: 0x%02x\n", data);
|
||||
{
|
||||
UINT8 const data = m_adpcmrom[m_adpcm_pos / 2];
|
||||
m_msm->data_w(m_adpcm_pos & 1 ? data & 0xf : data >> 4);
|
||||
m_adpcm_pos++;
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(renegade_state::sound_w)
|
||||
@ -211,7 +172,7 @@ WRITE8_MEMBER(renegade_state::sound_w)
|
||||
m_audiocpu->set_input_line(M6809_IRQ_LINE, HOLD_LINE);
|
||||
}
|
||||
|
||||
/********************************************************************************************/
|
||||
/**************************************************************************/
|
||||
/* MCU Simulation
|
||||
**
|
||||
** Renegade and Nekketsu Kouha Kunio Kun MCU behaviors are identical,
|
||||
@ -230,21 +191,17 @@ static const UINT8 kuniokun_xor_table[0x2a] =
|
||||
0x68, 0x60
|
||||
};
|
||||
|
||||
void renegade_state::setbank()
|
||||
{
|
||||
UINT8 *RAM = memregion("maincpu")->base();
|
||||
membank("bank1")->set_base(&RAM[m_bank ? 0x10000 : 0x4000]);
|
||||
}
|
||||
|
||||
void renegade_state::machine_start()
|
||||
{
|
||||
m_rombank->configure_entries(0, 2, memregion("maincpu")->base(), 0x4000);
|
||||
|
||||
save_item(NAME(m_adpcm_pos));
|
||||
save_item(NAME(m_adpcm_end));
|
||||
save_item(NAME(m_adpcm_playing));
|
||||
save_item(NAME(m_mcu_buffer));
|
||||
save_item(NAME(m_mcu_input_size));
|
||||
save_item(NAME(m_mcu_output_byte));
|
||||
save_item(NAME(m_mcu_key));
|
||||
|
||||
save_item(NAME(m_bank));
|
||||
machine().save().register_postload(save_prepost_delegate(FUNC(renegade_state::setbank), this));
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(renegade_state,renegade)
|
||||
@ -605,11 +562,7 @@ CUSTOM_INPUT_MEMBER(renegade_state::mcu_status_r)
|
||||
|
||||
WRITE8_MEMBER(renegade_state::bankswitch_w)
|
||||
{
|
||||
if ((data & 1) != m_bank)
|
||||
{
|
||||
m_bank = data & 1;
|
||||
setbank();
|
||||
}
|
||||
m_rombank->set_entry(data & 1);
|
||||
}
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(renegade_state::renegade_interrupt)
|
||||
@ -632,30 +585,30 @@ WRITE8_MEMBER(renegade_state::renegade_coin_counter_w)
|
||||
|
||||
static ADDRESS_MAP_START( renegade_map, AS_PROGRAM, 8, renegade_state )
|
||||
AM_RANGE(0x0000, 0x17ff) AM_RAM
|
||||
AM_RANGE(0x1800, 0x1fff) AM_RAM_WRITE(renegade_videoram2_w) AM_SHARE("videoram2")
|
||||
AM_RANGE(0x1800, 0x1fff) AM_RAM_WRITE(fg_videoram_w) AM_SHARE("fg_videoram")
|
||||
AM_RANGE(0x2000, 0x27ff) AM_RAM AM_SHARE("spriteram")
|
||||
AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(renegade_videoram_w) AM_SHARE("videoram")
|
||||
AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(bg_videoram_w) AM_SHARE("bg_videoram")
|
||||
AM_RANGE(0x3000, 0x30ff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
|
||||
AM_RANGE(0x3100, 0x31ff) AM_RAM_DEVWRITE("palette", palette_device, write_ext) AM_SHARE("palette_ext")
|
||||
AM_RANGE(0x3800, 0x3800) AM_READ_PORT("IN0") AM_WRITE(renegade_scroll0_w) /* Player#1 controls, P1,P2 start */
|
||||
AM_RANGE(0x3801, 0x3801) AM_READ_PORT("IN1") AM_WRITE(renegade_scroll1_w) /* Player#2 controls, coin triggers */
|
||||
AM_RANGE(0x3800, 0x3800) AM_READ_PORT("IN0") AM_WRITE(scroll_lsb_w) /* Player#1 controls, P1,P2 start */
|
||||
AM_RANGE(0x3801, 0x3801) AM_READ_PORT("IN1") AM_WRITE(scroll_msb_w) /* Player#2 controls, coin triggers */
|
||||
AM_RANGE(0x3802, 0x3802) AM_READ_PORT("DSW2") AM_WRITE(sound_w) /* DIP2 various IO ports */
|
||||
AM_RANGE(0x3803, 0x3803) AM_READ_PORT("DSW1") AM_WRITE(renegade_flipscreen_w) /* DIP1 */
|
||||
AM_RANGE(0x3804, 0x3804) AM_READWRITE(mcu_r, mcu_w)
|
||||
AM_RANGE(0x3805, 0x3805) AM_READWRITE(mcu_reset_r, bankswitch_w)
|
||||
AM_RANGE(0x3806, 0x3806) AM_WRITENOP // ?? watchdog
|
||||
AM_RANGE(0x3807, 0x3807) AM_WRITE(renegade_coin_counter_w)
|
||||
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
|
||||
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("rombank")
|
||||
AM_RANGE(0x8000, 0xffff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( renegade_sound_map, AS_PROGRAM, 8, renegade_state )
|
||||
AM_RANGE(0x0000, 0x0fff) AM_RAM
|
||||
AM_RANGE(0x1000, 0x1000) AM_READ(soundlatch_byte_r)
|
||||
AM_RANGE(0x1800, 0x1800) AM_WRITENOP // this gets written the same values as 0x2000
|
||||
AM_RANGE(0x2000, 0x2000) AM_DEVWRITE("adpcm", renegade_adpcm_device, play_w)
|
||||
AM_RANGE(0x1800, 0x1800) AM_WRITE(adpcm_start_w)
|
||||
AM_RANGE(0x2000, 0x2000) AM_WRITE(adpcm_addr_w)
|
||||
AM_RANGE(0x2800, 0x2801) AM_DEVREADWRITE("ymsnd", ym3526_device, read, write)
|
||||
AM_RANGE(0x3000, 0x3000) AM_WRITENOP /* adpcm related? stereo pan? */
|
||||
AM_RANGE(0x3000, 0x3000) AM_WRITE(adpcm_stop_w)
|
||||
AM_RANGE(0x8000, 0xffff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -866,8 +819,9 @@ GFXDECODE_END
|
||||
|
||||
void renegade_state::machine_reset()
|
||||
{
|
||||
m_bank = 0;
|
||||
setbank();
|
||||
m_rombank->set_entry(0);
|
||||
m_msm->reset_w(1);
|
||||
m_adpcm_playing = 0;
|
||||
}
|
||||
|
||||
|
||||
@ -905,7 +859,9 @@ static MACHINE_CONFIG_START( renegade, renegade_state )
|
||||
MCFG_YM3526_IRQ_HANDLER(DEVWRITELINE("audiocpu", m6809_device, firq_line))
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
|
||||
|
||||
MCFG_SOUND_ADD("adpcm", RENEGADE_ADPCM, 8000)
|
||||
MCFG_SOUND_ADD("msm", MSM5205, 12000000/32)
|
||||
MCFG_MSM5205_VCLK_CB(WRITELINE(renegade_state, adpcm_int))
|
||||
MCFG_MSM5205_PRESCALER_SELECTOR(MSM5205_S48_4B) /* 8kHz */
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
@ -916,10 +872,9 @@ MACHINE_CONFIG_END
|
||||
|
||||
|
||||
ROM_START( renegade )
|
||||
ROM_REGION( 0x14000, "maincpu", 0 ) /* 64k for code + bank switched ROM */
|
||||
ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for code + bank switched ROM */
|
||||
ROM_LOAD( "na-5.ic52", 0x00000, 0x8000, CRC(de7e7df4) SHA1(7d26ac29e0b5858d9a0c0cdc86c864e464145260) )
|
||||
ROM_LOAD( "nb-5.ic51", 0x08000, 0x8000, CRC(ba683ddf) SHA1(7516fac1c4fd14cbf43481e94c0c26c662c4cd28) )
|
||||
ROM_LOAD( "na-5.ic52", 0x04000, 0x4000, CRC(de7e7df4) SHA1(7d26ac29e0b5858d9a0c0cdc86c864e464145260) )
|
||||
ROM_CONTINUE( 0x10000, 0x4000 )
|
||||
|
||||
ROM_REGION( 0x10000, "audiocpu", 0 )
|
||||
ROM_LOAD( "n0-5.ic13", 0x8000, 0x8000, CRC(3587de3b) SHA1(f82e758254b21eb0c5a02469c72adb86d9577065) )
|
||||
@ -952,17 +907,16 @@ ROM_START( renegade )
|
||||
ROM_LOAD( "ng-5.bin", 0x50000, 0x8000, CRC(a8ee3720) SHA1(df3d40015b16fa7a9bf05f0ed5741c22f7f152c7) )
|
||||
ROM_LOAD( "nm-5.bin", 0x58000, 0x8000, CRC(c100258e) SHA1(0e2124e642b9742a9a0045f460974025048bc2dd) )
|
||||
|
||||
ROM_REGION( 0x20000, "adpcm", 0 )
|
||||
ROM_LOAD( "n5-5.ic31", 0x00000, 0x8000, CRC(7ee43a3c) SHA1(36b14b886096177cdd0bd0c99cbcfcc362b2bc30) )
|
||||
ROM_LOAD( "n4-5.ic32", 0x10000, 0x8000, CRC(6557564c) SHA1(b3142be9d48eacb43786079a7ae012010f6afabb) )
|
||||
ROM_LOAD( "n3-5.ic33", 0x18000, 0x8000, CRC(78fd6190) SHA1(995df0e88f5c34946e0634b50bda8c1cc621afaa) )
|
||||
ROM_REGION( 0x18000, "adpcm", 0 )
|
||||
ROM_LOAD( "n3-5.ic33", 0x00000, 0x8000, CRC(78fd6190) SHA1(995df0e88f5c34946e0634b50bda8c1cc621afaa) )
|
||||
ROM_LOAD( "n4-5.ic32", 0x08000, 0x8000, CRC(6557564c) SHA1(b3142be9d48eacb43786079a7ae012010f6afabb) )
|
||||
ROM_LOAD( "n5-5.ic31", 0x10000, 0x8000, CRC(7ee43a3c) SHA1(36b14b886096177cdd0bd0c99cbcfcc362b2bc30) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( kuniokun )
|
||||
ROM_REGION( 0x14000, "maincpu", 0 ) /* 64k for code + bank switched ROM */
|
||||
ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for code + bank switched ROM */
|
||||
ROM_LOAD( "ta18-11.bin", 0x00000, 0x8000, CRC(f240f5cd) SHA1(ed6875e8ad2988e88389d4f63ff448d0823c195f) )
|
||||
ROM_LOAD( "nb-01.bin", 0x08000, 0x8000, CRC(93fcfdf5) SHA1(51cdb9377544ae17895e427f21d150ce195ab8e7) ) // original
|
||||
ROM_LOAD( "ta18-11.bin", 0x04000, 0x4000, CRC(f240f5cd) SHA1(ed6875e8ad2988e88389d4f63ff448d0823c195f) )
|
||||
ROM_CONTINUE( 0x10000, 0x4000 )
|
||||
|
||||
ROM_REGION( 0x10000, "audiocpu", 0 )
|
||||
ROM_LOAD( "n0-5.bin", 0x8000, 0x8000, CRC(3587de3b) SHA1(f82e758254b21eb0c5a02469c72adb86d9577065) )
|
||||
@ -995,17 +949,16 @@ ROM_START( kuniokun )
|
||||
ROM_LOAD( "ta18-21.bin", 0x50000, 0x8000, CRC(c95e009b) SHA1(d45a247d4ebf8587a2cd30c83444cc7bd17a3534) )
|
||||
ROM_LOAD( "ta18-15.bin", 0x58000, 0x8000, CRC(a5d61d01) SHA1(9bf1f0b8296667db31ff1c34e28c8eda3ce9f7c3) )
|
||||
|
||||
ROM_REGION( 0x20000, "adpcm", 0 )
|
||||
ROM_LOAD( "ta18-07.bin", 0x00000, 0x8000, CRC(02e3f3ed) SHA1(ab09b3af2c4ab9a36eb1273bcc7c788350048554) )
|
||||
ROM_LOAD( "ta18-08.bin", 0x10000, 0x8000, CRC(c9312613) SHA1(fbbdf7c56c34cbee42984e41fcf2a21da2b87a31) )
|
||||
ROM_LOAD( "ta18-09.bin", 0x18000, 0x8000, CRC(07ed4705) SHA1(6fd4b78ca846fa602504f06f3105b2da03bcd00c) )
|
||||
ROM_REGION( 0x18000, "adpcm", 0 )
|
||||
ROM_LOAD( "ta18-09.bin", 0x00000, 0x8000, CRC(07ed4705) SHA1(6fd4b78ca846fa602504f06f3105b2da03bcd00c) )
|
||||
ROM_LOAD( "ta18-08.bin", 0x08000, 0x8000, CRC(c9312613) SHA1(fbbdf7c56c34cbee42984e41fcf2a21da2b87a31) )
|
||||
ROM_LOAD( "ta18-07.bin", 0x10000, 0x8000, CRC(02e3f3ed) SHA1(ab09b3af2c4ab9a36eb1273bcc7c788350048554) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( kuniokunb )
|
||||
ROM_REGION( 0x14000, "maincpu", 0 ) /* 64k for code + bank switched ROM */
|
||||
ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for code + bank switched ROM */
|
||||
ROM_LOAD( "ta18-11.bin", 0x00000, 0x8000, CRC(f240f5cd) SHA1(ed6875e8ad2988e88389d4f63ff448d0823c195f) )
|
||||
ROM_LOAD( "ta18-10.bin", 0x08000, 0x8000, CRC(a90cf44a) SHA1(6d63d9c29da7b8c5bc391e074b6b8fe6ae3892ae) ) // bootleg
|
||||
ROM_LOAD( "ta18-11.bin", 0x04000, 0x4000, CRC(f240f5cd) SHA1(ed6875e8ad2988e88389d4f63ff448d0823c195f) )
|
||||
ROM_CONTINUE( 0x10000, 0x4000 )
|
||||
|
||||
ROM_REGION( 0x10000, "audiocpu", 0 )
|
||||
ROM_LOAD( "n0-5.bin", 0x8000, 0x8000, CRC(3587de3b) SHA1(f82e758254b21eb0c5a02469c72adb86d9577065) )
|
||||
@ -1035,10 +988,10 @@ ROM_START( kuniokunb )
|
||||
ROM_LOAD( "ta18-21.bin", 0x50000, 0x8000, CRC(c95e009b) SHA1(d45a247d4ebf8587a2cd30c83444cc7bd17a3534) )
|
||||
ROM_LOAD( "ta18-15.bin", 0x58000, 0x8000, CRC(a5d61d01) SHA1(9bf1f0b8296667db31ff1c34e28c8eda3ce9f7c3) )
|
||||
|
||||
ROM_REGION( 0x20000, "adpcm", 0 ) /* adpcm */
|
||||
ROM_LOAD( "ta18-07.bin", 0x00000, 0x8000, CRC(02e3f3ed) SHA1(ab09b3af2c4ab9a36eb1273bcc7c788350048554) )
|
||||
ROM_LOAD( "ta18-08.bin", 0x10000, 0x8000, CRC(c9312613) SHA1(fbbdf7c56c34cbee42984e41fcf2a21da2b87a31) )
|
||||
ROM_LOAD( "ta18-09.bin", 0x18000, 0x8000, CRC(07ed4705) SHA1(6fd4b78ca846fa602504f06f3105b2da03bcd00c) )
|
||||
ROM_REGION( 0x18000, "adpcm", 0 ) /* adpcm */
|
||||
ROM_LOAD( "ta18-09.bin", 0x00000, 0x8000, CRC(07ed4705) SHA1(6fd4b78ca846fa602504f06f3105b2da03bcd00c) )
|
||||
ROM_LOAD( "ta18-08.bin", 0x08000, 0x8000, CRC(c9312613) SHA1(fbbdf7c56c34cbee42984e41fcf2a21da2b87a31) )
|
||||
ROM_LOAD( "ta18-07.bin", 0x10000, 0x8000, CRC(02e3f3ed) SHA1(ab09b3af2c4ab9a36eb1273bcc7c788350048554) )
|
||||
ROM_END
|
||||
|
||||
|
||||
|
@ -383,15 +383,44 @@ MACHINE_CONFIG_END
|
||||
*
|
||||
*************************************/
|
||||
|
||||
|
||||
ROM_START( starwars )
|
||||
ROM_REGION( 0x12000, "maincpu", 0 ) /* 2 64k ROM spaces */
|
||||
ROM_LOAD( "136021.105", 0x3000, 0x1000, CRC(538e7d2f) SHA1(032c933fd94a6b0b294beee29159a24494ae969b) ) /* 3000-3fff is 4k vector rom */
|
||||
ROM_LOAD( "136021.214.1f", 0x6000, 0x2000, CRC(04f1876e) SHA1(c1d3637cb31ece0890c25f6122d6bcd27e6ffe0c) ) /* ROM 0 bank pages 0 and 1 */
|
||||
ROM_CONTINUE( 0x10000, 0x2000 )
|
||||
ROM_LOAD( "136021.102.1hj", 0x8000, 0x2000, CRC(f725e344) SHA1(f8943b67f2ea032ab9538084756ba86f892be5ca) ) /* 8k ROM 1 bank */
|
||||
ROM_LOAD( "136021.203.1jk", 0xa000, 0x2000, CRC(f6da0a00) SHA1(dd53b643be856787bbc4da63e5eb132f98f623c3) ) /* 8k ROM 2 bank */
|
||||
ROM_LOAD( "136021.104.1kl", 0xc000, 0x2000, CRC(7e406703) SHA1(981b505d6e06d7149f8bcb3e81e4d0c790f2fc86) ) /* 8k ROM 3 bank */
|
||||
ROM_LOAD( "136021.206.1m", 0xe000, 0x2000, CRC(c7e51237) SHA1(4960f4446271316e3f730eeb2531dbc702947395) ) /* 8k ROM 4 bank */
|
||||
|
||||
/* Sound ROMS */
|
||||
ROM_REGION( 0x10000, "audiocpu", 0 )
|
||||
ROM_LOAD( "136021.107", 0x4000, 0x2000, CRC(dbf3aea2) SHA1(c38661b2b846fe93487eef09ca3cda19c44f08a0) ) /* Sound ROM 0 */
|
||||
ROM_RELOAD( 0xc000, 0x2000 )
|
||||
ROM_LOAD( "136021.208", 0x6000, 0x2000, CRC(e38070a8) SHA1(c858ae1702efdd48615453ab46e488848891d139) ) /* Sound ROM 0 */
|
||||
ROM_RELOAD( 0xe000, 0x2000 )
|
||||
|
||||
ROM_REGION( 0x100, "user1", 0)
|
||||
ROM_LOAD( "136021-105.1l", 0x0000, 0x0100, CRC(82fc3eb2) SHA1(184231c7baef598294860a7d2b8a23798c5c7da6) ) /* AVG PROM */
|
||||
|
||||
/* Mathbox PROMs */
|
||||
ROM_REGION( 0x1000, "user2", 0 )
|
||||
ROM_LOAD( "136021.110", 0x0000, 0x0400, CRC(810e040e) SHA1(d247cbb0afb4538d5161f8ce9eab337cdb3f2da4) ) /* PROM 0 */
|
||||
ROM_LOAD( "136021.111", 0x0400, 0x0400, CRC(ae69881c) SHA1(f3420c6e15602956fd94982a5d8d4ddd015ed977) ) /* PROM 1 */
|
||||
ROM_LOAD( "136021.112", 0x0800, 0x0400, CRC(ecf22628) SHA1(4dcf5153221feca329b8e8d199bd4fc00b151d9c) ) /* PROM 2 */
|
||||
ROM_LOAD( "136021.113", 0x0c00, 0x0400, CRC(83febfde) SHA1(e13541b09d1724204fdb171528e9a1c83c799c1c) ) /* PROM 3 */
|
||||
ROM_END
|
||||
|
||||
ROM_START( starwars1 )
|
||||
ROM_REGION( 0x12000, "maincpu", 0 ) /* 2 64k ROM spaces */
|
||||
ROM_LOAD( "136021.105", 0x3000, 0x1000, CRC(538e7d2f) SHA1(032c933fd94a6b0b294beee29159a24494ae969b) ) /* 3000-3fff is 4k vector rom */
|
||||
ROM_LOAD( "136021.114", 0x6000, 0x2000, CRC(e75ff867) SHA1(3a40de920c31ffa3c3e67f3edf653b79fcc5ddd7) ) /* ROM 0 bank pages 0 and 1 */
|
||||
ROM_CONTINUE( 0x10000, 0x2000 )
|
||||
ROM_LOAD( "136021.102", 0x8000, 0x2000, CRC(f725e344) SHA1(f8943b67f2ea032ab9538084756ba86f892be5ca) ) /* 8k ROM 1 bank */
|
||||
ROM_LOAD( "136021.203", 0xa000, 0x2000, CRC(f6da0a00) SHA1(dd53b643be856787bbc4da63e5eb132f98f623c3) ) /* 8k ROM 2 bank */
|
||||
ROM_LOAD( "136021.104", 0xc000, 0x2000, CRC(7e406703) SHA1(981b505d6e06d7149f8bcb3e81e4d0c790f2fc86) ) /* 8k ROM 3 bank */
|
||||
ROM_LOAD( "136021.206", 0xe000, 0x2000, CRC(c7e51237) SHA1(4960f4446271316e3f730eeb2531dbc702947395) ) /* 8k ROM 4 bank */
|
||||
ROM_LOAD( "136021.114.1f", 0x6000, 0x2000, CRC(e75ff867) SHA1(3a40de920c31ffa3c3e67f3edf653b79fcc5ddd7) ) /* ROM 0 bank pages 0 and 1 */
|
||||
ROM_CONTINUE( 0x10000, 0x2000 )
|
||||
ROM_LOAD( "136021.102.1hj", 0x8000, 0x2000, CRC(f725e344) SHA1(f8943b67f2ea032ab9538084756ba86f892be5ca) ) /* 8k ROM 1 bank */
|
||||
ROM_LOAD( "136021.203.1jk", 0xa000, 0x2000, CRC(f6da0a00) SHA1(dd53b643be856787bbc4da63e5eb132f98f623c3) ) /* 8k ROM 2 bank */
|
||||
ROM_LOAD( "136021.104.1kl", 0xc000, 0x2000, CRC(7e406703) SHA1(981b505d6e06d7149f8bcb3e81e4d0c790f2fc86) ) /* 8k ROM 3 bank */
|
||||
ROM_LOAD( "136021.206.1m", 0xe000, 0x2000, CRC(c7e51237) SHA1(4960f4446271316e3f730eeb2531dbc702947395) ) /* 8k ROM 4 bank */
|
||||
|
||||
/* Sound ROMS */
|
||||
ROM_REGION( 0x10000, "audiocpu", 0 )
|
||||
@ -411,16 +440,15 @@ ROM_START( starwars1 )
|
||||
ROM_LOAD( "136021.113", 0x0c00, 0x0400, CRC(83febfde) SHA1(e13541b09d1724204fdb171528e9a1c83c799c1c) ) /* PROM 3 */
|
||||
ROM_END
|
||||
|
||||
|
||||
ROM_START( starwars )
|
||||
ROM_START( starwarso )
|
||||
ROM_REGION( 0x12000, "maincpu", 0 ) /* 2 64k ROM spaces */
|
||||
ROM_LOAD( "136021.105", 0x3000, 0x1000, CRC(538e7d2f) SHA1(032c933fd94a6b0b294beee29159a24494ae969b) ) /* 3000-3fff is 4k vector rom */
|
||||
ROM_LOAD( "136021.214", 0x6000, 0x2000, CRC(04f1876e) SHA1(c1d3637cb31ece0890c25f6122d6bcd27e6ffe0c) ) /* ROM 0 bank pages 0 and 1 */
|
||||
ROM_LOAD( "136021-114.1f", 0x6000, 0x2000, CRC(e75ff867) SHA1(3a40de920c31ffa3c3e67f3edf653b79fcc5ddd7) ) /* ROM 0 bank pages 0 and 1 */
|
||||
ROM_CONTINUE( 0x10000, 0x2000 )
|
||||
ROM_LOAD( "136021.102", 0x8000, 0x2000, CRC(f725e344) SHA1(f8943b67f2ea032ab9538084756ba86f892be5ca) ) /* 8k ROM 1 bank */
|
||||
ROM_LOAD( "136021.203", 0xa000, 0x2000, CRC(f6da0a00) SHA1(dd53b643be856787bbc4da63e5eb132f98f623c3) ) /* 8k ROM 2 bank */
|
||||
ROM_LOAD( "136021.104", 0xc000, 0x2000, CRC(7e406703) SHA1(981b505d6e06d7149f8bcb3e81e4d0c790f2fc86) ) /* 8k ROM 3 bank */
|
||||
ROM_LOAD( "136021.206", 0xe000, 0x2000, CRC(c7e51237) SHA1(4960f4446271316e3f730eeb2531dbc702947395) ) /* 8k ROM 4 bank */
|
||||
ROM_LOAD( "136021-102.1hj", 0x8000, 0x2000, CRC(f725e344) SHA1(f8943b67f2ea032ab9538084756ba86f892be5ca) ) /* 8k ROM 1 bank */
|
||||
ROM_LOAD( "136021-103.1jk", 0xa000, 0x2000, CRC(3fde9ccb) SHA1(8d88fc7a28ac8f189f8aba08598732ac8c5491aa) ) /* 8k ROM 2 bank */
|
||||
ROM_LOAD( "136021-104.1kl", 0xc000, 0x2000, CRC(7e406703) SHA1(981b505d6e06d7149f8bcb3e81e4d0c790f2fc86) ) /* 8k ROM 3 bank */
|
||||
ROM_LOAD( "136021-206.1m", 0xe000, 0x2000, CRC(c7e51237) SHA1(4960f4446271316e3f730eeb2531dbc702947395) ) /* 8k ROM 4 bank */
|
||||
|
||||
/* Sound ROMS */
|
||||
ROM_REGION( 0x10000, "audiocpu", 0 )
|
||||
@ -440,6 +468,8 @@ ROM_START( starwars )
|
||||
ROM_LOAD( "136021.113", 0x0c00, 0x0400, CRC(83febfde) SHA1(e13541b09d1724204fdb171528e9a1c83c799c1c) ) /* PROM 3 */
|
||||
ROM_END
|
||||
|
||||
|
||||
|
||||
ROM_START( tomcatsw )
|
||||
ROM_REGION( 0x12000, "maincpu", 0 )
|
||||
ROM_LOAD( "tcavg3.1l", 0x3000, 0x1000, CRC(27188aa9) SHA1(5d9a978a7ac1913b57586e81045a1b955db27b48) )
|
||||
@ -564,7 +594,11 @@ DRIVER_INIT_MEMBER(starwars_state,esb)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
GAME( 1983, starwars, 0, starwars, starwars, starwars_state, starwars, ROT0, "Atari", "Star Wars (rev 2)", 0 )
|
||||
GAME( 1983, starwars1,starwars, starwars, starwars, starwars_state, starwars, ROT0, "Atari", "Star Wars (rev 1)", 0 )
|
||||
GAME( 1983, starwars, 0, starwars, starwars, starwars_state, starwars, ROT0, "Atari", "Star Wars (set 1)", 0 ) // newest
|
||||
GAME( 1983, starwars1,starwars, starwars, starwars, starwars_state, starwars, ROT0, "Atari", "Star Wars (set 2)", 0 )
|
||||
GAME( 1983, starwarso,starwars, starwars, starwars, starwars_state, starwars, ROT0, "Atari", "Star Wars (set 3)", 0 ) // oldest
|
||||
// is there an even older starwars set with 136021-106.1m ?
|
||||
|
||||
GAME( 1983, tomcatsw, tomcat, starwars, starwars, starwars_state, starwars, ROT0, "Atari", "TomCat (Star Wars hardware, prototype)", GAME_NO_SOUND )
|
||||
|
||||
GAME( 1985, esb, 0, starwars, esb, starwars_state, esb, ROT0, "Atari Games", "The Empire Strikes Back", 0 )
|
||||
|
@ -24,6 +24,7 @@ All clock timing comes from crystal 1
|
||||
#include "cpu/m68000/m68000.h"
|
||||
#include "sound/okim6295.h"
|
||||
#include "video/bufsprite.h"
|
||||
#include "video/tigeroad_spr.h"
|
||||
|
||||
class supduck_state : public driver_device
|
||||
{
|
||||
@ -36,9 +37,9 @@ public:
|
||||
m_text_videoram(*this, "textvideoram"),
|
||||
m_fore_videoram(*this, "forevideoram"),
|
||||
m_back_videoram(*this, "backvideoram"),
|
||||
m_paletteram(*this, "paletteram"),
|
||||
m_gfxdecode(*this, "gfxdecode"),
|
||||
m_palette(*this, "palette")
|
||||
m_palette(*this, "palette"),
|
||||
m_spritegen(*this, "spritegen")
|
||||
{ }
|
||||
|
||||
// devices
|
||||
@ -50,10 +51,10 @@ public:
|
||||
required_shared_ptr<UINT16> m_text_videoram;
|
||||
required_shared_ptr<UINT16> m_fore_videoram;
|
||||
required_shared_ptr<UINT16> m_back_videoram;
|
||||
required_shared_ptr<UINT16> m_paletteram;
|
||||
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
required_device<palette_device> m_palette;
|
||||
required_device<tigeroad_spr_device> m_spritegen;
|
||||
|
||||
tilemap_t *m_text_tilemap;
|
||||
tilemap_t *m_fore_tilemap;
|
||||
@ -68,7 +69,6 @@ public:
|
||||
|
||||
DECLARE_WRITE16_MEMBER(supduck_4000_w);
|
||||
DECLARE_WRITE16_MEMBER(supduck_4002_w);
|
||||
DECLARE_WRITE16_MEMBER(supduck_paletteram_w);
|
||||
|
||||
TILEMAP_MAPPER_MEMBER(supduk_tilemap_scan);
|
||||
|
||||
@ -82,7 +82,6 @@ protected:
|
||||
|
||||
virtual void video_start();
|
||||
|
||||
void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int priority);
|
||||
TILE_GET_INFO_MEMBER(get_text_tile_info);
|
||||
TILE_GET_INFO_MEMBER(get_fore_tile_info);
|
||||
TILE_GET_INFO_MEMBER(get_back_tile_info);
|
||||
@ -127,9 +126,7 @@ UINT32 supduck_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap,
|
||||
m_back_tilemap->draw(screen, bitmap, cliprect, 0, 0);
|
||||
m_fore_tilemap->draw(screen, bitmap, cliprect, 0, 0);
|
||||
|
||||
|
||||
draw_sprites(bitmap, cliprect, 0);
|
||||
draw_sprites(bitmap, cliprect, 1); //draw priority sprites?
|
||||
m_spritegen->draw_sprites(bitmap, cliprect, m_gfxdecode, 3, m_spriteram->buffer(), m_spriteram->bytes(), flip_screen(), 1 );
|
||||
|
||||
m_text_tilemap->draw(screen, bitmap, cliprect, 0, 0);
|
||||
return 0;
|
||||
@ -200,67 +197,11 @@ TILE_GET_INFO_MEMBER(supduck_state::get_back_tile_info)
|
||||
}
|
||||
|
||||
|
||||
void supduck_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int priority )
|
||||
{
|
||||
UINT16 *source = &m_spriteram->buffer()[m_spriteram->bytes()/2] - 4;
|
||||
UINT16 *finish = m_spriteram->buffer();
|
||||
|
||||
while (source >= finish)
|
||||
{
|
||||
int tile_number = source[0];
|
||||
|
||||
if (tile_number != 0xfff) {
|
||||
int attr = source[1];
|
||||
int sy = source[2] & 0x1ff;
|
||||
int sx = source[3] & 0x1ff;
|
||||
|
||||
int flipx = attr & 0x02;
|
||||
int flipy = attr & 0x01;
|
||||
int color = (attr >> 2) & 0x0f;
|
||||
|
||||
if (sx > 0x100) sx -= 0x200;
|
||||
if (sy > 0x100) sy -= 0x200;
|
||||
|
||||
if (flip_screen())
|
||||
{
|
||||
sx = 240 - sx;
|
||||
sy = 240 - sy;
|
||||
flipx = !flipx;
|
||||
flipy = !flipy;
|
||||
}
|
||||
|
||||
|
||||
m_gfxdecode->gfx(3)->transpen(bitmap,cliprect,
|
||||
tile_number,
|
||||
color,
|
||||
flipx, flipy,
|
||||
sx, 240 - sy, 15);
|
||||
}
|
||||
|
||||
source -= 4;
|
||||
}
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(supduck_state::supduck_4000_w)
|
||||
{
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(supduck_state::supduck_paletteram_w)
|
||||
{
|
||||
int r, g, b;
|
||||
data = COMBINE_DATA(&m_paletteram[offset]);
|
||||
|
||||
r = ((data >> 8) & 0x0f);
|
||||
if (data & 0x4000) r |= 0x10;
|
||||
|
||||
g = ((data >> 4 ) & 0x0f);
|
||||
if (data & 0x2000) g |= 0x10;
|
||||
|
||||
b = ((data >> 0 ) & 0x0f);
|
||||
if (data & 0x1000) b |= 0x10;
|
||||
|
||||
m_palette->set_pen_color (offset, rgb_t(r<<3, g<<3, b<<3));
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(supduck_state::supduck_4002_w)
|
||||
{
|
||||
@ -308,7 +249,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, supduck_state )
|
||||
AM_RANGE(0xfec000, 0xfecfff) AM_RAM_WRITE(text_videoram_w) AM_SHARE("textvideoram")
|
||||
AM_RANGE(0xff0000, 0xff3fff) AM_RAM_WRITE(back_videoram_w) AM_SHARE("backvideoram")
|
||||
AM_RANGE(0xff4000, 0xff7fff) AM_RAM_WRITE(fore_videoram_w) AM_SHARE("forevideoram")
|
||||
AM_RANGE(0xff8000, 0xff87ff) AM_RAM_WRITE(supduck_paletteram_w) AM_SHARE("paletteram") // AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
|
||||
AM_RANGE(0xff8000, 0xff87ff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
|
||||
AM_RANGE(0xffc000, 0xffffff) AM_RAM /* working RAM */
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -509,8 +450,10 @@ static MACHINE_CONFIG_START( supduck, supduck_state )
|
||||
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", supduck)
|
||||
|
||||
MCFG_DEVICE_ADD("spritegen", TIGEROAD_SPRITE, 0)
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 0x800/2)
|
||||
// MCFG_PALETTE_FORMAT(xRGBRRRRGGGGBBBB) // can't use this, the RGB bits are the lowest bits with this format, for this game they're the highest bits
|
||||
MCFG_PALETTE_FORMAT(xRGBRRRRGGGGBBBB_bit4)
|
||||
|
||||
/* sound hardware */
|
||||
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||
|
@ -35,7 +35,7 @@
|
||||
- Tetris
|
||||
- E-Swat
|
||||
|
||||
These appear to be a variation no the encrypted / protected bootlegs, but without the encryption
|
||||
These appear to be a variation on the encrypted / protected bootlegs, but without the encryption
|
||||
or protection
|
||||
|
||||
- Golden Axe (set 2)
|
||||
@ -566,7 +566,7 @@ WRITE16_MEMBER(segas1x_bootleg_state::s16bl_bgscrollx_w)
|
||||
int scroll = data & 0x1ff;
|
||||
|
||||
scroll+= 0x200;
|
||||
scroll+= 1; // so that the background fo the select screen is properly aligned
|
||||
scroll+= 1; // so that the background of the select screen is properly aligned
|
||||
m_bg_scrollx = -scroll;
|
||||
}
|
||||
|
||||
|
@ -87,9 +87,7 @@ WRITE8_MEMBER(thedeep_state::thedeep_protection_w)
|
||||
m_rombank = new_rombank;
|
||||
rom = memregion("maincpu")->base();
|
||||
membank("bank1")->set_base(rom + 0x10000 + m_rombank * 0x4000);
|
||||
/* there's code which falls through from the fixed ROM to bank #1, I have to */
|
||||
/* copy it there otherwise the CPU bank switching support will not catch it. */
|
||||
memcpy(rom + 0x08000, rom + 0x10000 + m_rombank * 0x4000, 0x4000);
|
||||
|
||||
}
|
||||
break;
|
||||
|
||||
@ -197,9 +195,6 @@ void thedeep_state::thedeep_maincpu_bankswitch(UINT8 bank_trig)
|
||||
m_rombank = new_rombank;
|
||||
rom = memregion("maincpu")->base();
|
||||
membank("bank1")->set_base(rom + 0x10000 + m_rombank * 0x4000);
|
||||
/* there's code which falls through from the fixed ROM to bank #1, I have to */
|
||||
/* copy it there otherwise the CPU bank switching support will not catch it. */
|
||||
memcpy(rom + 0x08000, rom + 0x10000 + m_rombank * 0x4000, 0x4000);
|
||||
|
||||
}
|
||||
|
||||
|
@ -619,6 +619,8 @@ static MACHINE_CONFIG_START( tigeroad, tigeroad_state )
|
||||
MCFG_SCREEN_PALETTE("palette")
|
||||
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", tigeroad)
|
||||
|
||||
MCFG_DEVICE_ADD("spritegen", TIGEROAD_SPRITE, 0)
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 1024)
|
||||
MCFG_PALETTE_FORMAT(xxxxRRRRGGGGBBBB)
|
||||
@ -680,6 +682,8 @@ static MACHINE_CONFIG_START( f1dream_comad, tigeroad_state )
|
||||
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", tigeroad)
|
||||
|
||||
MCFG_DEVICE_ADD("spritegen", TIGEROAD_SPRITE, 0)
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 1024)
|
||||
MCFG_PALETTE_FORMAT(xxxxRRRRGGGGBBBB)
|
||||
|
||||
|
@ -364,7 +364,7 @@ static INPUT_PORTS_START( vsnes_dual )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) /* bit 1 of dsw goes here */
|
||||
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1)
|
||||
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) /* this bit masks irqs - dont change */
|
||||
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) /* this bit masks irqs - don't change */
|
||||
|
||||
/* Right Side Controls */
|
||||
PORT_START("IN2")
|
||||
@ -395,7 +395,7 @@ static INPUT_PORTS_START( vsnes_dual )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) /* bit 1 of dsw goes here */
|
||||
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN3 ) PORT_IMPULSE(1)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_COIN4 ) PORT_IMPULSE(1)
|
||||
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) /* this bit masks irqs - dont change */
|
||||
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) /* this bit masks irqs - don't change */
|
||||
|
||||
/* Both sides also have a DSW (#0 & #1) which are defined per game, below */
|
||||
INPUT_PORTS_END
|
||||
|
@ -363,6 +363,21 @@ ROM_START( wallca )
|
||||
ROM_LOAD( "74s288.c2", 0x0000, 0x0020, CRC(83e3e293) SHA1(a98c5e63b688de8d175adb6539e0cdc668f313fd) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( brkblast )
|
||||
ROM_REGION( 0x10000, "maincpu", 0 )
|
||||
ROM_LOAD( "fadesa-r0.6m", 0x0000, 0x4000, CRC(4e96ca15) SHA1(87f1a3538712aa3d6c3713b845679dd42a4ba5a4) )
|
||||
|
||||
ROM_REGION( 0x3000, "gfx1", 0 )
|
||||
ROM_LOAD( "rom3.rom", 0x0800, 0x0800, CRC(6634db73) SHA1(fe6104f974495a250e0cd14c0745eec8e44b8d3a) )
|
||||
ROM_LOAD( "rom2.rom", 0x1800, 0x0800, CRC(79f49c2c) SHA1(485fdba5ebdb4c01306f3ef26c992a513aa6b5dc) )
|
||||
ROM_LOAD( "rom1.rom", 0x2800, 0x0800, CRC(3884fd4f) SHA1(47254c8828128ac48fc15f05b52fe4d42d4919e7) )
|
||||
|
||||
ROM_REGION( 0x0020, "proms", 0 )
|
||||
ROM_LOAD( "74s288.c2", 0x0000, 0x0020, CRC(83e3e293) SHA1(a98c5e63b688de8d175adb6539e0cdc668f313fd) )
|
||||
ROM_END
|
||||
|
||||
|
||||
|
||||
/*
|
||||
|
||||
It use a epoxy brick like wallc
|
||||
@ -474,4 +489,6 @@ DRIVER_INIT_MEMBER(wallc_state,sidam)
|
||||
|
||||
GAME( 1984, wallc, 0, wallc, wallc, wallc_state, wallc, ROT0, "Midcoin", "Wall Crash (set 1)", 0 )
|
||||
GAME( 1984, wallca, wallc, wallc, wallc, wallc_state, wallca, ROT0, "Midcoin", "Wall Crash (set 2)", 0 )
|
||||
GAME( 1984, brkblast,wallc, wallc, wallc, wallc_state, wallca, ROT0, "bootleg (Fadesa)", "Brick Blast (bootleg of Wall Crash)", 0 ) // Spanish bootleg board, Fadesa stickers / text on various components
|
||||
|
||||
GAME( 1984, sidampkr,0, wallc, wallc, wallc_state, sidam, ROT270, "Sidam", "unknown Sidam Poker", GAME_NOT_WORKING )
|
||||
|
@ -62,7 +62,7 @@ and encoded in a different way from the original machine. Even if
|
||||
sometimes it seems colors are not entirely correct, this is only due
|
||||
to the crappy artwork of the person that did the bootleg.
|
||||
|
||||
Dip switches are not complete and they dont seem to differ from
|
||||
Dip switches are not complete and they don't seem to differ from
|
||||
the original machine.
|
||||
|
||||
Last but not least, the set of ROMs i have for Euro League seem to have
|
||||
|
@ -101,15 +101,9 @@ Stephh's notes (based on the games M68000 code and some tests) :
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
WRITE16_MEMBER(yunsun16_state::yunsun16_sound_bank_w)
|
||||
WRITE8_MEMBER(yunsun16_state::sound_bank_w)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
{
|
||||
int bank = data & 3;
|
||||
UINT8 *dst = memregion("oki")->base();
|
||||
UINT8 *src = dst + 0x80000 + 0x20000 * bank;
|
||||
memcpy(dst + 0x20000, src, 0x20000);
|
||||
}
|
||||
membank("okibank")->set_entry(data & 3);
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, yunsun16_state )
|
||||
@ -126,12 +120,12 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, yunsun16_state )
|
||||
AM_RANGE(0x80010c, 0x80010f) AM_RAM AM_SHARE("scrollram_1") // Scrolling
|
||||
AM_RANGE(0x800114, 0x800117) AM_RAM AM_SHARE("scrollram_0") // Scrolling
|
||||
AM_RANGE(0x800154, 0x800155) AM_RAM AM_SHARE("priorityram") // Priority
|
||||
AM_RANGE(0x800180, 0x800181) AM_WRITE(yunsun16_sound_bank_w) // Sound
|
||||
AM_RANGE(0x800180, 0x800181) AM_WRITE8(sound_bank_w, 0x00ff) // Sound
|
||||
AM_RANGE(0x800188, 0x800189) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff) // Sound
|
||||
AM_RANGE(0x8001fe, 0x8001ff) AM_WRITENOP // ? 0 (during int)
|
||||
AM_RANGE(0x900000, 0x903fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") // Palette
|
||||
AM_RANGE(0x908000, 0x90bfff) AM_RAM_WRITE(yunsun16_vram_1_w) AM_SHARE("vram_1") // Layer 1
|
||||
AM_RANGE(0x90c000, 0x90ffff) AM_RAM_WRITE(yunsun16_vram_0_w) AM_SHARE("vram_0") // Layer 0
|
||||
AM_RANGE(0x908000, 0x90bfff) AM_RAM_WRITE(vram_1_w) AM_SHARE("vram_1") // Layer 1
|
||||
AM_RANGE(0x90c000, 0x90ffff) AM_RAM_WRITE(vram_0_w) AM_SHARE("vram_0") // Layer 0
|
||||
AM_RANGE(0x910000, 0x910fff) AM_RAM AM_SHARE("spriteram") // Sprites
|
||||
AM_RANGE(0xff0000, 0xffffff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
@ -155,8 +149,8 @@ number 0 on each voice. That sample is 00000-00000.
|
||||
|
||||
DRIVER_INIT_MEMBER(yunsun16_state,magicbub)
|
||||
{
|
||||
// remove_mem_write16_handler (0, 0x800180, 0x800181 );
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x800188, 0x800189, write16_delegate(FUNC(yunsun16_state::magicbub_sound_command_w),this));
|
||||
m_maincpu->space(AS_PROGRAM).unmap_write(0x800180, 0x800181);
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x800188, 0x800189, write16_delegate(FUNC(yunsun16_state::magicbub_sound_command_w), this));
|
||||
}
|
||||
|
||||
/***************************************************************************
|
||||
@ -179,6 +173,11 @@ static ADDRESS_MAP_START( sound_port_map, AS_IO, 8, yunsun16_state )
|
||||
AM_RANGE(0x1c, 0x1c) AM_DEVREADWRITE("oki", okim6295_device, read, write) // M6295
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( oki_map, AS_0, 8, yunsun16_state )
|
||||
AM_RANGE(0x00000, 0x1ffff) AM_ROM
|
||||
AM_RANGE(0x20000, 0x3ffff) AM_ROMBANK("okibank")
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
|
||||
@ -566,6 +565,19 @@ void yunsun16_state::machine_reset()
|
||||
m_sprites_scrolldy = -0x0f;
|
||||
}
|
||||
|
||||
MACHINE_START_MEMBER(yunsun16_state, shocking)
|
||||
{
|
||||
machine_start();
|
||||
membank("okibank")->configure_entries(0, 0x80000 / 0x20000, memregion("oki")->base(), 0x20000);
|
||||
membank("okibank")->set_entry(0);
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER(yunsun16_state, shocking)
|
||||
{
|
||||
machine_reset();
|
||||
membank("okibank")->set_entry(0);
|
||||
}
|
||||
|
||||
/***************************************************************************
|
||||
Magic Bubble
|
||||
***************************************************************************/
|
||||
@ -622,7 +634,9 @@ static MACHINE_CONFIG_START( shocking, yunsun16_state )
|
||||
MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz)
|
||||
MCFG_CPU_PROGRAM_MAP(main_map)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", yunsun16_state, irq2_line_hold)
|
||||
|
||||
|
||||
MCFG_MACHINE_START_OVERRIDE(yunsun16_state, shocking)
|
||||
MCFG_MACHINE_RESET_OVERRIDE(yunsun16_state, shocking)
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
@ -640,6 +654,7 @@ static MACHINE_CONFIG_START( shocking, yunsun16_state )
|
||||
MCFG_OKIM6295_ADD("oki", XTAL_16MHz/16, OKIM6295_PIN7_HIGH)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
|
||||
MCFG_DEVICE_ADDRESS_MAP(AS_0, oki_map)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
@ -786,11 +801,8 @@ ROM_START( magicbubb ) /* Found on a YS-0211 PCB like below */
|
||||
ROM_LOAD( "u22.bin", 0x040000, 0x020000, CRC(7c68df7a) SHA1(88acf9dd43892a790415b418f77d88c747aa84f5) )
|
||||
ROM_LOAD( "u23.bin", 0x060000, 0x020000, CRC(c7763fc1) SHA1(ed68b3c3c5155073afb7b55d6d92d3057e40df6c) )
|
||||
|
||||
ROM_REGION( 0x080000 * 2, "oki", 0 ) /* Samples */
|
||||
ROM_REGION( 0x080000, "oki", 0 ) /* Samples */
|
||||
ROM_LOAD( "u131", 0x000000, 0x040000, CRC(9bdb08e4) SHA1(4d8bdeb9b503b0959a6ae3f3fb3574350b01b1a1) )
|
||||
ROM_RELOAD( 0x040000, 0x040000 )
|
||||
ROM_RELOAD( 0x080000, 0x040000 )
|
||||
ROM_RELOAD( 0x0c0000, 0x040000 )
|
||||
|
||||
ROM_END
|
||||
|
||||
@ -862,10 +874,9 @@ ROM_START( paprazzi )
|
||||
ROM_LOAD( "u22.bin", 0x080000, 0x040000, CRC(436499c7) SHA1(ec1390b6d5656c99d91cf6425d319f4796bcb28a) )
|
||||
ROM_LOAD( "u23.bin", 0x0c0000, 0x040000, CRC(358280fe) SHA1(eac3cb65fe75bc2da14896734f4a339480b54a2c) )
|
||||
|
||||
ROM_REGION( 0x080000 * 2, "oki", 0 ) /* Samples */
|
||||
ROM_REGION( 0x080000, "oki", 0 ) /* Samples */
|
||||
ROM_LOAD( "u131.bin", 0x000000, 0x080000, CRC(bcf7aa12) SHA1(f7bf5258396ed0eb7e85eccf250c6d0a333a4d61) )
|
||||
ROM_RELOAD( 0x080000, 0x080000 )
|
||||
|
||||
|
||||
ROM_END
|
||||
|
||||
/***************************************************************************
|
||||
@ -892,10 +903,9 @@ ROM_START( shocking )
|
||||
ROM_LOAD( "yunsun16.u22", 0x080000, 0x040000, CRC(d6db0388) SHA1(f5d8f7740b602c402a8dd6c4ebd357cf15a0dfac) )
|
||||
ROM_LOAD( "yunsun16.u23", 0x0c0000, 0x040000, CRC(1fa33b2e) SHA1(4aa0dee8d34aac19cf6b7ba3f79ca022ad8d7760) )
|
||||
|
||||
ROM_REGION( 0x080000 * 2, "oki", 0 ) /* Samples */
|
||||
ROM_REGION( 0x080000, "oki", 0 ) /* Samples */
|
||||
ROM_LOAD( "yunsun16.131", 0x000000, 0x080000, CRC(d0a1bb8c) SHA1(10f33521bd6031ed73ee5c7be1382165925aa8f8) )
|
||||
ROM_RELOAD( 0x080000, 0x080000 )
|
||||
|
||||
|
||||
ROM_END
|
||||
|
||||
ROM_START( shockingk )
|
||||
@ -916,10 +926,9 @@ ROM_START( shockingk )
|
||||
ROM_LOAD( "u22.bin", 0x080000, 0x040000, CRC(59260de1) SHA1(2dd2d7ab93fa751cb9142400a3ff91391477d555) )
|
||||
ROM_LOAD( "u23.bin", 0x0c0000, 0x040000, CRC(00e4af23) SHA1(a4d23f16748385dd8c87cae3e16593e5a0195c24) )
|
||||
|
||||
ROM_REGION( 0x080000 * 2, "oki", 0 ) /* Samples */
|
||||
ROM_REGION( 0x080000, "oki", 0 ) /* Samples */
|
||||
ROM_LOAD( "yunsun16.131", 0x000000, 0x080000, CRC(d0a1bb8c) SHA1(10f33521bd6031ed73ee5c7be1382165925aa8f8) )
|
||||
ROM_RELOAD( 0x080000, 0x080000 )
|
||||
|
||||
|
||||
ROM_END
|
||||
|
||||
|
||||
@ -949,10 +958,9 @@ ROM_START( bombkick )
|
||||
ROM_LOAD( "bk_u22", 0x080000, 0x040000, CRC(9538c46c) SHA1(d7d0e167d5abc2ee81eae6fde152b2f5cc716c0e) )
|
||||
ROM_LOAD( "bk_u23", 0x0c0000, 0x040000, CRC(e3831f3d) SHA1(096658ee5a7b83d774b671c0a38113533c8751d1) )
|
||||
|
||||
ROM_REGION( 0x080000 * 2, "oki", 0 ) /* Samples */
|
||||
ROM_REGION( 0x080000, "oki", 0 ) /* Samples */
|
||||
ROM_LOAD( "bk_u131", 0x000000, 0x080000, CRC(22cc5732) SHA1(38aefa4e543ea54e004eee428ee087121eb20905) )
|
||||
ROM_RELOAD( 0x080000, 0x080000 )
|
||||
|
||||
|
||||
ROM_END
|
||||
|
||||
ROM_START( bombkicka ) // marked 'Bomb Kick 98'
|
||||
@ -973,10 +981,9 @@ ROM_START( bombkicka ) // marked 'Bomb Kick 98'
|
||||
ROM_LOAD( "bk_u22", 0x080000, 0x040000, CRC(9538c46c) SHA1(d7d0e167d5abc2ee81eae6fde152b2f5cc716c0e) )
|
||||
ROM_LOAD( "bk_u23", 0x0c0000, 0x040000, CRC(e3831f3d) SHA1(096658ee5a7b83d774b671c0a38113533c8751d1) )
|
||||
|
||||
ROM_REGION( 0x080000 * 2, "oki", 0 ) /* Samples */
|
||||
ROM_REGION( 0x080000, "oki", 0 ) /* Samples */
|
||||
ROM_LOAD( "bk_u131", 0x000000, 0x080000, CRC(22cc5732) SHA1(38aefa4e543ea54e004eee428ee087121eb20905) )
|
||||
ROM_RELOAD( 0x080000, 0x080000 )
|
||||
|
||||
|
||||
ROM_END
|
||||
|
||||
/***************************************************************************
|
||||
|
@ -5,6 +5,7 @@
|
||||
***************************************************************************/
|
||||
|
||||
#include "video/bufsprite.h"
|
||||
#include "video/tigeroad_spr.h"
|
||||
|
||||
class bionicc_state : public driver_device
|
||||
{
|
||||
@ -18,7 +19,9 @@ public:
|
||||
m_paletteram(*this, "paletteram"),
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_gfxdecode(*this, "gfxdecode"),
|
||||
m_palette(*this, "palette") { }
|
||||
m_palette(*this, "palette"),
|
||||
m_spritegen(*this, "spritegen")
|
||||
{ }
|
||||
|
||||
/* memory pointers */
|
||||
required_device<buffered_spriteram16_device> m_spriteram;
|
||||
@ -55,8 +58,8 @@ public:
|
||||
virtual void video_start();
|
||||
UINT32 screen_update_bionicc(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(bionicc_scanline);
|
||||
void draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect );
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
required_device<palette_device> m_palette;
|
||||
required_device<tigeroad_spr_device> m_spritegen;
|
||||
};
|
||||
|
539
src/mame/includes/chihiro.h
Normal file
539
src/mame/includes/chihiro.h
Normal file
@ -0,0 +1,539 @@
|
||||
/*
|
||||
* geforce 3d (NV2A) vertex program disassembler
|
||||
*/
|
||||
class vertex_program_disassembler {
|
||||
static const char *srctypes[];
|
||||
static const char *scaops[];
|
||||
static const int scapar2[];
|
||||
static const char *vecops[];
|
||||
static const int vecpar2[];
|
||||
static const char *vecouts[];
|
||||
static const char compchar[];
|
||||
int o[6];
|
||||
int state;
|
||||
|
||||
struct sourcefields
|
||||
{
|
||||
int Sign;
|
||||
int SwizzleX;
|
||||
int SwizzleY;
|
||||
int SwizzleZ;
|
||||
int SwizzleW;
|
||||
int TempIndex;
|
||||
int ParameterType;
|
||||
};
|
||||
|
||||
struct fields
|
||||
{
|
||||
int ScaOperation;
|
||||
int VecOperation;
|
||||
int SourceConstantIndex;
|
||||
int InputIndex;
|
||||
sourcefields src[3];
|
||||
int VecTempWriteMask;
|
||||
int VecTempIndex;
|
||||
int ScaTempWriteMask;
|
||||
int OutputWriteMask;
|
||||
int OutputSelect;
|
||||
int OutputIndex;
|
||||
int MultiplexerControl;
|
||||
int Usea0x;
|
||||
int EndOfProgram;
|
||||
};
|
||||
fields f;
|
||||
|
||||
void decodefields(unsigned int *dwords, int offset, fields &decoded);
|
||||
int disassemble_mask(int mask, char *s);
|
||||
int disassemble_swizzle(sourcefields f, char *s);
|
||||
int disassemble_source(sourcefields f, fields fi, char *s);
|
||||
int disassemble_output(fields f, char *s);
|
||||
int output_types(fields f, int *o);
|
||||
public:
|
||||
vertex_program_disassembler() { state = 0; }
|
||||
int disassemble(unsigned int *instruction, char *line);
|
||||
};
|
||||
|
||||
/*
|
||||
* geforce 3d (NV2A) vertex structure
|
||||
*/
|
||||
struct vertex_nv {
|
||||
union {
|
||||
float fv[4];
|
||||
UINT32 iv[4];
|
||||
} attribute[16];
|
||||
};
|
||||
|
||||
/*
|
||||
* geforce 3d (NV2A) vertex program simulator
|
||||
*/
|
||||
class vertex_program_simulator {
|
||||
public:
|
||||
vertex_program_simulator();
|
||||
// input vertex
|
||||
vertex_nv *input;
|
||||
// input parameters
|
||||
union constant {
|
||||
float fv[4];
|
||||
unsigned int iv[4];
|
||||
} c_constant[192];
|
||||
union temp {
|
||||
float fv[4];
|
||||
unsigned int iv[4];
|
||||
} r_temp[32];
|
||||
// output vertex
|
||||
vertex_nv *output;
|
||||
// instructions
|
||||
struct instruction {
|
||||
unsigned int i[4];
|
||||
int modified;
|
||||
struct decoded {
|
||||
int SwizzleA[4], SignA, ParameterTypeA, TempIndexA;
|
||||
int SwizzleB[4], SignB, ParameterTypeB, TempIndexB;
|
||||
int SwizzleC[4], SignC, ParameterTypeC, TempIndexC;
|
||||
int VecOperation, ScaOperation;
|
||||
int OutputWriteMask, MultiplexerControl;
|
||||
int VecTempWriteMask, ScaTempWriteMask;
|
||||
int VecTempIndex, OutputIndex;
|
||||
int InputIndex;
|
||||
int SourceConstantIndex;
|
||||
int OutputSelect;
|
||||
int Usea0x;
|
||||
int EndOfProgram;
|
||||
} d;
|
||||
} op[256];
|
||||
public:
|
||||
void set_data(vertex_nv *in, vertex_nv *out);
|
||||
void reset();
|
||||
int step();
|
||||
void decode_instruction(int address);
|
||||
void execute();
|
||||
void jump(int address);
|
||||
void process(int address, vertex_nv *in, vertex_nv *out, int count);
|
||||
int status();
|
||||
private:
|
||||
void initialize_outputs();
|
||||
void initialize_temps();
|
||||
void initialize_constants();
|
||||
void generate_input(float t[4], int sign, int type, int temp, int swizzle[4]);
|
||||
void compute_vectorial_operation(float t[4], int instruction, float par[3 * 4]);
|
||||
void compute_scalar_operation(float t[4], int instruction, float par[3 * 4]);
|
||||
|
||||
int ip;
|
||||
int a0x;
|
||||
};
|
||||
|
||||
class nv2a_renderer; // forward declaration
|
||||
struct nvidia_object_data
|
||||
{
|
||||
nv2a_renderer *data;
|
||||
};
|
||||
|
||||
/*
|
||||
* geforce 3d (NV2A) accellerator
|
||||
*/
|
||||
/* very simplified view
|
||||
there is a set of context objects
|
||||
|
||||
context objects are stored in RAMIN
|
||||
each context object is identified by an handle stored in RAMHT
|
||||
|
||||
each context object can be assigned to a channel
|
||||
to assign you give to the channel an handle for the object
|
||||
|
||||
offset in ramht=(((((handle >> 11) xor handle) >> 11) xor handle) & 0x7ff)*8
|
||||
offset in ramht contains the handle itself
|
||||
offset in ramht+4 contains in the lower 16 bits the offset in RAMIN divided by 16
|
||||
|
||||
objects have methods used to do drawing
|
||||
most methods set parameters, others actually draw
|
||||
*/
|
||||
class nv2a_renderer : public poly_manager<float, nvidia_object_data, 12, 8192>
|
||||
{
|
||||
public:
|
||||
nv2a_renderer(running_machine &machine) : poly_manager<float, nvidia_object_data, 12, 8192>(machine)
|
||||
{
|
||||
memset(channel, 0, sizeof(channel));
|
||||
memset(pfifo, 0, sizeof(pfifo));
|
||||
memset(pcrtc, 0, sizeof(pcrtc));
|
||||
memset(pmc, 0, sizeof(pmc));
|
||||
memset(ramin, 0, sizeof(ramin));
|
||||
computedilated();
|
||||
fb.allocate(640, 480);
|
||||
objectdata = &(object_data_alloc());
|
||||
objectdata->data = this;
|
||||
combiner.used = 0;
|
||||
combiner.lock = osd_lock_alloc();
|
||||
enabled_vertex_attributes = 0;
|
||||
indexesleft_count = 0;
|
||||
vertex_pipeline = 4;
|
||||
alpha_test_enabled = false;
|
||||
alpha_reference = 0;
|
||||
alpha_func = nv2a_renderer::ALWAYS;
|
||||
blending_enabled = false;
|
||||
blend_equation = nv2a_renderer::FUNC_ADD;
|
||||
blend_color = 0;
|
||||
blend_function_destination = nv2a_renderer::ZERO;
|
||||
blend_function_source = nv2a_renderer::ONE;
|
||||
logical_operation_enabled = false;
|
||||
logical_operation = nv2a_renderer::COPY;
|
||||
debug_grab_texttype = -1;
|
||||
debug_grab_textfile = NULL;
|
||||
memset(vertex_attribute_words, 0, sizeof(vertex_attribute_words));
|
||||
memset(vertex_attribute_offset, 0, sizeof(vertex_attribute_offset));
|
||||
}
|
||||
DECLARE_READ32_MEMBER(geforce_r);
|
||||
DECLARE_WRITE32_MEMBER(geforce_w);
|
||||
bool vblank_callback(screen_device &screen, bool state);
|
||||
UINT32 screen_update_callback(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
|
||||
void render_texture_simple(INT32 scanline, const extent_t &extent, const nvidia_object_data &extradata, int threadid);
|
||||
void render_color(INT32 scanline, const extent_t &extent, const nvidia_object_data &extradata, int threadid);
|
||||
void render_register_combiners(INT32 scanline, const extent_t &extent, const nvidia_object_data &objectdata, int threadid);
|
||||
|
||||
int geforce_commandkind(UINT32 word);
|
||||
UINT32 geforce_object_offset(UINT32 handle);
|
||||
void geforce_read_dma_object(UINT32 handle, UINT32 &offset, UINT32 &size);
|
||||
void geforce_exec_method(address_space &space, UINT32 channel, UINT32 subchannel, UINT32 method, UINT32 address, int &countlen);
|
||||
UINT32 texture_get_texel(int number, int x, int y);
|
||||
void write_pixel(int x, int y, UINT32 color);
|
||||
void combiner_initialize_registers(UINT32 argb8[6]);
|
||||
void combiner_initialize_stage(int stage_number);
|
||||
void combiner_initialize_final();
|
||||
void combiner_map_input(int stage_number); // map combiner registers to variables A..D
|
||||
void combiner_map_output(int stage_number); // map combiner calculation results to combiner registers
|
||||
void combiner_map_final_input(); // map final combiner registers to variables A..F
|
||||
void combiner_final_output(); // generate final combiner output
|
||||
float combiner_map_input_select(int code, int index); // get component index in register code
|
||||
float *combiner_map_input_select3(int code); // get pointer to register code
|
||||
float *combiner_map_output_select3(int code); // get pointer to register code for output
|
||||
float combiner_map_input_function(int code, float value); // apply input mapping function code to value
|
||||
void combiner_map_input_function3(int code, float *data); // apply input mapping function code to data
|
||||
void combiner_function_AB(float result[4]);
|
||||
void combiner_function_AdotB(float result[4]);
|
||||
void combiner_function_CD(float result[4]);
|
||||
void combiner_function_CdotD(float result[4]);
|
||||
void combiner_function_ABmuxCD(float result[4]);
|
||||
void combiner_function_ABsumCD(float result[4]);
|
||||
void combiner_compute_rgb_outputs(int index);
|
||||
void combiner_compute_a_outputs(int index);
|
||||
void combiner_argb8_float(UINT32 color, float reg[4]);
|
||||
UINT32 combiner_float_argb8(float reg[4]);
|
||||
UINT32 dilate0(UINT32 value, int bits);
|
||||
UINT32 dilate1(UINT32 value, int bits);
|
||||
void computedilated(void);
|
||||
void putpixtex(int xp, int yp, int up, int vp);
|
||||
int toggle_register_combiners_usage();
|
||||
void debug_grab_texture(int type, const char *filename);
|
||||
void debug_grab_vertex_program_slot(int slot, UINT32 *instruction);
|
||||
void savestate_items();
|
||||
|
||||
void read_vertex(address_space & space, offs_t address, vertex_nv &vertex, int attrib);
|
||||
int read_vertices_0x1810(address_space & space, vertex_nv *destination, int offset, int limit);
|
||||
int read_vertices_0x1800(address_space & space, vertex_nv *destination, UINT32 address, int limit);
|
||||
int read_vertices_0x1818(address_space & space, vertex_nv *destination, UINT32 address, int limit);
|
||||
void convert_vertices_poly(vertex_nv *source, vertex_t *destination, int count);
|
||||
|
||||
struct {
|
||||
UINT32 regs[0x80 / 4];
|
||||
struct {
|
||||
UINT32 objhandle;
|
||||
UINT32 objclass;
|
||||
UINT32 method[0x2000 / 4];
|
||||
} object;
|
||||
} channel[32][8];
|
||||
UINT32 pfifo[0x2000 / 4];
|
||||
UINT32 pcrtc[0x1000 / 4];
|
||||
UINT32 pmc[0x1000 / 4];
|
||||
UINT32 ramin[0x100000 / 4];
|
||||
UINT32 dma_offset[2];
|
||||
UINT32 dma_size[2];
|
||||
UINT32 vertexbuffer_address[16];
|
||||
int vertexbuffer_stride[16];
|
||||
int vertexbuffer_kind[16];
|
||||
int vertexbuffer_size[16];
|
||||
struct {
|
||||
int enabled;
|
||||
int sizeu;
|
||||
int sizev;
|
||||
int sizew;
|
||||
int dilate;
|
||||
int format;
|
||||
int rectangle_pitch;
|
||||
void *buffer;
|
||||
} texture[4];
|
||||
int primitives_count;
|
||||
int indexesleft_count;
|
||||
int indexesleft_first;
|
||||
UINT32 indexesleft[8];
|
||||
struct {
|
||||
float variable_A[4]; // 0=R 1=G 2=B 3=A
|
||||
float variable_B[4];
|
||||
float variable_C[4];
|
||||
float variable_D[4];
|
||||
float variable_E[4];
|
||||
float variable_F[4];
|
||||
float variable_G;
|
||||
float variable_EF[4];
|
||||
float variable_sumclamp[4];
|
||||
float function_RGBop1[4]; // 0=R 1=G 2=B
|
||||
float function_RGBop2[4];
|
||||
float function_RGBop3[4];
|
||||
float function_Aop1;
|
||||
float function_Aop2;
|
||||
float function_Aop3;
|
||||
float register_primarycolor[4]; // rw
|
||||
float register_secondarycolor[4];
|
||||
float register_texture0color[4];
|
||||
float register_texture1color[4];
|
||||
float register_texture2color[4];
|
||||
float register_texture3color[4];
|
||||
float register_color0[4];
|
||||
float register_color1[4];
|
||||
float register_spare0[4];
|
||||
float register_spare1[4];
|
||||
float register_fogcolor[4]; // ro
|
||||
float register_zero[4];
|
||||
float output[4];
|
||||
struct {
|
||||
float register_constantcolor0[4];
|
||||
float register_constantcolor1[4];
|
||||
int mapin_aA_input;
|
||||
int mapin_aA_component;
|
||||
int mapin_aA_mapping;
|
||||
int mapin_aB_input;
|
||||
int mapin_aB_component;
|
||||
int mapin_aB_mapping;
|
||||
int mapin_aC_input;
|
||||
int mapin_aC_component;
|
||||
int mapin_aC_mapping;
|
||||
int mapin_aD_input;
|
||||
int mapin_aD_component;
|
||||
int mapin_aD_mapping;
|
||||
int mapin_rgbA_input;
|
||||
int mapin_rgbA_component;
|
||||
int mapin_rgbA_mapping;
|
||||
int mapin_rgbB_input;
|
||||
int mapin_rgbB_component;
|
||||
int mapin_rgbB_mapping;
|
||||
int mapin_rgbC_input;
|
||||
int mapin_rgbC_component;
|
||||
int mapin_rgbC_mapping;
|
||||
int mapin_rgbD_input;
|
||||
int mapin_rgbD_component;
|
||||
int mapin_rgbD_mapping;
|
||||
int mapout_aCD_output;
|
||||
int mapout_aAB_output;
|
||||
int mapout_aSUM_output;
|
||||
int mapout_aCD_dotproduct;
|
||||
int mapout_aAB_dotproduct;
|
||||
int mapout_a_muxsum;
|
||||
int mapout_a_bias;
|
||||
int mapout_a_scale;
|
||||
int mapout_rgbCD_output;
|
||||
int mapout_rgbAB_output;
|
||||
int mapout_rgbSUM_output;
|
||||
int mapout_rgbCD_dotproduct;
|
||||
int mapout_rgbAB_dotproduct;
|
||||
int mapout_rgb_muxsum;
|
||||
int mapout_rgb_bias;
|
||||
int mapout_rgb_scale;
|
||||
} stage[8];
|
||||
struct {
|
||||
float register_constantcolor0[4];
|
||||
float register_constantcolor1[4];
|
||||
int color_sum_clamp;
|
||||
int mapin_rgbA_input;
|
||||
int mapin_rgbA_component;
|
||||
int mapin_rgbA_mapping;
|
||||
int mapin_rgbB_input;
|
||||
int mapin_rgbB_component;
|
||||
int mapin_rgbB_mapping;
|
||||
int mapin_rgbC_input;
|
||||
int mapin_rgbC_component;
|
||||
int mapin_rgbC_mapping;
|
||||
int mapin_rgbD_input;
|
||||
int mapin_rgbD_component;
|
||||
int mapin_rgbD_mapping;
|
||||
int mapin_rgbE_input;
|
||||
int mapin_rgbE_component;
|
||||
int mapin_rgbE_mapping;
|
||||
int mapin_rgbF_input;
|
||||
int mapin_rgbF_component;
|
||||
int mapin_rgbF_mapping;
|
||||
int mapin_aG_input;
|
||||
int mapin_aG_component;
|
||||
int mapin_aG_mapping;
|
||||
} final;
|
||||
int stages;
|
||||
int used;
|
||||
osd_lock *lock;
|
||||
} combiner;
|
||||
bool alpha_test_enabled;
|
||||
int alpha_func;
|
||||
int alpha_reference;
|
||||
bool blending_enabled;
|
||||
int blend_equation;
|
||||
int blend_function_source;
|
||||
int blend_function_destination;
|
||||
UINT32 blend_color;
|
||||
bool logical_operation_enabled;
|
||||
int logical_operation;
|
||||
struct {
|
||||
float modelview[16];
|
||||
float modelview_inverse[16];
|
||||
float projection[16];
|
||||
float translate[4];
|
||||
float scale[4];
|
||||
} matrix;
|
||||
struct {
|
||||
vertex_program_simulator exec;
|
||||
int instructions;
|
||||
int upload_instruction_index;
|
||||
int upload_instruction_component;
|
||||
int start_instruction;
|
||||
int upload_parameter_index;
|
||||
int upload_parameter_component;
|
||||
} vertexprogram;
|
||||
int vertex_pipeline;
|
||||
int enabled_vertex_attributes;
|
||||
int vertex_attribute_words[16];
|
||||
int vertex_attribute_offset[16];
|
||||
bitmap_rgb32 fb;
|
||||
UINT32 dilated0[16][2048];
|
||||
UINT32 dilated1[16][2048];
|
||||
int dilatechose[256];
|
||||
nvidia_object_data *objectdata;
|
||||
int debug_grab_texttype;
|
||||
char *debug_grab_textfile;
|
||||
|
||||
enum NV2A_BEGIN_END {
|
||||
STOP = 0,
|
||||
POINTS = 1,
|
||||
LINES = 2,
|
||||
LINE_LOOP = 3,
|
||||
LINE_STRIP = 4,
|
||||
TRIANGLES = 5,
|
||||
TRIANGLE_STRIP = 6,
|
||||
TRIANGLE_FAN = 7,
|
||||
QUADS = 8,
|
||||
QUAD_STRIP = 9,
|
||||
POLYGON = 10
|
||||
};
|
||||
enum NV2A_VERTEX_ATTR {
|
||||
POS = 0,
|
||||
WEIGHT = 1,
|
||||
NORMAL = 2,
|
||||
COLOR0 = 3, // diffuse
|
||||
COLOR1 = 4, // specular
|
||||
FOG = 5,
|
||||
BACKCOLOR0 = 7, // diffuse
|
||||
BACKCOLOR1 = 8, // specular
|
||||
TEX0 = 9,
|
||||
TEX1 = 10,
|
||||
TEX2 = 11,
|
||||
TEX3 = 12
|
||||
};
|
||||
enum NV2A_VTXBUF_TYPE {
|
||||
NV2A_VTXBUF_TYPE_UNKNOWN_0 = 0, // used for vertex color ?
|
||||
NV2A_VTXBUF_TYPE_FLOAT = 2,
|
||||
NV2A_VTXBUF_TYPE_UBYTE = 4,
|
||||
NV2A_VTXBUF_TYPE_USHORT = 5,
|
||||
NV2A_VTXBUF_TYPE_UNKNOWN_6 = 6 // used for vertex color
|
||||
};
|
||||
enum NV2A_TEX_FORMAT {
|
||||
L8 = 0x0,
|
||||
I8 = 0x1,
|
||||
A1R5G5B5 = 0x2,
|
||||
A4R4G4B4 = 0x4,
|
||||
R5G6B5 = 0x5,
|
||||
A8R8G8B8 = 0x6,
|
||||
X8R8G8B8 = 0x7,
|
||||
INDEX8 = 0xb,
|
||||
DXT1 = 0xc,
|
||||
DXT3 = 0xe,
|
||||
DXT5 = 0xf,
|
||||
A1R5G5B5_RECT = 0x10,
|
||||
R5G6B5_RECT = 0x11,
|
||||
A8R8G8B8_RECT = 0x12,
|
||||
L8_RECT = 0x13,
|
||||
DSDT8_RECT = 0x17,
|
||||
A8L8 = 0x1a,
|
||||
I8_RECT = 0x1b,
|
||||
A4R4G4B4_RECT = 0x1d,
|
||||
R8G8B8_RECT = 0x1e,
|
||||
A8L8_RECT = 0x20,
|
||||
Z24 = 0x2a,
|
||||
Z24_RECT = 0x2b,
|
||||
Z16 = 0x2c,
|
||||
Z16_RECT = 0x2d,
|
||||
DSDT8 = 0x28,
|
||||
HILO16 = 0x33,
|
||||
HILO16_RECT = 0x36,
|
||||
HILO8 = 0x44,
|
||||
SIGNED_HILO8 = 0x45,
|
||||
HILO8_RECT = 0x46,
|
||||
SIGNED_HILO8_RECT = 0x47
|
||||
};
|
||||
enum NV2A_LOGIC_OP {
|
||||
CLEAR = 0x1500,
|
||||
AND = 0x1501,
|
||||
AND_REVERSE = 0x1502,
|
||||
COPY = 0x1503,
|
||||
AND_INVERTED = 0x1504,
|
||||
NOOP = 0x1505,
|
||||
XOR = 0x1506,
|
||||
OR = 0x1507,
|
||||
NOR = 0x1508,
|
||||
EQUIV = 0x1509,
|
||||
INVERT = 0x150a,
|
||||
OR_REVERSE = 0x150b,
|
||||
COPY_INVERTED = 0x150c,
|
||||
OR_INVERTED = 0x150d,
|
||||
NAND = 0x150e,
|
||||
SET = 0x150f
|
||||
};
|
||||
enum NV2A_BLEND_EQUATION {
|
||||
FUNC_ADD = 0x8006,
|
||||
MIN = 0x8007,
|
||||
MAX = 0x8008,
|
||||
FUNC_SUBTRACT = 0x800a,
|
||||
FUNC_REVERSE_SUBTRACT = 0x80b
|
||||
};
|
||||
enum NV2A_BLEND_FACTOR {
|
||||
ZERO = 0x0000,
|
||||
ONE = 0x0001,
|
||||
SRC_COLOR = 0x0300,
|
||||
ONE_MINUS_SRC_COLOR = 0x0301,
|
||||
SRC_ALPHA = 0x0302,
|
||||
ONE_MINUS_SRC_ALPHA = 0x0303,
|
||||
DST_ALPHA = 0x0304,
|
||||
ONE_MINUS_DST_ALPHA = 0x0305,
|
||||
DST_COLOR = 0x0306,
|
||||
ONE_MINUS_DST_COLOR = 0x0307,
|
||||
SRC_ALPHA_SATURATE = 0x0308,
|
||||
CONSTANT_COLOR = 0x8001,
|
||||
ONE_MINUS_CONSTANT_COLOR = 0x8002,
|
||||
CONSTANT_ALPHA = 0x8003,
|
||||
ONE_MINUS_CONSTANT_ALPHA = 0x8004
|
||||
};
|
||||
enum NV2A_COMPARISON_OP {
|
||||
NEVER = 0x0200,
|
||||
LESS = 0x0201,
|
||||
EQUAL = 0x0202,
|
||||
LEQUAL = 0x0203,
|
||||
GREATER = 0x0204,
|
||||
NOTEQUAL = 0x0205,
|
||||
GEQUAL = 0x0206,
|
||||
ALWAYS = 0x0207
|
||||
};
|
||||
enum NV2A_STENCIL_OP {
|
||||
ZEROOP = 0x0000,
|
||||
INVERTOP = 0x150a,
|
||||
KEEP = 0x1e00,
|
||||
REPLACE = 0x1e01,
|
||||
INCR = 0x1e02,
|
||||
DECR = 0x1e03,
|
||||
INCR_WRAP = 0x8507,
|
||||
DECR_WRAP = 0x8508
|
||||
};
|
||||
};
|
@ -14,15 +14,16 @@ public:
|
||||
m_bg15(*this, "bg15"),
|
||||
m_ram(*this, "ram"),
|
||||
m_ram2(*this, "ram2"),
|
||||
m_rombank(*this, "rombank"),
|
||||
m_maincpu(*this,"maincpu"),
|
||||
m_subcpu(*this,"sub"),
|
||||
m_kaneko_spr(*this, "kan_spr"),
|
||||
m_spriteram(*this, "spriteram"),
|
||||
m_oki2(*this, "oki2"),
|
||||
m_eeprom(*this, "eeprom"),
|
||||
m_palette(*this, "palette")
|
||||
{ }
|
||||
m_palette(*this, "palette"),
|
||||
m_bg15palette(*this, "bgpalette"),
|
||||
m_bg8palette(*this, "bg8palette")
|
||||
{ }
|
||||
|
||||
required_shared_ptr_array<UINT16, 2> m_bg8;
|
||||
optional_shared_ptr_array<UINT16, 2> m_palette_val;
|
||||
@ -34,9 +35,6 @@ public:
|
||||
required_shared_ptr<UINT16> m_ram2;
|
||||
UINT16 m_old_mcu_nmi1;
|
||||
UINT16 m_old_mcu_nmi2;
|
||||
required_shared_ptr<UINT16> m_rombank;
|
||||
bitmap_ind16 *m_bg8_bitmap[2];
|
||||
bitmap_ind16 *m_bg15_bitmap;
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<cpu_device> m_subcpu;
|
||||
@ -47,31 +45,29 @@ public:
|
||||
DECLARE_WRITE8_MEMBER(galpani2_mcu_nmi1_w);
|
||||
DECLARE_WRITE8_MEMBER(galpani2_mcu_nmi2_w);
|
||||
DECLARE_WRITE8_MEMBER(galpani2_coin_lockout_w);
|
||||
DECLARE_READ16_MEMBER(galpani2_bankedrom_r);
|
||||
DECLARE_READ16_MEMBER(galpani2_eeprom_r);
|
||||
DECLARE_WRITE16_MEMBER(galpani2_eeprom_w);
|
||||
DECLARE_WRITE8_MEMBER(galpani2_oki1_bank_w);
|
||||
DECLARE_WRITE8_MEMBER(galpani2_oki2_bank_w);
|
||||
DECLARE_WRITE16_MEMBER(subdatabank_select_w);
|
||||
virtual void machine_start();
|
||||
virtual void machine_reset();
|
||||
virtual void video_start();
|
||||
DECLARE_PALETTE_INIT(galpani2);
|
||||
UINT32 screen_update_galpani2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
UINT32 screen_update_galpani2(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
void copybg8(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int layer);
|
||||
void copybg15(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(galpani2_interrupt1);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(galpani2_interrupt2);
|
||||
void galpani2_mcu_nmi1();
|
||||
void galpani2_mcu_nmi2();
|
||||
/*----------- defined in video/galpani2.c -----------*/
|
||||
inline void galpani2_bg8_w(offs_t offset, UINT16 data, UINT16 mem_mask, int _n_);
|
||||
inline void galpani2_palette_w(offs_t offset, UINT16 data, UINT16 mem_mask, int _n_);
|
||||
|
||||
DECLARE_WRITE16_MEMBER( galpani2_palette_0_w );
|
||||
DECLARE_WRITE16_MEMBER( galpani2_palette_1_w );
|
||||
|
||||
DECLARE_WRITE16_MEMBER( galpani2_bg8_0_w );
|
||||
DECLARE_WRITE16_MEMBER( galpani2_bg8_1_w );
|
||||
|
||||
DECLARE_WRITE16_MEMBER( galpani2_bg15_w );
|
||||
required_device<okim6295_device> m_oki2;
|
||||
required_device<eeprom_serial_93cxx_device> m_eeprom;
|
||||
required_device<palette_device> m_palette;
|
||||
required_device<palette_device> m_bg15palette;
|
||||
required_device<palette_device> m_bg8palette;
|
||||
|
||||
};
|
||||
|
@ -1,77 +1,49 @@
|
||||
#include "machine/nvram.h"
|
||||
#include "sound/okiadpcm.h"
|
||||
|
||||
class mjkjidai_adpcm_device;
|
||||
#include "sound/msm5205.h"
|
||||
|
||||
class mjkjidai_state : public driver_device
|
||||
{
|
||||
public:
|
||||
mjkjidai_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag),
|
||||
m_spriteram1(*this, "spriteram1"),
|
||||
m_spriteram2(*this, "spriteram2"),
|
||||
m_spriteram3(*this, "spriteram3"),
|
||||
m_videoram(*this, "videoram"),
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_mjk_adpcm(*this, "adpcm"),
|
||||
m_msm(*this, "msm"),
|
||||
m_nvram(*this, "nvram"),
|
||||
m_gfxdecode(*this, "gfxdecode"),
|
||||
m_palette(*this, "palette") { }
|
||||
|
||||
required_shared_ptr<UINT8> m_spriteram1;
|
||||
required_shared_ptr<UINT8> m_spriteram2;
|
||||
required_shared_ptr<UINT8> m_spriteram3;
|
||||
required_shared_ptr<UINT8> m_videoram;
|
||||
m_palette(*this, "palette"),
|
||||
m_adpcmrom(*this, "adpcm"),
|
||||
m_videoram(*this, "videoram"),
|
||||
m_row(*this, "ROW") { }
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<mjkjidai_adpcm_device> m_mjk_adpcm;
|
||||
required_device<msm5205_device> m_msm;
|
||||
required_device<nvram_device> m_nvram;
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
required_device<palette_device> m_palette;
|
||||
|
||||
required_region_ptr<UINT8> m_adpcmrom;
|
||||
required_shared_ptr<UINT8> m_videoram;
|
||||
|
||||
required_ioport_array<12> m_row;
|
||||
|
||||
int m_adpcm_pos;
|
||||
int m_adpcm_end;
|
||||
int m_keyb;
|
||||
int m_nvram_init_count;
|
||||
int m_display_enable;
|
||||
bool m_nmi_enable;
|
||||
bool m_display_enable;
|
||||
tilemap_t *m_bg_tilemap;
|
||||
|
||||
UINT8 m_nmi_mask;
|
||||
DECLARE_READ8_MEMBER(keyboard_r);
|
||||
DECLARE_CUSTOM_INPUT_MEMBER(keyboard_r);
|
||||
DECLARE_WRITE8_MEMBER(keyboard_select_w);
|
||||
DECLARE_WRITE8_MEMBER(mjkjidai_videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(mjkjidai_ctrl_w);
|
||||
DECLARE_WRITE8_MEMBER(adpcm_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(adpcm_int);
|
||||
TILE_GET_INFO_MEMBER(get_tile_info);
|
||||
virtual void machine_start();
|
||||
virtual void machine_reset();
|
||||
virtual void video_start();
|
||||
UINT32 screen_update_mjkjidai(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
INTERRUPT_GEN_MEMBER(vblank_irq);
|
||||
void draw_sprites(bitmap_ind16 &bitmap,const rectangle &cliprect);
|
||||
};
|
||||
|
||||
class mjkjidai_adpcm_device : public device_t,
|
||||
public device_sound_interface
|
||||
{
|
||||
public:
|
||||
mjkjidai_adpcm_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
~mjkjidai_adpcm_device() {}
|
||||
|
||||
void mjkjidai_adpcm_play (int offset, int length);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_config_complete();
|
||||
virtual void device_start();
|
||||
|
||||
// sound stream update overrides
|
||||
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
|
||||
private:
|
||||
// internal state
|
||||
oki_adpcm_state m_adpcm;
|
||||
sound_stream *m_stream;
|
||||
UINT32 m_current;
|
||||
UINT32 m_end;
|
||||
UINT8 m_nibble;
|
||||
UINT8 m_playing;
|
||||
UINT8 *m_base;
|
||||
};
|
||||
|
||||
extern const device_type MJKJIDAI;
|
||||
|
@ -14,13 +14,16 @@ class relief_state : public atarigen_state
|
||||
public:
|
||||
relief_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: atarigen_state(mconfig, type, tag),
|
||||
m_vad(*this, "vad") { }
|
||||
m_vad(*this, "vad"),
|
||||
m_okibank(*this, "okibank")
|
||||
{ }
|
||||
|
||||
required_device<atari_vad_device> m_vad;
|
||||
required_memory_bank m_okibank;
|
||||
|
||||
UINT8 m_ym2413_volume;
|
||||
UINT8 m_overall_volume;
|
||||
UINT32 m_adpcm_bank_base;
|
||||
UINT8 m_adpcm_bank;
|
||||
virtual void update_interrupts();
|
||||
DECLARE_READ16_MEMBER(special_port2_r);
|
||||
DECLARE_WRITE16_MEMBER(audio_control_w);
|
||||
|
@ -1,24 +1,38 @@
|
||||
#include "sound/okiadpcm.h"
|
||||
#include "sound/msm5205.h"
|
||||
|
||||
#define MCU_BUFFER_MAX 6
|
||||
|
||||
class renegade_adpcm_device;
|
||||
|
||||
class renegade_state : public driver_device
|
||||
{
|
||||
public:
|
||||
renegade_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag),
|
||||
m_videoram(*this, "videoram"),
|
||||
m_videoram2(*this, "videoram2"),
|
||||
m_spriteram(*this, "spriteram"),
|
||||
m_maincpu(*this,"maincpu"),
|
||||
m_audiocpu(*this, "audiocpu"),
|
||||
m_mcu(*this, "mcu"),
|
||||
m_msm(*this, "msm"),
|
||||
m_gfxdecode(*this, "gfxdecode"),
|
||||
m_palette(*this, "palette") { }
|
||||
m_rombank(*this, "rombank"),
|
||||
m_adpcmrom(*this, "adpcm"),
|
||||
m_fg_videoram(*this, "fg_videoram"),
|
||||
m_bg_videoram(*this, "bg_videoram"),
|
||||
m_spriteram(*this, "spriteram") { }
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<cpu_device> m_audiocpu;
|
||||
optional_device<cpu_device> m_mcu;
|
||||
required_device<msm5205_device> m_msm;
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
required_memory_bank m_rombank;
|
||||
required_region_ptr<UINT8> m_adpcmrom;
|
||||
required_shared_ptr<UINT8> m_fg_videoram;
|
||||
required_shared_ptr<UINT8> m_bg_videoram;
|
||||
required_shared_ptr<UINT8> m_spriteram;
|
||||
|
||||
UINT32 m_adpcm_pos;
|
||||
UINT32 m_adpcm_end;
|
||||
bool m_adpcm_playing;
|
||||
|
||||
UINT8 m_bank;
|
||||
int m_mcu_sim;
|
||||
int m_from_main;
|
||||
int m_from_mcu;
|
||||
@ -40,15 +54,10 @@ public:
|
||||
int m_mcu_checksum;
|
||||
const UINT8 *m_mcu_encrypt_table;
|
||||
int m_mcu_encrypt_table_len;
|
||||
int m_coin;
|
||||
required_shared_ptr<UINT8> m_videoram;
|
||||
required_shared_ptr<UINT8> m_videoram2;
|
||||
INT32 m_scrollx;
|
||||
tilemap_t *m_bg_tilemap;
|
||||
tilemap_t *m_fg_tilemap;
|
||||
required_shared_ptr<UINT8> m_spriteram;
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
DECLARE_WRITE8_MEMBER(sound_w);
|
||||
DECLARE_READ8_MEMBER(mcu_reset_r);
|
||||
DECLARE_WRITE8_MEMBER(mcu_w);
|
||||
@ -65,13 +74,17 @@ public:
|
||||
DECLARE_READ8_MEMBER(renegade_68705_port_c_r);
|
||||
DECLARE_WRITE8_MEMBER(renegade_68705_port_c_w);
|
||||
DECLARE_WRITE8_MEMBER(renegade_68705_ddr_c_w);
|
||||
DECLARE_WRITE8_MEMBER(renegade_videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(renegade_videoram2_w);
|
||||
DECLARE_WRITE8_MEMBER(fg_videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(bg_videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(renegade_flipscreen_w);
|
||||
DECLARE_WRITE8_MEMBER(renegade_scroll0_w);
|
||||
DECLARE_WRITE8_MEMBER(renegade_scroll1_w);
|
||||
DECLARE_WRITE8_MEMBER(scroll_lsb_w);
|
||||
DECLARE_WRITE8_MEMBER(scroll_msb_w);
|
||||
DECLARE_CUSTOM_INPUT_MEMBER(mcu_status_r);
|
||||
DECLARE_WRITE8_MEMBER(adpcm_play_w);
|
||||
DECLARE_WRITE8_MEMBER(adpcm_start_w);
|
||||
DECLARE_WRITE8_MEMBER(adpcm_addr_w);
|
||||
DECLARE_WRITE8_MEMBER(adpcm_stop_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(adpcm_int);
|
||||
|
||||
DECLARE_DRIVER_INIT(kuniokun);
|
||||
DECLARE_DRIVER_INIT(kuniokunb);
|
||||
DECLARE_DRIVER_INIT(renegade);
|
||||
@ -82,40 +95,5 @@ public:
|
||||
virtual void video_start();
|
||||
UINT32 screen_update_renegade(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(renegade_interrupt);
|
||||
void setbank();
|
||||
void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
required_device<cpu_device> m_audiocpu;
|
||||
optional_device<cpu_device> m_mcu;
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
required_device<palette_device> m_palette;
|
||||
};
|
||||
|
||||
class renegade_adpcm_device : public device_t,
|
||||
public device_sound_interface
|
||||
{
|
||||
public:
|
||||
renegade_adpcm_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
~renegade_adpcm_device() {}
|
||||
|
||||
DECLARE_WRITE8_MEMBER(play_w);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_config_complete();
|
||||
virtual void device_start();
|
||||
|
||||
// sound stream update overrides
|
||||
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
|
||||
|
||||
private:
|
||||
// internal state
|
||||
oki_adpcm_state m_adpcm;
|
||||
sound_stream *m_stream;
|
||||
UINT32 m_current;
|
||||
UINT32 m_end;
|
||||
UINT8 m_nibble;
|
||||
UINT8 m_playing;
|
||||
UINT8 *m_base;
|
||||
};
|
||||
|
||||
extern const device_type RENEGADE_ADPCM;
|
||||
|
@ -5,6 +5,7 @@
|
||||
#include "sound/2203intf.h"
|
||||
#include "sound/msm5205.h"
|
||||
#include "cpu/m6805/m6805.h"
|
||||
#include "video/tigeroad_spr.h"
|
||||
|
||||
class tigeroad_state : public driver_device
|
||||
{
|
||||
@ -20,6 +21,7 @@ public:
|
||||
m_gfxdecode(*this, "gfxdecode"),
|
||||
m_palette(*this, "palette"),
|
||||
m_mcu(*this, "mcu"),
|
||||
m_spritegen(*this, "spritegen"),
|
||||
m_has_coinlock(1)
|
||||
{ }
|
||||
|
||||
@ -43,7 +45,6 @@ public:
|
||||
TILEMAP_MAPPER_MEMBER(tigeroad_tilemap_scan);
|
||||
virtual void video_start();
|
||||
UINT32 screen_update_tigeroad(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int priority );
|
||||
void f1dream_protection_w(address_space &space);
|
||||
DECLARE_WRITE_LINE_MEMBER(irqhandler);
|
||||
required_device<cpu_device> m_maincpu;
|
||||
@ -52,6 +53,7 @@ public:
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
required_device<palette_device> m_palette;
|
||||
optional_device<cpu_device> m_mcu;
|
||||
required_device<tigeroad_spr_device> m_spritegen;
|
||||
|
||||
UINT16 m_control[2];
|
||||
|
||||
|
@ -27,7 +27,7 @@ public:
|
||||
|
||||
optional_shared_ptr<UINT8> m_sharedram;
|
||||
|
||||
int m_coin_count; /* coin count increments on startup ? , so dont count it */
|
||||
int m_coin_count; /* coin count increments on startup ? , so don't count it */
|
||||
int m_intenable;
|
||||
|
||||
/* Demon world */
|
||||
|
@ -9,18 +9,25 @@ class yunsun16_state : public driver_device
|
||||
public:
|
||||
yunsun16_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag),
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_audiocpu(*this, "audiocpu"),
|
||||
m_gfxdecode(*this, "gfxdecode"),
|
||||
m_screen(*this, "screen"),
|
||||
m_palette(*this, "palette"),
|
||||
m_vram_0(*this, "vram_0"),
|
||||
m_vram_1(*this, "vram_1"),
|
||||
m_scrollram_0(*this, "scrollram_0"),
|
||||
m_scrollram_1(*this, "scrollram_1"),
|
||||
m_priorityram(*this, "priorityram"),
|
||||
m_spriteram(*this, "spriteram"),
|
||||
m_audiocpu(*this, "audiocpu"),
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_gfxdecode(*this, "gfxdecode"),
|
||||
m_screen(*this, "screen"),
|
||||
m_palette(*this, "palette") { }
|
||||
m_spriteram(*this, "spriteram") { }
|
||||
|
||||
/* devices */
|
||||
required_device<cpu_device> m_maincpu;
|
||||
optional_device<cpu_device> m_audiocpu;
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
required_device<screen_device> m_screen;
|
||||
required_device<palette_device> m_palette;
|
||||
|
||||
/* memory pointers */
|
||||
required_shared_ptr<UINT16> m_vram_0;
|
||||
required_shared_ptr<UINT16> m_vram_1;
|
||||
@ -36,14 +43,14 @@ public:
|
||||
int m_sprites_scrolldx;
|
||||
int m_sprites_scrolldy;
|
||||
|
||||
/* devices */
|
||||
optional_device<cpu_device> m_audiocpu;
|
||||
DECLARE_WRITE16_MEMBER(yunsun16_sound_bank_w);
|
||||
DECLARE_WRITE8_MEMBER(sound_bank_w);
|
||||
DECLARE_WRITE16_MEMBER(magicbub_sound_command_w);
|
||||
DECLARE_WRITE16_MEMBER(yunsun16_vram_0_w);
|
||||
DECLARE_WRITE16_MEMBER(yunsun16_vram_1_w);
|
||||
DECLARE_WRITE16_MEMBER(vram_0_w);
|
||||
DECLARE_WRITE16_MEMBER(vram_1_w);
|
||||
DECLARE_DRIVER_INIT(magicbub);
|
||||
TILEMAP_MAPPER_MEMBER(yunsun16_tilemap_scan_pages);
|
||||
DECLARE_MACHINE_START(shocking);
|
||||
DECLARE_MACHINE_RESET(shocking);
|
||||
TILEMAP_MAPPER_MEMBER(tilemap_scan_pages);
|
||||
TILE_GET_INFO_MEMBER(get_tile_info_0);
|
||||
TILE_GET_INFO_MEMBER(get_tile_info_1);
|
||||
virtual void machine_start();
|
||||
@ -52,8 +59,4 @@ public:
|
||||
UINT32 screen_update_yunsun16(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void draw_sprites( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect );
|
||||
DECLARE_WRITE_LINE_MEMBER(soundirq);
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
required_device<screen_device> m_screen;
|
||||
required_device<palette_device> m_palette;
|
||||
};
|
||||
|
@ -357,4 +357,8 @@ READ8_MEMBER(mie_device::jvs_sense_r)
|
||||
|
||||
void mie_device::maple_reset()
|
||||
{
|
||||
// ignoring reset maple pattern is HUGE HACK
|
||||
// current implementation works only because of in such case procedure of firmware upload by games will be skipped at all
|
||||
// so in better case - inputs doesnt work if game uses very different firmware version than already uploaded by BIOS, in worst case - game hang/reboot
|
||||
// TODO: figure out why game code doesn't wait long enough for internal firmware's RAM test completed in the case of proper reset
|
||||
}
|
||||
|
@ -54,7 +54,6 @@ static const struct game_keys keys_table[] =
|
||||
{ "samba", 0x000a8b5d }, // 840-0020 1999
|
||||
{ "sambap", 0x000a8b5d }, // 840-0020 1999
|
||||
{ "virnbao", 0x00068b58 }, // 840-0021 2000
|
||||
{ "tduno2", 0x2f6f0f8d }, // 840-0022 2000
|
||||
{ "18wheelr", 0x0007cf54 }, // 840-0023 2000
|
||||
{ "marstv", 0x000b8ef5 }, // 840-0025 1999
|
||||
{ "vonot", 0x00010715 }, // 840-0028 2000
|
||||
@ -89,6 +88,7 @@ static const struct game_keys keys_table[] =
|
||||
{ "zerogu2", 0x0007c010 }, // 841-0020 2001
|
||||
{ "hmgeo", 0x00038510 }, // HMG016007 2001
|
||||
// M1
|
||||
{ "tduno2", 0x2f6f0f8d }, // 840-0022 2000
|
||||
{ "qmegamis", 0x96489bcd }, // 840-0030 2000
|
||||
{ "gram2000", 0x3f5c807f }, // 840-0039 2000
|
||||
{ "vtenis2c", 0x43472d2d }, // 840-0084 2001
|
||||
@ -99,13 +99,6 @@ static const struct game_keys keys_table[] =
|
||||
{ "kick4csh", 0xc9570882 }, // 840-0140 2004
|
||||
{ "mtkob2", 0x3892fb3a }, // 840-0150 2003
|
||||
{ "mvsc2", 0x7c6e8bc1 }, // 841-0007-02 2000
|
||||
// M4
|
||||
{ "pokasuka", 0x4792bcde }, // 840-0170 2007
|
||||
{ "asndynmt", 0x00008784 }, // 840-0175 2007
|
||||
{ "sl2007", 0x88c274c7 }, // 841-0057 2007
|
||||
{ "ausfache", 0x092b6007 }, // 841-0058 2008
|
||||
{ "illvelo", 0xf3a5982c }, // 841-0059 2008
|
||||
{ "mbaa", 0xab0f2aba }, // 841-0061 2008
|
||||
{ NULL, 0 } // end of table
|
||||
};
|
||||
|
||||
|
@ -60,15 +60,10 @@ void naomi_m4_board::device_start()
|
||||
{
|
||||
naomi_board::device_start();
|
||||
|
||||
#if USE_NAOMICRYPT
|
||||
UINT32 tempkey = get_naomi_key(machine());
|
||||
iv = (tempkey >> 16) &0xffff;
|
||||
key = tempkey & 0xffff;
|
||||
#else
|
||||
const UINT8 *key_data = memregion(key_tag)->base();
|
||||
subkey1 = (key_data[17] << 8) | key_data[16];
|
||||
subkey2 = (key_data[19] << 8) | key_data[18];
|
||||
#endif
|
||||
subkey1 = (key_data[0x5e2] << 8) | key_data[0x5e0];
|
||||
subkey2 = (key_data[0x5e6] << 8) | key_data[0x5e4];
|
||||
|
||||
buffer = auto_alloc_array(machine(), UINT8, BUFFER_SIZE);
|
||||
enc_init();
|
||||
|
||||
|
@ -498,8 +498,8 @@ void pgm_arm_type3_state::pgm_create_dummy_internal_arm_region_theglad(int is_sv
|
||||
temp16[(base) /2] = 0xff1e; base += 2;
|
||||
temp16[(base) /2] = 0xe12f; base += 2;
|
||||
|
||||
// the non-EO area starts in the middle of a function that seems similar to those at 000037E4 / 000037D4 in killbldp.. by setting this up we allow the intro to run
|
||||
// it sets '0x10000038' to a value ot 1
|
||||
// the non-EO area starts in the middle of a function that seems similar to those at 000037E4 / 000037D4 in killbldp. by setting this up we allow the intro to run
|
||||
// it sets '0x10000038' to a value of 1
|
||||
base = 0x184;
|
||||
temp16[(base) /2] = 0x105c; base += 2;
|
||||
temp16[(base) /2] = 0xE59F; base += 2;
|
||||
|
@ -1485,9 +1485,9 @@ void raiden2cop_device::LEGACY_execute_c480(address_space &space, int offset, UI
|
||||
*/
|
||||
void raiden2cop_device::LEGACY_execute_d104(address_space &space, int offset, UINT16 data)
|
||||
{
|
||||
UINT8 *ROM = space.machine().root_device().memregion("maincpu")->base();
|
||||
UINT32 rom_addr = (m_cop_rom_addr_hi << 16 | m_cop_rom_addr_lo) & ~1;
|
||||
UINT16 rom_data = (ROM[rom_addr + 0]) | (ROM[rom_addr + 1] << 8);
|
||||
UINT16 *ROM = (UINT16 *)space.machine().root_device().memregion("maincpu")->base();
|
||||
UINT32 rom_addr = (m_cop_rom_addr_hi << 16 | m_cop_rom_addr_lo);
|
||||
UINT16 rom_data = ROM[rom_addr / 2];
|
||||
|
||||
/* writes to some unemulated COP registers, then puts the result in here, adding a parameter taken from ROM */
|
||||
//space.write_word(cop_regs[0]+(0x44 + offset * 4), rom_data);
|
||||
|
@ -5102,7 +5102,20 @@ ecap // 1999.12 Emergency Call Ambulance - US proto or location test
|
||||
|
||||
// Sega Lindbergh games
|
||||
lindbios
|
||||
|
||||
hotd4
|
||||
vf5
|
||||
abclimax
|
||||
letsgoju
|
||||
outr2sdx
|
||||
psmash3
|
||||
vtennis3
|
||||
initiad4
|
||||
initiad4c
|
||||
segartv
|
||||
hotdex
|
||||
rambo
|
||||
hummerxt
|
||||
lbvbiosu
|
||||
|
||||
// Deniam games
|
||||
// they run on Sega System 16 video hardware
|
||||
@ -6931,6 +6944,7 @@ quantump // 136016 (c) 1982 // made by Gencomp
|
||||
bwidow // 136017 (c) 1982
|
||||
starwars // 136021 (c) 1983
|
||||
starwars1 // 136021 (c) 1983
|
||||
starwarso // 136021 (c) 1983
|
||||
tomcatsw // (proto) (c) 1983
|
||||
mhavoc // 136025 (c) 1983
|
||||
mhavoc2 // 136025 (c) 1983
|
||||
@ -10339,6 +10353,7 @@ thedeep // (c) 1987 Wood Place
|
||||
rundeep // (c) 1988 Cream (bootleg?)
|
||||
wallc // (c) 1984 Midcoin
|
||||
wallca // (c) 1984 Midcoin
|
||||
brkblast // bootleg (Fadesa)
|
||||
sidampkr //
|
||||
wink // (c) 1985 Midcoin
|
||||
winka // (c) 1985 Midcoin
|
||||
|
@ -988,6 +988,7 @@ $(MAMEOBJ)/capcom.a: \
|
||||
$(DRIVERS)/alien.o \
|
||||
$(DRIVERS)/bionicc.o $(VIDEO)/bionicc.o \
|
||||
$(DRIVERS)/supduck.o \
|
||||
$(VIDEO)/tigeroad_spr.o \
|
||||
$(DRIVERS)/blktiger.o $(VIDEO)/blktiger.o \
|
||||
$(DRIVERS)/cbasebal.o $(VIDEO)/cbasebal.o \
|
||||
$(DRIVERS)/commando.o $(VIDEO)/commando.o \
|
||||
@ -1694,7 +1695,7 @@ $(MAMEOBJ)/sega.a: \
|
||||
$(DRIVERS)/bingoc.o \
|
||||
$(DRIVERS)/blockade.o $(AUDIO)/blockade.o $(VIDEO)/blockade.o \
|
||||
$(DRIVERS)/calorie.o \
|
||||
$(DRIVERS)/chihiro.o \
|
||||
$(DRIVERS)/chihiro.o $(VIDEO)/chihiro.o \
|
||||
$(DRIVERS)/coolridr.o \
|
||||
$(DRIVERS)/deniam.o $(VIDEO)/deniam.o \
|
||||
$(DRIVERS)/dotrikun.o \
|
||||
|
@ -185,43 +185,7 @@ WRITE16_MEMBER(bionicc_state::bionicc_gfxctrl_w)
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
void bionicc_state::draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect )
|
||||
{
|
||||
UINT16 *buffered_spriteram = m_spriteram->buffer();
|
||||
int offs;
|
||||
gfx_element *gfx = m_gfxdecode->gfx(3);
|
||||
|
||||
for (offs = (m_spriteram->bytes() - 8) / 2; offs >= 0; offs -= 4)
|
||||
{
|
||||
int tile_number = buffered_spriteram[offs] & 0x7ff;
|
||||
if( tile_number != 0x7ff )
|
||||
{
|
||||
int attr = buffered_spriteram[offs + 1];
|
||||
int color = (attr & 0x3c) >> 2;
|
||||
int flipx = attr & 0x02;
|
||||
int flipy = 0;
|
||||
int sx = (INT16)buffered_spriteram[offs + 3]; /* signed */
|
||||
int sy = (INT16)buffered_spriteram[offs + 2]; /* signed */
|
||||
|
||||
if (sy > 512 - 16)
|
||||
sy -= 512;
|
||||
|
||||
if (flip_screen())
|
||||
{
|
||||
sx = 240 - sx;
|
||||
sy = 240 - sy;
|
||||
flipx = !flipx;
|
||||
flipy = !flipy;
|
||||
}
|
||||
|
||||
gfx->transpen(bitmap,cliprect,
|
||||
tile_number,
|
||||
color,
|
||||
flipx,flipy,
|
||||
sx,sy,15);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
UINT32 bionicc_state::screen_update_bionicc(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
@ -229,7 +193,7 @@ UINT32 bionicc_state::screen_update_bionicc(screen_device &screen, bitmap_ind16
|
||||
m_fg_tilemap->draw(screen, bitmap, cliprect, 1 | TILEMAP_DRAW_LAYER1, 0); /* nothing in FRONT */
|
||||
m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0);
|
||||
m_fg_tilemap->draw(screen, bitmap, cliprect, 0 | TILEMAP_DRAW_LAYER1, 0);
|
||||
draw_sprites(bitmap, cliprect);
|
||||
m_spritegen->draw_sprites(bitmap, cliprect, m_gfxdecode, 3, m_spriteram->buffer(), m_spriteram->bytes(), flip_screen(), 0 );
|
||||
m_fg_tilemap->draw(screen, bitmap, cliprect, 0 | TILEMAP_DRAW_LAYER0, 0);
|
||||
m_tx_tilemap->draw(screen, bitmap, cliprect, 0, 0);
|
||||
return 0;
|
||||
|
@ -248,7 +248,7 @@ void bosco_state::draw_stars(bitmap_ind16 &bitmap, const rectangle &cliprect, in
|
||||
x = (m_star_seed_tab[star_cntr].x + m_stars_scrollx) % 256;
|
||||
y = (m_star_seed_tab[star_cntr].y + m_stars_scrolly) % 256;
|
||||
|
||||
/* dont draw the stars that are off the screen */
|
||||
/* don't draw the stars that are off the screen */
|
||||
if ( x < 224 )
|
||||
{
|
||||
if (flip) x += 64;
|
||||
|
@ -303,8 +303,8 @@ void btime_state::draw_chars( bitmap_ind16 &bitmap, const rectangle &cliprect, U
|
||||
|
||||
if (flip_screen())
|
||||
{
|
||||
x = 31 + 16 - x;
|
||||
y = 33 - y;
|
||||
x = 31 - x;
|
||||
y = 31 - y;
|
||||
}
|
||||
|
||||
m_gfxdecode->gfx(0)->transpen(bitmap,cliprect,
|
||||
@ -339,8 +339,8 @@ void btime_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect,
|
||||
|
||||
if (flip_screen())
|
||||
{
|
||||
x = 240 + 128 - x;
|
||||
y = 256 - y + sprite_y_adjust_flip_screen;
|
||||
x = 240 - x;
|
||||
y = 240 - y + sprite_y_adjust_flip_screen;
|
||||
|
||||
flipx = !flipx;
|
||||
flipy = !flipy;
|
||||
@ -391,8 +391,8 @@ void btime_state::draw_background( bitmap_ind16 &bitmap, const rectangle &clipre
|
||||
|
||||
if (flip_screen())
|
||||
{
|
||||
x = 240 + 128 - x;
|
||||
y = 256 - y;
|
||||
x = 240 - x;
|
||||
y = 240 - y;
|
||||
}
|
||||
|
||||
m_gfxdecode->gfx(2)->opaque(bitmap,cliprect,
|
||||
@ -488,7 +488,7 @@ UINT32 btime_state::screen_update_bnj(screen_device &screen, bitmap_ind16 &bitma
|
||||
if (flip_screen())
|
||||
{
|
||||
sx = 496 - sx;
|
||||
sy = 256 - sy;
|
||||
sy = 240 - sy;
|
||||
}
|
||||
|
||||
m_gfxdecode->gfx(2)->opaque(*m_background_bitmap,m_background_bitmap->cliprect(),
|
||||
@ -534,7 +534,7 @@ UINT32 btime_state::screen_update_cookrace(screen_device &screen, bitmap_ind16 &
|
||||
if (flip_screen())
|
||||
{
|
||||
sx = 31 - sx;
|
||||
sy = 33 - sy;
|
||||
sy = 31 - sy;
|
||||
}
|
||||
|
||||
m_gfxdecode->gfx(2)->opaque(bitmap,cliprect,
|
||||
|
3528
src/mame/video/chihiro.c
Normal file
3528
src/mame/video/chihiro.c
Normal file
File diff suppressed because it is too large
Load Diff
@ -55,47 +55,6 @@ WRITE16_MEMBER( galpani2_bg8_regs_0_w ) { galpani2_bg8_regs_w(space, offset, dat
|
||||
WRITE16_MEMBER( galpani2_bg8_regs_1_w ) { galpani2_bg8_regs_w(space, offset, data, mem_mask, 1); }
|
||||
#endif
|
||||
|
||||
inline void galpani2_state::galpani2_bg8_w(offs_t offset, UINT16 data, UINT16 mem_mask, int _n_)
|
||||
{
|
||||
int x,y,pen;
|
||||
UINT16 newword = COMBINE_DATA(&m_bg8[_n_][offset]);
|
||||
pen = newword & 0xff;
|
||||
x = (offset % 512); /* 512 x 256 */
|
||||
y = (offset / 512);
|
||||
m_bg8_bitmap[_n_]->pix16(y, x) = 0x4000 + pen;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( galpani2_state::galpani2_bg8_0_w ) { galpani2_bg8_w(offset, data, mem_mask, 0); }
|
||||
WRITE16_MEMBER( galpani2_state::galpani2_bg8_1_w ) { galpani2_bg8_w(offset, data, mem_mask, 1); }
|
||||
|
||||
inline void galpani2_state::galpani2_palette_w(offs_t offset, UINT16 data, UINT16 mem_mask, int _n_)
|
||||
{
|
||||
UINT16 newword = COMBINE_DATA(&m_palette_val[_n_][offset]);
|
||||
m_palette->set_pen_color( offset + 0x4000 + _n_ * 0x100, pal5bit(newword >> 5), pal5bit(newword >> 10), pal5bit(newword >> 0) );
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( galpani2_state::galpani2_palette_0_w ) { galpani2_palette_w(offset, data, mem_mask, 0); }
|
||||
WRITE16_MEMBER( galpani2_state::galpani2_palette_1_w ) { galpani2_palette_w(offset, data, mem_mask, 1); }
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
|
||||
|
||||
xRGB Background Layer
|
||||
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
/* 8 horizontal pages of 256x256 pixels? */
|
||||
WRITE16_MEMBER( galpani2_state::galpani2_bg15_w )
|
||||
{
|
||||
UINT16 newword = COMBINE_DATA(&m_bg15[offset]);
|
||||
|
||||
int x = (offset % 256) + (offset / (256*256)) * 256 ;
|
||||
int y = (offset / 256) % 256;
|
||||
|
||||
m_bg15_bitmap->pix16(y, x) = 0x4200 + (newword & 0x7fff);
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
@ -113,14 +72,11 @@ PALETTE_INIT_MEMBER(galpani2_state, galpani2)
|
||||
|
||||
/* initialize 555 RGB lookup */
|
||||
for (i = 0; i < 0x8000; i++)
|
||||
palette.set_pen_color(0x4200+i,pal5bit(i >> 5),pal5bit(i >> 10),pal5bit(i >> 0));
|
||||
palette.set_pen_color(i,pal5bit(i >> 5),pal5bit(i >> 10),pal5bit(i >> 0));
|
||||
}
|
||||
|
||||
void galpani2_state::video_start()
|
||||
{
|
||||
m_bg15_bitmap = auto_bitmap_ind16_alloc(machine(), 256*8, 256);
|
||||
m_bg8_bitmap[0] = auto_bitmap_ind16_alloc(machine(), 512, 256);
|
||||
m_bg8_bitmap[1] = auto_bitmap_ind16_alloc(machine(), 512, 256);
|
||||
}
|
||||
|
||||
|
||||
@ -132,11 +88,53 @@ void galpani2_state::video_start()
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
UINT32 galpani2_state::screen_update_galpani2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
// based on videos these 8-bit layers actually get *blended* against the RGB555 layer
|
||||
// it should be noted that in the layer at 0x500000 the upper 8 bits are set too, this could be related
|
||||
void galpani2_state::copybg8(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int layer)
|
||||
{
|
||||
int x = - ( *m_bg8_scrollx[layer] + 0x200 - 0x0f5 );
|
||||
int y = - ( *m_bg8_scrolly[layer] + 0x200 - 0x1be );
|
||||
UINT16* ram = m_bg8[layer];
|
||||
|
||||
const pen_t *clut = &m_bg8palette->pen(0);
|
||||
for (int xx = 0; xx < 320; xx++)
|
||||
{
|
||||
for (int yy = 0; yy < 240; yy++)
|
||||
{
|
||||
UINT16 pen = ram[(((y + yy) & 0xff) * 512) + ((x + xx) & 0x1ff)];
|
||||
if (pen) bitmap.pix32(yy, xx) = clut[pen & 0xff];
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// this seems to be 256x256 pages (arranged as 1024*256), but the game resolution is 320x240
|
||||
// https://www.youtube.com/watch?v=2b2SLFtC0uA is a video of the galpanic2j set, and shows the RGB pattern at
|
||||
// startup covering all screen lines - is the hardware mixing bitmaps of different resolutions or is there a
|
||||
// line select somewhere? I should find the gal images and find what resolution they're stored at too.
|
||||
// (or is this just wrong format / layout due to protection?)
|
||||
void galpani2_state::copybg15(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
UINT16* ram = m_bg15 + 0x40000/2;
|
||||
|
||||
//int x = 0;
|
||||
//int y = 0;
|
||||
|
||||
const pen_t *clut = &m_bg15palette->pen(0);
|
||||
for (int xx = 0; xx < 320; xx++)
|
||||
{
|
||||
for (int yy = 0; yy < 240; yy++)
|
||||
{
|
||||
UINT16 pen = ram[(xx * 0x800) + yy];
|
||||
bitmap.pix32(yy, xx) = clut[pen & 0x7fff];
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
UINT32 galpani2_state::screen_update_galpani2(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
int layers_ctrl = -1;
|
||||
|
||||
#ifdef MAME_DEBUG
|
||||
#if 1 // MAME_DEBUG
|
||||
if (machine().input().code_pressed(KEYCODE_Z))
|
||||
{
|
||||
int msk = 0;
|
||||
@ -151,39 +149,15 @@ if (machine().input().code_pressed(KEYCODE_Z))
|
||||
bitmap.fill(0, cliprect);
|
||||
screen.priority().fill(0, cliprect);
|
||||
|
||||
if (layers_ctrl & 0x1)
|
||||
{
|
||||
int x = 0;
|
||||
int y = 0;
|
||||
copyscrollbitmap_trans(bitmap, *m_bg15_bitmap,
|
||||
1, &x, 1, &y,
|
||||
cliprect,0x4200 + 0);
|
||||
}
|
||||
|
||||
/* test mode:
|
||||
304000:0040 0000 0100 0000-0000 0000 0000 0000 (Sprite regs)
|
||||
304010:16C0 0200 16C0 0200-16C0 0200 16C0 0200
|
||||
16c0/40 = 5b 200/40 = 8
|
||||
scrollx = f5, on screen x should be 0 (f5+5b = 150) */
|
||||
|
||||
if (layers_ctrl & 0x2)
|
||||
{
|
||||
int x = - ( *m_bg8_scrollx[0] + 0x200 - 0x0f5 );
|
||||
int y = - ( *m_bg8_scrolly[0] + 0x200 - 0x1be );
|
||||
copyscrollbitmap_trans(bitmap, *m_bg8_bitmap[0],
|
||||
1, &x, 1, &y,
|
||||
cliprect,0x4000 + 0);
|
||||
}
|
||||
|
||||
if (layers_ctrl & 0x4)
|
||||
{
|
||||
int x = - ( *m_bg8_scrollx[1] + 0x200 - 0x0f5 );
|
||||
int y = - ( *m_bg8_scrolly[1] + 0x200 - 0x1be );
|
||||
copyscrollbitmap_trans(bitmap, *m_bg8_bitmap[1],
|
||||
1, &x, 1, &y,
|
||||
cliprect,0x4000 + 0);
|
||||
}
|
||||
|
||||
if (layers_ctrl & 0x1) copybg15(screen, bitmap, cliprect);
|
||||
if (layers_ctrl & 0x2) copybg8(screen, bitmap, cliprect, 0);
|
||||
if (layers_ctrl & 0x4) copybg8(screen, bitmap, cliprect, 1);
|
||||
if (layers_ctrl & 0x8) m_kaneko_spr->kaneko16_render_sprites(bitmap, cliprect, screen.priority(), m_spriteram, m_spriteram.bytes());
|
||||
return 0;
|
||||
}
|
||||
|
@ -45,12 +45,10 @@ WRITE8_MEMBER(mjkjidai_state::mjkjidai_videoram_w)
|
||||
|
||||
WRITE8_MEMBER(mjkjidai_state::mjkjidai_ctrl_w)
|
||||
{
|
||||
UINT8 *rom = memregion("maincpu")->base();
|
||||
|
||||
// logerror("%04x: port c0 = %02x\n",space.device().safe_pc(),data);
|
||||
|
||||
/* bit 0 = NMI enable */
|
||||
m_nmi_mask = data & 1;
|
||||
m_nmi_enable = data & 1;
|
||||
|
||||
/* bit 1 = flip screen */
|
||||
flip_screen_set(data & 0x02);
|
||||
@ -62,15 +60,7 @@ WRITE8_MEMBER(mjkjidai_state::mjkjidai_ctrl_w)
|
||||
coin_counter_w(machine(), 0,data & 0x20);
|
||||
|
||||
/* bits 6-7 select ROM bank */
|
||||
if (data & 0xc0)
|
||||
{
|
||||
membank("bank1")->set_base(rom + 0x10000-0x4000 + ((data & 0xc0) << 8));
|
||||
}
|
||||
else
|
||||
{
|
||||
/* there is code flowing from 7fff to this bank so they have to be contiguous in memory */
|
||||
membank("bank1")->set_base(rom + 0x08000);
|
||||
}
|
||||
membank("bank1")->set_entry(data >> 6);
|
||||
}
|
||||
|
||||
|
||||
@ -83,9 +73,9 @@ WRITE8_MEMBER(mjkjidai_state::mjkjidai_ctrl_w)
|
||||
|
||||
void mjkjidai_state::draw_sprites(bitmap_ind16 &bitmap,const rectangle &cliprect)
|
||||
{
|
||||
UINT8 *spriteram = m_spriteram1;
|
||||
UINT8 *spriteram_2 = m_spriteram2;
|
||||
UINT8 *spriteram_3 = m_spriteram3;
|
||||
UINT8 *spriteram = &m_videoram[0];
|
||||
UINT8 *spriteram_2 = &m_videoram[0x800];
|
||||
UINT8 *spriteram_3 = &m_videoram[0x1000];
|
||||
int offs;
|
||||
|
||||
for (offs = 0x20-2;offs >= 0;offs -= 2)
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user