mirror of
https://github.com/holub/mame
synced 2025-04-22 16:31:49 +03:00
i8085: moved opcode macros to main file, will convert these to functions (nw)
This commit is contained in:
hap
parent
49aac0d2b3
commit
7a900dd692
@ -832,7 +832,6 @@ if (CPUS["I8085"]~=null) then
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files {
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MAME_DIR .. "src/devices/cpu/i8085/i8085.cpp",
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MAME_DIR .. "src/devices/cpu/i8085/i8085.h",
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MAME_DIR .. "src/devices/cpu/i8085/i8085ops.hxx",
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}
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end
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@ -1,5 +1,6 @@
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// license:BSD-3-Clause
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// copyright-holders:Juergen Buchmueller, hap
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// thanks-to:Marcel De Kogel
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/*****************************************************************************
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*
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* i8085.c
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@ -103,7 +104,6 @@
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#include "emu.h"
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#include "debugger.h"
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#include "i8085.h"
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#include "i8085ops.hxx"
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#define VERBOSE 0
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#include "logmacro.h"
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@ -114,12 +114,36 @@
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/***************************************************************************
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MACROS
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MACROS AND CONSTANTS
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***************************************************************************/
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#define IS_8080() (m_cputype == CPUTYPE_8080)
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#define IS_8085() (m_cputype == CPUTYPE_8085)
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#define SF 0x80
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#define ZF 0x40
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#define X5F 0x20
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#define HF 0x10
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#define X3F 0x08
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#define PF 0x04
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#define VF 0x02
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#define CF 0x01
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#define IM_SID 0x80
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#define IM_I75 0x40
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#define IM_I65 0x20
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#define IM_I55 0x10
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#define IM_IE 0x08
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#define IM_M75 0x04
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#define IM_M65 0x02
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#define IM_M55 0x01
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#define ADDR_TRAP 0x0024
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#define ADDR_RST55 0x002c
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#define ADDR_RST65 0x0034
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#define ADDR_RST75 0x003c
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#define ADDR_INTR 0x0038
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/***************************************************************************
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@ -186,7 +210,6 @@ i8085a_cpu_device::i8085a_cpu_device(const machine_config &mconfig, const char *
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{
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}
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i8085a_cpu_device::i8085a_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int cputype)
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: cpu_device(mconfig, type, tag, owner, clock)
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, m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0)
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@ -199,13 +222,11 @@ i8085a_cpu_device::i8085a_cpu_device(const machine_config &mconfig, device_type
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{
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}
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i8080_cpu_device::i8080_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: i8085a_cpu_device(mconfig, I8080, tag, owner, clock, CPUTYPE_8080)
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{
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}
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i8080a_cpu_device::i8080a_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: i8085a_cpu_device(mconfig, I8080A, tag, owner, clock, CPUTYPE_8080)
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{
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@ -235,6 +256,10 @@ void i8085a_cpu_device::device_clock_changed()
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}
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/***************************************************************************
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OPCODE HELPERS
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***************************************************************************/
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void i8085a_cpu_device::set_sod(int state)
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{
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if (state != 0 && m_sod_state == 0)
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@ -290,21 +315,6 @@ uint8_t i8085a_cpu_device::get_rim_value()
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return result;
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}
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void i8085a_cpu_device::break_halt_for_interrupt()
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{
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/* de-halt if necessary */
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if (m_HALT)
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{
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m_PC.w.l++;
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m_HALT = 0;
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set_status(0x26); /* int ack while halt */
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}
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else
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set_status(0x23); /* int ack */
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}
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uint8_t i8085a_cpu_device::ROP()
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{
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set_status(0xa2); // instruction fetch
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@ -339,6 +349,197 @@ void i8085a_cpu_device::WM(uint32_t a, uint8_t v)
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}
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#define M_MVI(R) R=ARG()
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/* rotate */
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#define M_RLC { \
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m_AF.b.h = (m_AF.b.h << 1) | (m_AF.b.h >> 7); \
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m_AF.b.l = (m_AF.b.l & 0xfe) | (m_AF.b.h & CF); \
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}
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#define M_RRC { \
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m_AF.b.l = (m_AF.b.l & 0xfe) | (m_AF.b.h & CF); \
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m_AF.b.h = (m_AF.b.h >> 1) | (m_AF.b.h << 7); \
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}
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#define M_RAL { \
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int c = m_AF.b.l&CF; \
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m_AF.b.l = (m_AF.b.l & 0xfe) | (m_AF.b.h >> 7); \
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m_AF.b.h = (m_AF.b.h << 1) | c; \
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}
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#define M_RAR { \
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int c = (m_AF.b.l&CF) << 7; \
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m_AF.b.l = (m_AF.b.l & 0xfe) | (m_AF.b.h & CF); \
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m_AF.b.h = (m_AF.b.h >> 1) | c; \
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}
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/* logical */
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#define M_ORA(R) m_AF.b.h|=R; m_AF.b.l=ZSP[m_AF.b.h]
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#define M_XRA(R) m_AF.b.h^=R; m_AF.b.l=ZSP[m_AF.b.h]
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#define M_ANA(R) {uint8_t hc = ((m_AF.b.h | R)<<1) & HF; m_AF.b.h&=R; m_AF.b.l=ZSP[m_AF.b.h]; if(IS_8085()) { m_AF.b.l |= HF; } else {m_AF.b.l |= hc; } }
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/* increase / decrease */
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#define M_INR(R) {uint8_t hc = ((R & 0x0f) == 0x0f) ? HF : 0; ++R; m_AF.b.l= (m_AF.b.l & CF ) | ZSP[R] | hc; }
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#define M_DCR(R) {uint8_t hc = ((R & 0x0f) != 0x00) ? HF : 0; --R; m_AF.b.l= (m_AF.b.l & CF ) | ZSP[R] | hc | VF; }
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/* arithmetic */
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#define M_ADD(R) { \
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int q = m_AF.b.h+R; \
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m_AF.b.l=ZSP[q&255]|((q>>8)&CF)|((m_AF.b.h^q^R)&HF); \
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m_AF.b.h=q; \
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}
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#define M_ADC(R) { \
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int q = m_AF.b.h+R+(m_AF.b.l&CF); \
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m_AF.b.l=ZSP[q&255]|((q>>8)&CF)|((m_AF.b.h^q^R)&HF); \
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m_AF.b.h=q; \
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}
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#define M_SUB(R) { \
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int q = m_AF.b.h-R; \
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m_AF.b.l=ZSP[q&255]|((q>>8)&CF)|(~(m_AF.b.h^q^R)&HF)|VF; \
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m_AF.b.h=q; \
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}
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#define M_SBB(R) { \
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int q = m_AF.b.h-R-(m_AF.b.l&CF); \
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m_AF.b.l=ZSP[q&255]|((q>>8)&CF)|(~(m_AF.b.h^q^R)&HF)|VF; \
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m_AF.b.h=q; \
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}
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#define M_CMP(R) { \
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int q = m_AF.b.h-R; \
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m_AF.b.l=ZSP[q&255]|((q>>8)&CF)|(~(m_AF.b.h^q^R)&HF)|VF; \
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}
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#define M_DAD(R) { \
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int q = m_HL.d + m_##R.d; \
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m_AF.b.l = (m_AF.b.l & ~CF) | (q>>16 & CF ); \
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m_HL.w.l = q; \
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}
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// DSUB is 8085-only, not sure if H flag handling is correct
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#define M_DSUB() { \
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int q = m_HL.b.l-m_BC.b.l; \
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m_AF.b.l=ZS[q&255]|((q>>8)&CF)|VF| \
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((m_HL.b.l^q^m_BC.b.l)&HF)| \
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(((m_BC.b.l^m_HL.b.l)&(m_HL.b.l^q)&SF)>>5); \
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m_HL.b.l=q; \
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q = m_HL.b.h-m_BC.b.h-(m_AF.b.l&CF); \
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m_AF.b.l=ZS[q&255]|((q>>8)&CF)|VF| \
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((m_HL.b.h^q^m_BC.b.h)&HF)| \
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(((m_BC.b.h^m_HL.b.h)&(m_HL.b.h^q)&SF)>>5); \
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if (m_HL.b.l!=0) m_AF.b.l&=~ZF; \
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}
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/* i/o */
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#define M_IN \
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set_status(0x42); \
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m_WZ.d=ARG(); \
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m_AF.b.h=m_io->read_byte(m_WZ.d);
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#define M_OUT \
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set_status(0x10); \
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m_WZ.d=ARG(); \
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m_io->write_byte(m_WZ.d,m_AF.b.h)
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/* stack */
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#define M_PUSH(R) { \
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set_status(0x04); \
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m_program->write_byte(--m_SP.w.l, m_##R.b.h); \
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m_program->write_byte(--m_SP.w.l, m_##R.b.l); \
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}
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#define M_POP(R) { \
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set_status(0x86); \
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m_##R.b.l = m_program->read_byte(m_SP.w.l++); \
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m_##R.b.h = m_program->read_byte(m_SP.w.l++); \
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}
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/* jumps */
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// On 8085 jump if condition is not satisfied is shorter
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#define M_JMP(cc) { \
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if (cc) { \
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m_PC.w.l = ARG16(); \
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} else { \
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m_PC.w.l += 2; \
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m_icount += (IS_8085()) ? 3 : 0; \
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} \
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}
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// On 8085 call if condition is not satisfied is 9 ticks
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#define M_CALL(cc) \
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{ \
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if (cc) \
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{ \
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uint16_t a = ARG16(); \
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m_icount -= (IS_8085()) ? 7 : 6 ; \
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M_PUSH(PC); \
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m_PC.d = a; \
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} else { \
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m_PC.w.l += 2; \
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m_icount += (IS_8085()) ? 2 : 0; \
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} \
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}
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// conditional RET only
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#define M_RET(cc) \
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{ \
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if (cc) \
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{ \
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m_icount -= 6; \
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M_POP(PC); \
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} \
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}
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#define M_RST(nn) { \
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M_PUSH(PC); \
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m_PC.d = 8 * nn; \
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}
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/***************************************************************************
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INTERRUPTS
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***************************************************************************/
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void i8085a_cpu_device::execute_set_input(int irqline, int state)
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{
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int newstate = (state != CLEAR_LINE);
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/* NMI is edge-triggered */
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if (irqline == INPUT_LINE_NMI)
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{
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if (!m_nmi_state && newstate)
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m_trap_pending = true;
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m_nmi_state = newstate;
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}
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/* RST7.5 is edge-triggered */
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else if (irqline == I8085_RST75_LINE)
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{
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if (!m_irq_state[I8085_RST75_LINE] && newstate)
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m_IM |= IM_I75;
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m_irq_state[I8085_RST75_LINE] = newstate;
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}
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/* remaining sources are level triggered */
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else if (irqline < ARRAY_LENGTH(m_irq_state))
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m_irq_state[irqline] = state;
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}
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void i8085a_cpu_device::break_halt_for_interrupt()
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{
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/* de-halt if necessary */
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if (m_HALT)
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{
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m_PC.w.l++;
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m_HALT = 0;
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set_status(0x26); /* int ack while halt */
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}
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else
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set_status(0x23); /* int ack */
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}
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void i8085a_cpu_device::check_for_interrupts()
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{
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/* TRAP is the highest priority */
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@ -436,6 +637,30 @@ void i8085a_cpu_device::check_for_interrupts()
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}
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}
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/***************************************************************************
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COMMON EXECUTION
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***************************************************************************/
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void i8085a_cpu_device::execute_run()
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{
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/* check for TRAPs before diving in (can't do others because of after_ei) */
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if (m_trap_pending || m_after_ei == 0)
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check_for_interrupts();
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do
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{
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debugger_instruction_hook(this, m_PC.d);
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/* the instruction after an EI does not take an interrupt, so
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we cannot check immediately; handle post-EI behavior here */
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if (m_after_ei != 0 && --m_after_ei == 0)
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check_for_interrupts();
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/* here we go... */
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execute_one(ROP());
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} while (m_icount > 0);
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}
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void i8085a_cpu_device::execute_one(int opcode)
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{
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@ -1199,30 +1424,6 @@ void i8085a_cpu_device::execute_one(int opcode)
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}
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/***************************************************************************
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COMMON EXECUTION
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***************************************************************************/
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void i8085a_cpu_device::execute_run()
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{
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/* check for TRAPs before diving in (can't do others because of after_ei) */
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if (m_trap_pending || m_after_ei == 0)
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check_for_interrupts();
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do
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{
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debugger_instruction_hook(this, m_PC.d);
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/* the instruction after an EI does not take an interrupt, so
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we cannot check immediately; handle post-EI behavior here */
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if (m_after_ei != 0 && --m_after_ei == 0)
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check_for_interrupts();
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/* here we go... */
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execute_one(ROP());
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} while (m_icount > 0);
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}
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@ -1428,30 +1629,7 @@ void i8085a_cpu_device::state_string_export(const device_state_entry &entry, std
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}
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void i8085a_cpu_device::execute_set_input(int irqline, int state)
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{
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int newstate = (state != CLEAR_LINE);
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/* NMI is edge-triggered */
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if (irqline == INPUT_LINE_NMI)
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{
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if (!m_nmi_state && newstate)
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m_trap_pending = true;
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m_nmi_state = newstate;
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}
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/* RST7.5 is edge-triggered */
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else if (irqline == I8085_RST75_LINE)
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{
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if (!m_irq_state[I8085_RST75_LINE] && newstate)
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m_IM |= IM_I75;
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m_irq_state[I8085_RST75_LINE] = newstate;
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}
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/* remaining sources are level triggered */
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else if (irqline < ARRAY_LENGTH(m_irq_state))
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m_irq_state[irqline] = state;
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}
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offs_t i8085a_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
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@ -108,26 +108,26 @@ private:
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address_space_config m_program_config;
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address_space_config m_io_config;
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devcb_write8 m_out_status_func;
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devcb_write_line m_out_inte_func;
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devcb_read_line m_in_sid_func;
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devcb_write_line m_out_sod_func;
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devcb_write8 m_out_status_func;
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devcb_write_line m_out_inte_func;
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devcb_read_line m_in_sid_func;
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devcb_write_line m_out_sod_func;
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clock_update_delegate m_clk_out_func;
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int m_cputype; /* 0 8080, 1 8085A */
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PAIR m_PC,m_SP,m_AF,m_BC,m_DE,m_HL,m_WZ;
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uint8_t m_HALT;
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uint8_t m_IM; /* interrupt mask (8085A only) */
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uint8_t m_STATUS; /* status word */
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int m_cputype; /* 0 8080, 1 8085A */
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PAIR m_PC,m_SP,m_AF,m_BC,m_DE,m_HL,m_WZ;
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uint8_t m_HALT;
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uint8_t m_IM; /* interrupt mask (8085A only) */
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uint8_t m_STATUS; /* status word */
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uint8_t m_after_ei; /* post-EI processing; starts at 2, check for ints at 0 */
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uint8_t m_nmi_state; /* raw NMI line state */
|
||||
uint8_t m_irq_state[4]; /* raw IRQ line states */
|
||||
uint8_t m_trap_pending; /* TRAP interrupt latched? */
|
||||
uint8_t m_trap_im_copy; /* copy of IM register when TRAP was taken */
|
||||
uint8_t m_sod_state; /* state of the SOD line */
|
||||
uint8_t m_after_ei; /* post-EI processing; starts at 2, check for ints at 0 */
|
||||
uint8_t m_nmi_state; /* raw NMI line state */
|
||||
uint8_t m_irq_state[4]; /* raw IRQ line states */
|
||||
uint8_t m_trap_pending; /* TRAP interrupt latched? */
|
||||
uint8_t m_trap_im_copy; /* copy of IM register when TRAP was taken */
|
||||
uint8_t m_sod_state; /* state of the SOD line */
|
||||
|
||||
bool m_ietemp; /* import/export temp space */
|
||||
bool m_ietemp; /* import/export temp space */
|
||||
|
||||
address_space *m_program;
|
||||
direct_read_data *m_direct;
|
||||
@ -155,7 +155,6 @@ private:
|
||||
void check_for_interrupts();
|
||||
void execute_one(int opcode);
|
||||
void init_tables();
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
||||
@ -1,187 +0,0 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Juergen Buchmueller, hap
|
||||
/*******************************************************
|
||||
*
|
||||
* Portable (hopefully ;-) 8085A emulator
|
||||
*
|
||||
* Written by J. Buchmueller for use with MAME
|
||||
*
|
||||
* Partially based on Z80Em by Marcel De Kogel
|
||||
*
|
||||
* CPU related macros
|
||||
*
|
||||
*******************************************************/
|
||||
|
||||
#define SF 0x80
|
||||
#define ZF 0x40
|
||||
#define X5F 0x20
|
||||
#define HF 0x10
|
||||
#define X3F 0x08
|
||||
#define PF 0x04
|
||||
#define VF 0x02
|
||||
#define CF 0x01
|
||||
|
||||
#define IM_SID 0x80
|
||||
#define IM_I75 0x40
|
||||
#define IM_I65 0x20
|
||||
#define IM_I55 0x10
|
||||
#define IM_IE 0x08
|
||||
#define IM_M75 0x04
|
||||
#define IM_M65 0x02
|
||||
#define IM_M55 0x01
|
||||
|
||||
#define ADDR_TRAP 0x0024
|
||||
#define ADDR_RST55 0x002c
|
||||
#define ADDR_RST65 0x0034
|
||||
#define ADDR_RST75 0x003c
|
||||
#define ADDR_INTR 0x0038
|
||||
|
||||
|
||||
#define M_MVI(R) R=ARG()
|
||||
|
||||
/* rotate */
|
||||
#define M_RLC { \
|
||||
m_AF.b.h = (m_AF.b.h << 1) | (m_AF.b.h >> 7); \
|
||||
m_AF.b.l = (m_AF.b.l & 0xfe) | (m_AF.b.h & CF); \
|
||||
}
|
||||
|
||||
#define M_RRC { \
|
||||
m_AF.b.l = (m_AF.b.l & 0xfe) | (m_AF.b.h & CF); \
|
||||
m_AF.b.h = (m_AF.b.h >> 1) | (m_AF.b.h << 7); \
|
||||
}
|
||||
|
||||
#define M_RAL { \
|
||||
int c = m_AF.b.l&CF; \
|
||||
m_AF.b.l = (m_AF.b.l & 0xfe) | (m_AF.b.h >> 7); \
|
||||
m_AF.b.h = (m_AF.b.h << 1) | c; \
|
||||
}
|
||||
|
||||
#define M_RAR { \
|
||||
int c = (m_AF.b.l&CF) << 7; \
|
||||
m_AF.b.l = (m_AF.b.l & 0xfe) | (m_AF.b.h & CF); \
|
||||
m_AF.b.h = (m_AF.b.h >> 1) | c; \
|
||||
}
|
||||
|
||||
/* logical */
|
||||
#define M_ORA(R) m_AF.b.h|=R; m_AF.b.l=ZSP[m_AF.b.h]
|
||||
#define M_XRA(R) m_AF.b.h^=R; m_AF.b.l=ZSP[m_AF.b.h]
|
||||
#define M_ANA(R) {uint8_t hc = ((m_AF.b.h | R)<<1) & HF; m_AF.b.h&=R; m_AF.b.l=ZSP[m_AF.b.h]; if(IS_8085()) { m_AF.b.l |= HF; } else {m_AF.b.l |= hc; } }
|
||||
|
||||
/* increase / decrease */
|
||||
#define M_INR(R) {uint8_t hc = ((R & 0x0f) == 0x0f) ? HF : 0; ++R; m_AF.b.l= (m_AF.b.l & CF ) | ZSP[R] | hc; }
|
||||
#define M_DCR(R) {uint8_t hc = ((R & 0x0f) != 0x00) ? HF : 0; --R; m_AF.b.l= (m_AF.b.l & CF ) | ZSP[R] | hc | VF; }
|
||||
|
||||
/* arithmetic */
|
||||
#define M_ADD(R) { \
|
||||
int q = m_AF.b.h+R; \
|
||||
m_AF.b.l=ZSP[q&255]|((q>>8)&CF)|((m_AF.b.h^q^R)&HF); \
|
||||
m_AF.b.h=q; \
|
||||
}
|
||||
|
||||
#define M_ADC(R) { \
|
||||
int q = m_AF.b.h+R+(m_AF.b.l&CF); \
|
||||
m_AF.b.l=ZSP[q&255]|((q>>8)&CF)|((m_AF.b.h^q^R)&HF); \
|
||||
m_AF.b.h=q; \
|
||||
}
|
||||
|
||||
#define M_SUB(R) { \
|
||||
int q = m_AF.b.h-R; \
|
||||
m_AF.b.l=ZSP[q&255]|((q>>8)&CF)|(~(m_AF.b.h^q^R)&HF)|VF; \
|
||||
m_AF.b.h=q; \
|
||||
}
|
||||
|
||||
#define M_SBB(R) { \
|
||||
int q = m_AF.b.h-R-(m_AF.b.l&CF); \
|
||||
m_AF.b.l=ZSP[q&255]|((q>>8)&CF)|(~(m_AF.b.h^q^R)&HF)|VF; \
|
||||
m_AF.b.h=q; \
|
||||
}
|
||||
|
||||
#define M_CMP(R) { \
|
||||
int q = m_AF.b.h-R; \
|
||||
m_AF.b.l=ZSP[q&255]|((q>>8)&CF)|(~(m_AF.b.h^q^R)&HF)|VF; \
|
||||
}
|
||||
|
||||
#define M_DAD(R) { \
|
||||
int q = m_HL.d + m_##R.d; \
|
||||
m_AF.b.l = (m_AF.b.l & ~CF) | (q>>16 & CF ); \
|
||||
m_HL.w.l = q; \
|
||||
}
|
||||
|
||||
// DSUB is 8085-only, not sure if H flag handling is correct
|
||||
#define M_DSUB() { \
|
||||
int q = m_HL.b.l-m_BC.b.l; \
|
||||
m_AF.b.l=ZS[q&255]|((q>>8)&CF)|VF| \
|
||||
((m_HL.b.l^q^m_BC.b.l)&HF)| \
|
||||
(((m_BC.b.l^m_HL.b.l)&(m_HL.b.l^q)&SF)>>5); \
|
||||
m_HL.b.l=q; \
|
||||
q = m_HL.b.h-m_BC.b.h-(m_AF.b.l&CF); \
|
||||
m_AF.b.l=ZS[q&255]|((q>>8)&CF)|VF| \
|
||||
((m_HL.b.h^q^m_BC.b.h)&HF)| \
|
||||
(((m_BC.b.h^m_HL.b.h)&(m_HL.b.h^q)&SF)>>5); \
|
||||
if (m_HL.b.l!=0) m_AF.b.l&=~ZF; \
|
||||
}
|
||||
|
||||
/* i/o */
|
||||
#define M_IN \
|
||||
set_status(0x42); \
|
||||
m_WZ.d=ARG(); \
|
||||
m_AF.b.h=m_io->read_byte(m_WZ.d);
|
||||
|
||||
#define M_OUT \
|
||||
set_status(0x10); \
|
||||
m_WZ.d=ARG(); \
|
||||
m_io->write_byte(m_WZ.d,m_AF.b.h)
|
||||
|
||||
/* stack */
|
||||
#define M_PUSH(R) { \
|
||||
set_status(0x04); \
|
||||
m_program->write_byte(--m_SP.w.l, m_##R.b.h); \
|
||||
m_program->write_byte(--m_SP.w.l, m_##R.b.l); \
|
||||
}
|
||||
|
||||
#define M_POP(R) { \
|
||||
set_status(0x86); \
|
||||
m_##R.b.l = m_program->read_byte(m_SP.w.l++); \
|
||||
m_##R.b.h = m_program->read_byte(m_SP.w.l++); \
|
||||
}
|
||||
|
||||
/* jumps */
|
||||
// On 8085 jump if condition is not satisfied is shorter
|
||||
#define M_JMP(cc) { \
|
||||
if (cc) { \
|
||||
m_PC.w.l = ARG16(); \
|
||||
} else { \
|
||||
m_PC.w.l += 2; \
|
||||
m_icount += (IS_8085()) ? 3 : 0; \
|
||||
} \
|
||||
}
|
||||
|
||||
// On 8085 call if condition is not satisfied is 9 ticks
|
||||
#define M_CALL(cc) \
|
||||
{ \
|
||||
if (cc) \
|
||||
{ \
|
||||
uint16_t a = ARG16(); \
|
||||
m_icount -= (IS_8085()) ? 7 : 6 ; \
|
||||
M_PUSH(PC); \
|
||||
m_PC.d = a; \
|
||||
} else { \
|
||||
m_PC.w.l += 2; \
|
||||
m_icount += (IS_8085()) ? 2 : 0; \
|
||||
} \
|
||||
}
|
||||
|
||||
// conditional RET only
|
||||
#define M_RET(cc) \
|
||||
{ \
|
||||
if (cc) \
|
||||
{ \
|
||||
m_icount -= 6; \
|
||||
M_POP(PC); \
|
||||
} \
|
||||
}
|
||||
|
||||
#define M_RST(nn) { \
|
||||
M_PUSH(PC); \
|
||||
m_PC.d = 8 * nn; \
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user