This commit is contained in:
Robbbert 2015-10-22 11:41:33 +11:00
commit 7aed40be62
41 changed files with 1195 additions and 622 deletions

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@ -3814,7 +3814,6 @@ But how do later protos fit with this theory? Maybe the later protos were from t
<year>1995</year>
<publisher>Imagineer</publisher>
<info name="serial" value="T-150240"/>
<!---This also contains a complement CD which will be dumped -->
<!-- * 左脳開発シリーズ5 迷路・記憶 (CD付き) (malformed token? - using sanouk4 above to fill field for now) -->
<info name="release" value="19951208"/>
<info name="alt_title" value="左脳開発シリーズ4 推理・構成"/>
@ -3824,6 +3823,11 @@ But how do later protos fit with this theory? Maybe the later protos were from t
<dataarea name="rom" size="524288">
<rom name="mpr-18458-t.ic1" size="524288" crc="6340c18a" sha1="101d5652ffd704788f1f44b671be843e3430e58a" offset="000000" loadflag="load16_word_swap" />
</dataarea>
<!-- this is a 22 track companion audio CD (to be played on standalone CD player while operating the game?) -->
<!-- dumping software / drive: BurnAtOnce 0.99.5 / TS-L633R -->
<diskarea name="cdrom">
<disk name="sanouk5cd" sha1="c9330bbf118405c02347bd83a1cc24ab2bb4310d"/>
</diskarea>
</part>
</software>

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@ -98,8 +98,10 @@ WRITE8_MEMBER(cpc_brunword4_device::rombank_w)
m_slot->rom_select(space,0,data & 0x3f); // repeats every 64 ROMs, this breaks upper cart ROM selection on the Plus
}
void cpc_brunword4_device::set_mapping()
void cpc_brunword4_device::set_mapping(UINT8 type)
{
if(type != MAP_OTHER)
return;
if(m_rombank_active)
{
UINT8* ROM = memregion("mk4_roms")->base();

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@ -20,7 +20,7 @@ public:
virtual const rom_entry *device_rom_region() const;
DECLARE_WRITE8_MEMBER(rombank_w);
virtual void set_mapping();
virtual void set_mapping(UINT8 type);
protected:
// device-level overrides

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@ -56,7 +56,12 @@
#define CPC_EXP_SLOT_TAG "cpcexp"
enum
{
MAP_LOWER = 0, // special lower ROM handling
MAP_UPPER, // special upper ROM handling
MAP_OTHER // custom ROM handling (eg: Brunword MK4)
};
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
@ -98,7 +103,7 @@ public:
void set_rom_bank(UINT8 sel) { m_rom_sel = sel; } // tell device the currently selected ROM
UINT8 get_rom_bank() { return m_rom_sel; }
virtual void set_mapping() { };
virtual void set_mapping(UINT8 type) { };
private:
UINT8 m_rom_sel; // currently selected ROM
@ -128,7 +133,7 @@ public:
DECLARE_WRITE8_MEMBER( rom_select );
void set_rom_bank(UINT8 sel) { if(m_card) m_card->set_rom_bank(sel); } // tell device the currently selected ROM
void set_mapping() { if(m_card) m_card->set_mapping(); } // tell device to enable any ROM or RAM mapping
void set_mapping(UINT8 type) { if(m_card) m_card->set_mapping(type); } // tell device to enable any ROM or RAM mapping
DECLARE_WRITE_LINE_MEMBER( cursor_w ) { if(m_card) m_card->cursor_w(state); } // pass on CRTC Cursor signal
DECLARE_WRITE_LINE_MEMBER( romen_w ) { if(m_card) m_card->romen_w(state); } // pass on /ROMEN signal

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@ -149,8 +149,10 @@ WRITE8_MEMBER(cpc_ddi1_device::rombank_w)
m_slot->rom_select(space,0,data);
}
void cpc_ddi1_device::set_mapping()
void cpc_ddi1_device::set_mapping(UINT8 type)
{
if(type != MAP_UPPER)
return;
if(m_rom_active)
{
UINT8* ROM = memregion("disc_rom")->base();

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@ -25,7 +25,8 @@ public:
// optional information overrides
virtual const rom_entry *device_rom_region() const;
virtual machine_config_constructor device_mconfig_additions() const;
virtual void set_mapping();
virtual void set_mapping(UINT8 type);
virtual WRITE_LINE_MEMBER( romen_w ) { m_romen = state; }
DECLARE_WRITE8_MEMBER(motor_w);
DECLARE_WRITE8_MEMBER(fdc_w);
@ -43,6 +44,7 @@ private:
required_device<floppy_connector> m_connector;
bool m_rom_active;
bool m_romen;
};
// device type definition

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@ -95,8 +95,6 @@ static const UINT8 fpmode_source[4] =
uml::ROUND_FLOOR
};
/***************************************************************************
MEMORY ACCESSORS
***************************************************************************/
@ -130,6 +128,7 @@ mips3_device::mips3_device(const machine_config &mconfig, device_type type, cons
, m_ppc(0)
, m_nextpc(0)
, m_pcbase(0)
, m_delayslot(false)
, m_op(0)
, m_interrupt_cycles(0)
, m_ll_value(0)
@ -255,8 +254,9 @@ void mips3_device::generate_exception(int exception, int backup)
}
/* if we were in a branch delay slot, adjust */
if (m_nextpc != ~0)
if ((m_nextpc != ~0) || (m_delayslot))
{
m_delayslot = false;
m_nextpc = ~0;
m_core->cpr[0][COP0_EPC] -= 4;
CAUSE |= 0x80000000;
@ -2767,12 +2767,16 @@ void mips3_device::execute_run()
/* adjust for next PC */
if (m_nextpc != ~0)
{
/* Exceptions need to be able to see delayslot, since nextpc gets cleared before instruction execution */
m_delayslot = true;
m_core->pc = m_nextpc;
m_nextpc = ~0;
}
else
{
m_delayslot = false;
m_core->pc += 4;
}
/* parse the instruction */
const int switch_val = (op >> 26) & 0x3f;
@ -2910,6 +2914,8 @@ void mips3_device::execute_run()
case 0x3f: /* SD */ WDOUBLE(SIMMVAL+RSVAL32, RTVAL64); break;
default: /* ??? */ invalid_instruction(op); break;
}
/* Clear this flag once instruction execution is finished, will interfere with interrupt exceptions otherwise */
m_delayslot = false;
m_core->icount--;
} while (m_core->icount > 0 || m_nextpc != ~0);

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@ -366,6 +366,7 @@ private:
UINT32 m_nextpc;
UINT32 m_pcbase;
UINT8 m_cf[4][8];
bool m_delayslot;
int m_op;
int m_interrupt_cycles;
UINT32 m_ll_value;

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@ -18,7 +18,7 @@
*/
// Show step operation
#define TRACE_STEP 1
#define TRACE_STEP 0
#define FLOPSND_TAG "floppysound"
@ -1070,71 +1070,100 @@ void ui_menu_control_floppy_image::handle()
floppy_sound_device::floppy_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: samples_device(mconfig, FLOPPYSOUND, "Floppy sound", tag, owner, clock, "flopsnd", __FILE__)
{
m_motor = false;
m_loaded = false;
}
void floppy_sound_device::register_for_save_states()
{
save_item(NAME(m_sampleend_motor));
save_item(NAME(m_is525));
save_item(NAME(m_sampleindex_motor_start));
save_item(NAME(m_sampleindex_motor_loop));
save_item(NAME(m_sampleindex_motor_end));
save_item(NAME(m_samplesize_motor_start));
save_item(NAME(m_samplesize_motor_loop));
save_item(NAME(m_samplesize_motor_end));
save_item(NAME(m_samplepos_motor));
save_item(NAME(m_motor_mintime));
save_item(NAME(m_motor_time));
save_item(NAME(m_motor));
save_item(NAME(m_sampleend_step));
save_item(NAME(m_samplestart_step));
save_item(NAME(m_motor_playback_state));
save_item(NAME(m_motor_on));
save_item(NAME(m_step_samples));
save_item(NAME(m_sampleindex_step1));
save_item(NAME(m_samplesize_step));
save_item(NAME(m_samplepos_step));
save_item(NAME(m_step_mintime));
save_item(NAME(m_step_time));
save_item(NAME(m_step_playback_state));
}
void floppy_sound_device::device_start()
{
// Sample playback phases
m_motor_playback_state = 0; // 0 == currently not playing, 1 == playing startup sample, 2 == playing the loop, 3 == playing loop for the last time, 4 == playing the spin down sample
m_step_playback_state = 0; // 0 == currently not playing, > 0 = playing one of the step samples from start to end
m_motor_on = false;
m_is525 = strstr(tag(), "525") != NULL;
if (m_is525)
{
m_sampleindex_motor_start = 2;
m_sampleindex_motor_loop = 3;
m_sampleindex_motor_end = 4;
m_step_samples = 5;
m_sampleindex_step1 = 5;
}
else
{
m_sampleindex_motor_start = 0;
m_sampleindex_motor_loop = 0;
m_sampleindex_motor_end = 0;
m_step_samples = 1;
m_sampleindex_step1 = 1;
}
m_samplepos_motor = 0;
m_samplepos_step = 0;
m_samplesize_motor_start = 0;
m_samplesize_motor_loop = 0;
m_samplesize_motor_end = 0;
for (int i = 0; i < MAX_STEP_SAMPLES; ++i) m_samplesize_step[i] = 0;
// Read audio samples. The samples are stored in the list m_samples.
m_loaded = load_samples();
// The per-floppy stream. If we don't have all samples, don't allocate a stream.
if (m_loaded) m_sound = machine().sound().stream_alloc(*this, 0, 1, clock());
// If we don't have all samples, don't allocate a stream or access sample data.
if (m_loaded)
{
m_sound = machine().sound().stream_alloc(*this, 0, 1, clock()); // per-floppy stream
// Of course, we can read the length from the sample_t, but we want to
// be able to fine-tune it, for instance, choose different start and end points
m_samplestart_motor = 0;
m_sampleend_motor = 8820; // 200ms
m_samplestart_step = 0;
m_sampleend_step = 2205; // 50ms
// Get the sample lengths from the sample_t
m_samplesize_motor_start = m_sample[m_sampleindex_motor_start].data.size();
m_samplesize_motor_loop = m_sample[m_sampleindex_motor_loop].data.size();
m_samplesize_motor_end = m_sample[m_sampleindex_motor_end].data.size();
for (int i = 0; i < m_step_samples; ++i) m_samplesize_step[i] = m_sample[m_sampleindex_step1 + i].data.size();
}
// Mintime says how long the sound persists after the initiating signal
// is cleared (important for short step pulses)
m_motor_mintime = 8820;
m_step_mintime = 1500;
// Number of updates until the sample stops
m_motor_time = 0;
m_step_time = 0;
// Initialize position
m_samplepos_step = m_samplestart_step;
m_samplepos_motor = m_samplestart_motor;
register_for_save_states();
}
void floppy_sound_device::motor(bool state)
{
m_sound->update();
// We do not reset the motor sample on state==true because we don't want
// the sound to "jump"
if (state==true) m_motor_time = m_motor_mintime;
m_motor = state;
if (!m_loaded) return;
m_sound->update(); // required
if ((!m_motor_playback_state || m_motor_playback_state > 2) && state) // motor was either off or already spinning down
{
m_samplepos_motor = 0;
m_motor_playback_state = 1; // (re)start the motor sound
}
else if (m_motor_playback_state == 2 && !state) m_motor_playback_state = 3; // go to spin down sound when loop is finished
m_motor_on = state;
}
/*
Activate the step sound.
*/
// Activate the step sound.
void floppy_sound_device::step()
{
if (!m_loaded) return;
m_sound->update(); // required
m_step_time = m_step_mintime;
m_samplepos_step = m_samplestart_step;
if (m_step_playback_state == 0)
{
m_step_playback_state = machine().rand() % m_step_samples + 1; // play one of the floppy drive step samples
m_samplepos_step = 0; // restart step sound
}
}
//-------------------------------------------------
@ -1148,39 +1177,71 @@ void floppy_sound_device::sound_stream_update(sound_stream &stream, stream_sampl
// one sample rate of 44100 for all samples
INT16 out = 0;
stream_sample_t *samplebuffer = outputs[0];
sample_t& motor_sample = m_sample[0];
sample_t& step_sample = m_sample[1];
while (samples-- > 0)
{
out = 0;
// Motor sound
if (m_motor_time > 0)
{
if (m_samplepos_motor < m_sampleend_motor)
// Stream value
out = motor_sample.data[m_samplepos_motor++];
else
m_samplepos_motor = m_samplestart_motor;
// When the motor is turned off, count down the samples
if (!m_motor) m_motor_time--;
// make sure we are spinning the motor if stepping is going on!
if (m_motor_playback_state == 0 && m_step_playback_state > 0)
{
m_samplepos_motor = 0;
m_motor_playback_state = 2;
}
// Motor sound
if (m_motor_playback_state > 0)
{
switch (m_motor_playback_state)
{
case 1:
out = m_sample[m_sampleindex_motor_start].data[m_samplepos_motor++];
if (m_samplepos_motor >= m_samplesize_motor_start)
{
m_samplepos_motor = 0;
m_motor_playback_state = 2; // move to looping sound
}
break;
case 2:
out = m_sample[m_sampleindex_motor_loop].data[m_samplepos_motor++];
if (m_samplepos_motor >= m_samplesize_motor_loop)
{
m_samplepos_motor = 0; // continue loop, unless...
if (!m_motor_on) m_motor_playback_state = 4; // motor was turned off already (during spin-up maybe) -> spin down
}
break;
case 3:
out = m_sample[m_sampleindex_motor_loop].data[m_samplepos_motor++];
if (m_samplepos_motor >= m_samplesize_motor_loop)
{
m_samplepos_motor = 0;
m_motor_playback_state = 4; // move to spin down sound
}
break;
case 4:
out = m_sample[m_sampleindex_motor_end].data[m_samplepos_motor++];
if (m_samplepos_motor >= m_samplesize_motor_end)
{
m_samplepos_motor = 0;
m_motor_playback_state = !m_motor_on ? 0 : 1; // stop or restart motor sound
}
break;
}
}
// Stepper sound
if (m_step_time > 0)
if (m_step_playback_state > 0)
{
if (m_samplepos_step < m_sampleend_step)
// Mix it into the stream value
out = out + step_sample.data[m_samplepos_step++];
else
m_samplepos_step = m_samplestart_step;
// Count down the samples
m_step_time--;
// Mix it into the stream value
out += m_sample[m_sampleindex_step1 + m_step_playback_state - 1].data[m_samplepos_step++];
if (m_samplepos_step >= m_samplesize_step[m_step_playback_state - 1])
{
m_samplepos_step = 0;
m_step_playback_state = 0;
}
}
// Write to the stream buffer
*(samplebuffer++) = out;
}
@ -1191,6 +1252,14 @@ static const char *const floppy_sample_names[] =
"*floppy",
"floppy_35_motor",
"floppy_35_step",
"floppy_525_motor_start",
"floppy_525_motor_loop",
"floppy_525_motor_end",
"floppy_525_step1",
"floppy_525_step2",
"floppy_525_step3",
"floppy_525_step4",
"floppy_525_step5",
0
};
@ -1200,7 +1269,7 @@ MACHINE_CONFIG_FRAGMENT( floppy_img )
MCFG_SPEAKER_STANDARD_MONO(FLOPSPK)
MCFG_SOUND_ADD(FLOPSND_TAG, FLOPPYSOUND, 44100)
MCFG_SAMPLES_NAMES(floppy_sample_names)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, FLOPSPK, 0.75)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, FLOPSPK, 0.5)
MACHINE_CONFIG_END
machine_config_constructor floppy_image_device::device_mconfig_additions() const

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@ -265,9 +265,13 @@ DECLARE_FLOPPY_IMAGE_DEVICE(alps_3255190x, "floppy_5_25")
extern const device_type FLOPPYSOUND;
/*
Floppy drive sound
*/
#define MAX_STEP_SAMPLES 5
class floppy_sound_device : public samples_device
{
public:
@ -286,21 +290,26 @@ private:
sound_stream* m_sound;
bool m_loaded;
bool m_is525; // true if this is a 5.25" floppy drive
int m_sampleend_motor;
int m_sampleindex_motor_start;
int m_sampleindex_motor_loop;
int m_sampleindex_motor_end;
int m_samplesize_motor_start;
int m_samplesize_motor_loop;
int m_samplesize_motor_end;
int m_samplepos_motor;
int m_samplestart_motor;
int m_motor_mintime; // min time for the samples; sound persists for that time
int m_motor_time;
bool m_motor;
int m_motor_playback_state;
bool m_motor_on;
int m_sampleend_step;
int m_samplestart_step;
int m_step_samples;
int m_sampleindex_step1;
int m_samplesize_step[MAX_STEP_SAMPLES];
int m_samplepos_step;
int m_step_mintime;
int m_step_time;
int m_step_playback_state;
};
class floppy_connector: public device_t,
public device_slot_interface
{
@ -318,7 +327,7 @@ protected:
private:
const floppy_format_type *formats;
bool m_enable_sound;
bool m_enable_sound;
};

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@ -110,6 +110,7 @@ void ata_hle_device::device_start()
save_item(NAME(m_identify_buffer));
m_busy_timer = timer_alloc(TID_BUSY);
m_buffer_empty_timer = timer_alloc(TID_BUFFER_EMPTY);
}
void ata_hle_device::device_reset()
@ -158,6 +159,10 @@ void ata_hle_device::device_timer(emu_timer &timer, device_timer_id id, int para
finished_busy(param);
break;
case TID_BUFFER_EMPTY:
m_buffer_empty_timer->enable(false);
fill_buffer();
break;
}
}
@ -465,7 +470,8 @@ void ata_hle_device::read_buffer_empty()
if ((multi_word_dma_mode() >= 0) || (ultra_dma_mode() >= 0))
set_dmarq(CLEAR_LINE);
fill_buffer();
m_buffer_empty_timer->enable(true);
m_buffer_empty_timer->adjust(attotime::zero);
}
void ata_hle_device::write_buffer_full()

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@ -34,6 +34,8 @@ public:
virtual DECLARE_WRITE_LINE_MEMBER(write_dmack);
virtual DECLARE_WRITE_LINE_MEMBER(write_pdiag);
TIMER_CALLBACK_MEMBER(buffer_empty_timer_work);
protected:
virtual void device_start();
virtual void device_reset();
@ -160,7 +162,8 @@ protected:
enum
{
TID_BUSY
TID_BUSY,
TID_BUFFER_EMPTY
};
enum
@ -213,6 +216,7 @@ private:
bool m_resetting;
emu_timer *m_busy_timer;
emu_timer *m_buffer_empty_timer;
};
#endif

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@ -274,11 +274,11 @@ WRITE32_MEMBER( bus_master_ide_controller_device::bmdma_w )
case 0:
if( ACCESSING_BITS_0_7 )
{
/* command register */
/* Bus Master IDE Command register */
UINT8 old = m_bus_master_command;
UINT8 val = data & 0xff;
/* save the read/write bit and the start/stop bit */
/* save the "Read or Write Control" bit 3 and the "Start/Stop Bus Master" bit 0 */
m_bus_master_command = (old & 0xf6) | (val & 0x09);
if ((old ^ m_bus_master_command) & 1)
@ -306,7 +306,7 @@ WRITE32_MEMBER( bus_master_ide_controller_device::bmdma_w )
if( ACCESSING_BITS_16_23 )
{
/* status register */
/* Bus Master IDE Status register */
UINT8 old = m_bus_master_status;
UINT8 val = data >> 16;
@ -334,7 +334,7 @@ void bus_master_ide_controller_device::execute_dma()
while (m_dmarq && (m_bus_master_status & IDE_BUSMASTER_STATUS_ACTIVE))
{
/* if we're out of space, grab the next descriptor */
/* if we're out of space, grab the next Physical Region Descriptor */
if (m_dma_bytes_left == 0)
{
/* fetch the address */

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@ -1811,7 +1811,7 @@ static MACHINE_CONFIG_DERIVED_CLASS( cd32, amiga_base, cd32_state )
MCFG_CDROM_ADD("cdrom")
MCFG_CDROM_INTERFACE("cd32_cdrom")
MCFG_SOFTWARE_LIST_ADD("cd_list", "cd32")
MCFG_DEVICE_REMOVE("kbd")
MACHINE_CONFIG_END

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@ -8996,7 +8996,7 @@ guess at what the game actually is.
Roms 1 through 8 read well in-circuit in the right
places in the memory map for moon cresta,
(through the fluke 9100) but the game does not
currently run. Roms dumped adn verified with no
currently run. Roms dumped and verified with no
anomalies.
Rom 9 was placed on the through-socket and has
@ -10860,7 +10860,6 @@ GAME( 1980, galemp, uniwars, galaxian, superg, galaxian_state, pisce
GAME( 1980, asideral, uniwars, galaxian, asideral, galaxian_state, pisces, ROT90, "bootleg (Electrogame S.A.)", "Ataque Sideral (Spanish bootleg of UniWar S)", MACHINE_SUPPORTS_SAVE )
GAME( 1980, pajaroes, uniwars, galaxian, asideral, galaxian_state, pisces, ROT90, "bootleg (PSV S.A.)", "Pajaro del Espacio (Spanish bootleg of UniWar S)", MACHINE_SUPPORTS_SAVE ) // very similar to above
/* Artic Multi-System games - separate tile/sprite ROMs */
GAME( 1980, streakng, 0, pacmanbl, streakng, galaxian_state, galaxian, ROT90, "Shoei", "Streaking (set 1)", MACHINE_IMPERFECT_COLORS | MACHINE_SUPPORTS_SAVE )
GAME( 1980, streaknga, streakng, pacmanbl, streakng, galaxian_state, galaxian, ROT90, "Shoei", "Streaking (set 2)", MACHINE_IMPERFECT_COLORS | MACHINE_SUPPORTS_SAVE )
@ -10930,16 +10929,15 @@ GAME( 1980, moonal2b, galaxian, mooncrst, moonal2, galaxian_state, galax
/* larger romspace, interrupt enable moved */
GAME( 198?, thepitm, thepit, mooncrst, thepitm, galaxian_state, thepitm, ROT90, "bootleg (KZH)", "The Pit (bootleg on Moon Quasar hardware)", MACHINE_SUPPORTS_SAVE ) // on an original MQ-2FJ pcb, even if the memory map appears closer to Moon Cresta
/* other games on basic mooncrst hardware */
GAME( 1982, skybase, 0, mooncrst, skybase, galaxian_state, skybase, ROT90, "Omori Electric Co., Ltd.", "Sky Base", MACHINE_SUPPORTS_SAVE )
GAME( 198?, kong, 0, mooncrst, kong, galaxian_state, kong, ROT90, "Taito do Brasil", "Kong (Donkey Kong conversion on Galaxian hardware)", MACHINE_SUPPORTS_SAVE | MACHINE_WRONG_COLORS ) // rewrite of Donkey Kong (!) not a clone
/* larger romspace, 2*AY8910, based on Super Star Crest board? */
// there may be an alternate version called "Fantasy" according to flyers; is it the same?
GAME( 198?, fantastc, 0, fantastc, fantastc, galaxian_state, fantastc, ROT90, "Taito do Brasil", "Fantastic (Galaga conversion on Galaxian hardware)", MACHINE_SUPPORTS_SAVE ) // rewrite of Galaga (!) not a clone
/* like fantastc, plus larger spriteram, and maybe different bullet hw(?) */
// there may be an alternate version called "Fantasy" according to flyers; is it the same?
GAME( 198?, timefgtr, 0, timefgtr, timefgtr, galaxian_state, timefgtr, ROT90, "Taito do Brasil", "Time Fighter (Time Pilot conversion on Galaxian hardware)", MACHINE_SUPPORTS_SAVE | MACHINE_WRONG_COLORS ) // rewrite of Time Pilot (!) not a clone
/* extra ROMs, protection, and sound hardware replaced with AY8910 */
@ -11019,9 +11017,6 @@ GAME( 1981, scrambp, scramble, scramble, scramble, galaxian_state, scram
GAME( 1981, scramce, scramble, scramble, scramble, galaxian_state, scramble, ROT90, "bootleg (Centromatic S.A.)", "Scramble (Centromatic S.A., Spanish bootleg)", MACHINE_SUPPORTS_SAVE ) // similar to above
GAME( 1981, scrampt, scramble, scramble, scramble, galaxian_state, scramble, ROT90, "bootleg (Petaco S.A.)", "Scramble (Petaco S.A., Spanish bootleg)", MACHINE_SUPPORTS_SAVE ) // ^^
GAME( 1981, scramrf, scramble, scramble, scramble, galaxian_state, scramble, ROT90, "bootleg (Recreativos Franco)", "Scramble (Recreativos Franco, Spanish bootleg)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, scramblebb, scramble, scramble, scramble, galaxian_state, scramble, ROT90, "bootleg?", "Scramble (bootleg?)", MACHINE_SUPPORTS_SAVE )
GAME( 198?, bomber, scramble, scramble, scramble, galaxian_state, scramble, ROT90, "bootleg (Alca)", "Bomber (bootleg of Scramble)", MACHINE_SUPPORTS_SAVE )
@ -11062,6 +11057,7 @@ GAME( 1981, armorcar2, armorcar, scobra, armorcar2, galaxian_state, scobr
GAME( 1982, tazmania, 0, scobra, tazmania, galaxian_state, scobra, ROT90, "Stern Electronics", "Tazz-Mania (set 1)", MACHINE_SUPPORTS_SAVE )
/*
Anteater (sold as conversion kit)
@ -11074,6 +11070,7 @@ GAME( 1982, anteaterg, anteater, anteaterg, anteateruk, galaxian_state, antea
GAME( 1982, calipso, 0, scobra, calipso, galaxian_state, calipso, ROT90, "Tago Electronics", "Calipso", MACHINE_SUPPORTS_SAVE )
/*
Lost Tomb

View File

@ -2762,21 +2762,11 @@ static MACHINE_CONFIG_DERIVED( hunchbkg, galaxold_base )
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( spcwarp, galaxold_base )
static MACHINE_CONFIG_DERIVED( spcwarp, hunchbkg )
/* hunchbkg but with different banking */
/* basic machine hardware */
MCFG_CPU_REPLACE("maincpu", S2650, PIXEL_CLOCK / 4)
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(spcwarp)
MCFG_CPU_IO_MAP(hunchbkg_io)
MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(galaxold_state,hunchbkg_irq_callback)
MCFG_DEVICE_MODIFY("7474_9m_1")
MCFG_7474_COMP_OUTPUT_CB(DEVWRITELINE("maincpu", s2650_device, write_sense))
MCFG_MACHINE_RESET_OVERRIDE(galaxold_state,hunchbkg)
MCFG_FRAGMENT_ADD(galaxian_audio)
MACHINE_CONFIG_END
@ -3489,15 +3479,19 @@ ROM_START( hunchbkg )
ROM_END
ROM_START( spcwarp )
// unknown Century Electronics space shooter which involves shooting down enemy ships to use them yourself for increasing rate of fire
// came out of an undumped ROMS collection - we have no idea if this is Space Warp but it's a unique dump compared to everything else.
// conversion of 'cosmos' (cvs.c) to Galaxian hardware
// notes:
// -came out of an unemulated games collection - may or may not be actually spcwarp but it's unique
// -uses hunchbkg hardware with a different map
// -the game likely calls a checksum check every 10 frames, causes game to freeze (probably because of bad ROM)
// -so far using hunchbkg inputs work
// -text in ROM confirms year of release and company; ASCII shows "COPYRIGHT 1983", "CENTURY ELECTRONICS UK LTD" in swarpt7f.bin
ROM_REGION( 0x8000, "maincpu", 0 )
ROM_LOAD( "swarpt7f.bin", 0x0000, 0x1000, CRC(04d744e3) SHA1(db8218510052a05670cb0b722b73d3f10464788c) )
ROM_LOAD( "swarpt7h.bin", 0x2000, 0x1000, CRC(34a36536) SHA1(bc438515618683b2a7c29637871ee00ed95ad7f8) )
/* missing rom at $4000? todo: check valid calls */
ROM_LOAD( "swarpt7m.bin", 0x6000, 0x1000, BAD_DUMP CRC(a2dff6c8) SHA1(d1c72848450dc5ff386dc94a26e4bf704ccc7121) ) /* ROMCMP reports "BADADDR xxxxxx-xxxxx". Observed data sequence repeated every 32 bytes */
ROM_REGION( 0x1000, "gfx1", 0 ) // gfx are very similar to 'cosmos'
ROM_REGION( 0x1000, "gfx1", 0 )
ROM_LOAD( "swarpb1h.bin", 0x0000, 0x0800, CRC(6ee3b5f7) SHA1(8150f2ecd59d3a165c0541b550664c56d049edd5) )
ROM_LOAD( "swarpb1k.bin", 0x0800, 0x0800, CRC(da4cee6b) SHA1(28b91381658f598fa62049489beee443232825c6) )
@ -3789,7 +3783,7 @@ GAME( 1981, froggerv, frogger, videotron, froggerv, driver_device, 0,
/* S2650 games */
// YEAR NAME PARENT MACHINE INPUT INIT ROT COMPANY, FULLNAME, FLAGS, LAYOUT
GAME( 1983, hunchbkg, hunchbak, hunchbkg, hunchbkg, driver_device, 0, ROT90, "Century Electronics", "Hunchback (Galaxian hardware)", MACHINE_SUPPORTS_SAVE )
GAME( 1983, spcwarp, 0, spcwarp, hunchbkg, driver_device, 0, ROT90, "Century Electronics", "Space Warp?", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE | MACHINE_WRONG_COLORS ) // bad dump
GAME( 1983, spcwarp, 0, spcwarp, hunchbkg, driver_device, 0, ROT90, "Century Electronics", "Space Warp? (Cosmos conversion on Galaxian hardware)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE | MACHINE_WRONG_COLORS ) // bad dump
GAME( 1984, drivfrcg, drivfrcp, drivfrcg, drivfrcg, driver_device, 0, ROT90, "Shinkai Inc. (Magic Electronics USA license)", "Driving Force (Galaxian conversion)", MACHINE_SUPPORTS_SAVE )
GAME( 1984, drivfrct, drivfrcp, drivfrcg, drivfrcg, driver_device, 0, ROT90, "bootleg (EMT Germany)", "Top Racer (bootleg of Driving Force)", MACHINE_SUPPORTS_SAVE ) // Video Klein PCB
GAME( 1985, drivfrcb, drivfrcp, drivfrcg, drivfrcg, driver_device, 0, ROT90, "bootleg (Elsys Software)", "Driving Force (Galaxian conversion bootleg)", MACHINE_SUPPORTS_SAVE )

View File

@ -388,7 +388,21 @@ ROM_START( i7000 )
ROM_LOAD( "i7000_boot_v1_4r02_15_10_85_d52d.rom", 0x0000, 0x1000, CRC(622412e5) SHA1(bf187a095600fd46a739c35132a85b5f39b2f867) )
ROM_REGION( 0x0800, "gfx1", 0 )
ROM_LOAD( "i7000_chargen.rom", 0x0000, 0x0800, CRC(7ba75183) SHA1(4af799f4a8bd385e1e4e5ece378df93e1133dc12) )
ROM_LOAD( "i7000_chargen.rom", 0x0000, 0x0800, CRC(fb7383e9) SHA1(71a6561bb9ff3cbf74711fa7ab445f9b43f15626) )
/*
The character generator ROM originally dumped had
some corrupt data that was manually fixed:
ROM address | Originally dumped value | Manually fixed value | Comment
0x06A2 | 0xF7 | 0xFE | This is a fix to the upper right portion of a 2x2 tile image of a big filled circle
0x06A3 | 0xF7 | 0xFE | This is another fix to the same tile (character value: 0xD4)
Also, characters 0x05, 0x06, 0x07 and 0x08
as well as lowercase 'x' (0x78), uppercase 'Y' (0x59)
may contain corrupt data, but we can't be sure,
unless we find another Itautec I7000 computer and
redump it's ROMs to double-check.
*/
ROM_REGION( 0x1000, "drive", 0 )
ROM_LOAD( "i7000_drive_ci01.rom", 0x0000, 0x1000, CRC(d8d6e5c1) SHA1(93e7db42fbfaa8243973321c7fc8c51ed80780be) )

View File

@ -491,7 +491,9 @@ static MACHINE_CONFIG_START( mm1, mm1_state )
MCFG_UPD765_INTRQ_CALLBACK(INPUTLINE(I8085A_TAG, I8085_RST55_LINE))
MCFG_UPD765_DRQ_CALLBACK(DEVWRITELINE(I8237_TAG, am9517a_device, dreq3_w))
MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", mm1_floppies, "525qd", mm1_state::floppy_formats)
MCFG_FLOPPY_DRIVE_SOUND(true)
MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", mm1_floppies, "525qd", mm1_state::floppy_formats)
MCFG_FLOPPY_DRIVE_SOUND(true)
MCFG_UPD7201_ADD(UPD7201_TAG, XTAL_6_144MHz/2, 0, 0, 0, 0)
MCFG_Z80DART_OUT_TXDA_CB(DEVWRITELINE(RS232_A_TAG, rs232_port_device, write_txd))

View File

@ -1575,7 +1575,7 @@ DRIVER_INIT_MEMBER(nmg5_state,prot_val_40)
}
GAME( 1998, nmg5, 0, nmg5, nmg5, nmg5_state, prot_val_10, ROT0, "Yun Sung", "Multi 5 / New Multi Game 5 (set 1)", MACHINE_SUPPORTS_SAVE )
GAME( 1998, nmg5a, nmg5, nmg5, nmg5, nmg5_state, prot_val_10, ROT0, "Yun Sung", "Multi 5 / New Multi Game 5 (set 2)", MACHINE_SUPPORTS_SAVE )
GAME( 1998, nmg5a, nmg5, nmg5, nmg5, nmg5_state, prot_val_10, ROT0, "Yun Sung", "Multi 5 / New Multi Game 5 (set 2, censored)", MACHINE_SUPPORTS_SAVE )
GAME( 1997, nmg5e, nmg5, nmg5, nmg5, nmg5_state, prot_val_10, ROT0, "Yun Sung", "Multi 5 / New Multi Game 5 (set 3, earlier)", MACHINE_SUPPORTS_SAVE )
GAME( 1999, searchey, 0, nmg5, searchey, nmg5_state, prot_val_10, ROT0, "Yun Sung", "Search Eye (English / Korean / Japanese / Italian)", MACHINE_SUPPORTS_SAVE )
GAME( 1999, searcheya, searchey, nmg5, searcheya, nmg5_state, prot_val_10, ROT0, "Yun Sung", "Search Eye (English / Korean)", MACHINE_SUPPORTS_SAVE )

View File

@ -22,7 +22,7 @@ Driver file for IBM PC, IBM PC XT, and related machines.
IBM5550
=======
Information can be found at http://homepage3.nifty.com/ibm5550/index-e.html
It's an heavily modified IBM PC-XT machine, with a completely different
It's a heavily modified IBM PC-XT machine, with a completely different
video HW too.
***************************************************************************/
@ -173,6 +173,10 @@ static DEVICE_INPUT_DEFAULTS_START( pccga )
DEVICE_INPUT_DEFAULTS("DSW0", 0x30, 0x20)
DEVICE_INPUT_DEFAULTS_END
static DEVICE_INPUT_DEFAULTS_START( siemens )
DEVICE_INPUT_DEFAULTS("DSW0", 0x30, 0x30)
DEVICE_INPUT_DEFAULTS_END
#define MCFG_CPU_PC(mem, port, type, clock) \
MCFG_CPU_ADD("maincpu", type, clock) \
MCFG_CPU_PROGRAM_MAP(mem##_map) \
@ -268,6 +272,28 @@ static MACHINE_CONFIG_START( zenith, pc_state )
MCFG_SOFTWARE_LIST_ADD("disk_list","ibm5150")
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( siemens, pc_state )
/* basic machine hardware */
MCFG_CPU_PC(pc8, pc8, I8088, XTAL_14_31818MHz/3) /* 4,77 MHz */
MCFG_IBM5150_MOTHERBOARD_ADD("mb", "maincpu")
MCFG_DEVICE_INPUT_DEFAULTS(siemens)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", pc_isa8_cards, "hercules", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", pc_isa8_cards, "fdc_xt", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, "lpt", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, "com", false)
/* keyboard */
MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_IBM_PC_XT_83)
/* internal ram */
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("640K")
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( ibm5550, pc_state )
/* basic machine hardware */
MCFG_CPU_PC(ibm5550, ibm5550, I8086, 8000000)
@ -297,11 +323,17 @@ static MACHINE_CONFIG_DERIVED(mk88, poisk2)
MCFG_SLOT_DEFAULT_OPTION("cga_ec1841")
MACHINE_CONFIG_END
ROM_START( bw230 )
ROM_REGION(0x100000,"maincpu", 0)
ROM_LOAD("bondwell.bin", 0xfe000, 0x2000, CRC(d435a405) SHA1(a57c705d1144c7b61940b6f5c05d785c272fc9bb))
ROM_END
ROM_START( sicpc1605 )
ROM_REGION(0x100000,"maincpu", 0)
ROM_LOAD("multitech pc-700 3.1.bin", 0xfe000, 0x2000, CRC(0ac7a2e1) SHA1(b9c8504e21213d81a068dde9f51f9c973d726e7b))
ROM_END
ROM_START( zdsupers )
ROM_REGION(0x100000,"maincpu", 0)
ROM_SYSTEM_BIOS( 0, "v31d", "v3.1d" )
@ -455,12 +487,14 @@ COMP( 1985, bw230, ibm5150, 0, bondwell, bondwell, pc_state,
COMP( 1984, compc1, ibm5150, 0, pccga, pccga, driver_device, 0, "Commodore Business Machines", "Commodore PC-1" , MACHINE_NOT_WORKING)
COMP( 1987, pc10iii, ibm5150, 0, pccga, pccga, driver_device, 0, "Commodore Business Machines", "Commodore PC-10 III" , MACHINE_NOT_WORKING)
COMP( 1992, iskr3104, ibm5150, 0, iskr3104, pccga, driver_device, 0, "Schetmash", "Iskra 3104", MACHINE_NOT_WORKING)
COMP( 1989, mk88, ibm5150, 0, mk88, pccga, driver_device, 0, "<unknown>", "MK-88", MACHINE_NOT_WORKING)
COMP( 1991, poisk2, ibm5150, 0, poisk2, pccga, driver_device, 0, "<unknown>", "Poisk-2", MACHINE_NOT_WORKING)
COMP( 1990, mc1702, ibm5150, 0, pccga, pccga, driver_device, 0, "<unknown>", "Elektronika MC-1702", MACHINE_NOT_WORKING)
COMP( 1987, zdsupers, ibm5150, 0, zenith, pccga, driver_device, 0, "Zenith Data Systems", "SuperSport", 0)
COMP( 1985, sicpc1605, ibm5150, 0, siemens, pccga, driver_device, 0, "Siemens", "Sicomp PC16-05", 0)
COMP( 198?, olivm15, ibm5150, 0, pccga, pccga, driver_device, 0, "Olivetti", "M15", MACHINE_NOT_WORKING | MACHINE_NO_SOUND) // is this a pc clone or not?

View File

@ -145,7 +145,7 @@ Super PE+
Data roms will not work with every Program rom. Incompatible combos report: Incompatible Data EPROM
X000055P is a good example, it works with 19 XP000xxx Program roms. Others may be as few as 2.
XMPnnnnn Multi-Poker Programs. Different options for each set, but all use the same XMnnnnnP data
XMP00002 through XMP00006 & XMP00024 Use the XM000xxP Multi-Poker Data
XMP00002 through XMP00006, XMP00020 & XMP00024 Use the XM000xxP Multi-Poker Data
XMP00014, XMP00017 & XMP00030 Use the WING Board add-on and use the XnnnnnnP Poker Data (Not all are compatible!)
XMP00013, XMP00022 & XMP00026 Use the WING Board add-on & CG2346 + CAPX2346 for Spanish paytables
XMP00025 Uses the XM000xxP Multi-Poker Data roms and is for the International markets. Auto Hold always enabled.
@ -10830,8 +10830,8 @@ GAMEL(1987, pepp0043a, pepp0002, peplus, peplus_poker, peplus_state, peplus,
GAMEL(1987, pepp0043b, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0043) 10's or Better (International, set 2)",0, layout_pe_poker )
GAMEL(1987, pepp0045, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better", 0, layout_pe_poker )
GAMEL(1987, pepp0045a, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better (Gambler Downtown Reno)", 0, layout_pe_poker )
GAMEL(1987, pepp0045b, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better (Par-A-Dice Riverboat)", MACHINE_WRONG_COLORS, layout_pe_poker ) /* CAP1150 not dumped */
GAMEL(1987, pepp0045c, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better (Annie Oakely's Central City)", MACHINE_WRONG_COLORS, layout_pe_poker ) /* CAP1072 not dumped */
GAMEL(1987, pepp0045b, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better (Par-A-Dice Riverboat Casino)", MACHINE_WRONG_COLORS, layout_pe_poker ) /* CAP1150 not dumped */
GAMEL(1987, pepp0045c, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better (Annie Oakley's Central City)", MACHINE_WRONG_COLORS, layout_pe_poker ) /* CAP1072 not dumped */
GAMEL(1987, pepp0046, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0046) 10's or Better (set 1)", 0, layout_pe_poker )
GAMEL(1987, pepp0046a, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0046) 10's or Better (International)",0, layout_pe_poker )
GAMEL(1987, pepp0046b, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0046) 10's or Better (set 2)", 0, layout_pe_poker )
@ -10840,7 +10840,7 @@ GAMEL(1987, pepp0051, pepp0053, peplus, peplus_poker, peplus_state, nonplus,
GAMEL(1987, pepp0053, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0053) Joker Poker (Aces or Better)", 0, layout_pe_poker )
GAMEL(1987, pepp0055, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0055) Deuces Wild Poker (set 1)", 0, layout_pe_poker )
GAMEL(1987, pepp0055a, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0055) Deuces Wild Poker (set 2)", 0, layout_pe_poker )
GAMEL(1987, pepp0055b, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0055) Deuces Wild Poker (set 2, Skyline)", 0, layout_pe_poker )
GAMEL(1987, pepp0055b, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0055) Deuces Wild Poker (set 2, Skyline Casino)", 0, layout_pe_poker )
GAMEL(1987, pepp0055c, pepp0055, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0055) Deuces Wild Poker (set 3)", 0, layout_pe_poker )
GAMEL(1987, pepp0057, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0057) Deuces Wild Poker (set 1)", 0, layout_pe_poker )
GAMEL(1987, pepp0057a, pepp0055, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0057) Deuces Wild Poker (set 2)", 0, layout_pe_poker )
@ -10868,7 +10868,7 @@ GAMEL(1987, pepp0130, 0, peplus, peplus_poker, peplus_state, peplus,
GAMEL(1987, pepp0132, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0132) Standard Draw Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0150, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0150) Standard Draw Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0158, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0158) 4 of a Kind Bonus Poker (set 1)", 0, layout_pe_poker )
GAMEL(1987, pepp0158a, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0158) 4 of a Kind Bonus Poker (set 2, Skyline)", 0, layout_pe_poker )
GAMEL(1987, pepp0158a, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0158) 4 of a Kind Bonus Poker (set 2, Skyline Casino)", 0, layout_pe_poker )
GAMEL(1987, pepp0158b, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0158) 4 of a Kind Bonus Poker (set 3)", 0, layout_pe_poker )
GAMEL(1987, pepp0158c, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0158) 4 of a Kind Bonus Poker (set 4)", 0, layout_pe_poker )
GAMEL(1987, pepp0158d, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0158) 4 of a Kind Bonus Poker (set 5)", 0, layout_pe_poker )

File diff suppressed because it is too large Load Diff

View File

@ -2,15 +2,400 @@
// copyright-holders:David Haywood, Angelo Salese, Olivier Galibert, Mariusz Wojcieszek, R. Belmont
/**************************************************************************************************
Sega Saturn & Sega ST-V (Sega Titan Video) HW (c) 1994 Sega
Driver by David Haywood, Angelo Salese, Olivier Galibert & Mariusz Wojcieszek
SCSP driver provided by R. Belmont, based on ElSemi's SCSP sound chip emulator
Many thanks to Guru, Fabien, Runik and Charles MacDonald for the help given.
===================================================================================================
***************************************************************************************************
Sega Saturn
(C) Sega 1994/1995/1996/1997
The Sega Saturn is a 32-bit 5th-generation home video game console that was developed by Sega and released
on November 22nd 1994 in Japan, May 11th 1995 in North America, and July 8th 1995 in Europe as the successor
to the Sega Genesis. The Saturn has a dual-CPU architecture and a total of eight processors.
The games are on CD-ROM.
Basic Hardware:
Processors (8)
----------
Two Hitachi SH2 32-bit RISC @ 28.63636MHz
One Hitachi SH1 32-bit RISC @ 20.0MHz
Two 32-bit video display processors (VDP 1 / VDP 2)
One Saturn Control Unit processor (SCU) @ 14.31818MHz
One Motorola 68EC000 sound processor @ 11.2896MHz
One Yamaha YMF292-F DSP sound processor @ 28.63636MHz
Memory
------
16 Megabits DRAM
12 Megabits VRAM (Video RAM)
4 Megabits Audio DRAM
4 Megabits CD-ROM Cache DRAM
256 Kbits battery-backed SRAM
Video
-----
VDP 1
- 32-bit video display processor
- Sprite, polygon, and geometry engine
- Dual 256Kb frame buffers for rotation and scaling effects
- Texture Mapping
- Goraud Shading
- 512Kb cache for textures
VDP 2
- 32-bit background and scroll plane video display processor
- Background engine
- 5 simulataneous scrolling backgrounds
- 2 simultaneous rotating playfields
- 200,000 Texture Mapped Polygons/Second
- 500,000 Flat Shaded Polygons/Second
- Up to 60 frames per second animation
- 24-bit True Color Graphics
- 16 Million Available Colors
- 320x224, 640x224, and 720x576 Resolution
Audio
-----
Motorola 68EC000 sound processor @ 11.2896MHz
Yamaha 24-bit Digital Signal Processor @ 28.63636MHz
- 32 PCM (Pulse Code Modulation) Channels
- 8 FM (Frequency Modulation) Channels
- 44.1 kHz Sampling Rate
Storage
-------
CD-ROM (2X)
- 320 Kb/Second transfer speed
- Compatible with Audio CD, CD+G, CD+EG, CD Single (8cm)
and with optional hardware; Video CD, Photo CD & Digital Karaoke
- Optional additional memory cartridge
Input/Output
------------
High speed serial communications port
Internal 32-bit expansion port
Internal Multi AV port for optional Video CD (MPEG) decoder board
Composite video & stereo audio (Standard)
Optional RF(TV), S-Video & RGB outputs
2 ports for analog control pad, light gun or other controllers
PCB Layouts
-----------
There were *many* main board revisions. The two general 'sizes' are documented here.
Small board (VA revision documented)
-----------
Main board with a separate small sub-board for the controller ports, power LED and reset button.
The power supply is slightly longer than the main board, has a 5 pin connector and outputs 9VDC, 5VDC and 3.3VDC
837-12126 IC BD SATURN MAIN VA SG
171-7128B (C) SEGA 1995 PC BD SATURN MAIN VA SG
(This PCB was found in a USA Saturn, Model MK-80000, also known as Saturn model 1 with BIOS MPR-17941)
837-12135 IC BD SATURN MAIN VA PAL SD
171-7131A (C) SEGA 1995 PC BD SATURN MAIN VA PAL SD
(This PCB was found in a PAL Saturn, Model MK-80200-50, also known as Saturn model 1 PAL with BIOS MPR-17942)
(note both of these PCBs listed above are almost identical)
|VIDEO--COMM-----------------------------------------------|
| CART_SLOT SW1 BATTERY |
|ADAC CXA1645M |--------| |-------| 20MHz |
| SW2 |315-5688| |YGR019B| TC514260 |
| ^4502161 | | | | |-------| |
| ^4502161 |--------| |--------| |-------| |HD6437097 |
| |--------| |315-5890| *D489020 | | |
| |315-5883| | | 81141625 81141625 |-------| |
| | | |--------| CARD_SLOT |
| |--------| ^4502161 HC08 |
| ^5241605 ^4502161 |----| |----| |--------| |
| 514270 |--------|HC04 |SH-2| |SH-2| |315-5914| |
| |-----| |315-5687|HC04 |----| |----| |--------| |
| |68000| | | |------|32.768kHz |
| |-----| |--------| 315-5744 LS245 TC514260 |
| ^74HC157 315-5746 |------| ^62257 ^ROM CN4|
| CN3 CN7 &14.31818MHz CN2 LS245 TC514260 |
|----------------------------------------------------------|
Notes: (all IC's shown. ^ denotes these parts are on the other side of the PCB)
ROM - SOP40 mask ROM for BIOS.
Chip is pin-compatible with Toshiba TC574200 or MX27C4100 and can be read with a simple 1:1 DIP40 to SOP40 adapter
JAPAN BIOS marked 'MPR-17940-MX' or 'MPR-17940-T'
USA BIOS marked 'MPR-17941-MX' or 'MPR-17941-T'
PAL BIOS marked 'MPR-17942-MX' or 'MPR-17942-T'
T = Toshiba, MX = Macronix. Both contain identical data
Other BIOSes known to exist include:
(These are mainly on the very MPR-16605-T
early version main boards VA0/VA1 MPR-16606-T
and are all DIP chips) MPR-16606A-T
MPR-17577-T
EPR-17578 HI-SATURN BOOT ROM VER 1.01 SUM AA44 '95 1/27 (EPROM)
81141625 - Fujitsu 81141625-017 128k x16-bit x 2 banks (4Mbit) SDRAM \ compatible
5241605 - Hitachi HM5241605TT17S or HM524165CTT17S 128k x16-bit x 2 banks (4Mbit) SDRAM /
The two 81141625 are the WORK RAM HIGH and the two TC514260 (near the ROM) make up the WORK RAM LOW
The 5241605 is the VDP1 Sprite RAM
D489020 - NEC D489020GF-A15 SGRAM (probably 8Mbit). *- This single chip is replaced by two 81141625 IC's on some boards
4502161 - NEC D4502161G5-A12 or Sanyo LC382161T-17 64k x16-bit x 2 banks (2Mbit) SDRAM
Two chips are used for the VDP1 Frame RAM, the other two are for the VDP2 Video RAM
TC514260 - 256k x16-bit (4Mbit) DRAM. Any of the following compatible chips are used....
Hitachi HM514260AJ7 / HM514260CJ7
Toshiba TC514260BJ-70
Fujitsu 814260-70
Mitsubishi M5M44260CJ
Samsung KM416C256BJ-7
Hyundai HY514260B JC-70
Vanguard VG264260AJ
Panasonic MN414260CSJ-07
HM514270 - Hitachi HM514270 256k x16-bit (4Mbit) DRAM, used for the sound WORK RAM
62257 - Epson SRM20257LLM10 32k x8-bit (256kbit) battery-backed SRAM (also used SONY CXK58257AM-10L, NEC UPD43257B-10LL, UM62257AM-70LL)
ADAC - Dual CMOS Audio DAC. Either Burr-Brown BBPCM1710U or Philips TDA1386T
CXA1645M - Sony CXA1645M RGB to Composite Video Encoder
SH-2 - Hitachi HD6417095 SH-2 CPU. Clock input 28.63636MHz (14.31818*2)
68000 - Motorola MC68EC000FN12 CPU. Clock input 11.2896MHz
& - Master Clock. 14.31818MHz for USA revision or 17.7344MHz for PAL revision
315-5744 - Sega 315-5744 Hitachi HD404920 microcontroller used as the System Manager and Peripheral Controller (SMPC)
315-5746 - Sega 315-5746 Phase-locked Loop (PLL) clock generator IC
315-5883 - Sega 315-5883 Hitachi HD64440 Video Display Processor 1 (VDP1). Earliest revision is 315-5689
315-5687 - Sega 315-5687 Yamaha YMF292-F Saturn Custom Sound Processor (SCSP). Clock input 28.63636MHz (14.31818*2)
315-5688 - Sega 315-5688 System Control Unit (SCU). Clock input 14.31818MHz
315-5890 - Sega 315-5890 Video Display Processor 2 (VDP2)
315-5914 - Sega 315-5914 DRAM controller. Earliest revision is 315-5778. Later revision is 315-5963
HD6437097 - Hitachi HD6437097F20 SH1 (SH7034 family) microcontroller with 64k internal ROM. Clock input 20.000MHz
YGR019B - Hitachi YGR019B CD-Subsystem LSI. Earlier revision is YGR019A. Later revision combines this IC and the SH1 together
into one IC (YGR022 315-5962). The SH1 and the YGR019B make up the 'CD Block' CD Authentication and CD I/O data controller.
Another of it's functions is to prevent copied CDs from being played
VIDEO - 10-pin Mini-DIN video output port
COMM - Communication port
CARD_SLOT - Expansion slot for MPEG decoder card and other optional expansions
CART_SLOT - Expansion slot for plug-in RAM or ROM carts
SW1 - Master reset switch accessible behind the card slot/battery cover. Pressing this clears the battery-backed SRAM, resets the system
and the user has to set the language, date and time
BATTERY - CR2032 3V lithium coin battery. When the system is off the battery provides power to the backup SRAM and SMPC which contains an RTC
SW2 - CDROM cover open/close detection switch
CN2 - 24-pin flat cable connector for control port board
CN3 - 5-pin power connector
CN4 - Flat cable connector for CDROM data cable. On some main board revisions the connector is reversed and the cable is folded so it
is also reversed/flipped 180 degrees at the other end
CN7 - 5-pin connector for CDROM power
Control Port board
------------------
839-0820 EXPORT
839-0821 PAL
PC BD SATURN PIO VA EXPORT 171-7112A (C) SEGA 1995 CSPD CAD-TEAM
|---------------------------------|
| FLAT-CABLE |
| |
| GREEN-LED RED-LED RESET|
|--PORT1-----PORT2----------------|
Notes:
PORT1/2 - Controller ports for controller/joystick/lightgun etc
GREEN-LED - Power LED
RED-LED - CDROM drive access LED
RESET - Push-button reset switch
FLAT-CABLE - 24-pin flat cable joined to main board CN2
Large board (VA7 revision documented)
-----------
This is a single main board containing everything.
837-12643 IC BD SATURN MAIN VA7 USA SD
171-7208C (C) SEGA 1996 PC BD SATURN MAIN VA7 USA SD
(This PCB was found in a USA Saturn, Model MK-80000A, also known as Saturn model 2 with BIOS MPR-17941)
837-12992 IC BD SATURN MAIN VA7 PAL
171-7424A (C) SEGA 1996 PC BD SATURN MAIN VA7 PAL
(This PCB was found in a PAL Saturn, Model MK-80200A-50, also known as Saturn model 2 PAL with BIOS MPR-17942)
(note both of these PCBs listed above are almost identical)
|VIDEO--COMM-----------------------------------------------|
| CART_SLOT BATTERY |
| SW2 |--------| |
|ADAC RGB |315-5966| |--------| ^TC514260 |
| | | |YGR022 | |
| |--------| |315-5962| |
| |--------| |
| |--------| |--------| 20MHz |
| |315-5687| |315-5964| CARD_SLOT |
| | | | | |
| |--------| |--------| |----| LS245 HC08 |
| ^HM514270 ^524165 HC04 |SH-2| |
| ^5221605 ^5221605 |----| TC514260 |
| ^5221605 ^5221605 |
| |--------| TC514260 |
| |-----| |315-5883| HC04 |
| |68000| | |&14.31818MHz |----| |--------| |
| |-----| |--------| %CY2292 |SH-2| |315-5977-01 |
|CN3 |------| |----| |--------| |
| 315-5744 62257 CN4|
| CN7 |------| |
|--| 32.768kHz LS245 81141625 81141625 ROM |--|
| GREEN-LED RESET |
|-------------------PORT1-----PORT2------------------|
Notes: (all IC's shown. ^ denotes these parts are on the other side of the PCB)
ROM - SOP40 mask ROM for BIOS.
Chip is pin-compatible with Toshiba TC574200 or MX27C4100 and can be read with a simple 1:1 DIP40 to SOP40 adapter
JAPAN BIOS marked 'MPR-17940-MX' or 'MPR-17940-T'
USA BIOS marked 'MPR-17941-MX' or 'MPR-17941-T'
PAL BIOS marked 'MPR-17942-MX' or 'MPR-17942-T'
T = Toshiba, MX = Macronix. Both contain identical data
81141625 - Fujitsu 81141625-017 128k x16-bit x 2 banks (4Mbit) SDRAM
The two 81141625 are the WORK RAM HIGH and two TC514260 (near the SH-2) make up the WORK RAM LOW
524165 - Hitachi HM524165CTT17S 128k x16-bit x 2 banks (4Mbit) SDRAM. This is the VDP1 Sprite RAM
5221605 - Hitachi HM5221605TT17S 64k x16-bit x 2 banks (2Mbit) SDRAM
Two chips are used for the VDP1 Frame RAM, the other two are for the VDP2 Video RAM
TC514260 - 256k x16-bit (4Mbit) DRAM. Any of the following compatible chips are used....
Hitachi HM514260AJ7 / HM514260CJ7
Toshiba TC514260BJ-70
Fujitsu 814260-70
Mitsubishi M5M44260CJ
Samsung KM416C256BJ-7
Hyundai HY514260B JC-70
Vanguard VG264260AJ
Panasonic MN414260CSJ-07
HM514270 - Hitachi HM514270 256k x16-bit (4Mbit) DRAM, used for the sound WORK RAM
62257 - Epson SRM20257LLM10 32k x8-bit (256kbit) battery-backed SRAM (also used SONY CXK58257AM-10L, NEC UPD43257B-10LL, UM62257AM-70LL)
ADAC - Dual CMOS Audio DAC. Either Burr-Brown BBPCM1710U or Philips TDA1386T
RGB - RGB to Composite Video Encoder with PAL & NTSC output capability. IC is either Fujitsu MB3516A or ROHM BH7236AF
SH-2 - Hitachi HD6417095 SH-2 CPU. Clock input 28.63636MHz (14.31818*2)
68000 - Motorola MC68EC000FN12 CPU. Clock input 11.2896MHz
CY2292 - Cypress CY2292SC-04 PLL clock generator IC. % = On the VA7 PAL version this chip is replaced with the older Sega PLL (315-5746)
& - Master Clock. 14.31818MHz for USA revision or 17.7344MHz for PAL revision
315-5744 - Sega 315-5744 Hitachi HD404920 microcontroller used as the System Manager and Peripheral Controller (SMPC)
315-5883 - Sega 315-5883 Hitachi HD64440 Video Display Processor 1 (VDP1).
315-5687 - Sega 315-5687 Yamaha YMF292-F Saturn Custom Sound Processor (SCSP). Clock input 28.63636MHz (14.31818*2)
315-5964 - Sega 315-5964 Video Display Processor 2 (VDP2)
315-5966 - Sega 315-5966 System Control Unit (SCU). Clock input 14.31818MHz
315-5977-01 - Sega 315-5977-01 DRAM controller
YGR022 - Hitachi YGR022 Sega 315-5962 single IC containing CD-Subsystem LSI and Hitachi SH-1 microcontroller with 64k internal ROM. Clock input 20.000MHz
VIDEO - 10-pin Mini-DIN video output port
COMM - Communication port
CARD_SLOT - Expansion slot for MPEG decoder card and other optional expansions
CART_SLOT - Expansion slot for plug-in RAM or ROM carts
BATTERY - CR2032 3V lithium coin battery. When the system is off the battery provides power to the backup SRAM and SMPC which contains an RTC
SW2 - CDROM cover open/close detection switch
CN3 - 4-pin or 5-pin power connector
CN4 - Flat cable connector for CDROM data cable
CN7 - 5-pin connector for CDROM power
PORT1/2 - Controller ports for controller/joystick/lightgun etc
GREEN-LED - Power LED
RESET - Push-button reset switch
Motherboard List
----------------
Board types used in Model 1: VA0 to VA3
Board types used in Model 2: VA2 to VA15
If the VA-number is an even number the board uses a single 8Mbit SGRAM for some of the work RAM, if an odd number it uses two 4Mbit SDRAMs.
Note there are MANY missing. Please help to update this list if you have info for others not listed here.
837-11076 IC BD SATURN MAIN VA0.5 171-6874E PC BD SATURN MAIN VA0.5 (C) SEGA 1994
837-11076-01 IC BD SATURN MAIN VA0 CCI 171-6874D PC BD SATURN MAIN VA0.5 (C) SEGA 1994
837-11493 IC BD SATURN MAIN VA0 PAL 171-6963B PC BD SATURN MAIN VA0 PAL (C) SEGA 1995
837-11892-01 PAL 171-7069B MAIN (C) SEGA 1995
837-12126 IC BD SATURN MAIN VA SG 171-7128B PC BD SATURN MAIN VA SG (C) SEGA 1995
837-12126 IC BD SATURN MAIN VA SG 171-7128C PC BD SATURN MAIN VA SG (C) SEGA 1995
837-12133 IC BD SATURN MAIN VA SD 171-7130C PC BD SATURN MAIN VA SD (C) SEGA 1995
837-12134 IC BD SATURN MAIN VA USA SD 171-7130C PC BD SATURN MAIN VA USA SD (C) SEGA 1995
837-12135 IC BD SATURN MAIN VA PAL SD 171-7131A PC BD SATURN MAIN VA PAL SD (C) SEGA 1995
837-12459 IC BD SATURN MAIN VA6 JPN SG 171-7207A PC BD SATURN MAIN VA6 SG (C) SEGA 1996
837-12468 IC BD SATURN MAIN VA8 JPN OCU 171-7209C PC BD SATURN MAIN VA8 OCU (C) SEGA 1996
837-12643 IC BD SATURN MAIN VA7 USA SD 171-7208C PC BD SATURN MAIN VA7 USA SD (C) SEGA 1996
(none) 171-7291B PC BD SATURN MAIN VA9 PAL (C) SEGA 1996
(none) 171-7291C PC BD SATURN MAIN VA9 (C) SEGA 1996
837-12650 IC BD SATURN MAIN VA13 JPN 171-7???? PC BD SATURN MAIN VA13 (C) SEGA 1996
837-12845 IC BD SATURN MAIN VA13 USA 171-7???? PC BD SATURN MAIN VA13 (C) SEGA 1996
837-12992 IC BD SATURN MAIN VA7 PAL 171-7424A PC BD SATURN MAIN VA7 PAL (C) SEGA 1996
837-13100 IC BD SATURN MAIN VA13 PAL 171-7455D PC BD SATURN MAIN VA13 PAL (C) SEGA 1997
837-13137 IC BD SATURN MAIN VA15 JPN 171-7462B PC BD SATURN MAIN VA15 (C) SEGA 1997
Motherboard Variations Summary
------------------------------
NTSC
----
- VA0: First revision. CD Block (YGR019A & HD6437097) is on a daughterboard. Power supply mounted on top casing.
Has 40 pin DIP EPROM or mask ROM for BIOS. Larger board with control ports on the main board. Uses JVC CD drive units ENR-007B/ENR-007D.
- VA1: marked as 'VA' on the main board. Power supply is now bottom mounted and plugs in on top into 5 pins on the main board. Most sub boards
integrated into the main board except the controller ports which are on a small sub board. BIOS is SOP40 mask ROM located on the bottom side of
the main board. Battery-backup RAM and the VRAM are also on the bottom side of the main board. Uses ENR-007D CD drive units.
- VA2 & VA3: Mostly same as VA1. VA2 is marked as 'VA SG' (uses SGRAM), and VA3 is marked as VA SD (uses SDRAM). Uses ENR-011A CD drive units.
- VA4 & VA5: Same as VA2 and VA3 but in a cheaper model 2 case. Uses ENR-011A CD drive units.
- VA6: One single PCB for everything. Uses an off-the-shelf PLL chip (CY2292). Some custom chips have been revised and have different 315-xxxx numbers.
BIOS and battery-backed RAM moved to the top side of the main board. Power supply has 4 pins and generates only +5VDC. Uses ENR-013A CD drive unit
or Sanyo 610-6185-30 CD drive unit.
- VA6 & VA7 has the CD Block reduced to a single IC (YGR022). Some custom chips have been revised and have different 315-xxxx numbers.
- VA8 & VA9 still has the CD Block ICs separated. VA9 uses the old type PLL chip (315-5746).
- VA10 to VA15: uses HQA-001A CD drive unit or Sanyo 610-6294-30 / 610-6473-30 CD drive unit. 68000 & YMF292 integrated into a single IC (315-5965).
The integrated sound IC has a bug with certain 68000 commands.
- VA11 has a small daughter board mounted on the main board to fix a design fault (possibly to fix the above sound IC problem?)
- VA11+ boards use a smaller TSSOP20 audio DAC, VA10 uses the old one.
- VA12, VA14 and VA16 might not exist.
- VA13 fixes the design fault on VA11 so the patch board is no longer needed.
- VA15 integrates the two SH-2 main CPUs into a larger single IC (HD6417098 / 315-6018).
PAL (only the main differences to the above are listed)
---
- No PAL board ever used SGRAM.
- All PAL boards have an odd VA-number.
- All PAL boards have a 5 pin power connector and use a 5 pin power supply.
- All PAL boards use different region & video output jumpers when compared to NTSC machines.
- All PAL boards use a 17.7344MHz master clock (NTSC units use 14.31818MHz).
- All PAL boards replace the composite sync output on the A/V OUT connector with 9VDC which is used for SCART auto switching. The 9VDC power comes from
pin 5 of the power supplies with a 5 pin connector. Composite sync is still there at TP4 on the bottom of the board but not wired into the A/V OUT port.
- VA0 PAL - has extra jumpers to set the master clock divider (JP18 & 19), functional but unpopulated 50/60Hz switch on the back (SW4).
- VA1 PAL - unpopulated 50/60Hz switch on the back (SW4). There is a design fault as it is still connected to the master clock divider select pin.
Therefore the switch does not work on its own, you have to cut or raise & ground the PLL pin 1 for the switch to work.
- VA3 PAL - has extra jumpers to set the master clock divider (JP20 & 21), functional but unpopulated 50/60Hz switch on the back (SW4).
- VA5 PAL - same as VA3 PAL.
- VA7 PAL - Unlike NTSC boards, this still uses the old PLL (315-5746) and pin 1 is connected to the PAL/NTSC and 50/60Hz selection pins on the video
encoder and the VDP2.
- VA9 - same as VA7 PAL.
- VA13 PAL - Other than a 5 pin power connector it's identical to the NTSC VA13 board.
- VA17 PAL - probably the final revision specifically for EU/PAL regions. Differences are unknown.
Power supplies
--------------
Type A is used on VA0 main boards and is mounted to the top casing. Pinout is GND, GND, 3.3V, 5V, (empty pin), 9V. (5 pins total)
Type B is used on VA1 to VA5 main boards and is bottom mounted. Pinout is GND, GND, 3.3V, 5V, 9V. (5 pins total)
Type C is used on VA6+ main boards and is bottom mounted. Pinout is GND, GND, 5V, 5V (4 pins total).
PAL units use either Type B or a 5-pin version of Type C power supplies. On earlier boards such as 'VA' the 9V pin is connected to pin 1 of the CD ROM
unit power supply cable connector on the main board. On later boards it's also connected to the A/V OUT port for SCART auto switching.
CD Drives
---------
With 20 pin flat cable connector, VA0-VA1:
- JVC ENR-007B EMW10447-003E
- JVC ENR-007B EMW10447-004E
- JVC ENR-007D EMW10447-005E
- JVC ENR-007D EMW10447-006E
- Hitachi JA00292
With 21 pin flat cable connector, VA2-VA5:
- JVC ENR-011A EMW10589-002
- JVC ENR-011A EMW10589-003
With 21 pin flat cable connector, VA6-VA9:
- JVC ENR-013A EMW20035-002 610-6185-20
- Sanyo 610-6185-30 (sometimes with an extra protection board where the flat cable plugs in)
With 21 pin flat cable connector, VA10-VA15:
- JVC HQA-001A HQ100002-002 610-6294-20
- Sanyo 610-6294-30 \
- Sanyo 610-6473-30 / (sometimes with an extra protection board where the flat cable plugs in)
These are the same as the VA6-VA9 units but lack an oscillator and have a white border on the edges of the PCB.
Optical pickups used - JVC drive: Optima-6, Hitachi drive: HOP-6, Sanyo drive: SF-P101 is used in the 610-6185-30
****************************************************************************************************
Emulation Notes:
-To enter into an Advanced Test Mode,keep pressed the Test Button (F2) on the start-up.
-Memo: Some tests done on the original & working PCB,to be implemented:
-The AD-Stick returns 0x00 or a similar value.

View File

@ -468,7 +468,7 @@ READ8_MEMBER( ti99_4x_state::read_by_9901 )
// the line enough to make the TMS9901 sense the low level.
// A reported, feasible fix was to cut the line and insert a diode
// below the Alphalock key.
if ((ioport("ALPHABUG")!=0) && (m_model!=MODEL_4)) answer |= (ioport("ALPHA")->read() | ioport("ALPHA1")->read());
if ((m_model!=MODEL_4) && (ioport("ALPHABUG")->read()!=0) );
}
else
{

View File

@ -1140,6 +1140,11 @@ void amstrad_state::amstrad_setLowerRom()
}
m_bank1->set_base(bank_base);
m_bank2->set_base(bank_base+0x02000);
if ((m_gate_array.mrer & (1<<2)) == 0 && m_gate_array.romdis == 0)
{
if (m_exp)
m_exp->set_mapping(MAP_LOWER);
}
}
else // CPC+/GX4000
{
@ -1204,6 +1209,8 @@ void amstrad_state::amstrad_setLowerRom()
{
m_bank1->set_base(m_region_cart->base());
m_bank2->set_base(m_region_cart->base() + 0x2000);
if (m_exp)
m_exp->set_mapping(MAP_LOWER);
}
}
}
@ -1235,6 +1242,12 @@ void amstrad_state::amstrad_setUpperRom()
m_bank7->set_base(bank_base);
m_bank8->set_base(bank_base+0x2000);
}
if ( ! ( m_gate_array.mrer & 0x08 ) && m_gate_array.romdis == 0)
{
if (m_exp)
m_exp->set_mapping(MAP_UPPER);
}
}
@ -1660,12 +1673,11 @@ Bit 4 controls the interrupt generation. It can be used to delay interrupts.*/
/* b3b2 != 0 then change the state of upper or lower rom area and rethink memory */
if (m_exp)
{
if((dataToGateArray & 0x0c) != 0)
if((dataToGateArray & 0x0c) != 0x0c)
m_exp->romen_w(0); // active low
else
m_exp->romen_w(1);
}
amstrad_setLowerRom();
amstrad_setUpperRom();
@ -2396,7 +2408,7 @@ void amstrad_state::amstrad_rethinkMemory()
/* mappings for other expansion devices */
if (m_exp)
m_exp->set_mapping();
m_exp->set_mapping(MAP_OTHER);
}
@ -2952,7 +2964,7 @@ void amstrad_state::amstrad_common_init()
m_gate_array.hsync = 0;
m_GateArray_RamConfiguration = 0;
m_gate_array.hsync_counter = 2;
AmstradCPC_GA_SetRamConfiguration();
/* space.install_read_bank(0x0000, 0x1fff, "bank1");
space.install_read_bank(0x2000, 0x3fff, "bank2");

View File

@ -14,6 +14,7 @@
#include "sound/beep.h"
#include "imagedev/cassette.h"
void electron_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
switch (id)
@ -246,7 +247,12 @@ WRITE8_MEMBER(electron_state::electron_ula_w)
case 0x06: /* Counter divider */
if ( m_ula.communication_mode == 0x01)
{
m_beeper->set_frequency( 1000000 / ( 16 * ( data + 1 ) ) );
/* GUESS
* the Advanced Users manual says this is the correct algorithm
* but the divider is wrong(?), says 16 but results in high pitch,
* 32 is more close
*/
m_beeper->set_frequency( 1000000 / ( 32 * ( data + 1 ) ) );
}
break;
case 0x07: /* Misc. */

View File

@ -36,6 +36,19 @@ const rom_entry *mm1_keyboard_t::device_rom_region() const
return ROM_NAME( mm1_keyboard );
}
//-------------------------------------------------
// sampled sounds from MM1 keyboard beeper
//-------------------------------------------------
static const char *const mm1_kb_sample_names[] =
{
"*MM1_keyboard",
"beep", // beep at 2.6 kHz
"power_switch", // not actually on the keyboard, but close enough :)
0
};
bool mm1_keyboard_t::first_time = true;
//-------------------------------------------------
// MACHINE_DRIVER( mm1_keyboard )
@ -43,8 +56,10 @@ const rom_entry *mm1_keyboard_t::device_rom_region() const
static MACHINE_CONFIG_FRAGMENT( mm1_keyboard )
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
MCFG_SOUND_ADD("keyboard_and_chassis_sounds", SAMPLES, 0)
MCFG_SAMPLES_CHANNELS(2)
MCFG_SAMPLES_NAMES(mm1_kb_sample_names)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.7)
MACHINE_CONFIG_END
@ -193,7 +208,7 @@ ioport_constructor mm1_keyboard_t::device_input_ports() const
mm1_keyboard_t::mm1_keyboard_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, MM1_KEYBOARD, "MikroMikko 1 keyboard", tag, owner, clock, "mm1kb", __FILE__),
m_write_kbst(*this),
m_speaker(*this, "speaker"),
m_samples(*this, "keyboard_and_chassis_sounds"),
m_rom(*this, "keyboard"),
m_y0(*this, "Y0"),
m_y1(*this, "Y1"),
@ -212,6 +227,10 @@ mm1_keyboard_t::mm1_keyboard_t(const machine_config &mconfig, const char *tag, d
{
}
enum
{
SCAN_TIMER,
};
//-------------------------------------------------
// device_start - device-specific startup
@ -223,15 +242,22 @@ void mm1_keyboard_t::device_start()
m_write_kbst.resolve_safe();
// allocate timers
m_scan_timer = timer_alloc();
m_scan_timer = timer_alloc(SCAN_TIMER);
m_scan_timer->adjust(attotime::from_hz(clock()), 0, attotime::from_hz(clock()));
// add notification request for system shut down (to play back the power switch sound once more)
machine().add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(FUNC(mm1_keyboard_t::shut_down_mm1), this));
// state saving
save_item(NAME(m_sense));
save_item(NAME(m_drive));
save_item(NAME(m_data));
}
void mm1_keyboard_t::shut_down_mm1()
{
m_samples->start(1, 1); // pretty useless this, as far as there is no way to delay the shut down process...
}
//-------------------------------------------------
// device_timer - handler timer events
@ -239,6 +265,7 @@ void mm1_keyboard_t::device_start()
void mm1_keyboard_t::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
// handle scan timer
UINT8 data = 0xff;
switch (m_drive)

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@ -12,7 +12,7 @@
#define __MM1_KEYBOARD__
#include "emu.h"
#include "sound/speaker.h"
#include "sound/samples.h"
@ -46,7 +46,20 @@ public:
DECLARE_READ8_MEMBER( read ) { return m_data; }
DECLARE_WRITE_LINE_MEMBER( bell_w ) { m_speaker->level_w(state); }
DECLARE_WRITE_LINE_MEMBER( bell_w )
{
if (state == 1)
{
if (first_time)
{
m_samples->start(1, 1); // power switch
first_time = false;
}
if (!m_samples->playing(0)) m_samples->start(0, 0); // beep; during boot, the second beep is in real HW very short (just before floppy seeks) but that's NYI
}
else if (m_samples->playing(0)) m_samples->stop(0); // happens only once during boot, no effect on output
}
void shut_down_mm1();
protected:
// device-level overrides
@ -56,7 +69,7 @@ protected:
private:
devcb_write_line m_write_kbst;
required_device<speaker_sound_device> m_speaker;
required_device<samples_device> m_samples;
required_memory_region m_rom;
required_ioport m_y0;
required_ioport m_y1;
@ -74,7 +87,8 @@ private:
int m_drive;
UINT8 m_data;
emu_timer *m_scan_timer;
static bool first_time; // for power switch sound
emu_timer *m_scan_timer; // scan timer
};

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@ -556,9 +556,9 @@ void n64_periphs::sp_dma(int direction)
length = (length + 7) & ~7;
}
if (sp_mem_addr & 0x3)
if (sp_mem_addr & 0x7)
{
sp_mem_addr = sp_mem_addr & ~3;
sp_mem_addr = sp_mem_addr & ~7;
}
if (sp_dram_addr & 0x7)
{
@ -977,7 +977,7 @@ WRITE32_MEMBER( n64_periphs::dp_reg_w )
{
state->m_rdp->set_status(status & ~DP_STATUS_START_VALID);
state->m_rdp->set_current(state->m_rdp->get_start());
state->m_rdp->set_end(data & ~ 7);
state->m_rdp->set_end(data & ~7);
g_profiler.start(PROFILER_USER1);
state->m_rdp->process_command_list();
g_profiler.stop();
@ -985,7 +985,7 @@ WRITE32_MEMBER( n64_periphs::dp_reg_w )
}
else
{
state->m_rdp->set_end(data & ~ 7);
state->m_rdp->set_end(data & ~7);
g_profiler.start(PROFILER_USER1);
state->m_rdp->process_command_list();
g_profiler.stop();

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@ -759,6 +759,7 @@ sx16 // Sanyo SX-16
mbc16 // Sanyo MBC-16
ataripc3
ssam88s
sicpc1605
// Non-PC msdos
pcd // Siemens PC-D

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@ -225,6 +225,7 @@ typedef UINT32 FPTR;
#ifdef _MSC_VER
#include <malloc.h>
typedef ptrdiff_t ssize_t;
#if _MSC_VER == 1900 // < VS2015
#define __LINE__Var 0
#endif