mirror of
https://github.com/holub/mame
synced 2025-04-16 05:24:54 +03:00
added SM510 cpu skeleton
This commit is contained in:
hap
parent
12505514ec
commit
7b0b0bbc95
@ -1545,6 +1545,38 @@ if (CPUS["SATURN"]~=null or _OPTIONS["with-tools"]) then
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table.insert(disasm_files , MAME_DIR .. "src/emu/cpu/saturn/saturnds.c")
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end
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--------------------------------------------------
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-- Sharp SM510 series
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--@src/emu/cpu/sm510/sm510.h,CPUS["SM510"] = true
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--------------------------------------------------
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if (CPUS["SM510"]~=null) then
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files {
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MAME_DIR .. "src/emu/cpu/sm510/sm510.c",
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MAME_DIR .. "src/emu/cpu/sm510/sm510.h",
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}
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end
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if (CPUS["SM510"]~=null or _OPTIONS["with-tools"]) then
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table.insert(disasm_files , MAME_DIR .. "src/emu/cpu/sm510/sm510d.c")
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end
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--------------------------------------------------
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-- Sharp SM8500
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--@src/emu/cpu/sm8500/sm8500.h,CPUS["SM8500"] = true
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--------------------------------------------------
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if (CPUS["SM8500"]~=null) then
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files {
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MAME_DIR .. "src/emu/cpu/sm8500/sm8500.c",
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MAME_DIR .. "src/emu/cpu/sm8500/sm8500.h",
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}
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end
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if (CPUS["SM8500"]~=null or _OPTIONS["with-tools"]) then
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table.insert(disasm_files , MAME_DIR .. "src/emu/cpu/sm8500/sm8500d.c")
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end
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--------------------------------------------------
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-- Signetics 2650
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--@src/emu/cpu/s2650/s2650.h,CPUS["S2650"] = true
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@ -1577,22 +1609,6 @@ if (CPUS["SC61860"]~=null or _OPTIONS["with-tools"]) then
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table.insert(disasm_files , MAME_DIR .. "src/emu/cpu/sc61860/scdasm.c")
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end
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--------------------------------------------------
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-- SM8500
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--@src/emu/cpu/sm8500/sm8500.h,CPUS["SM8500"] = true
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--------------------------------------------------
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if (CPUS["SM8500"]~=null) then
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files {
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MAME_DIR .. "src/emu/cpu/sm8500/sm8500.c",
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MAME_DIR .. "src/emu/cpu/sm8500/sm8500.h",
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}
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end
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if (CPUS["SM8500"]~=null or _OPTIONS["with-tools"]) then
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table.insert(disasm_files , MAME_DIR .. "src/emu/cpu/sm8500/sm8500d.c")
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end
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--------------------------------------------------
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-- Sony/Nintendo SPC700
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--@src/emu/cpu/spc700/spc700.h,CPUS["SPC700"] = true
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@ -128,6 +128,8 @@ CPUS["ARCOMPACT"] = true
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CPUS["HMCS40"] = true
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--CPUS["E0C6200"] = true
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--CPUS["MELPS4"] = true
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--CPUS["HPHYBRID"] = true
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--CPUS["SM510"] = true
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--------------------------------------------------
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-- specify available sound cores
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@ -129,6 +129,7 @@ CPUS["HMCS40"] = true
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CPUS["E0C6200"] = true
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CPUS["MELPS4"] = true
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CPUS["HPHYBRID"] = true
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CPUS["SM510"] = true
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--------------------------------------------------
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-- specify available sound cores; some of these are
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163
src/emu/cpu/sm510/sm510.c
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163
src/emu/cpu/sm510/sm510.c
Normal file
@ -0,0 +1,163 @@
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// license:BSD-3-Clause
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// copyright-holders:hap
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/*
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Sharp SM510 MCU family cores
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References:
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- 1990 Sharp Microcomputers Data Book
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*/
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#include "sm510.h"
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#include "debugger.h"
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#include "sm510op.inc"
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// MCU types
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const device_type SM510 = &device_creator<sm510_device>;
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// internal memory maps
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static ADDRESS_MAP_START(program_2_7k, AS_PROGRAM, 8, sm510_base_device)
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AM_RANGE(0x0000, 0x0aff) AM_ROM
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(data_96_32x4, AS_DATA, 8, sm510_base_device)
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AM_RANGE(0x00, 0x5f) AM_RAM
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AM_RANGE(0x60, 0x7f) AM_RAM
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ADDRESS_MAP_END
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// device definitions
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sm510_device::sm510_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: sm510_base_device(mconfig, SM510, "SM510", tag, owner, clock, 2 /* stack levels */, 12 /* prg width */, ADDRESS_MAP_NAME(program_2_7k), 7 /* data width */, ADDRESS_MAP_NAME(data_96_32x4), "sm510", __FILE__)
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{ }
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// disasm
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void sm510_base_device::state_string_export(const device_state_entry &entry, std::string &str)
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{
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#if 0
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switch (entry.index())
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{
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case STATE_GENFLAGS:
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strprintf(str, "%c%c",
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m_c ? 'C':'c',
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m_s ? 'S':'s'
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);
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break;
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default: break;
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}
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#endif
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}
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offs_t sm510_base_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
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{
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extern CPU_DISASSEMBLE(sm510);
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return CPU_DISASSEMBLE_NAME(sm510)(this, buffer, pc, oprom, opram, options);
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}
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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enum
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{
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SM510_PC=1, SM510_ACC, SM510_BL, SM510_BM
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};
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void sm510_base_device::device_start()
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{
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m_program = &space(AS_PROGRAM);
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m_data = &space(AS_DATA);
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m_prgmask = (1 << m_prgwidth) - 1;
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m_datamask = (1 << m_datawidth) - 1;
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// resolve callbacks
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//..
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// zerofill
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memset(m_stack, 0, sizeof(m_stack));
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m_op = 0;
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m_prev_op = 0;
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m_pc = 0;
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m_prev_pc = 0;
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m_acc = 0;
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m_bl = 0;
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m_bm = 0;
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// register for savestates
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save_item(NAME(m_stack));
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save_item(NAME(m_op));
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save_item(NAME(m_prev_op));
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save_item(NAME(m_pc));
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save_item(NAME(m_prev_pc));
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save_item(NAME(m_acc));
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save_item(NAME(m_bl));
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save_item(NAME(m_bm));
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// register state for debugger
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state_add(SM510_PC, "PC", m_pc).formatstr("%04X");
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state_add(SM510_ACC, "ACC", m_acc).formatstr("%01X");
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state_add(SM510_BL, "BL", m_bl).formatstr("%01X");
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state_add(SM510_BM, "BM", m_bm).formatstr("%01X");
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state_add(STATE_GENPC, "curpc", m_pc).formatstr("%04X").noshow();
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state_add(STATE_GENFLAGS, "GENFLAGS", m_pc).formatstr("%2s").noshow();
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m_icountptr = &m_icount;
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}
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//-------------------------------------------------
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// device_reset - device-specific reset
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//-------------------------------------------------
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void sm510_base_device::device_reset()
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{
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}
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//-------------------------------------------------
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// execute
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//-------------------------------------------------
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inline void sm510_base_device::increment_pc()
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{
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}
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void sm510_base_device::execute_run()
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{
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while (m_icount > 0)
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{
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// remember previous state
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m_prev_op = m_op;
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m_prev_pc = m_pc;
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// fetch next opcode
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debugger_instruction_hook(this, m_pc);
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m_icount--;
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m_op = m_program->read_byte(m_pc);
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//m_param = fetch_opcode_param();
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increment_pc();
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// handle opcode
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}
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}
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108
src/emu/cpu/sm510/sm510.h
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108
src/emu/cpu/sm510/sm510.h
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@ -0,0 +1,108 @@
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// license:BSD-3-Clause
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// copyright-holders:hap
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/*
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Sharp SM510 MCU family cores
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*/
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#ifndef _SM510_H_
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#define _SM510_H_
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#include "emu.h"
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// I/O ports setup
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// pinout reference
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/*
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*/
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class sm510_base_device : public cpu_device
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{
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public:
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// construction/destruction
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sm510_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
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: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
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, m_program_config("program", ENDIANNESS_LITTLE, 8, prgwidth, 0, program)
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, m_data_config("data", ENDIANNESS_LITTLE, 8, datawidth, 0, data)
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, m_prgwidth(prgwidth)
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, m_datawidth(datawidth)
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, m_stack_levels(stack_levels)
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{ }
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// static configuration helpers
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//..
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protected:
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// device-level overrides
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virtual void device_start();
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virtual void device_reset();
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// device_execute_interface overrides
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virtual UINT32 execute_min_cycles() const { return 1; }
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virtual UINT32 execute_max_cycles() const { return 2; }
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virtual UINT32 execute_input_lines() const { return 1; }
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//virtual void execute_set_input(int line, int state);
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virtual void execute_run();
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// device_memory_interface overrides
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virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return(spacenum == AS_PROGRAM) ? &m_program_config : ((spacenum == AS_DATA) ? &m_data_config : NULL); }
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// device_disasm_interface overrides
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virtual UINT32 disasm_min_opcode_bytes() const { return 1; }
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virtual UINT32 disasm_max_opcode_bytes() const { return 2; }
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virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
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void state_string_export(const device_state_entry &entry, std::string &str);
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address_space_config m_program_config;
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address_space_config m_data_config;
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address_space *m_program;
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address_space *m_data;
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int m_prgwidth;
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int m_datawidth;
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int m_prgmask;
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int m_datamask;
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UINT16 m_prev_pc;
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UINT16 m_pc;
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UINT8 m_prev_op;
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UINT8 m_op;
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UINT8 m_param;
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int m_stack_levels;
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UINT16 m_stack[2];
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int m_icount;
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UINT8 m_acc;
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UINT8 m_bl;
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UINT8 m_bm;
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// i/o handlers
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//..
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// misc internal helpers
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void increment_pc();
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UINT8 ram_r();
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void ram_w(UINT8 data);
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void pop_stack();
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void push_stack();
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// opcode handlers
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void op_illegal();
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};
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class sm510_device : public sm510_base_device
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{
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public:
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sm510_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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};
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extern const device_type SM510;
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#endif /* _SM510_H_ */
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22
src/emu/cpu/sm510/sm510d.c
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22
src/emu/cpu/sm510/sm510d.c
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@ -0,0 +1,22 @@
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// license:BSD-3-Clause
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// copyright-holders:hap
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/*
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Sharp SM510 MCU family disassembler
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*/
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#include "emu.h"
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#include "debugger.h"
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#include "sm510.h"
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CPU_DISASSEMBLE(sm510)
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{
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//int pos = 0;
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//UINT8 op = oprom[pos++];
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return 1 | DASMFLAG_SUPPORTED;
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}
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41
src/emu/cpu/sm510/sm510op.inc
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41
src/emu/cpu/sm510/sm510op.inc
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@ -0,0 +1,41 @@
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// license:BSD-3-Clause
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// copyright-holders:hap
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// SM510 opcode handlers
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// internal helpers
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inline UINT8 sm510_base_device::ram_r()
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{
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UINT8 address = (m_bm << 4 | m_bl) & m_datamask;
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return m_data->read_byte(address) & 0xf;
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}
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inline void sm510_base_device::ram_w(UINT8 data)
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{
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UINT8 address = (m_bm << 4 | m_bl) & m_datamask;
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m_data->write_byte(address, data & 0xf);
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}
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void sm510_base_device::pop_stack()
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{
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m_pc = m_stack[0] & m_prgmask;
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for (int i = 0; i < m_stack_levels-1; i++)
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m_stack[i] = m_stack[i+1];
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}
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void sm510_base_device::push_stack()
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{
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for (int i = m_stack_levels-1; i >= 1; i--)
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m_stack[i] = m_stack[i-1];
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m_stack[0] = m_pc;
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}
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// instruction set
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void sm510_base_device::op_illegal()
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{
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logerror("%s unknown opcode $%03X at $%04X\n", tag(), m_op, m_prev_pc);
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}
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@ -158,6 +158,7 @@ CPU_DISASSEMBLE( sh2 );
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CPU_DISASSEMBLE( sh4 );
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CPU_DISASSEMBLE( sh4be );
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CPU_DISASSEMBLE( sharc );
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CPU_DISASSEMBLE( sm510 );
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CPU_DISASSEMBLE( sm8500 );
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CPU_DISASSEMBLE( spc700 );
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CPU_DISASSEMBLE( ssem );
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@ -309,6 +310,7 @@ static const dasm_table_entry dasm_table[] =
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{ "sh4", _16le, 0, CPU_DISASSEMBLE_NAME(sh4) },
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{ "sh4be", _16be, 0, CPU_DISASSEMBLE_NAME(sh4be) },
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{ "sharc", _48le, -2, CPU_DISASSEMBLE_NAME(sharc) },
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{ "sm510", _8bit, 0, CPU_DISASSEMBLE_NAME(sm510) },
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{ "sm8500", _8bit, 0, CPU_DISASSEMBLE_NAME(sm8500) },
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{ "spc700", _8bit, 0, CPU_DISASSEMBLE_NAME(spc700) },
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{ "ssem", _32le, 0, CPU_DISASSEMBLE_NAME(ssem) },
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