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Added support for using smaller-sized memory handlers directly in

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memory maps. To do so, you either need to specify a shift amount 
(mapping to a particular subset of the bus) or SHIFT_PACKED, which
maps a single larger sized read/write down to multiple reads or
writes at the smaller size.

Removed word-sized handlers from 6821pia.c. Updated drivers that
needed them to use these new interfaces instead.

Updated gaelco3d.c and itech8.c to remove the need for memconv.h
by using this new feature.

Re-removed input_port_set_digital_value().
This commit is contained in:
Aaron Giles 2008-04-14 16:47:02 +00:00
parent 39aeffdbcc
commit 7b97535eae
10 changed files with 1128 additions and 392 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
src/emu/inptport.c
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@ -3359,22 +3359,6 @@ UINT32 input_port_read_safe(running_machine *machine, const char *tag, UINT32 de
/*************************************
*
* Input port writing
*
*************************************/
void input_port_set_digital_value(running_machine *machine, int port_num, UINT32 value, UINT32 mask)
{
/* used by MESS for natural keyboard input */
input_port_info *portinfo = &port_info[port_num];
portinfo->digital &= ~mask;
portinfo->digital |= value;
}
/************************************* /*************************************
* *
* Return position of crosshair axis * Return position of crosshair axis

2
src/emu/inptport.h
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@ -937,8 +937,6 @@ int input_ui_pressed_repeat(int code, int speed);
void input_port_update_defaults(void); void input_port_update_defaults(void);
void input_port_set_digital_value(running_machine *machine, int port_num, UINT32 value, UINT32 mask);
UINT32 get_crosshair_pos(int port_num, UINT8 player, UINT8 axis); UINT32 get_crosshair_pos(int port_num, UINT8 player, UINT8 axis);
UINT32 input_port_read_indexed(running_machine *machine, int port); UINT32 input_port_read_indexed(running_machine *machine, int port);

76
src/emu/machine/6821pia.c
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@ -1198,82 +1198,6 @@ WRITE8_HANDLER( pia_5_alt_w ) { pia_alt_write(5, offset, data); }
WRITE8_HANDLER( pia_6_alt_w ) { pia_alt_write(6, offset, data); } WRITE8_HANDLER( pia_6_alt_w ) { pia_alt_write(6, offset, data); }
WRITE8_HANDLER( pia_7_alt_w ) { pia_alt_write(7, offset, data); } WRITE8_HANDLER( pia_7_alt_w ) { pia_alt_write(7, offset, data); }
/******************* Standard 16-bit CPU interfaces, D0-D7 *******************/
READ16_HANDLER( pia_0_lsb_r ) { return pia_read(0, offset); }
READ16_HANDLER( pia_1_lsb_r ) { return pia_read(1, offset); }
READ16_HANDLER( pia_2_lsb_r ) { return pia_read(2, offset); }
READ16_HANDLER( pia_3_lsb_r ) { return pia_read(3, offset); }
READ16_HANDLER( pia_4_lsb_r ) { return pia_read(4, offset); }
READ16_HANDLER( pia_5_lsb_r ) { return pia_read(5, offset); }
READ16_HANDLER( pia_6_lsb_r ) { return pia_read(6, offset); }
READ16_HANDLER( pia_7_lsb_r ) { return pia_read(7, offset); }
WRITE16_HANDLER( pia_0_lsb_w ) { if (ACCESSING_BITS_0_7) pia_write(0, offset, data); }
WRITE16_HANDLER( pia_1_lsb_w ) { if (ACCESSING_BITS_0_7) pia_write(1, offset, data); }
WRITE16_HANDLER( pia_2_lsb_w ) { if (ACCESSING_BITS_0_7) pia_write(2, offset, data); }
WRITE16_HANDLER( pia_3_lsb_w ) { if (ACCESSING_BITS_0_7) pia_write(3, offset, data); }
WRITE16_HANDLER( pia_4_lsb_w ) { if (ACCESSING_BITS_0_7) pia_write(4, offset, data); }
WRITE16_HANDLER( pia_5_lsb_w ) { if (ACCESSING_BITS_0_7) pia_write(5, offset, data); }
WRITE16_HANDLER( pia_6_lsb_w ) { if (ACCESSING_BITS_0_7) pia_write(6, offset, data); }
WRITE16_HANDLER( pia_7_lsb_w ) { if (ACCESSING_BITS_0_7) pia_write(7, offset, data); }
READ16_HANDLER( pia_0_lsb_alt_r ) { return pia_alt_read(0, offset); }
READ16_HANDLER( pia_1_lsb_alt_r ) { return pia_alt_read(1, offset); }
READ16_HANDLER( pia_2_lsb_alt_r ) { return pia_alt_read(2, offset); }
READ16_HANDLER( pia_3_lsb_alt_r ) { return pia_alt_read(3, offset); }
READ16_HANDLER( pia_4_lsb_alt_r ) { return pia_alt_read(4, offset); }
READ16_HANDLER( pia_5_lsb_alt_r ) { return pia_alt_read(5, offset); }
READ16_HANDLER( pia_6_lsb_alt_r ) { return pia_alt_read(6, offset); }
READ16_HANDLER( pia_7_lsb_alt_r ) { return pia_alt_read(7, offset); }
WRITE16_HANDLER( pia_0_lsb_alt_w ) { if (ACCESSING_BITS_0_7) pia_alt_write(0, offset, data); }
WRITE16_HANDLER( pia_1_lsb_alt_w ) { if (ACCESSING_BITS_0_7) pia_alt_write(1, offset, data); }
WRITE16_HANDLER( pia_2_lsb_alt_w ) { if (ACCESSING_BITS_0_7) pia_alt_write(2, offset, data); }
WRITE16_HANDLER( pia_3_lsb_alt_w ) { if (ACCESSING_BITS_0_7) pia_alt_write(3, offset, data); }
WRITE16_HANDLER( pia_4_lsb_alt_w ) { if (ACCESSING_BITS_0_7) pia_alt_write(4, offset, data); }
WRITE16_HANDLER( pia_5_lsb_alt_w ) { if (ACCESSING_BITS_0_7) pia_alt_write(5, offset, data); }
WRITE16_HANDLER( pia_6_lsb_alt_w ) { if (ACCESSING_BITS_0_7) pia_alt_write(6, offset, data); }
WRITE16_HANDLER( pia_7_lsb_alt_w ) { if (ACCESSING_BITS_0_7) pia_alt_write(7, offset, data); }
/******************* Standard 16-bit CPU interfaces, D8-D15 *******************/
READ16_HANDLER( pia_0_msb_r ) { return pia_read(0, offset) << 8; }
READ16_HANDLER( pia_1_msb_r ) { return pia_read(1, offset) << 8; }
READ16_HANDLER( pia_2_msb_r ) { return pia_read(2, offset) << 8; }
READ16_HANDLER( pia_3_msb_r ) { return pia_read(3, offset) << 8; }
READ16_HANDLER( pia_4_msb_r ) { return pia_read(4, offset) << 8; }
READ16_HANDLER( pia_5_msb_r ) { return pia_read(5, offset) << 8; }
READ16_HANDLER( pia_6_msb_r ) { return pia_read(6, offset) << 8; }
READ16_HANDLER( pia_7_msb_r ) { return pia_read(7, offset) << 8; }
WRITE16_HANDLER( pia_0_msb_w ) { if (ACCESSING_BITS_8_15) pia_write(0, offset, data >> 8); }
WRITE16_HANDLER( pia_1_msb_w ) { if (ACCESSING_BITS_8_15) pia_write(1, offset, data >> 8); }
WRITE16_HANDLER( pia_2_msb_w ) { if (ACCESSING_BITS_8_15) pia_write(2, offset, data >> 8); }
WRITE16_HANDLER( pia_3_msb_w ) { if (ACCESSING_BITS_8_15) pia_write(3, offset, data >> 8); }
WRITE16_HANDLER( pia_4_msb_w ) { if (ACCESSING_BITS_8_15) pia_write(4, offset, data >> 8); }
WRITE16_HANDLER( pia_5_msb_w ) { if (ACCESSING_BITS_8_15) pia_write(5, offset, data >> 8); }
WRITE16_HANDLER( pia_6_msb_w ) { if (ACCESSING_BITS_8_15) pia_write(6, offset, data >> 8); }
WRITE16_HANDLER( pia_7_msb_w ) { if (ACCESSING_BITS_8_15) pia_write(7, offset, data >> 8); }
READ16_HANDLER( pia_0_msb_alt_r ) { return pia_alt_read(0, offset) << 8; }
READ16_HANDLER( pia_1_msb_alt_r ) { return pia_alt_read(1, offset) << 8; }
READ16_HANDLER( pia_2_msb_alt_r ) { return pia_alt_read(2, offset) << 8; }
READ16_HANDLER( pia_3_msb_alt_r ) { return pia_alt_read(3, offset) << 8; }
READ16_HANDLER( pia_4_msb_alt_r ) { return pia_alt_read(4, offset) << 8; }
READ16_HANDLER( pia_5_msb_alt_r ) { return pia_alt_read(5, offset) << 8; }
READ16_HANDLER( pia_6_msb_alt_r ) { return pia_alt_read(6, offset) << 8; }
READ16_HANDLER( pia_7_msb_alt_r ) { return pia_alt_read(7, offset) << 8; }
WRITE16_HANDLER( pia_0_msb_alt_w ) { if (ACCESSING_BITS_8_15) pia_alt_write(0, offset, data >> 8); }
WRITE16_HANDLER( pia_1_msb_alt_w ) { if (ACCESSING_BITS_8_15) pia_alt_write(1, offset, data >> 8); }
WRITE16_HANDLER( pia_2_msb_alt_w ) { if (ACCESSING_BITS_8_15) pia_alt_write(2, offset, data >> 8); }
WRITE16_HANDLER( pia_3_msb_alt_w ) { if (ACCESSING_BITS_8_15) pia_alt_write(3, offset, data >> 8); }
WRITE16_HANDLER( pia_4_msb_alt_w ) { if (ACCESSING_BITS_8_15) pia_alt_write(4, offset, data >> 8); }
WRITE16_HANDLER( pia_5_msb_alt_w ) { if (ACCESSING_BITS_8_15) pia_alt_write(5, offset, data >> 8); }
WRITE16_HANDLER( pia_6_msb_alt_w ) { if (ACCESSING_BITS_8_15) pia_alt_write(6, offset, data >> 8); }
WRITE16_HANDLER( pia_7_msb_alt_w ) { if (ACCESSING_BITS_8_15) pia_alt_write(7, offset, data >> 8); }
/******************* 8-bit A/B port interfaces *******************/ /******************* 8-bit A/B port interfaces *******************/
WRITE8_HANDLER( pia_0_porta_w ) { pia_set_input_a(0, data, 0); } WRITE8_HANDLER( pia_0_porta_w ) { pia_set_input_a(0, data, 0); }

80
src/emu/machine/6821pia.h
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@ -168,86 +168,6 @@ WRITE8_HANDLER( pia_7_alt_w );
/*---------- Standard 16-bit CPU interfaces, D0-D7 -------*/
READ16_HANDLER( pia_0_lsb_r );
READ16_HANDLER( pia_1_lsb_r );
READ16_HANDLER( pia_2_lsb_r );
READ16_HANDLER( pia_3_lsb_r );
READ16_HANDLER( pia_4_lsb_r );
READ16_HANDLER( pia_5_lsb_r );
READ16_HANDLER( pia_6_lsb_r );
READ16_HANDLER( pia_7_lsb_r );
WRITE16_HANDLER( pia_0_lsb_w );
WRITE16_HANDLER( pia_1_lsb_w );
WRITE16_HANDLER( pia_2_lsb_w );
WRITE16_HANDLER( pia_3_lsb_w );
WRITE16_HANDLER( pia_4_lsb_w );
WRITE16_HANDLER( pia_5_lsb_w );
WRITE16_HANDLER( pia_6_lsb_w );
WRITE16_HANDLER( pia_7_lsb_w );
READ16_HANDLER( pia_0_lsb_alt_r );
READ16_HANDLER( pia_1_lsb_alt_r );
READ16_HANDLER( pia_2_lsb_alt_r );
READ16_HANDLER( pia_3_lsb_alt_r );
READ16_HANDLER( pia_4_lsb_alt_r );
READ16_HANDLER( pia_5_lsb_alt_r );
READ16_HANDLER( pia_6_lsb_alt_r );
READ16_HANDLER( pia_7_lsb_alt_r );
WRITE16_HANDLER( pia_0_lsb_alt_w );
WRITE16_HANDLER( pia_1_lsb_alt_w );
WRITE16_HANDLER( pia_2_lsb_alt_w );
WRITE16_HANDLER( pia_3_lsb_alt_w );
WRITE16_HANDLER( pia_4_lsb_alt_w );
WRITE16_HANDLER( pia_5_lsb_alt_w );
WRITE16_HANDLER( pia_6_lsb_alt_w );
WRITE16_HANDLER( pia_7_lsb_alt_w );
/*--------- Standard 16-bit CPU interfaces, D8-D15 -------*/
READ16_HANDLER( pia_0_msb_r );
READ16_HANDLER( pia_1_msb_r );
READ16_HANDLER( pia_2_msb_r );
READ16_HANDLER( pia_3_msb_r );
READ16_HANDLER( pia_4_msb_r );
READ16_HANDLER( pia_5_msb_r );
READ16_HANDLER( pia_6_msb_r );
READ16_HANDLER( pia_7_msb_r );
WRITE16_HANDLER( pia_0_msb_w );
WRITE16_HANDLER( pia_1_msb_w );
WRITE16_HANDLER( pia_2_msb_w );
WRITE16_HANDLER( pia_3_msb_w );
WRITE16_HANDLER( pia_4_msb_w );
WRITE16_HANDLER( pia_5_msb_w );
WRITE16_HANDLER( pia_6_msb_w );
WRITE16_HANDLER( pia_7_msb_w );
READ16_HANDLER( pia_0_msb_alt_r );
READ16_HANDLER( pia_1_msb_alt_r );
READ16_HANDLER( pia_2_msb_alt_r );
READ16_HANDLER( pia_3_msb_alt_r );
READ16_HANDLER( pia_4_msb_alt_r );
READ16_HANDLER( pia_5_msb_alt_r );
READ16_HANDLER( pia_6_msb_alt_r );
READ16_HANDLER( pia_7_msb_alt_r );
WRITE16_HANDLER( pia_0_msb_alt_w );
WRITE16_HANDLER( pia_1_msb_alt_w );
WRITE16_HANDLER( pia_2_msb_alt_w );
WRITE16_HANDLER( pia_3_msb_alt_w );
WRITE16_HANDLER( pia_4_msb_alt_w );
WRITE16_HANDLER( pia_5_msb_alt_w );
WRITE16_HANDLER( pia_6_msb_alt_w );
WRITE16_HANDLER( pia_7_msb_alt_w );
/*--------------- 8-bit A/B port interfaces -------------*/ /*--------------- 8-bit A/B port interfaces -------------*/
WRITE8_HANDLER( pia_0_porta_w ); WRITE8_HANDLER( pia_0_porta_w );

1105
src/emu/memory.c
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File diff suppressed because it is too large Load Diff

109
src/emu/memory.h
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@ -23,6 +23,11 @@
CONSTANTS CONSTANTS
***************************************************************************/ ***************************************************************************/
/* stub handler shift amounts */
#define SHIFT_PACKED 1
/* address spaces */ /* address spaces */
enum enum
{ {
@ -192,10 +197,14 @@ struct _address_map_entry
offs_t addrmirror; /* mirror bits */ offs_t addrmirror; /* mirror bits */
offs_t addrmask; /* mask bits */ offs_t addrmask; /* mask bits */
read_handler read; /* read handler callback */ read_handler read; /* read handler callback */
UINT8 read_bits; /* bits for the read handler callback (0=default, 1=8, 2=16, 3=32) */
UINT8 read_shift; /* shift value for the read handler */
const char * read_name; /* read handler callback name */ const char * read_name; /* read handler callback name */
device_type read_devtype; /* read device type for device references */ device_type read_devtype; /* read device type for device references */
const char * read_devtag; /* read tag for the relevant device */ const char * read_devtag; /* read tag for the relevant device */
write_handler write; /* write handler callback */ write_handler write; /* write handler callback */
UINT8 write_bits; /* bits for the write handler callback (0=default, 1=8, 2=16, 3=32) */
UINT8 write_shift; /* shift value for the write handler */
const char * write_name; /* write handler callback name */ const char * write_name; /* write handler callback name */
device_type write_devtype; /* read device type for device references */ device_type write_devtype; /* read device type for device references */
const char * write_devtag; /* read tag for the relevant device */ const char * write_devtag; /* read tag for the relevant device */
@ -284,6 +293,8 @@ union _addrmap16_token
write16_device_func dwrite; /* pointer to native device write handler */ write16_device_func dwrite; /* pointer to native device write handler */
read8_machine_func mread8; /* pointer to 8-bit machine read handler */ read8_machine_func mread8; /* pointer to 8-bit machine read handler */
write8_machine_func mwrite8; /* pointer to 8-bit machine write handler */ write8_machine_func mwrite8; /* pointer to 8-bit machine write handler */
read8_device_func dread8; /* pointer to 8-bit device read handler */
write8_device_func dwrite8; /* pointer to 8-bit device write handler */
read_handler read; /* generic read handlers */ read_handler read; /* generic read handlers */
write_handler write; /* generic write handlers */ write_handler write; /* generic write handlers */
device_type devtype; /* device type */ device_type devtype; /* device type */
@ -304,8 +315,12 @@ union _addrmap32_token
write32_device_func dwrite; /* pointer to native device write handler */ write32_device_func dwrite; /* pointer to native device write handler */
read8_machine_func mread8; /* pointer to 8-bit machine read handler */ read8_machine_func mread8; /* pointer to 8-bit machine read handler */
write8_machine_func mwrite8; /* pointer to 8-bit machine write handler */ write8_machine_func mwrite8; /* pointer to 8-bit machine write handler */
read8_device_func dread8; /* pointer to 8-bit device read handler */
write8_device_func dwrite8; /* pointer to 8-bit device write handler */
read16_machine_func mread16; /* pointer to 16-bit machine read handler */ read16_machine_func mread16; /* pointer to 16-bit machine read handler */
write16_machine_func mwrite16; /* pointer to 16-bit machine write handler */ write16_machine_func mwrite16; /* pointer to 16-bit machine write handler */
read16_device_func dread16; /* pointer to 16-bit device read handler */
write16_device_func dwrite16; /* pointer to 16-bit device write handler */
read_handler read; /* generic read handlers */ read_handler read; /* generic read handlers */
write_handler write; /* generic write handlers */ write_handler write; /* generic write handlers */
device_type devtype; /* device type */ device_type devtype; /* device type */
@ -326,10 +341,16 @@ union _addrmap64_token
write64_device_func dwrite; /* pointer to native device write handler */ write64_device_func dwrite; /* pointer to native device write handler */
read8_machine_func mread8; /* pointer to 8-bit machine read handler */ read8_machine_func mread8; /* pointer to 8-bit machine read handler */
write8_machine_func mwrite8; /* pointer to 8-bit machine write handler */ write8_machine_func mwrite8; /* pointer to 8-bit machine write handler */
read8_device_func dread8; /* pointer to 8-bit device read handler */
write8_device_func dwrite8; /* pointer to 8-bit device write handler */
read16_machine_func mread16; /* pointer to 16-bit machine read handler */ read16_machine_func mread16; /* pointer to 16-bit machine read handler */
write16_machine_func mwrite16; /* pointer to 16-bit machine write handler */ write16_machine_func mwrite16; /* pointer to 16-bit machine write handler */
read16_device_func dread16; /* pointer to 16-bit device read handler */
write16_device_func dwrite16; /* pointer to 16-bit device write handler */
read32_machine_func mread32; /* pointer to 32-bit machine read handler */ read32_machine_func mread32; /* pointer to 32-bit machine read handler */
write32_machine_func mwrite32; /* pointer to 32-bit machine write handler */ write32_machine_func mwrite32; /* pointer to 32-bit machine write handler */
read32_device_func dread32; /* pointer to 32-bit device read handler */
write32_device_func dwrite32; /* pointer to 32-bit device write handler */
read_handler read; /* generic read handlers */ read_handler read; /* generic read handlers */
write_handler write; /* generic write handlers */ write_handler write; /* generic write handlers */
device_type devtype; /* device type */ device_type devtype; /* device type */
@ -574,31 +595,103 @@ union _addrmap64_token
TOKEN_UINT64_PACK2(ADDRMAP_TOKEN_MIRROR, 8, _mirror, 32), TOKEN_UINT64_PACK2(ADDRMAP_TOKEN_MIRROR, 8, _mirror, 32),
#define AM_READ(_handler) \ #define AM_READ(_handler) \
TOKEN_UINT32_PACK1(ADDRMAP_TOKEN_READ, 8), \ TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_READ, 8, 0, 2, 0, 6), \
TOKEN_PTR(mread, _handler), \ TOKEN_PTR(mread, _handler), \
TOKEN_STRING(#_handler), TOKEN_STRING(#_handler),
#define AM_READ8(_handler, _shift) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_READ, 8, 1, 2, (_shift), 6), \
TOKEN_PTR(mread8, _handler), \
TOKEN_STRING(#_handler),
#define AM_READ16(_handler, _shift) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_READ, 8, 2, 2, (_shift), 6), \
TOKEN_PTR(mread16, _handler), \
TOKEN_STRING(#_handler),
#define AM_READ32(_handler, _shift) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_READ, 8, 3, 2, (_shift), 6), \
TOKEN_PTR(mread32, _handler), \
TOKEN_STRING(#_handler),
#define AM_WRITE(_handler) \ #define AM_WRITE(_handler) \
TOKEN_UINT32_PACK1(ADDRMAP_TOKEN_WRITE, 8), \ TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_WRITE, 8, 0, 2, 0, 6), \
TOKEN_PTR(mwrite, _handler), \ TOKEN_PTR(mwrite, _handler), \
TOKEN_STRING(#_handler), TOKEN_STRING(#_handler),
#define AM_WRITE8(_handler, _shift) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_WRITE, 8, 1, 2, (_shift), 6), \
TOKEN_PTR(mwrite8, _handler), \
TOKEN_STRING(#_handler),
#define AM_WRITE16(_handler, _shift) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_WRITE, 8, 2, 2, (_shift), 6), \
TOKEN_PTR(mwrite16, _handler), \
TOKEN_STRING(#_handler),
#define AM_WRITE32(_handler, _shift) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_WRITE, 8, 3, 2, (_shift), 6), \
TOKEN_PTR(mwrite32, _handler), \
TOKEN_STRING(#_handler),
#define AM_DEVREAD(_type, _tag, _handler) \ #define AM_DEVREAD(_type, _tag, _handler) \
TOKEN_UINT32_PACK1(ADDRMAP_TOKEN_DEVICE_READ, 8), \ TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_DEVICE_READ, 8, 0, 2, 0, 6), \
TOKEN_PTR(dread, _handler), \ TOKEN_PTR(dread, _handler), \
TOKEN_STRING(#_handler), \ TOKEN_STRING(#_handler), \
TOKEN_PTR(devtype, _type), \ TOKEN_PTR(devtype, _type), \
TOKEN_STRING(_tag), TOKEN_STRING(_tag),
#define AM_DEVREAD8(_type, _tag, _handler, _shift) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_DEVICE_READ, 8, 1, 2, (_shift), 6), \
TOKEN_PTR(dread8, _handler), \
TOKEN_STRING(#_handler), \
TOKEN_PTR(devtype, _type), \
TOKEN_STRING(_tag),
#define AM_DEVREAD16(_type, _tag, _handler, _shift) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_DEVICE_READ, 8, 2, 2, (_shift), 6), \
TOKEN_PTR(dread16, _handler), \
TOKEN_STRING(#_handler), \
TOKEN_PTR(devtype, _type), \
TOKEN_STRING(_tag),
#define AM_DEVREAD32(_type, _tag, _handler, _shift) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_DEVICE_READ, 8, 3, 2, (_shift), 6), \
TOKEN_PTR(dread32, _handler), \
TOKEN_STRING(#_handler), \
TOKEN_PTR(devtype, _type), \
TOKEN_STRING(_tag),
#define AM_DEVWRITE(_type, _tag, _handler) \ #define AM_DEVWRITE(_type, _tag, _handler) \
TOKEN_UINT32_PACK1(ADDRMAP_TOKEN_DEVICE_WRITE, 8), \ TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_DEVICE_WRITE, 8, 0, 2, 0, 6), \
TOKEN_PTR(dwrite, _handler), \ TOKEN_PTR(dwrite, _handler), \
TOKEN_STRING(#_handler), \ TOKEN_STRING(#_handler), \
TOKEN_PTR(devtype, _type), \ TOKEN_PTR(devtype, _type), \
TOKEN_STRING(_tag), TOKEN_STRING(_tag),
#define AM_DEVWRITE8(_type, _tag, _handler, _shift) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_DEVICE_WRITE, 8, 1, 2, (_shift), 6), \
TOKEN_PTR(dwrite8, _handler), \
TOKEN_STRING(#_handler), \
TOKEN_PTR(devtype, _type), \
TOKEN_STRING(_tag),
#define AM_DEVWRITE16(_type, _tag, _handler, _shift) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_DEVICE_WRITE, 8, 2, 2, (_shift), 6), \
TOKEN_PTR(dwrite16, _handler), \
TOKEN_STRING(#_handler), \
TOKEN_PTR(devtype, _type), \
TOKEN_STRING(_tag),
#define AM_DEVWRITE32(_type, _tag, _handler, _shift) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_DEVICE_WRITE, 8, 3, 2, (_shift), 6), \
TOKEN_PTR(dwrite32, _handler), \
TOKEN_STRING(#_handler), \
TOKEN_PTR(devtype, _type), \
TOKEN_STRING(_tag),
#define AM_READ_PORT(_tag) \ #define AM_READ_PORT(_tag) \
TOKEN_UINT32_PACK1(ADDRMAP_TOKEN_READ_PORT, 8), \ TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_READ_PORT, 8, 0, 2, 0, 6), \
TOKEN_STRING(_tag), TOKEN_STRING(_tag),
#define AM_REGION(_region, _offs) \ #define AM_REGION(_region, _offs) \
@ -624,7 +717,13 @@ union _addrmap64_token
/* common shortcuts */ /* common shortcuts */
#define AM_READWRITE(_read,_write) AM_READ(_read) AM_WRITE(_write) #define AM_READWRITE(_read,_write) AM_READ(_read) AM_WRITE(_write)
#define AM_READWRITE8(_read,_write,_shift) AM_READ8(_read,_shift) AM_WRITE8(_write,_shift)
#define AM_READWRITE16(_read,_write,_shift) AM_READ16(_read,_shift) AM_WRITE16(_write,_shift)
#define AM_READWRITE32(_read,_write,_shift) AM_READ32(_read,_shift) AM_WRITE32(_write,_shift)
#define AM_DEVREADWRITE(_type,_tag,_read,_write) AM_DEVREAD(_type,_tag,_read) AM_DEVWRITE(_type,_tag,_write) #define AM_DEVREADWRITE(_type,_tag,_read,_write) AM_DEVREAD(_type,_tag,_read) AM_DEVWRITE(_type,_tag,_write)
#define AM_DEVREADWRITE8(_type,_tag,_read,_write,_shift) AM_DEVREAD8(_type,_tag,_read,_shift) AM_DEVWRITE8(_type,_tag,_write,_shift)
#define AM_DEVREADWRITE16(_type,_tag,_read,_write,_shift) AM_DEVREAD16(_type,_tag,_read,_shift) AM_DEVWRITE16(_type,_tag,_write,_shift)
#define AM_DEVREADWRITE32(_type,_tag,_read,_write,_shift) AM_DEVREAD32(_type,_tag,_read,_shift) AM_DEVWRITE32(_type,_tag,_write,_shift)
#define AM_ROM AM_READ(SMH_ROM) #define AM_ROM AM_READ(SMH_ROM)
#define AM_RAM AM_READWRITE(SMH_RAM, SMH_RAM) #define AM_RAM AM_READWRITE(SMH_RAM, SMH_RAM)
#define AM_WRITEONLY AM_WRITE(SMH_RAM) #define AM_WRITEONLY AM_WRITE(SMH_RAM)

2
src/mame/audio/mcr.c
View File

@ -692,7 +692,7 @@ static ADDRESS_MAP_START( soundsgood_map, ADDRESS_SPACE_PROGRAM, 16 )
ADDRESS_MAP_UNMAP_HIGH ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_GLOBAL_MASK(0x7ffff) ADDRESS_MAP_GLOBAL_MASK(0x7ffff)
AM_RANGE(0x000000, 0x03ffff) AM_ROM AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x060000, 0x060007) AM_READWRITE(pia_1_msb_alt_r, pia_1_msb_alt_w) AM_RANGE(0x060000, 0x060007) AM_READWRITE8(pia_1_alt_r, pia_1_alt_w, 8)
AM_RANGE(0x070000, 0x070fff) AM_RAM AM_RANGE(0x070000, 0x070fff) AM_RAM
ADDRESS_MAP_END ADDRESS_MAP_END

66
src/mame/drivers/gaelco3d.c
View File

@ -144,7 +144,6 @@ REF. 970429
#include "driver.h" #include "driver.h"
#include "deprecat.h" #include "deprecat.h"
#include "memconv.h"
#include "gaelco3d.h" #include "gaelco3d.h"
#include "cpu/tms32031/tms32031.h" #include "cpu/tms32031/tms32031.h"
#include "cpu/adsp2100/adsp2100.h" #include "cpu/adsp2100/adsp2100.h"
@ -253,7 +252,6 @@ static WRITE16_HANDLER( irq_ack_w )
{ {
cpunum_set_input_line(Machine, 0, 2, CLEAR_LINE); cpunum_set_input_line(Machine, 0, 2, CLEAR_LINE);
} }
static WRITE32_HANDLER( irq_ack_020_w ) { if (ACCESSING_BITS_16_31) irq_ack_w(machine, offset, data >> 16, mem_mask >> 16); }
@ -271,7 +269,6 @@ static READ16_HANDLER( eeprom_data_r )
logerror("eeprom_data_r(%02X)\n", result); logerror("eeprom_data_r(%02X)\n", result);
return result; return result;
} }
static READ32_HANDLER( eeprom_data_020_r ) { return eeprom_data_r(machine, offset, mem_mask) << 16; }
static WRITE16_HANDLER( eeprom_data_w ) static WRITE16_HANDLER( eeprom_data_w )
@ -279,7 +276,6 @@ static WRITE16_HANDLER( eeprom_data_w )
if (ACCESSING_BITS_0_7) if (ACCESSING_BITS_0_7)
EEPROM_write_bit(data & 0x01); EEPROM_write_bit(data & 0x01);
} }
static WRITE32_HANDLER( eeprom_data_020_w ) { if (ACCESSING_BITS_0_15) eeprom_data_w(machine, offset, data, mem_mask); }
static WRITE16_HANDLER( eeprom_clock_w ) static WRITE16_HANDLER( eeprom_clock_w )
@ -287,7 +283,6 @@ static WRITE16_HANDLER( eeprom_clock_w )
if (ACCESSING_BITS_0_7) if (ACCESSING_BITS_0_7)
EEPROM_set_clock_line((data & 0x01) ? ASSERT_LINE : CLEAR_LINE); EEPROM_set_clock_line((data & 0x01) ? ASSERT_LINE : CLEAR_LINE);
} }
static WRITE32_HANDLER( eeprom_clock_020_w ) { if (ACCESSING_BITS_0_15) eeprom_clock_w(machine, offset, data, mem_mask); }
static WRITE16_HANDLER( eeprom_cs_w ) static WRITE16_HANDLER( eeprom_cs_w )
@ -295,7 +290,6 @@ static WRITE16_HANDLER( eeprom_cs_w )
if (ACCESSING_BITS_0_7) if (ACCESSING_BITS_0_7)
EEPROM_set_cs_line((data & 0x01) ? CLEAR_LINE : ASSERT_LINE); EEPROM_set_cs_line((data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
} }
static WRITE32_HANDLER( eeprom_cs_020_w ) { if (ACCESSING_BITS_0_15) eeprom_cs_w(machine, offset, data, mem_mask); }
@ -319,13 +313,12 @@ static WRITE16_HANDLER( sound_data_w )
if (ACCESSING_BITS_0_7) if (ACCESSING_BITS_0_7)
timer_call_after_resynch(NULL, data & 0xff, delayed_sound_w); timer_call_after_resynch(NULL, data & 0xff, delayed_sound_w);
} }
static WRITE32_HANDLER( sound_data_020_w ) { if (ACCESSING_BITS_16_31) sound_data_w(machine, offset, data >> 16, mem_mask >> 16); }
static READ16_HANDLER( sound_data_r ) static READ16_HANDLER( sound_data_r )
{ {
logerror("sound_data_r(%02X)\n", sound_data); logerror("sound_data_r(%02X)\n", sound_data);
cpunum_set_input_line(Machine, 2, ADSP2115_IRQ2, CLEAR_LINE); cpunum_set_input_line(machine, 2, ADSP2115_IRQ2, CLEAR_LINE);
return sound_data; return sound_data;
} }
@ -337,7 +330,6 @@ static READ16_HANDLER( sound_status_r )
return sound_status; return sound_status;
return 0xffff; return 0xffff;
} }
static READ32_HANDLER( sound_status_020_r ) { if (ACCESSING_BITS_0_15) return sound_status_r(machine, offset, mem_mask); return ~0; }
static WRITE16_HANDLER( sound_status_w ) static WRITE16_HANDLER( sound_status_w )
@ -354,12 +346,6 @@ static WRITE16_HANDLER( sound_status_w )
* *
*************************************/ *************************************/
static READ32_HANDLER( input_port_0_020_r ) { return input_port_read_indexed(machine, 0) << 16; }
static READ32_HANDLER( input_port_1_020_r ) { return input_port_read_indexed(machine, 1) << 16; }
static READ32_HANDLER( input_port_2_020_r ) { return input_port_read_indexed(machine, 2) << 16; }
static READ32_HANDLER( input_port_3_020_r ) { return input_port_read_indexed(machine, 3) << 16; }
static CUSTOM_INPUT( analog_bit_r ) static CUSTOM_INPUT( analog_bit_r )
{ {
int which = (FPTR)param; int which = (FPTR)param;
@ -383,7 +369,6 @@ static WRITE16_HANDLER( analog_port_clock_w )
else else
logerror("%06X:analog_port_clock_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask); logerror("%06X:analog_port_clock_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask);
} }
static WRITE32_HANDLER( analog_port_clock_020_w ) { if (ACCESSING_BITS_0_15) analog_port_clock_w(machine, offset, data, mem_mask); }
static WRITE16_HANDLER( analog_port_latch_w ) static WRITE16_HANDLER( analog_port_latch_w )
@ -402,7 +387,6 @@ static WRITE16_HANDLER( analog_port_latch_w )
else else
logerror("%06X:analog_port_latch_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask); logerror("%06X:analog_port_latch_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask);
} }
static WRITE32_HANDLER( analog_port_latch_020_w ) { if (ACCESSING_BITS_0_15) analog_port_latch_w(machine, offset, data, mem_mask); }
@ -444,9 +428,8 @@ static WRITE16_HANDLER( tms_reset_w )
/* this is set to 0 while data is uploaded, then set to $ffff after it is done */ /* this is set to 0 while data is uploaded, then set to $ffff after it is done */
/* it does not ever appear to be touched after that */ /* it does not ever appear to be touched after that */
logerror("%06X:tms_reset_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask); logerror("%06X:tms_reset_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask);
cpunum_set_input_line(Machine, 1, INPUT_LINE_RESET, (data == 0xffff) ? CLEAR_LINE : ASSERT_LINE); cpunum_set_input_line(machine, 1, INPUT_LINE_RESET, (data == 0xffff) ? CLEAR_LINE : ASSERT_LINE);
} }
static WRITE32_HANDLER( tms_reset_020_w ) { if (ACCESSING_BITS_0_15) tms_reset_w(machine, offset, data, mem_mask); }
static WRITE16_HANDLER( tms_irq_w ) static WRITE16_HANDLER( tms_irq_w )
@ -455,16 +438,14 @@ static WRITE16_HANDLER( tms_irq_w )
/* done after uploading, and after modifying the comm area */ /* done after uploading, and after modifying the comm area */
logerror("%06X:tms_irq_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask); logerror("%06X:tms_irq_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask);
if (ACCESSING_BITS_0_7) if (ACCESSING_BITS_0_7)
cpunum_set_input_line(Machine, 1, 0, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE); cpunum_set_input_line(machine, 1, 0, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
} }
static WRITE32_HANDLER( tms_irq_020_w ) { if (ACCESSING_BITS_0_15) tms_irq_w(machine, offset, data, mem_mask); }
static WRITE16_HANDLER( tms_control3_w ) static WRITE16_HANDLER( tms_control3_w )
{ {
logerror("%06X:tms_control3_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask); logerror("%06X:tms_control3_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask);
} }
static WRITE32_HANDLER( tms_control3_020_w ) { if (ACCESSING_BITS_0_15) tms_control3_w(machine, offset, data, mem_mask); }
static WRITE16_HANDLER( tms_comm_w ) static WRITE16_HANDLER( tms_comm_w )
@ -472,7 +453,6 @@ static WRITE16_HANDLER( tms_comm_w )
COMBINE_DATA(&tms_comm_base[offset ^ tms_offset_xor]); COMBINE_DATA(&tms_comm_base[offset ^ tms_offset_xor]);
logerror("%06X:tms_comm_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset*2, data, ~mem_mask); logerror("%06X:tms_comm_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset*2, data, ~mem_mask);
} }
static WRITE32_HANDLER( tms_comm_020_w ) { write32be_with_16be_handler(tms_comm_w, machine, offset, data, mem_mask); }
@ -708,7 +688,6 @@ static WRITE16_HANDLER( led_0_w )
if (ACCESSING_BITS_0_7) if (ACCESSING_BITS_0_7)
set_led_status(0, data != 0); set_led_status(0, data != 0);
} }
static WRITE32_HANDLER( led_0_020_w ) { if (ACCESSING_BITS_0_15) led_0_w(machine, offset, data, mem_mask); }
static WRITE16_HANDLER( led_1_w ) static WRITE16_HANDLER( led_1_w )
@ -717,7 +696,6 @@ static WRITE16_HANDLER( led_1_w )
if (ACCESSING_BITS_0_7) if (ACCESSING_BITS_0_7)
set_led_status(1, data != 0); set_led_status(1, data != 0);
} }
static WRITE32_HANDLER( led_1_020_w ) { if (ACCESSING_BITS_0_15) led_1_w(machine, offset, data, mem_mask); }
@ -758,29 +736,29 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( main020_map, ADDRESS_SPACE_PROGRAM, 32 ) static ADDRESS_MAP_START( main020_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x000000, 0x1fffff) AM_ROM AM_RANGE(0x000000, 0x1fffff) AM_ROM
AM_RANGE(0x400000, 0x40ffff) AM_READWRITE(SMH_RAM, gaelco3d_paletteram_020_w) AM_BASE(&paletteram32) AM_RANGE(0x400000, 0x40ffff) AM_READWRITE(SMH_RAM, gaelco3d_paletteram_020_w) AM_BASE(&paletteram32)
AM_RANGE(0x51000c, 0x51000f) AM_READ(input_port_0_020_r) AM_RANGE(0x51000c, 0x51000f) AM_READ16(input_port_0_word_r, 16)
AM_RANGE(0x51001c, 0x51001f) AM_READ(input_port_1_020_r) AM_RANGE(0x51001c, 0x51001f) AM_READ16(input_port_1_word_r, 16)
AM_RANGE(0x51002c, 0x51002f) AM_READ(input_port_2_020_r) AM_RANGE(0x51002c, 0x51002f) AM_READ16(input_port_2_word_r, 16)
AM_RANGE(0x51003c, 0x51003f) AM_READ(input_port_3_020_r) AM_RANGE(0x51003c, 0x51003f) AM_READ16(input_port_3_word_r, 16)
AM_RANGE(0x510040, 0x510043) AM_READ(sound_status_020_r) AM_RANGE(0x510040, 0x510043) AM_READ16(sound_status_r, 0)
AM_RANGE(0x510040, 0x510043) AM_WRITE(sound_data_020_w) AM_RANGE(0x510040, 0x510043) AM_WRITE16(sound_data_w, 16)
AM_RANGE(0x510100, 0x510103) AM_READ(eeprom_data_020_r) AM_RANGE(0x510100, 0x510103) AM_READ16(eeprom_data_r, 16)
AM_RANGE(0x510100, 0x510103) AM_WRITE(irq_ack_020_w) AM_RANGE(0x510100, 0x510103) AM_WRITE16(irq_ack_w, 16)
AM_RANGE(0x510104, 0x510107) AM_WRITE(unknown_107_w) AM_RANGE(0x510104, 0x510107) AM_WRITE(unknown_107_w)
AM_RANGE(0x510110, 0x510113) AM_WRITE(eeprom_data_020_w) AM_RANGE(0x510110, 0x510113) AM_WRITE16(eeprom_data_w, 0)
AM_RANGE(0x510114, 0x510117) AM_WRITE(tms_control3_020_w) AM_RANGE(0x510114, 0x510117) AM_WRITE16(tms_control3_w, 0)
AM_RANGE(0x510118, 0x51011b) AM_WRITE(eeprom_clock_020_w) AM_RANGE(0x510118, 0x51011b) AM_WRITE16(eeprom_clock_w, 0)
AM_RANGE(0x510120, 0x510123) AM_WRITE(eeprom_cs_020_w) AM_RANGE(0x510120, 0x510123) AM_WRITE16(eeprom_cs_w, 0)
AM_RANGE(0x510124, 0x510127) AM_WRITE(unknown_127_w) AM_RANGE(0x510124, 0x510127) AM_WRITE(unknown_127_w)
AM_RANGE(0x510128, 0x51012b) AM_WRITE(tms_reset_020_w) AM_RANGE(0x510128, 0x51012b) AM_WRITE16(tms_reset_w, 0)
AM_RANGE(0x510130, 0x510133) AM_WRITE(tms_irq_020_w) AM_RANGE(0x510130, 0x510133) AM_WRITE16(tms_irq_w, 0)
AM_RANGE(0x510134, 0x510137) AM_WRITE(unknown_137_w) AM_RANGE(0x510134, 0x510137) AM_WRITE(unknown_137_w)
AM_RANGE(0x510138, 0x51013b) AM_WRITE(unknown_13a_w) AM_RANGE(0x510138, 0x51013b) AM_WRITE(unknown_13a_w)
AM_RANGE(0x510144, 0x510147) AM_WRITE(led_0_020_w) AM_RANGE(0x510144, 0x510147) AM_WRITE16(led_0_w, 0)
AM_RANGE(0x510154, 0x510157) AM_WRITE(analog_port_clock_020_w) AM_RANGE(0x510154, 0x510157) AM_WRITE16(analog_port_clock_w, 0)
AM_RANGE(0x510164, 0x510167) AM_WRITE(analog_port_latch_020_w) AM_RANGE(0x510164, 0x510167) AM_WRITE16(analog_port_latch_w, 0)
AM_RANGE(0x510174, 0x510177) AM_WRITE(led_1_020_w) AM_RANGE(0x510174, 0x510177) AM_WRITE16(led_1_w, 0)
AM_RANGE(0xfe7f80, 0xfe7fff) AM_WRITE(tms_comm_020_w) AM_BASE((UINT32 **)&tms_comm_base) AM_RANGE(0xfe7f80, 0xfe7fff) AM_WRITE16(tms_comm_w, SHIFT_PACKED) AM_BASE((UINT32 **)&tms_comm_base)
AM_RANGE(0xfe0000, 0xfeffff) AM_RAM AM_BASE((UINT32 **)&m68k_ram_base) AM_RANGE(0xfe0000, 0xfeffff) AM_RAM AM_BASE((UINT32 **)&m68k_ram_base)
ADDRESS_MAP_END ADDRESS_MAP_END

58
src/mame/drivers/itech8.c
View File

@ -454,7 +454,6 @@
#include "driver.h" #include "driver.h"
#include "deprecat.h" #include "deprecat.h"
#include "memconv.h"
#include "cpu/m6809/m6809.h" #include "cpu/m6809/m6809.h"
#include "machine/6821pia.h" #include "machine/6821pia.h"
#include "machine/6522via.h" #include "machine/6522via.h"
@ -828,38 +827,10 @@ static void via_irq(int state)
/************************************* /*************************************
* *
* 16-bit memory shunts * 16-bit-specific handlers
* *
*************************************/ *************************************/
static READ16_HANDLER( blitter16_r )
{
return read16be_with_read8_handler(itech8_blitter_r, machine, offset, mem_mask);
}
static READ16_HANDLER( tms34061_16_r )
{
/* since multiple XY accesses can move the pointer multiple times, we have to */
/* be careful to only perform one read per access here; fortunately, the low */
/* bit doesn't matter in XY addressing mode */
if ((offset & 0x700) == 0x100)
{
int result = itech8_tms34061_r(machine, offset * 2);
return (result << 8) | result;
}
else
return (itech8_tms34061_r(machine, offset * 2 + 0) << 8) + itech8_tms34061_r(machine, offset * 2 + 1);
}
static WRITE16_HANDLER( sound_data16_w )
{
if (ACCESSING_BITS_8_15)
sound_data_w(machine, 0, data >> 8);
}
static WRITE16_HANDLER( grom_bank16_w ) static WRITE16_HANDLER( grom_bank16_w )
{ {
if (ACCESSING_BITS_8_15) if (ACCESSING_BITS_8_15)
@ -874,19 +845,6 @@ static WRITE16_HANDLER( display_page16_w )
} }
static WRITE16_HANDLER( tms34061_latch16_w )
{
if (ACCESSING_BITS_8_15)
tms34061_latch_w(machine, 0, data >> 8);
}
static WRITE16_HANDLER( blitter16_w )
{
write16be_with_write8_handler(itech8_blitter_w, machine, offset, data, mem_mask);
}
static WRITE16_HANDLER( palette16_w ) static WRITE16_HANDLER( palette16_w )
{ {
if (ACCESSING_BITS_8_15) if (ACCESSING_BITS_8_15)
@ -894,12 +852,6 @@ static WRITE16_HANDLER( palette16_w )
} }
static WRITE16_HANDLER( tms34061_16_w )
{
write16be_with_write8_handler(itech8_tms34061_w, machine, offset, data, mem_mask);
}
/************************************* /*************************************
* *
@ -981,14 +933,14 @@ static ADDRESS_MAP_START( ninclown_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x00007f) AM_RAM AM_REGION(REGION_CPU1, 0) AM_RANGE(0x000000, 0x00007f) AM_RAM AM_REGION(REGION_CPU1, 0)
AM_RANGE(0x000080, 0x003fff) AM_RAM AM_BASE((void *)&main_ram) AM_SIZE(&main_ram_size) AM_RANGE(0x000080, 0x003fff) AM_RAM AM_BASE((void *)&main_ram) AM_SIZE(&main_ram_size)
AM_RANGE(0x004000, 0x07ffff) AM_ROM AM_RANGE(0x004000, 0x07ffff) AM_ROM
AM_RANGE(0x100080, 0x100081) AM_WRITE(sound_data16_w) AM_RANGE(0x100080, 0x100081) AM_WRITE8(sound_data_w, 8)
AM_RANGE(0x100100, 0x100101) AM_READWRITE(input_port_0_word_r, grom_bank16_w) AM_BASE((void *)&itech8_grom_bank) AM_RANGE(0x100100, 0x100101) AM_READWRITE(input_port_0_word_r, grom_bank16_w) AM_BASE((void *)&itech8_grom_bank)
AM_RANGE(0x100180, 0x100181) AM_READWRITE(input_port_1_word_r, display_page16_w) AM_RANGE(0x100180, 0x100181) AM_READWRITE(input_port_1_word_r, display_page16_w)
AM_RANGE(0x100240, 0x100241) AM_WRITE(tms34061_latch16_w) AM_RANGE(0x100240, 0x100241) AM_WRITE8(tms34061_latch_w, 8)
AM_RANGE(0x100280, 0x100281) AM_READWRITE(input_port_2_word_r, SMH_NOP) AM_RANGE(0x100280, 0x100281) AM_READWRITE(input_port_2_word_r, SMH_NOP)
AM_RANGE(0x100300, 0x10031f) AM_READWRITE(blitter16_r, blitter16_w) AM_RANGE(0x100300, 0x10031f) AM_READWRITE8(itech8_blitter_r, itech8_blitter_w, SHIFT_PACKED)
AM_RANGE(0x100380, 0x1003ff) AM_WRITE(palette16_w) AM_RANGE(0x100380, 0x1003ff) AM_WRITE(palette16_w)
AM_RANGE(0x110000, 0x110fff) AM_READWRITE(tms34061_16_r, tms34061_16_w) AM_RANGE(0x110000, 0x110fff) AM_READWRITE8(itech8_tms34061_r, itech8_tms34061_w, SHIFT_PACKED)
ADDRESS_MAP_END ADDRESS_MAP_END

6
src/mame/drivers/mcr68.c
View File

@ -331,9 +331,9 @@ static ADDRESS_MAP_START( zwackery_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x080000, 0x080fff) AM_RAM AM_RANGE(0x080000, 0x080fff) AM_RAM
AM_RANGE(0x084000, 0x084fff) AM_RAM AM_RANGE(0x084000, 0x084fff) AM_RAM
AM_RANGE(0x100000, 0x10000f) AM_READWRITE(zwackery_6840_r, mcr68_6840_upper_w) AM_RANGE(0x100000, 0x10000f) AM_READWRITE(zwackery_6840_r, mcr68_6840_upper_w)
AM_RANGE(0x104000, 0x104007) AM_READWRITE(pia_2_msb_r, pia_2_msb_w) AM_RANGE(0x104000, 0x104007) AM_READWRITE8(pia_2_r, pia_2_w, 8)
AM_RANGE(0x108000, 0x108007) AM_READWRITE(pia_3_lsb_r, pia_3_lsb_w) AM_RANGE(0x108000, 0x108007) AM_READWRITE8(pia_3_r, pia_3_w, 0)
AM_RANGE(0x10c000, 0x10c007) AM_READWRITE(pia_4_lsb_r, pia_4_lsb_w) AM_RANGE(0x10c000, 0x10c007) AM_READWRITE8(pia_4_r, pia_4_w, 0)
AM_RANGE(0x800000, 0x800fff) AM_READWRITE(SMH_RAM, zwackery_videoram_w) AM_BASE(&videoram16) AM_SIZE(&videoram_size) AM_RANGE(0x800000, 0x800fff) AM_READWRITE(SMH_RAM, zwackery_videoram_w) AM_BASE(&videoram16) AM_SIZE(&videoram_size)
AM_RANGE(0x802000, 0x803fff) AM_READWRITE(SMH_RAM, zwackery_paletteram_w) AM_BASE(&paletteram16) AM_RANGE(0x802000, 0x803fff) AM_READWRITE(SMH_RAM, zwackery_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0xc00000, 0xc00fff) AM_READWRITE(SMH_RAM, zwackery_spriteram_w) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) AM_RANGE(0xc00000, 0xc00fff) AM_READWRITE(SMH_RAM, zwackery_spriteram_w) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)