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https://github.com/holub/mame
synced 2025-06-03 11:26:56 +03:00
Added VME local address mapping to dummy access methods
This commit is contained in:
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06e8aef36c
commit
7ba539c6a0
@ -59,23 +59,6 @@
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* Slot 1 Controller Board ASCU 7 31 0xb02000
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* Slot 1 Controller Board ASCU 7 31 0xb02000
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* ----------------------------------------------------------
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* ----------------------------------------------------------
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*
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*
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* 10. The VMEbus
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* ---------------
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* The implemented VMEbus Interface includes 24 address, 16 data,
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* 6 address modifier and the asynchronous control signals.
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* A single level bus arbiter is provided to build multi master
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* systems. In addition to the bus arbiter, a separate slave bus
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* arbitration allows selection of the arbitration level (0-3).
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*
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* The address modifier range .,Short 110 Access« can be selected
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* via a jumper for variable system generation. The 7 interrupt
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* request levels of the VMEbus are fully supported from the
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* SYS68K1CPU-1 B/D. For multi-processing, each IRQ signal can be
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* enabled/disabled via a jumper field.
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*
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* Additionally, the SYS68K1CPU-1 B/D supports the ACFAIL, SYSRESET,
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* SYSFAIL and SYSCLK signal (16 MHz).
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*
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* TODO:
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* TODO:
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* - Finish 3 x ACIA6850, host and remote interface left, terminal works
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* - Finish 3 x ACIA6850, host and remote interface left, terminal works
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* - Finish 1 x 68230 Motorola, Parallel Interface / Timer as required by ROM
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* - Finish 1 x 68230 Motorola, Parallel Interface / Timer as required by ROM
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@ -100,8 +83,10 @@
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#include "machine/6850acia.h"
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#include "machine/6850acia.h"
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#include "machine/clock.h"
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#include "machine/clock.h"
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#include "bus/centronics/ctronics.h"
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#include "bus/centronics/ctronics.h"
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#include "bus/generic/slot.h"
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#include "bus/generic/carts.h"
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#define LOG(x) /* x */
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#define LOG(x) x
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#define BAUDGEN_CLOCK XTAL_1_8432MHz
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#define BAUDGEN_CLOCK XTAL_1_8432MHz
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/*
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/*
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@ -152,10 +137,15 @@ force68k_state(const machine_config &mconfig, device_type type, const char *tag)
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, m_centronics_busy (0)
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, m_centronics_busy (0)
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, m_centronics_perror (0)
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, m_centronics_perror (0)
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, m_centronics_select (0)
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, m_centronics_select (0)
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,m_cart(*this, "exp_rom1")
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{
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{
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}
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}
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DECLARE_READ16_MEMBER (bootvect_r);
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DECLARE_READ16_MEMBER (bootvect_r);
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DECLARE_READ16_MEMBER (vme_a24_r);
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DECLARE_WRITE16_MEMBER (vme_a24_w);
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DECLARE_READ16_MEMBER (vme_a16_r);
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DECLARE_WRITE16_MEMBER (vme_a16_w);
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virtual void machine_start ();
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virtual void machine_start ();
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// clocks
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// clocks
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DECLARE_WRITE_LINE_MEMBER (write_aciahost_clock);
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DECLARE_WRITE_LINE_MEMBER (write_aciahost_clock);
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@ -166,6 +156,9 @@ DECLARE_WRITE_LINE_MEMBER (centronics_ack_w);
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DECLARE_WRITE_LINE_MEMBER (centronics_busy_w);
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DECLARE_WRITE_LINE_MEMBER (centronics_busy_w);
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DECLARE_WRITE_LINE_MEMBER (centronics_perror_w);
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DECLARE_WRITE_LINE_MEMBER (centronics_perror_w);
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DECLARE_WRITE_LINE_MEMBER (centronics_select_w);
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DECLARE_WRITE_LINE_MEMBER (centronics_select_w);
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// User EPROM/SRAM slot(s)
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//int force68k_load_cart(device_image_interface &image, generic_slot_device *slot);
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//DECLARE_DEVICE_IMAGE_LOAD_MEMBER (exp1_load) { return force68k_load_cart(image, m_cart); }
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protected:
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protected:
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@ -185,14 +178,17 @@ INT32 m_centronics_select;
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// Pointer to System ROMs needed by bootvect_r
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// Pointer to System ROMs needed by bootvect_r
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UINT16 *m_sysrom;
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UINT16 *m_sysrom;
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required_device<generic_slot_device> m_cart;
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};
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};
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static ADDRESS_MAP_START (force68k_mem, AS_PROGRAM, 16, force68k_state)
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static ADDRESS_MAP_START (force68k_mem, AS_PROGRAM, 16, force68k_state)
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ADDRESS_MAP_UNMAP_HIGH
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE (0x000000, 0x000007) AM_ROM AM_READ (bootvect_r) /* Vectors mapped from System EPROM */
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AM_RANGE (0x000000, 0x000007) AM_ROM AM_READ (bootvect_r) /* Vectors mapped from System EPROM */
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AM_RANGE (0x000008, 0x01ffff) AM_RAM /* DRAM */
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AM_RANGE (0x000008, 0x01ffff) AM_RAM /* DRAM */
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AM_RANGE (0x080000, 0x09ffff) AM_ROM /* System EPROM Area */
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AM_RANGE (0x080000, 0x09ffff) AM_ROM /* System EPROM Area */
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// AM_RANGE(0x0a0000, 0x0bffff) AM_ROM /* User EPROM Area */
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//AM_RANGE (0x0a0000, 0x0bffff) AM_ROM /* User EPROM/SRAM Area, mapped by a cartslot */
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AM_RANGE (0x0c0040, 0x0c0041) AM_DEVREADWRITE8 ("aciahost", acia6850_device, status_r, control_w, 0x00ff)
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AM_RANGE (0x0c0040, 0x0c0041) AM_DEVREADWRITE8 ("aciahost", acia6850_device, status_r, control_w, 0x00ff)
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AM_RANGE (0x0c0042, 0x0c0043) AM_DEVREADWRITE8 ("aciahost", acia6850_device, data_r, data_w, 0x00ff)
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AM_RANGE (0x0c0042, 0x0c0043) AM_DEVREADWRITE8 ("aciahost", acia6850_device, data_r, data_w, 0x00ff)
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AM_RANGE (0x0c0080, 0x0c0081) AM_DEVREADWRITE8 ("aciaterm", acia6850_device, status_r, control_w, 0xff00)
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AM_RANGE (0x0c0080, 0x0c0081) AM_DEVREADWRITE8 ("aciaterm", acia6850_device, status_r, control_w, 0xff00)
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@ -202,8 +198,8 @@ AM_RANGE (0x0c0102, 0x0c0103) AM_DEVREADWRITE8 ("aciaremt", acia6850_device, dat
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AM_RANGE (0x0c0400, 0x0c042f) AM_DEVREADWRITE8 ("rtc", mm58167_device, read, write, 0x00ff)
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AM_RANGE (0x0c0400, 0x0c042f) AM_DEVREADWRITE8 ("rtc", mm58167_device, read, write, 0x00ff)
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AM_RANGE (0x0e0000, 0x0e0035) AM_DEVREADWRITE8 ("pit", pit68230_device, read, write, 0x00ff)
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AM_RANGE (0x0e0000, 0x0e0035) AM_DEVREADWRITE8 ("pit", pit68230_device, read, write, 0x00ff)
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// AM_RANGE(0x0e0200, 0x0e0380) AM_READWRITE(fpu_r, fpu_w) /* optional FPCP 68881 FPU interface */
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// AM_RANGE(0x0e0200, 0x0e0380) AM_READWRITE(fpu_r, fpu_w) /* optional FPCP 68881 FPU interface */
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// AM_RANGE(0x100000, 0xfeffff) /* VMEbus Rev B addresses (24 bits) */
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AM_RANGE(0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) */
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// AM_RANGE(0xff0000, 0xffffff) /* VMEbus Rev B addresses (16 bits) */
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AM_RANGE(0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) */
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ADDRESS_MAP_END
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ADDRESS_MAP_END
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/* Input ports */
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/* Input ports */
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@ -294,6 +290,15 @@ void force68k_state::machine_start ()
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/* Setup pointer to bootvector in ROM for bootvector handler bootvect_r */
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/* Setup pointer to bootvector in ROM for bootvector handler bootvect_r */
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m_sysrom = (UINT16*)(memregion ("maincpu")->base () + 0x080000);
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m_sysrom = (UINT16*)(memregion ("maincpu")->base () + 0x080000);
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/* Map user ROM/RAM socket(s) */
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if (m_cart->exists())
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{
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m_maincpu->space(AS_PROGRAM).install_read_handler(0xa0000,
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0xaffff,
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read16_delegate(FUNC(generic_slot_device::read16_rom),
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(generic_slot_device*)m_cart));
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}
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}
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}
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/* Boot vector handler, the PCB hardwires the first 8 bytes from 0x80000 to 0x0 */
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/* Boot vector handler, the PCB hardwires the first 8 bytes from 0x80000 to 0x0 */
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@ -301,6 +306,43 @@ READ16_MEMBER (force68k_state::bootvect_r){
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return m_sysrom [offset];
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return m_sysrom [offset];
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}
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}
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/* 10. The VMEbus (text from board documentation)
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* ---------------
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* The implemented VMEbus Interface includes 24 address, 16 data,
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* 6 address modifier and the asynchronous control signals.
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* A single level bus arbiter is provided to build multi master
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* systems. In addition to the bus arbiter, a separate slave bus
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* arbitration allows selection of the arbitration level (0-3).
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*
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* The address modifier range .,Short 110 Access« can be selected
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* via a jumper for variable system generation. The 7 interrupt
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* request levels of the VMEbus are fully supported from the
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* SYS68K1CPU-1 B/D. For multi-processing, each IRQ signal can be
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* enabled/disabled via a jumper field.
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*
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* Additionally, the SYS68K1CPU-1 B/D supports the ACFAIL, SYSRESET,
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* SYSFAIL and SYSCLK signal (16 MHz).
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*/
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/* Dummy VME access methods until the VME bus device is ready for use */
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READ16_MEMBER (force68k_state::vme_a24_r){
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LOG (logerror ("vme_a24_r\n"));
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return (UINT16) 0;
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}
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WRITE16_MEMBER (force68k_state::vme_a24_w){
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LOG (logerror ("vme_a24_w\n"));
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}
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READ16_MEMBER (force68k_state::vme_a16_r){
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LOG (logerror ("vme_16_r\n"));
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return (UINT16) 0;
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}
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WRITE16_MEMBER (force68k_state::vme_a16_w){
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LOG (logerror ("vme_a16_w\n"));
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}
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/*
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/*
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* Serial port clock sources can all be driven by different outputs of the 14411
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* Serial port clock sources can all be driven by different outputs of the 14411
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*/
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*/
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@ -319,6 +361,54 @@ WRITE_LINE_MEMBER (force68k_state::write_aciaremt_clock){
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m_aciaremt->write_rxc (state);
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m_aciaremt->write_rxc (state);
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}
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}
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/*
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* 4. The USER Area (Text from the board manual)
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The USER area contains two 28 pin sockets with JEDEC compatible pin out.
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To allow the usage of static RAM's, the access to the USER area is byte
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oriented. Table 3. lists the usable device types.
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Bits Bytes EPROM SRAM
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--------------------------
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2Kx16 4 Kbyte 2716 6116
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4Kx16 8 Kbyte 2732
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8Kx16 16 Kbyte 2764 6264
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16Kx16 32 Kbyte 27128
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32Kx16 64 Kbyte 27256
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--------------------------
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*/
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// Implementation of static 64K EPROM in sockets J10/J11 as 16 bit wide cartridge for easier
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// software handling. TODO: make configurable according to table above.
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static MACHINE_CONFIG_FRAGMENT( fccpu1_eprom_sockets )
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MCFG_GENERIC_CARTSLOT_ADD("exp_rom1", generic_linear_slot, "fccpu1_cart")
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MCFG_GENERIC_EXTENSIONS("bin,rom")
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MCFG_GENERIC_WIDTH(GENERIC_ROM16_WIDTH)
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MCFG_GENERIC_ENDIAN(ENDIANNESS_LITTLE) // In generic call_load() len 12152, width 2 endianess 0
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// MCFG_GENERIC_ENDIAN(ENDIANNESS_BIG) // In generic call_load() len 12152, width 2 endianess 1
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// MCFG_GENERIC_LOAD(force68k_state, exp1_load)
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// MCFG_SOFTWARE_LIST_ADD("cart_list", "fccpu1_cart")
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MACHINE_CONFIG_END
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/***************************
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Rom loading functions
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****************************/
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int force68k_state::force68k_load_cart(device_image_interface &image, generic_slot_device *slot)
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{
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UINT32 size = slot->common_get_size("rom");
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printf("force68k_load_cart() loading rom at slot %s for image \n", (char *) image.device_typename);
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if (size > 0x10000) // Max 64Kb
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{
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LOG( printf("Cartridge size exceeding max size (64Kb): %d\n", size) );
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image.seterror(IMAGE_ERROR_UNSPECIFIED, "Cartridge size exceeding max size (64Kb)");
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return IMAGE_INIT_FAIL;
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}
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slot->rom_alloc(size, GENERIC_ROM16_WIDTH, ENDIANNESS_BIG);
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slot->common_load_rom(slot->get_rom_base(), size, "rom");
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return IMAGE_INIT_PASS;
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}
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/*
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/*
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* Machine configuration
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* Machine configuration
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*/
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*/
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@ -327,7 +417,12 @@ static MACHINE_CONFIG_START (fccpu1, force68k_state)
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MCFG_CPU_ADD ("maincpu", M68000, XTAL_16MHz / 2)
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MCFG_CPU_ADD ("maincpu", M68000, XTAL_16MHz / 2)
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MCFG_CPU_PROGRAM_MAP (force68k_mem)
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MCFG_CPU_PROGRAM_MAP (force68k_mem)
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/* P3/Host Port config */
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/* P3/Host Port config
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* LO command causes ROM monitor to expect S-records on HOST port by default
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* Implementation through nullmodem currently does not support handshakes so
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* the ROM momitor is over-run while checking for checksums etc if used with
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* UI mount <file> feature.
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*/
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MCFG_DEVICE_ADD ("aciahost", ACIA6850, 0)
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MCFG_DEVICE_ADD ("aciahost", ACIA6850, 0)
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MCFG_ACIA6850_TXD_HANDLER (DEVWRITELINE ("rs232host", rs232_port_device, write_txd))
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MCFG_ACIA6850_TXD_HANDLER (DEVWRITELINE ("rs232host", rs232_port_device, write_txd))
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@ -374,6 +469,9 @@ MCFG_CENTRONICS_BUSY_HANDLER (WRITELINE (force68k_state, centronics_busy_w))
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MCFG_CENTRONICS_PERROR_HANDLER (WRITELINE (force68k_state, centronics_perror_w))
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MCFG_CENTRONICS_PERROR_HANDLER (WRITELINE (force68k_state, centronics_perror_w))
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MCFG_CENTRONICS_SELECT_HANDLER (WRITELINE (force68k_state, centronics_select_w))
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MCFG_CENTRONICS_SELECT_HANDLER (WRITELINE (force68k_state, centronics_select_w))
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MCFG_CENTRONICS_OUTPUT_LATCH_ADD ("cent_data_out", "centronics")
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MCFG_CENTRONICS_OUTPUT_LATCH_ADD ("cent_data_out", "centronics")
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// EPROM sockets
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MCFG_FRAGMENT_ADD(fccpu1_eprom_sockets)
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MACHINE_CONFIG_END
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MACHINE_CONFIG_END
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#if 0 /*
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#if 0 /*
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