mirror of
https://github.com/holub/mame
synced 2025-04-25 09:50:04 +03:00
fccpu20: Added board ID support, gives the right banner now, and improved board variant modelling
This commit is contained in:
Joakim Larsson Edstrom
parent
827db56cfb
commit
7ba7669a01
@ -231,7 +231,7 @@ const device_type VME_FCCPU21YB = &device_creator<vme_fccpu21yb_card_device>;
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#define CLOCK40 XTAL_40MHz /* HCJ */
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#define CLOCK32 XTAL_32MHz /* HCJ */
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static ADDRESS_MAP_START (cpu20_mem, AS_PROGRAM, 32, vme_fccpu20_card_device)
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static ADDRESS_MAP_START (cpu20_mem, AS_PROGRAM, 32, vme_fccpu20_device)
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE (0x00000000, 0x00000007) AM_ROM AM_READ (bootvect_r) /* ROM mirror just during reset */
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AM_RANGE (0x00000000, 0x00000007) AM_RAM AM_WRITE (bootvect_w) /* After first write we act as RAM */
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@ -257,14 +257,14 @@ static MACHINE_CONFIG_FRAGMENT (fccpu20)
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/* PIT Parallel Interface and Timer device, assumed strapped for on board clock */
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MCFG_DEVICE_ADD ("pit", PIT68230, CLOCK32 / 4) /* Crystal not verified */
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MCFG_PIT68230_PA_INPUT_CB(READ8(vme_fccpu20_card_device, pita_r))
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MCFG_PIT68230_PB_INPUT_CB(READ8(vme_fccpu20_card_device, pitb_r))
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MCFG_PIT68230_PC_INPUT_CB(READ8(vme_fccpu20_card_device, pitc_r))
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MCFG_PIT68230_PA_INPUT_CB(READ8(vme_fccpu20_device, pita_r))
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MCFG_PIT68230_PB_INPUT_CB(READ8(vme_fccpu20_device, pitb_r))
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MCFG_PIT68230_PC_INPUT_CB(READ8(vme_fccpu20_device, pitc_r))
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MCFG_PIT68230_TIMER_IRQ_CB(DEVWRITELINE("bim", bim68153_device, int2_w))
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/* BIM */
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MCFG_MC68153_ADD("bim", CLOCK32 / 8)
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MCFG_BIM68153_OUT_INT_CB(WRITELINE(vme_fccpu20_card_device, bim_irq_callback))
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MCFG_BIM68153_OUT_INT_CB(WRITELINE(vme_fccpu20_device, bim_irq_callback))
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/*INT0 - Abort switch */
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/*INT1 - MPCC@8.064 MHz aswell */
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/*INT2 - PI/T timer */
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@ -348,83 +348,92 @@ static MACHINE_CONFIG_DERIVED( fccpu21yb, fccpu20 )
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MCFG_DEVICE_CLOCK( CLOCK50 / 2)
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MACHINE_CONFIG_END
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machine_config_constructor vme_fccpu20_card_device::device_mconfig_additions() const { LOG("%s %s\n", tag(), FUNCNAME); return MACHINE_CONFIG_NAME( fccpu20 ); }
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machine_config_constructor vme_fccpu21s_card_device::device_mconfig_additions() const { LOG("%s %s\n", tag(), FUNCNAME); return MACHINE_CONFIG_NAME( fccpu21s ); }
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machine_config_constructor vme_fccpu21_card_device::device_mconfig_additions() const { LOG("%s %s\n", tag(), FUNCNAME); return MACHINE_CONFIG_NAME( fccpu21 ); }
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machine_config_constructor vme_fccpu21a_card_device::device_mconfig_additions() const { LOG("%s %s\n", tag(), FUNCNAME); return MACHINE_CONFIG_NAME( fccpu21a ); }
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machine_config_constructor vme_fccpu21ya_card_device::device_mconfig_additions() const { LOG("%s %s\n", tag(), FUNCNAME); return MACHINE_CONFIG_NAME( fccpu21ya ); }
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machine_config_constructor vme_fccpu21b_card_device::device_mconfig_additions() const { LOG("%s %s\n", tag(), FUNCNAME); return MACHINE_CONFIG_NAME( fccpu21b ); }
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machine_config_constructor vme_fccpu21yb_card_device::device_mconfig_additions() const { LOG("%s %s\n", tag(), FUNCNAME); return MACHINE_CONFIG_NAME( fccpu21yb ); }
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machine_config_constructor vme_fccpu20_device::device_mconfig_additions() const
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{
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LOG("%s %s\n", tag(), FUNCNAME);
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switch (m_board_id)
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{
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case cpu20: return MACHINE_CONFIG_NAME( fccpu20 ); break;
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case cpu21a: return MACHINE_CONFIG_NAME( fccpu21a ); break;
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case cpu21ya: return MACHINE_CONFIG_NAME( fccpu21ya ); break;
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case cpu21b: return MACHINE_CONFIG_NAME( fccpu21b ); break;
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case cpu21yb: return MACHINE_CONFIG_NAME( fccpu21yb ); break;
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case cpu21s: return MACHINE_CONFIG_NAME( fccpu21s ); break;
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case cpu21: return MACHINE_CONFIG_NAME( fccpu21 ); break;
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default: logerror("Attempt to get config for unknown board type %02x, defaulting to CPU20\n", m_board_id);
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return MACHINE_CONFIG_NAME( fccpu20 );
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}
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return MACHINE_CONFIG_NAME( fccpu20 );
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}
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//**************************************************************************
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// LIVE DEVICE
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// Base Device
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//**************************************************************************
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vme_fccpu20_card_device::vme_fccpu20_card_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
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vme_fccpu20_device::vme_fccpu20_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, fc_board_t board_id) :
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device_t(mconfig, type, name, tag, owner, clock, shortname, source)
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,device_vme_card_interface(mconfig, *this)
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, device_vme_card_interface(mconfig, *this)
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, m_maincpu (*this, "maincpu")
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, m_pit (*this, "pit")
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, m_bim (*this, "bim")
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, m_mpcc (*this, "mpcc")
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, m_mpcc2 (*this, "mpcc2")
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, m_mpcc3 (*this, "mpcc3")
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, m_board_id(board_id)
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{
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LOG("%s\n", FUNCNAME);
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}
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vme_fccpu20_card_device::vme_fccpu20_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
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device_t(mconfig, VME_FCCPU20, "Force Computer SYS68K/CPU-20 CPU Board", tag, owner, clock, "fccpu20", __FILE__)
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,device_vme_card_interface(mconfig, *this)
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, m_maincpu (*this, "maincpu")
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, m_pit (*this, "pit")
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, m_bim (*this, "bim")
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, m_mpcc (*this, "mpcc")
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, m_mpcc2 (*this, "mpcc2")
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, m_mpcc3 (*this, "mpcc3")
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//**************************************************************************
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// Card Devices
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//**************************************************************************
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vme_fccpu20_card_device::vme_fccpu20_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: vme_fccpu20_card_device( mconfig, VME_FCCPU20, "Force Computer SYS68K/CPU-20 CPU Board", tag, owner, clock, "fccpu20", __FILE__)
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{
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LOG("%s %s\n", tag, FUNCNAME);
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}
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vme_fccpu21s_card_device::vme_fccpu21s_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: vme_fccpu20_card_device( mconfig, VME_FCCPU21S, "Force Computer SYS68K/CPU-21S CPU Board", tag, owner, clock, "fccpu21s", __FILE__)
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: vme_fccpu21s_card_device( mconfig, VME_FCCPU21S, "Force Computer SYS68K/CPU-21S CPU Board", tag, owner, clock, "fccpu21s", __FILE__)
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{
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LOG("%s %s\n", tag, FUNCNAME);
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}
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vme_fccpu21_card_device::vme_fccpu21_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: vme_fccpu20_card_device( mconfig, VME_FCCPU21, "Force Computer SYS68K/CPU-21 CPU Board", tag, owner, clock, "fccpu21", __FILE__)
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: vme_fccpu21_card_device( mconfig, VME_FCCPU21, "Force Computer SYS68K/CPU-21 CPU Board", tag, owner, clock, "fccpu21", __FILE__)
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{
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LOG("%s %s\n", tag, FUNCNAME);
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}
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vme_fccpu21a_card_device::vme_fccpu21a_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: vme_fccpu20_card_device( mconfig, VME_FCCPU21A, "Force Computer SYS68K/CPU-21A CPU Board", tag, owner, clock, "fccpu21a", __FILE__)
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: vme_fccpu21a_card_device( mconfig, VME_FCCPU21A, "Force Computer SYS68K/CPU-21A CPU Board", tag, owner, clock, "fccpu21a", __FILE__)
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{
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LOG("%s %s\n", tag, FUNCNAME);
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}
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// TODO: Change to 2MB on board RAM and move FLME memory and find/verify memory map
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vme_fccpu21ya_card_device::vme_fccpu21ya_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: vme_fccpu20_card_device( mconfig, VME_FCCPU21YA, "Force Computer SYS68K/CPU-21YA CPU Board", tag, owner, clock, "fccpu21ya", __FILE__)
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: vme_fccpu21ya_card_device( mconfig, VME_FCCPU21YA, "Force Computer SYS68K/CPU-21YA CPU Board", tag, owner, clock, "fccpu21ya", __FILE__)
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{
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LOG("%s %s\n", tag, FUNCNAME);
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}
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vme_fccpu21b_card_device::vme_fccpu21b_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: vme_fccpu20_card_device( mconfig, VME_FCCPU21B, "Force Computer SYS68K/CPU-21B CPU Board", tag, owner, clock, "fccpu21b", __FILE__)
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: vme_fccpu21b_card_device( mconfig, VME_FCCPU21B, "Force Computer SYS68K/CPU-21B CPU Board", tag, owner, clock, "fccpu21b", __FILE__)
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{
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LOG("%s %s\n", tag, FUNCNAME);
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}
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// TODO: Change to 2MB on board RAM and move FLME memory and find/verify memory map
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vme_fccpu21yb_card_device::vme_fccpu21yb_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: vme_fccpu20_card_device( mconfig, VME_FCCPU21B, "Force Computer SYS68K/CPU-21YB CPU Board", tag, owner, clock, "fccpu21yb", __FILE__)
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: vme_fccpu21yb_card_device( mconfig, VME_FCCPU21B, "Force Computer SYS68K/CPU-21YB CPU Board", tag, owner, clock, "fccpu21yb", __FILE__)
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{
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LOG("%s %s\n", tag, FUNCNAME);
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}
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/* Start it up */
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void vme_fccpu20_card_device::device_start()
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void vme_fccpu20_device::device_start()
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{
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LOG("%s\n", FUNCNAME);
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@ -432,6 +441,7 @@ void vme_fccpu20_card_device::device_start()
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save_pointer (NAME (m_sysrom), sizeof(m_sysrom));
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save_pointer (NAME (m_sysram), sizeof(m_sysram));
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// save_item(NAME(m_board_id)); // TODO: Save this "non base type" item
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/* TODO: setup this RAM from (not yet) optional SRAM-2x board and also support 2MB versions */
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//m_maincpu->space(AS_PROGRAM).install_ram(0x80000, m_ram->size() + 0x7ffff, m_ram->pointer());
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@ -449,25 +459,27 @@ void vme_fccpu20_card_device::device_start()
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}
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void vme_fccpu20_card_device::device_reset()
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void vme_fccpu20_device::device_reset()
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{
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LOG("%s\n", FUNCNAME);
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}
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/* Boot vector handler, the PCB hardwires the first 8 bytes from 0xff800000 to 0x0 at reset*/
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READ32_MEMBER (vme_fccpu20_card_device::bootvect_r){
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READ32_MEMBER (vme_fccpu20_device::bootvect_r)
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{
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LOG("%s\n", FUNCNAME);
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return m_sysrom[offset];
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}
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WRITE32_MEMBER (vme_fccpu20_card_device::bootvect_w){
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WRITE32_MEMBER (vme_fccpu20_device::bootvect_w)
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{
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LOG("%s\n", FUNCNAME);
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m_sysram[offset % sizeof(m_sysram)] &= ~mem_mask;
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m_sysram[offset % sizeof(m_sysram)] |= (data & mem_mask);
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m_sysrom = &m_sysram[0]; // redirect all upcomming accesses to masking RAM until reset.
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}
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WRITE_LINE_MEMBER(vme_fccpu20_card_device::bim_irq_callback)
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WRITE_LINE_MEMBER(vme_fccpu20_device::bim_irq_callback)
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{
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LOGINT("%s(%02x)\n", FUNCNAME, state);
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@ -477,7 +489,7 @@ WRITE_LINE_MEMBER(vme_fccpu20_card_device::bim_irq_callback)
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update_irq_to_maincpu();
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}
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void vme_fccpu20_card_device::update_irq_to_maincpu()
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void vme_fccpu20_device::update_irq_to_maincpu()
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{
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LOGINT("%s()\n", FUNCNAME);
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LOGINT(" - bim_irq_level: %02x\n", bim_irq_level);
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@ -507,34 +519,57 @@ void vme_fccpu20_card_device::update_irq_to_maincpu()
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B6: Auto execute FF00C0000
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B7: memory size?
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*/
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/* PIT Port definitions */
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#define BR7N9600 0x01
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#define BR7N28800 0x02
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#define BR7N38400 0x06
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#define BR7N57600 0x03
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#define BR8N38400 0x08
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#define FORCEBUG 0x30
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READ8_MEMBER (vme_fccpu20_card_device::pita_r){
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LOG("%s\n", FUNCNAME);
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READ8_MEMBER (vme_fccpu20_device::pita_r)
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{
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LOG("%s\n", FUNCNAME);
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return FORCEBUG | BR7N9600;
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}
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/* Enabling/Disabling of VME IRQ 1-7 */
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READ8_MEMBER (vme_fccpu20_card_device::pitb_r){
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READ8_MEMBER (vme_fccpu20_device::pitb_r)
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{
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LOG("%s\n", FUNCNAME);
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return 0xff;
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}
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/* VME bus release software settings (output) (ROR, RAT, RATAR, RATBCLR, RORAT, RORRAT */
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READ8_MEMBER (vme_fccpu20_card_device::pitc_r){
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LOG("%s\n", FUNCNAME);
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return 0xff;
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/* VME board ID bit and bus release software settings (output) (ROR, RAT, RATAR, RATBCLR, RORAT, RORRAT */
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READ8_MEMBER (vme_fccpu20_device::pitc_r)
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{
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uint8_t board_id = 0;
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LOG("%s Board id:%02x\n", FUNCNAME, m_board_id);
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switch (m_board_id)
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{
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case cpu20:
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board_id = CPU20;
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break;
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case cpu21a:
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case cpu21ya:
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case cpu21b:
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case cpu21yb:
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case cpu21s:
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case cpu21:
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board_id = CPU21;
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break;
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default: logerror("Attempt to set unknown board type %02x, defaulting to CPU20\n", board_id);
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board_id = CPU20;
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}
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return board_id | 0xbf;
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}
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/* ROM definitions */
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ROM_START (fccpu20) /* This is an original rom dump */
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ROM_REGION32_BE(0x10000, "roms", 0)
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// Boots with Board ID set to: 0x36 (FGA002 BOOT on terminal P4, "Wait until harddisk is up to speed " on terminal P1)
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ROM_LOAD32_BYTE("L.BIN", 0x000002, 0x4000, CRC (174ab801) SHA1 (0d7b8ed29d5fdd4bd2073005008120c5f20128dd))
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ROM_LOAD32_BYTE("LL.BIN", 0x000003, 0x4000, CRC (9fd9e3e4) SHA1 (e5a7c87021e6be412dd5a8166d9f62b681169eda))
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ROM_LOAD32_BYTE("U.BIN", 0x000001, 0x4000, CRC (d1afe4c0) SHA1 (b5baf9798d73632f7bb843cbc4b306c8c03f4296))
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@ -554,13 +589,23 @@ ROM_END
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#define rom_fccpu21b rom_fccpu20
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#define rom_fccpu21yb rom_fccpu20
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const tiny_rom_entry *vme_fccpu20_card_device::device_rom_region() const { LOG("%s\n", FUNCNAME); return ROM_NAME( fccpu20 ); }
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const tiny_rom_entry *vme_fccpu21s_card_device::device_rom_region() const { LOG("%s\n", FUNCNAME); return ROM_NAME( fccpu21s ); }
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const tiny_rom_entry *vme_fccpu21_card_device::device_rom_region() const { LOG("%s\n", FUNCNAME); return ROM_NAME( fccpu21 ); }
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const tiny_rom_entry *vme_fccpu21a_card_device::device_rom_region() const { LOG("%s\n", FUNCNAME); return ROM_NAME( fccpu21a ); }
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const tiny_rom_entry *vme_fccpu21ya_card_device::device_rom_region() const { LOG("%s\n", FUNCNAME); return ROM_NAME( fccpu21ya ); }
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const tiny_rom_entry *vme_fccpu21b_card_device::device_rom_region() const { LOG("%s\n", FUNCNAME); return ROM_NAME( fccpu21b ); }
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const tiny_rom_entry *vme_fccpu21yb_card_device::device_rom_region() const { LOG("%s\n", FUNCNAME); return ROM_NAME( fccpu21yb ); }
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const tiny_rom_entry *vme_fccpu20_device::device_rom_region() const
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{
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LOG("%s\n", FUNCNAME);
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switch (m_board_id)
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{
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case cpu20: return ROM_NAME( fccpu20 ); break;
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case cpu21a: return ROM_NAME( fccpu21a ); break;
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case cpu21ya: return ROM_NAME( fccpu21ya ); break;
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case cpu21b: return ROM_NAME( fccpu21b ); break;
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case cpu21yb: return ROM_NAME( fccpu21yb ); break;
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case cpu21s: return ROM_NAME( fccpu21s ); break;
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case cpu21: return ROM_NAME( fccpu21 ); break;
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default: logerror("Attempt to get rom set for unknown board type %02x, defaulting to CPU20\n", m_board_id);
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return ROM_NAME( fccpu20 );
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}
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}
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/*
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* System ROM information
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@ -19,20 +19,35 @@ extern const device_type VME_FCCPU21YA;
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extern const device_type VME_FCCPU21B;
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extern const device_type VME_FCCPU21YB;
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class vme_fccpu20_card_device :
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public device_t
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,public device_vme_card_interface
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// PIT port C Board ID bits
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#define CPU20 0x40
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#define CPU21 0x00
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/* Board types */
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enum fc_board_t {
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cpu20,
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cpu21,
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cpu21a,
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cpu21ya,
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cpu21b,
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cpu21yb,
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cpu21s
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};
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|
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//**************************************************************************
|
||||
// Base Device declaration
|
||||
//**************************************************************************
|
||||
class vme_fccpu20_device : public device_t, public device_vme_card_interface
|
||||
{
|
||||
public:
|
||||
vme_fccpu20_card_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
|
||||
vme_fccpu20_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
vme_fccpu20_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, fc_board_t board_id);
|
||||
|
||||
// optional information overrides
|
||||
virtual machine_config_constructor device_mconfig_additions() const override;
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
virtual void device_start() override;
|
||||
|
||||
// Below are duplicated declarations from src/mame/drivers/fccpu20.cpp
|
||||
|
||||
DECLARE_READ32_MEMBER (bootvect_r);
|
||||
DECLARE_WRITE32_MEMBER (bootvect_w);
|
||||
|
||||
@ -54,68 +69,74 @@ private:
|
||||
required_device<mpcc68561_device> m_mpcc3;
|
||||
|
||||
// Pointer to System ROMs needed by bootvect_r and masking RAM buffer for post reset accesses
|
||||
uint32_t *m_sysrom;
|
||||
uint32_t m_sysram[2];
|
||||
void update_irq_to_maincpu();
|
||||
uint32_t *m_sysrom;
|
||||
uint32_t m_sysram[2];
|
||||
void update_irq_to_maincpu();
|
||||
fc_board_t m_board_id;
|
||||
|
||||
// Below replaces machine_start and machine_reset from src/mame/drivers/fccpu20.cpp
|
||||
protected:
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
};
|
||||
|
||||
class vme_fccpu21s_card_device : public vme_fccpu20_card_device
|
||||
//**************************************************************************
|
||||
// Board Device declarations
|
||||
//**************************************************************************
|
||||
|
||||
class vme_fccpu20_card_device : public vme_fccpu20_device
|
||||
{
|
||||
public :
|
||||
vme_fccpu20_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
vme_fccpu20_card_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
|
||||
: vme_fccpu20_device( mconfig, type, name, tag, owner, clock, shortname, source, cpu20) { }
|
||||
};
|
||||
|
||||
class vme_fccpu21s_card_device : public vme_fccpu20_device
|
||||
{
|
||||
public :
|
||||
vme_fccpu21s_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
// optional information overrides
|
||||
virtual machine_config_constructor device_mconfig_additions() const override;
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
vme_fccpu21s_card_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
|
||||
: vme_fccpu20_device( mconfig, type, name, tag, owner, clock, shortname, source, cpu21s) { }
|
||||
};
|
||||
|
||||
class vme_fccpu21_card_device : public vme_fccpu20_card_device
|
||||
class vme_fccpu21_card_device : public vme_fccpu20_device
|
||||
{
|
||||
public :
|
||||
vme_fccpu21_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
// optional information overrides
|
||||
virtual machine_config_constructor device_mconfig_additions() const override;
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
vme_fccpu21_card_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
|
||||
: vme_fccpu20_device( mconfig, type, name, tag, owner, clock, shortname, source, cpu21) { }
|
||||
};
|
||||
|
||||
class vme_fccpu21a_card_device : public vme_fccpu20_card_device
|
||||
class vme_fccpu21a_card_device : public vme_fccpu20_device
|
||||
{
|
||||
public :
|
||||
vme_fccpu21a_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
// optional information overrides
|
||||
virtual machine_config_constructor device_mconfig_additions() const override;
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
vme_fccpu21a_card_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
|
||||
: vme_fccpu20_device( mconfig, type, name, tag, owner, clock, shortname, source, cpu21a) { }
|
||||
};
|
||||
|
||||
class vme_fccpu21ya_card_device : public vme_fccpu20_card_device
|
||||
class vme_fccpu21ya_card_device : public vme_fccpu20_device
|
||||
{
|
||||
public :
|
||||
vme_fccpu21ya_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
// optional information overrides
|
||||
virtual machine_config_constructor device_mconfig_additions() const override;
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
vme_fccpu21ya_card_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
|
||||
: vme_fccpu20_device( mconfig, type, name, tag, owner, clock, shortname, source, cpu21ya) { }
|
||||
};
|
||||
|
||||
class vme_fccpu21b_card_device : public vme_fccpu20_card_device
|
||||
class vme_fccpu21b_card_device : public vme_fccpu20_device
|
||||
{
|
||||
public :
|
||||
vme_fccpu21b_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
// optional information overrides
|
||||
virtual machine_config_constructor device_mconfig_additions() const override;
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
vme_fccpu21b_card_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
|
||||
: vme_fccpu20_device( mconfig, type, name, tag, owner, clock, shortname, source, cpu21b) { }
|
||||
};
|
||||
|
||||
class vme_fccpu21yb_card_device : public vme_fccpu20_card_device
|
||||
class vme_fccpu21yb_card_device : public vme_fccpu20_device
|
||||
{
|
||||
public :
|
||||
vme_fccpu21yb_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
// optional information overrides
|
||||
virtual machine_config_constructor device_mconfig_additions() const override;
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
vme_fccpu21yb_card_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
|
||||
: vme_fccpu20_device( mconfig, type, name, tag, owner, clock, shortname, source, cpu21yb) { }
|
||||
};
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user