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https://github.com/holub/mame
synced 2025-04-22 08:22:15 +03:00
[COCO3] GIME cleanups; identify memory banks on device start (nw)
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1db7776087
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7c42921356
@ -119,49 +119,60 @@ gime_base_device::gime_base_device(const machine_config &mconfig, device_type ty
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void gime_base_device::device_start(void)
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{
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/* get the config */
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// get the config
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const gime_interface *config = (const gime_interface *) static_config();
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assert(config);
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/* find the RAM device - make sure that it is started */
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// find the RAM device - make sure that it is started
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m_ram = machine().device<ram_device>(config->m_ram_tag);
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if (!m_ram->started())
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throw device_missing_dependencies();
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/* find the CART device - make sure that it is started */
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// find the CART device - make sure that it is started
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m_cart_device = machine().device<cococart_slot_device>(config->m_ext_tag);
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if (!m_cart_device->started())
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throw device_missing_dependencies();
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/* find the CPU device - make sure that it is started */
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// find the CPU device - make sure that it is started
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m_cpu = machine().device<cpu_device>(config->m_maincpu_tag);
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if (!m_cpu->started())
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throw device_missing_dependencies();
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/* inherited device_start - need to do this after checking dependencies */
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// inherited device_start - need to do this after checking dependencies
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super::device_start();
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/* initialize variables */
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// initialize variables
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memset(m_scanlines, 0, sizeof(m_scanlines));
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m_interrupt_value = 0x00;
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m_irq = 0x00;
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m_firq = 0x00;
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/* allocate timer */
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// allocate timer
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m_gime_clock_timer = timer_alloc(TIMER_GIME_CLOCK);
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/* resolve callbacks */
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// setup banks
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assert(ARRAY_LENGTH(m_read_banks) == ARRAY_LENGTH(m_write_banks));
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for (int i = 0; i < ARRAY_LENGTH(m_read_banks); i++)
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{
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char buffer[8];
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snprintf(buffer, ARRAY_LENGTH(buffer), "rbank%d", i);
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m_read_banks[i] = machine().root_device().membank(buffer);
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snprintf(buffer, ARRAY_LENGTH(buffer), "wbank%d", i);
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m_write_banks[i] = machine().root_device().membank(buffer);
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}
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// resolve callbacks
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m_res_out_hsync_func.resolve(config->m_out_hsync_func, *this);
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m_res_out_fsync_func.resolve(config->m_out_fsync_func, *this);
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m_res_out_irq_func.resolve(config->m_out_irq_func, *this);
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m_res_out_firq_func.resolve(config->m_out_firq_func, *this);
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m_res_in_floating_bus_func.resolve(config->m_in_floating_bus_func, *this);
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/* set up ROM/RAM pointers */
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// set up ROM/RAM pointers
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m_rom = machine().root_device().memregion(config->m_maincpu_tag)->base();
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m_cart_rom = m_cart_device->get_cart_base();
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/* populate palettes */
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// populate palettes
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for (int color = 0; color < 64; color++)
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{
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m_composite_palette[color] = get_composite_color(color);
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@ -169,7 +180,7 @@ void gime_base_device::device_start(void)
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m_rgb_palette[color] = get_rgb_color(color);
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}
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/* set up save states */
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// set up save states
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save_pointer(NAME(m_gime_registers), ARRAY_LENGTH(m_gime_registers));
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save_pointer(NAME(m_mmu), ARRAY_LENGTH(m_mmu));
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save_item(NAME(m_sam_state));
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@ -523,15 +534,12 @@ ATTR_FORCE_INLINE void gime_base_device::update_memory(void)
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void gime_base_device::update_memory(int bank)
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{
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static const char *rbanks[] = { "rbank0", "rbank1", "rbank2", "rbank3", "rbank4", "rbank5", "rbank6", "rbank7", "rbank8" };
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static const char *wbanks[] = { "wbank0", "wbank1", "wbank2", "wbank3", "wbank4", "wbank5", "wbank6", "wbank7", "wbank8" };
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// choose bank
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assert((bank >= 0) && (bank < ARRAY_LENGTH(m_read_banks)) && (bank < ARRAY_LENGTH(m_write_banks)));
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memory_bank *read_bank = m_read_banks[bank];
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memory_bank *write_bank = m_write_banks[bank];
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/* look up the bank tags */
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assert((bank >= 0) && (bank < ARRAY_LENGTH(rbanks)) && (bank < ARRAY_LENGTH(wbanks)));
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const char *rbank = rbanks[bank];
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const char *wbank = wbanks[bank];
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/* bank 8 is really $FE00-$FEFF; it is weird so adjust for it */
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// bank 8 is really $FE00-$FEFF; it is weird so adjust for it
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offs_t offset;
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bool force_ram;
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bool enable_mmu = (m_gime_registers[0] & 0x40) ? true : false;
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@ -548,31 +556,31 @@ void gime_base_device::update_memory(int bank)
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force_ram = false;
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}
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/* is the MMU enabled at $FF90? */
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// is the MMU enabled at $FF90?
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int block;
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if (enable_mmu)
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{
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/* check TR register at $FF91 */
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// check TR register at $FF91
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bank += (m_gime_registers[1] & 0x01) ? 8 : 0;
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/* perform the MMU lookup */
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// perform the MMU lookup
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block = m_mmu[bank];
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/* also check $FF9B - relevant for the 2-8 MB upgrade */
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// also check $FF9B - relevant for the 2-8 MB upgrade
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block |= ((UINT32) ((m_gime_registers[11] >> 4) & 0x03)) << 8;
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}
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else
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{
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/* the MMU is not enabled */
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// the MMU is not enabled
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block = bank + 56;
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}
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/* are we actually in ROM? */
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// are we actually in ROM?
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UINT8 *memory;
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bool is_read_only;
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if (((block & 0x3F) >= 0x3C) && !(m_sam_state & SAM_STATE_TY) && !force_ram)
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{
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/* we're in ROM */
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// we're in ROM
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static const UINT8 rom_map[4][4] =
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{
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{ 0, 1, 6, 7 },
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@ -581,30 +589,30 @@ void gime_base_device::update_memory(int bank)
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{ 4, 5, 6, 7 }
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};
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/* look up the block in the ROM map */
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// look up the block in the ROM map
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block = rom_map[m_gime_registers[0] & 3][(block & 0x3F) - 0x3C];
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/* are we in onboard ROM or cart ROM? */
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// are we in onboard ROM or cart ROM?
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UINT8 *rom_ptr = (block & 4) ? m_cart_rom : m_rom;
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/* TODO: make this unmapped */
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// TODO: make this unmapped
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if (rom_ptr==NULL) rom_ptr = m_rom;
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/* perform the look up */
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// perform the look up
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memory = &rom_ptr[(block & 3) * 0x2000];
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is_read_only = true;
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}
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else
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{
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/* we're in RAM */
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// we're in RAM
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memory = memory_pointer(block * 0x2000);
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is_read_only = false;
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}
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/* compensate for offset */
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// compensate for offset
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memory += offset;
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/* set the banks */
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machine().root_device().membank(rbank)->set_base(memory);
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machine().root_device().membank(wbank)->set_base(is_read_only ? m_dummy_bank : memory);
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// set the banks
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read_bank->set_base(memory);
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write_bank->set_base(is_read_only ? m_dummy_bank : memory);
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}
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@ -155,42 +155,44 @@ private:
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static const UINT8 hires_font[128][12];
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// callbacks
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devcb_resolved_write_line m_res_out_irq_func;
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devcb_resolved_write_line m_res_out_firq_func;
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devcb_resolved_read8 m_res_in_floating_bus_func;
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devcb_resolved_write_line m_res_out_irq_func;
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devcb_resolved_write_line m_res_out_firq_func;
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devcb_resolved_read8 m_res_in_floating_bus_func;
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// device state
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UINT8 m_gime_registers[16];
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UINT8 m_mmu[16];
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UINT8 m_ff22_value;
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UINT8 m_interrupt_value;
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UINT8 m_irq;
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UINT8 m_firq;
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UINT16 m_timer_value;
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bool m_is_blinking;
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UINT8 m_gime_registers[16];
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UINT8 m_mmu[16];
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UINT8 m_ff22_value;
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UINT8 m_interrupt_value;
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UINT8 m_irq;
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UINT8 m_firq;
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UINT16 m_timer_value;
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bool m_is_blinking;
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// video state
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bool m_legacy_video;
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UINT32 m_video_position;
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UINT8 m_line_in_row;
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scanline_record m_scanlines[25+192+26];
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bool m_displayed_rgb;
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bool m_legacy_video;
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UINT32 m_video_position;
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UINT8 m_line_in_row;
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scanline_record m_scanlines[25+192+26];
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bool m_displayed_rgb;
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// palette state
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UINT8 m_palette_rotated[1024][16];
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UINT16 m_palette_rotated_position;
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bool m_palette_rotated_position_used;
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UINT8 m_palette_rotated[1024][16];
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UINT16 m_palette_rotated_position;
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bool m_palette_rotated_position_used;
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// incidentals
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ram_device *m_ram;
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emu_timer *m_gime_clock_timer;
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cococart_slot_device *m_cart_device;
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UINT8 *m_rom;
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UINT8 *m_cart_rom;
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pixel_t m_composite_palette[64];
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pixel_t m_composite_bw_palette[64];
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pixel_t m_rgb_palette[64];
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UINT8 m_dummy_bank[0x2000];
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ram_device * m_ram;
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emu_timer * m_gime_clock_timer;
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cococart_slot_device * m_cart_device;
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memory_bank * m_read_banks[9];
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memory_bank * m_write_banks[9];
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UINT8 * m_rom;
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UINT8 * m_cart_rom;
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pixel_t m_composite_palette[64];
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pixel_t m_composite_bw_palette[64];
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pixel_t m_rgb_palette[64];
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UINT8 m_dummy_bank[0x2000];
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// timer constants
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static const device_timer_id TIMER_FRAME = 0;
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