added cfrogger i/o handlers

src/emu/cpu/melps4/m58846.c

@@ -111,6 +111,7 @@ void m58846_device::execute_one()
 		case 0x0b: op_ose(); break;
 		case 0x0c: op_tya(); break;
 		case 0x0f: op_cma(); break;
+		// 0x18 RAR undocumented?
 
 		case 0x10: op_cls(); break;
 		case 0x11: op_clds(); break;

src/emu/cpu/melps4/melps4.c

@@ -23,11 +23,13 @@
  *M58496: 72-pin QFP CMOS, 2Kx10 ROM, 128x4 internal + 256x4 external RAM, 1 timer, low-power
  *M58497: almost same as M58496
 
-  MELPS 760 subfamily has more differences, document them when needed.
+  MELPS 760 family has more differences, document them when needed.
+  MELPS 720 family as well
 
 
   References:
-  - 1982 Mitsubishi LSI Data Book
+  - 1980 and 1982 Mitsubishi LSI Data Books
+  - M34550Mx-XXXFP datasheet (this one is MELPS 720 family)
 
 */
 
@@ -82,7 +84,6 @@ void melps4_cpu_device::device_start()
 	m_read_d.resolve_safe(0);
 	m_read_s.resolve_safe(0);
 	m_read_f.resolve_safe(0);
-	m_read_t.resolve_safe(0);
 
 	m_write_d.resolve_safe();
 	m_write_s.resolve_safe();

src/emu/cpu/melps4/melps4.h

@@ -44,20 +44,18 @@
 #define MCFG_MELPS4_WRITE_U_CB(_devcb) \
 	melps4_cpu_device::set_write_u_callback(*device, DEVCB_##_devcb);
 
-// T timer I/O pin
+// T timer I/O pin (use execute_set_input for reads)
-#define MCFG_MELPS4_READ_T_CB(_devcb) \
-	melps4_cpu_device::set_read_t_callback(*device, DEVCB_##_devcb);
 #define MCFG_MELPS4_WRITE_T_CB(_devcb) \
 	melps4_cpu_device::set_write_t_callback(*device, DEVCB_##_devcb);
 
 
 #define MELPS4_PORTD_CLR 16
 
-// only generic ports here (S is 8-bit)
+// only generic ports here
 enum
 {
 	MELPS4_PORTS = 0,
-	MELPS4_PORTF = 2,
+	MELPS4_PORTF,
 	MELPS4_PORTG,
 	MELPS4_PORTU
 };
@@ -114,7 +112,6 @@ public:
 		, m_read_d(*this)
 		, m_read_s(*this)
 		, m_read_f(*this)
-		, m_read_t(*this)
 		, m_write_d(*this)
 		, m_write_s(*this)
 		, m_write_f(*this)
@@ -128,7 +125,6 @@ public:
 	template<class _Object> static devcb_base &set_read_d_callback(device_t &device, _Object object) { return downcast<melps4_cpu_device &>(device).m_read_d.set_callback(object); }
 	template<class _Object> static devcb_base &set_read_s_callback(device_t &device, _Object object) { return downcast<melps4_cpu_device &>(device).m_read_s.set_callback(object); }
 	template<class _Object> static devcb_base &set_read_f_callback(device_t &device, _Object object) { return downcast<melps4_cpu_device &>(device).m_read_f.set_callback(object); }
-	template<class _Object> static devcb_base &set_read_t_callback(device_t &device, _Object object) { return downcast<melps4_cpu_device &>(device).m_read_t.set_callback(object); }
 
 	template<class _Object> static devcb_base &set_write_d_callback(device_t &device, _Object object) { return downcast<melps4_cpu_device &>(device).m_write_d.set_callback(object); }
 	template<class _Object> static devcb_base &set_write_s_callback(device_t &device, _Object object) { return downcast<melps4_cpu_device &>(device).m_write_s.set_callback(object); }
@@ -222,7 +218,6 @@ protected:
 	devcb_read16 m_read_d;
 	devcb_read8 m_read_s;
 	devcb_read8 m_read_f;
-	devcb_read_line m_read_t;
 
 	devcb_write16 m_write_d;
 	devcb_write8 m_write_s;

src/emu/cpu/melps4/melps4op.inc

@@ -419,13 +419,13 @@ void melps4_cpu_device::op_tab2()
 void melps4_cpu_device::op_tva()
 {
 	// TVA: transfer A to timer control V
-	op_illegal();
+	m_v = m_a;
 }
 
 void melps4_cpu_device::op_twa()
 {
 	// TWA: transfer A to timer control W
-	op_illegal();
+	m_w = m_a;
 }
 
 void melps4_cpu_device::op_snz1()
@@ -547,19 +547,19 @@ void melps4_cpu_device::op_clds()
 
 void melps4_cpu_device::op_sd()
 {
-	// SD: set port D bit designated by Y
+	// SD: set port D pin designated by Y
 	write_d_pin(m_y, 1);
 }
 
 void melps4_cpu_device::op_rd()
 {
-	// RD: reset port D bit designated by Y
+	// RD: reset port D pin designated by Y
 	write_d_pin(m_y, 0);
 }
 
 void melps4_cpu_device::op_szd()
 {
-	// SZD: skip next if port D bit designated by Y is 0
+	// SZD: skip next if port D pin designated by Y is 0
 	m_skip = !read_d_pin(m_y);
 }
 

src/mess/drivers/hh_melps4.c

@@ -29,7 +29,7 @@ public:
 
 	// devices
 	required_device<cpu_device> m_maincpu;
-	optional_ioport_array<2> m_inp_matrix; // max 2
+	optional_ioport_array<4> m_inp_matrix; // max 4
 	optional_device<speaker_sound_device> m_speaker;
 
 	// misc common
@@ -226,20 +226,94 @@ public:
 		: hh_melps4_state(mconfig, type, tag)
 	{ }
 
+	void prepare_display();
+	DECLARE_WRITE8_MEMBER(plate_w);
+	DECLARE_WRITE16_MEMBER(grid_w);
+	DECLARE_WRITE_LINE_MEMBER(speaker_w);
+	DECLARE_READ8_MEMBER(input_r);
+
+	DECLARE_INPUT_CHANGED_MEMBER(reset_button);
 };
 
 // handlers
 
+void cfrogger_state::prepare_display()
+{
+	UINT16 grid = BITSWAP16(m_grid,15,14,13,12,0,1,2,3,4,5,6,7,8,9,10,11);
+	UINT16 plate = BITSWAP16(m_plate,12,4,13,5,14,6,15,7,3,11,2,10,1,9,0,8);
+	display_matrix(16, 12, plate, grid);
+}
+
+WRITE8_MEMBER(cfrogger_state::plate_w)
+{
+	// Sx,Fx,Gx: vfd matrix plate
+	int mask = (offset == MELPS4_PORTS) ? 0xff : 0xf; // port S is 8-bit
+	int shift = (offset == MELPS4_PORTS) ? 0 : (offset + 1) * 4;
+	m_plate = (m_plate & ~(mask << shift)) | (data << shift);
+	prepare_display();
+
+	// F0,F1: input mux
+	m_inp_mux = m_plate >> 8 & 3;
+}
+
+WRITE16_MEMBER(cfrogger_state::grid_w)
+{
+	// D0-D11: vfd matrix grid
+	m_grid = data;
+	prepare_display();
+}
+
+WRITE_LINE_MEMBER(cfrogger_state::speaker_w)
+{
+	// T: speaker out
+	m_speaker->level_w(state);
+}
+
+READ8_MEMBER(cfrogger_state::input_r)
+{
+	// K0,K1: multiplexed inputs
+	// K2: N/C
+	// K3: fixed input
+	return (m_inp_matrix[2]->read() & 8) | (read_inputs(2) & 3);
+}
+
 
 // config
 
 static INPUT_PORTS_START( cfrogger )
+	PORT_START("IN.0") // F0 port K
+	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP )
+	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT )
+
+	PORT_START("IN.1") // F1 port K
+	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT )
+	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN )
+
+	PORT_START("IN.2") // K3
+	PORT_CONFNAME( 0x08, 0x00, "Skill Level" )
+	PORT_CONFSETTING(    0x00, "1" )
+	PORT_CONFSETTING(    0x08, "2" )
+
+	PORT_START("IN.3") // fake
+	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, cfrogger_state, reset_button, NULL)
 INPUT_PORTS_END
 
+INPUT_CHANGED_MEMBER(cfrogger_state::reset_button)
+{
+	// reset button is directly tied to MCU reset pin
+	m_maincpu->set_input_line(INPUT_LINE_RESET, newval ? ASSERT_LINE : CLEAR_LINE);
+}
+
+
 static MACHINE_CONFIG_START( cfrogger, cfrogger_state )
 
 	/* basic machine hardware */
 	MCFG_CPU_ADD("maincpu", M58846, XTAL_600kHz)
+	MCFG_MELPS4_WRITE_S_CB(WRITE8(cfrogger_state, plate_w))
+	MCFG_MELPS4_WRITE_F_CB(WRITE8(cfrogger_state, plate_w))
+	MCFG_MELPS4_WRITE_G_CB(WRITE8(cfrogger_state, plate_w))
+	MCFG_MELPS4_WRITE_D_CB(WRITE16(cfrogger_state, grid_w))
+	MCFG_MELPS4_WRITE_T_CB(WRITELINE(cfrogger_state, speaker_w))
 
 	MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_melps4_state, display_decay_tick, attotime::from_msec(1))
 	MCFG_DEFAULT_LAYOUT(layout_hh_melps4_test)