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https://github.com/holub/mame
synced 2025-04-23 08:49:55 +03:00
m6801.cpp: more logging and reduced unneeded updates of Tx line
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b5ae4a8876
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@ -10,8 +10,10 @@
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#define LOG_RX (1U << 3)
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#define LOG_RXTICK (1U << 4)
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#define LOG_PORT (1U << 5)
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#define LOG_SER (1U << 6)
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//#define VERBOSE (LOG_GENERAL | LOG_TX | LOG_RX | LOG_PORT)
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//#define VERBOSE (LOG_SER)
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//#define LOG_OUTPUT_STREAM std::cout
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//#define LOG_OUTPUT_STREAM std::cerr
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#include "logmacro.h"
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@ -20,6 +22,7 @@
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#define LOGRX(...) LOGMASKED(LOG_RX, __VA_ARGS__)
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#define LOGRXTICK(...) LOGMASKED(LOG_RXTICK, __VA_ARGS__)
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#define LOGPORT(...) LOGMASKED(LOG_PORT, __VA_ARGS__)
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#define LOGSER(...) LOGMASKED(LOG_SER, __VA_ARGS__)
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#define CT m_counter.w.l
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@ -413,11 +416,13 @@ void m6801_cpu_device::set_rmcr(uint8_t data)
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switch ((m_rmcr & M6801_RMCR_CC_MASK) >> 2)
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{
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case 0:
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LOGSER("6801: Using external serial clock: false\n");
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m_sci_timer->enable(false);
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m_use_ext_serclock = false;
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break;
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case 3: // external clock
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LOGSER("6801: Using external serial clock: true\n");
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m_use_ext_serclock = true;
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m_sci_timer->enable(false);
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break;
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@ -427,7 +432,7 @@ void m6801_cpu_device::set_rmcr(uint8_t data)
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{
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int divisor = M6801_RMCR_SS[m_rmcr & M6801_RMCR_SS_MASK];
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attotime period = cycles_to_attotime(divisor);
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LOGSER("6801: Setting serial rate, Divisor: %d Hz: %d\n", divisor, period.as_hz());
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m_sci_timer->adjust(period, 0, period);
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m_use_ext_serclock = false;
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}
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@ -442,10 +447,12 @@ int m6801_cpu_device::m6800_rx()
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void m6801_cpu_device::serial_transmit()
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{
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LOGTXTICK("Tx Tick\n");
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LOGTXTICK("6801 Tx Tick presenting: %d\n", m_tx);
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if (m_trcsr & M6801_TRCSR_TE)
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{
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int old_m_tx = m_tx; // Detect line change
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// force Port 2 bit 4 as output
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m_port_ddr[1] |= M6801_PORT2_IO4;
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@ -486,7 +493,7 @@ void m6801_cpu_device::serial_transmit()
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m_txbits++;
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LOGTX("Transmit START Data %02x\n", m_tsr);
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LOGTX("6801 Transmit START Data %02x\n", m_tsr);
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}
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break;
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@ -498,7 +505,7 @@ void m6801_cpu_device::serial_transmit()
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m_txbits = M6801_SERIAL_START;
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LOGTX("Transmit STOP\n");
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LOGTX("6801 Transmit STOP\n");
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break;
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default:
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@ -508,7 +515,7 @@ void m6801_cpu_device::serial_transmit()
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// shift transmit register
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m_tsr >>= 1;
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LOGTX("Transmit Bit %u: %u\n", m_txbits, m_tx);
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LOGTX("6801 Tx Present Bit %u: %u\n", m_txbits, m_tx);
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m_txbits++;
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break;
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@ -516,7 +523,10 @@ void m6801_cpu_device::serial_transmit()
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break;
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}
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m_out_sertx_func((m_tx == 1) ? ASSERT_LINE : CLEAR_LINE);
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if (old_m_tx != m_tx) // call callback only if line has changed
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{
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m_out_sertx_func((m_tx == 1) ? ASSERT_LINE : CLEAR_LINE);
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}
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m_port2_written = 1;
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write_port2();
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}
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@ -524,7 +534,7 @@ void m6801_cpu_device::serial_transmit()
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void m6801_cpu_device::serial_receive()
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{
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LOGRXTICK("Rx Tick TRCSR %02x bits %u check %02x\n", m_trcsr, m_rxbits, m_trcsr & M6801_TRCSR_RE);
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LOGRXTICK("6801 Rx Tick TRCSR %02x bits %u check %02x\n", m_trcsr, m_rxbits, m_trcsr & M6801_TRCSR_RE);
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if (m_trcsr & M6801_TRCSR_RE)
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{
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@ -535,11 +545,11 @@ void m6801_cpu_device::serial_receive()
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{
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m_rxbits++;
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LOGRX("Received WAKE UP bit %u\n", m_rxbits);
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LOGRX("6801 Received WAKE UP bit %u\n", m_rxbits);
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if (m_rxbits == 10)
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{
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LOGRX("Receiver Wake Up\n");
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LOGRX("6801 Receiver Wake Up\n");
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m_trcsr &= ~M6801_TRCSR_WU;
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m_rxbits = M6801_SERIAL_START;
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@ -547,7 +557,7 @@ void m6801_cpu_device::serial_receive()
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}
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else
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{
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LOGRX("Receiver Wake Up interrupted\n");
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LOGRX("6801 Receiver Wake Up interrupted\n");
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m_rxbits = M6801_SERIAL_START;
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}
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@ -563,21 +573,21 @@ void m6801_cpu_device::serial_receive()
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// start bit found
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m_rxbits++;
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LOGRX("Received START bit\n");
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LOGRX("6801 Received START bit\n");
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}
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break;
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case M6801_SERIAL_STOP:
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if (m6800_rx() == 1)
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{
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LOGRX("Received STOP bit\n");
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LOGRX("6801 Received STOP bit\n");
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if (m_trcsr & M6801_TRCSR_RDRF)
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{
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// overrun error
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m_trcsr |= M6801_TRCSR_ORFE;
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LOGRX("Receive Overrun Error\n");
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LOGRX("6801 Receive Overrun Error\n");
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CHECK_IRQ_LINES();
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}
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@ -588,7 +598,7 @@ void m6801_cpu_device::serial_receive()
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// transfer data into receive register
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m_rdr = m_rsr;
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LOGRX("Receive Data Register: %02x\n", m_rdr);
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LOGRX("6801 Receive Data Register: %02x\n", m_rdr);
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// set RDRF flag
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m_trcsr |= M6801_TRCSR_RDRF;
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@ -609,7 +619,7 @@ void m6801_cpu_device::serial_receive()
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m_trcsr |= M6801_TRCSR_ORFE;
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m_trcsr &= ~M6801_TRCSR_RDRF;
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LOGRX("Receive Framing Error\n");
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LOGRX("6801 Receive Framing Error\n");
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CHECK_IRQ_LINES();
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}
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@ -624,7 +634,7 @@ void m6801_cpu_device::serial_receive()
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// receive bit into register
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m_rsr |= (m6800_rx() << 7);
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LOGRX("Received DATA bit %u: %u\n", m_rxbits, BIT(m_rsr, 7));
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LOGRX("6801 RX sampled DATA bit %u: %u\n", m_rxbits, BIT(m_rsr, 7));
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m_rxbits++;
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break;
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@ -1192,13 +1202,13 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
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break;
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case IO_RMCR:
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LOG("Rate and Mode Control Register: %02x\n", data);
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LOGSER("Rate and Mode Control Register: %02x\n", data);
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set_rmcr(data);
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break;
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case IO_TRCSR:
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LOG("Transmit/Receive Control and Status Register: %02x\n", data);
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LOGSER("Transmit/Receive Control and Status Register: %02x\n", data);
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if ((data & M6801_TRCSR_TE) && !(m_trcsr & M6801_TRCSR_TE))
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{
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@ -1216,7 +1226,7 @@ WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
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break;
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case IO_TDR:
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LOGTX("Transmit Data Register: %02x\n", data);
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LOGSER("6801 Transmit Data Register: $%02x/%d\n", data, data);
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if (m_trcsr_read_tdre)
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{
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