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and more *.c -> *.inc renaming (nw)

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This commit is contained in:
Oliver Stöneberg 2014-03-19 20:55:25 +00:00
parent 9bd510b453
commit 7c8b4c5886
47 changed files with 107 additions and 107 deletions
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66
.gitattributes vendored
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@ -1767,8 +1767,8 @@ src/emu/cpu/s2650/2650dasm.c svneol=native#text/plain
src/emu/cpu/s2650/s2650.c svneol=native#text/plain src/emu/cpu/s2650/s2650.c svneol=native#text/plain
src/emu/cpu/s2650/s2650.h svneol=native#text/plain src/emu/cpu/s2650/s2650.h svneol=native#text/plain
src/emu/cpu/s2650/s2650cpu.h svneol=native#text/plain src/emu/cpu/s2650/s2650cpu.h svneol=native#text/plain
src/emu/cpu/saturn/satops.c svneol=native#text/plain src/emu/cpu/saturn/satops.inc svneol=native#text/plain
src/emu/cpu/saturn/sattable.c svneol=native#text/plain src/emu/cpu/saturn/sattable.inc svneol=native#text/plain
src/emu/cpu/saturn/saturn.c svneol=native#text/plain src/emu/cpu/saturn/saturn.c svneol=native#text/plain
src/emu/cpu/saturn/saturn.h svneol=native#text/plain src/emu/cpu/saturn/saturn.h svneol=native#text/plain
src/emu/cpu/saturn/saturnds.c svneol=native#text/plain src/emu/cpu/saturn/saturnds.c svneol=native#text/plain
@ -1776,8 +1776,8 @@ src/emu/cpu/sc61860/readpc.c svneol=native#text/plain
src/emu/cpu/sc61860/sc61860.c svneol=native#text/plain src/emu/cpu/sc61860/sc61860.c svneol=native#text/plain
src/emu/cpu/sc61860/sc61860.h svneol=native#text/plain src/emu/cpu/sc61860/sc61860.h svneol=native#text/plain
src/emu/cpu/sc61860/scdasm.c svneol=native#text/plain src/emu/cpu/sc61860/scdasm.c svneol=native#text/plain
src/emu/cpu/sc61860/scops.c svneol=native#text/plain src/emu/cpu/sc61860/scops.inc svneol=native#text/plain
src/emu/cpu/sc61860/sctable.c svneol=native#text/plain src/emu/cpu/sc61860/sctable.inc svneol=native#text/plain
src/emu/cpu/scmp/scmp.c svneol=native#text/plain src/emu/cpu/scmp/scmp.c svneol=native#text/plain
src/emu/cpu/scmp/scmp.h svneol=native#text/plain src/emu/cpu/scmp/scmp.h svneol=native#text/plain
src/emu/cpu/scmp/scmpdasm.c svneol=native#text/plain src/emu/cpu/scmp/scmpdasm.c svneol=native#text/plain
@ -1810,15 +1810,15 @@ src/emu/cpu/sh4/sh4dmac.h svneol=native#text/plain
src/emu/cpu/sh4/sh4regs.h svneol=native#text/plain src/emu/cpu/sh4/sh4regs.h svneol=native#text/plain
src/emu/cpu/sh4/sh4tmu.c svneol=native#text/plain src/emu/cpu/sh4/sh4tmu.c svneol=native#text/plain
src/emu/cpu/sh4/sh4tmu.h svneol=native#text/plain src/emu/cpu/sh4/sh4tmu.h svneol=native#text/plain
src/emu/cpu/sharc/compute.c svneol=native#text/plain src/emu/cpu/sharc/compute.inc svneol=native#text/plain
src/emu/cpu/sharc/sharc.c svneol=native#text/plain src/emu/cpu/sharc/sharc.c svneol=native#text/plain
src/emu/cpu/sharc/sharc.h svneol=native#text/plain src/emu/cpu/sharc/sharc.h svneol=native#text/plain
src/emu/cpu/sharc/sharcdma.c svneol=native#text/plain src/emu/cpu/sharc/sharcdma.inc svneol=native#text/plain
src/emu/cpu/sharc/sharcdsm.c svneol=native#text/plain src/emu/cpu/sharc/sharcdsm.c svneol=native#text/plain
src/emu/cpu/sharc/sharcdsm.h svneol=native#text/plain src/emu/cpu/sharc/sharcdsm.h svneol=native#text/plain
src/emu/cpu/sharc/sharcmem.c svneol=native#text/plain src/emu/cpu/sharc/sharcmem.inc svneol=native#text/plain
src/emu/cpu/sharc/sharcops.c svneol=native#text/plain
src/emu/cpu/sharc/sharcops.h svneol=native#text/plain src/emu/cpu/sharc/sharcops.h svneol=native#text/plain
src/emu/cpu/sharc/sharcops.inc svneol=native#text/plain
src/emu/cpu/sm8500/sm8500.c svneol=native#text/plain src/emu/cpu/sm8500/sm8500.c svneol=native#text/plain
src/emu/cpu/sm8500/sm8500.h svneol=native#text/plain src/emu/cpu/sm8500/sm8500.h svneol=native#text/plain
src/emu/cpu/sm8500/sm8500d.c svneol=native#text/plain src/emu/cpu/sm8500/sm8500d.c svneol=native#text/plain
@ -1839,11 +1839,11 @@ src/emu/cpu/superfx/superfx.h svneol=native#text/plain
src/emu/cpu/t11/t11.c svneol=native#text/plain src/emu/cpu/t11/t11.c svneol=native#text/plain
src/emu/cpu/t11/t11.h svneol=native#text/plain src/emu/cpu/t11/t11.h svneol=native#text/plain
src/emu/cpu/t11/t11dasm.c svneol=native#text/plain src/emu/cpu/t11/t11dasm.c svneol=native#text/plain
src/emu/cpu/t11/t11ops.c svneol=native#text/plain src/emu/cpu/t11/t11ops.inc svneol=native#text/plain
src/emu/cpu/t11/t11table.c svneol=native#text/plain src/emu/cpu/t11/t11table.inc svneol=native#text/plain
src/emu/cpu/tlcs90/tlcs90.c svneol=native#text/plain src/emu/cpu/tlcs90/tlcs90.c svneol=native#text/plain
src/emu/cpu/tlcs90/tlcs90.h svneol=native#text/plain src/emu/cpu/tlcs90/tlcs90.h svneol=native#text/plain
src/emu/cpu/tlcs900/900tbl.c svneol=native#text/plain src/emu/cpu/tlcs900/900tbl.inc svneol=native#text/plain
src/emu/cpu/tlcs900/dasm900.c svneol=native#text/plain src/emu/cpu/tlcs900/dasm900.c svneol=native#text/plain
src/emu/cpu/tlcs900/tlcs900.c svneol=native#text/plain src/emu/cpu/tlcs900/tlcs900.c svneol=native#text/plain
src/emu/cpu/tlcs900/tlcs900.h svneol=native#text/plain src/emu/cpu/tlcs900/tlcs900.h svneol=native#text/plain
@ -1891,8 +1891,8 @@ src/emu/cpu/tms57002/tmsmake.py svneol=native#text/plain
src/emu/cpu/tms7000/7000dasm.c svneol=native#text/plain src/emu/cpu/tms7000/7000dasm.c svneol=native#text/plain
src/emu/cpu/tms7000/tms7000.c svneol=native#text/plain src/emu/cpu/tms7000/tms7000.c svneol=native#text/plain
src/emu/cpu/tms7000/tms7000.h svneol=native#text/plain src/emu/cpu/tms7000/tms7000.h svneol=native#text/plain
src/emu/cpu/tms7000/tms70op.c svneol=native#text/plain src/emu/cpu/tms7000/tms70op.inc svneol=native#text/plain
src/emu/cpu/tms7000/tms70tb.c svneol=native#text/plain src/emu/cpu/tms7000/tms70tb.inc svneol=native#text/plain
src/emu/cpu/tms9900/9900dasm.c svneol=native#text/plain src/emu/cpu/tms9900/9900dasm.c svneol=native#text/plain
src/emu/cpu/tms9900/99xxcore.h svneol=native#text/plain src/emu/cpu/tms9900/99xxcore.h svneol=native#text/plain
src/emu/cpu/tms9900/ti990_10.c svneol=native#text/plain src/emu/cpu/tms9900/ti990_10.c svneol=native#text/plain
@ -1920,17 +1920,17 @@ src/emu/cpu/upd7810/upd7810.h svneol=native#text/plain
src/emu/cpu/v30mz/v30mz.c svneol=native#text/plain src/emu/cpu/v30mz/v30mz.c svneol=native#text/plain
src/emu/cpu/v30mz/v30mz.h svneol=native#text/plain src/emu/cpu/v30mz/v30mz.h svneol=native#text/plain
src/emu/cpu/v60/am.c svneol=native#text/plain src/emu/cpu/v60/am.c svneol=native#text/plain
src/emu/cpu/v60/am1.c svneol=native#text/plain src/emu/cpu/v60/am1.inc svneol=native#text/plain
src/emu/cpu/v60/am2.c svneol=native#text/plain src/emu/cpu/v60/am2.inc svneol=native#text/plain
src/emu/cpu/v60/am3.c svneol=native#text/plain src/emu/cpu/v60/am3.inc svneol=native#text/plain
src/emu/cpu/v60/op12.c svneol=native#text/plain src/emu/cpu/v60/op12.inc svneol=native#text/plain
src/emu/cpu/v60/op2.c svneol=native#text/plain src/emu/cpu/v60/op2.inc svneol=native#text/plain
src/emu/cpu/v60/op3.c svneol=native#text/plain src/emu/cpu/v60/op3.inc svneol=native#text/plain
src/emu/cpu/v60/op4.c svneol=native#text/plain src/emu/cpu/v60/op4.inc svneol=native#text/plain
src/emu/cpu/v60/op5.c svneol=native#text/plain src/emu/cpu/v60/op5.inc svneol=native#text/plain
src/emu/cpu/v60/op6.c svneol=native#text/plain src/emu/cpu/v60/op6.inc svneol=native#text/plain
src/emu/cpu/v60/op7a.c svneol=native#text/plain src/emu/cpu/v60/op7a.inc svneol=native#text/plain
src/emu/cpu/v60/optable.c svneol=native#text/plain src/emu/cpu/v60/optable.inc svneol=native#text/plain
src/emu/cpu/v60/v60.c svneol=native#text/plain src/emu/cpu/v60/v60.c svneol=native#text/plain
src/emu/cpu/v60/v60.h svneol=native#text/plain src/emu/cpu/v60/v60.h svneol=native#text/plain
src/emu/cpu/v60/v60d.c svneol=native#text/plain src/emu/cpu/v60/v60d.c svneol=native#text/plain
@ -1944,19 +1944,19 @@ src/emu/cpu/x86log.c svneol=native#text/plain
src/emu/cpu/x86log.h svneol=native#text/plain src/emu/cpu/x86log.h svneol=native#text/plain
src/emu/cpu/z180/z180.c svneol=native#text/plain src/emu/cpu/z180/z180.c svneol=native#text/plain
src/emu/cpu/z180/z180.h svneol=native#text/plain src/emu/cpu/z180/z180.h svneol=native#text/plain
src/emu/cpu/z180/z180cb.c svneol=native#text/plain src/emu/cpu/z180/z180cb.inc svneol=native#text/plain
src/emu/cpu/z180/z180dasm.c svneol=native#text/plain src/emu/cpu/z180/z180dasm.c svneol=native#text/plain
src/emu/cpu/z180/z180dd.c svneol=native#text/plain src/emu/cpu/z180/z180dd.inc svneol=native#text/plain
src/emu/cpu/z180/z180ed.c svneol=native#text/plain src/emu/cpu/z180/z180ed.inc svneol=native#text/plain
src/emu/cpu/z180/z180fd.c svneol=native#text/plain src/emu/cpu/z180/z180fd.inc svneol=native#text/plain
src/emu/cpu/z180/z180op.c svneol=native#text/plain src/emu/cpu/z180/z180op.inc svneol=native#text/plain
src/emu/cpu/z180/z180ops.h svneol=native#text/plain src/emu/cpu/z180/z180ops.h svneol=native#text/plain
src/emu/cpu/z180/z180tbl.h svneol=native#text/plain src/emu/cpu/z180/z180tbl.h svneol=native#text/plain
src/emu/cpu/z180/z180xy.c svneol=native#text/plain src/emu/cpu/z180/z180xy.inc svneol=native#text/plain
src/emu/cpu/z8/z8.c svneol=native#text/plain src/emu/cpu/z8/z8.c svneol=native#text/plain
src/emu/cpu/z8/z8.h svneol=native#text/plain src/emu/cpu/z8/z8.h svneol=native#text/plain
src/emu/cpu/z8/z8dasm.c svneol=native#text/plain src/emu/cpu/z8/z8dasm.c svneol=native#text/plain
src/emu/cpu/z8/z8ops.c svneol=native#text/plain src/emu/cpu/z8/z8ops.inc svneol=native#text/plain
src/emu/cpu/z80/z80.c svneol=native#text/plain src/emu/cpu/z80/z80.c svneol=native#text/plain
src/emu/cpu/z80/z80.h svneol=native#text/plain src/emu/cpu/z80/z80.h svneol=native#text/plain
src/emu/cpu/z80/z80daisy.c svneol=native#text/plain src/emu/cpu/z80/z80daisy.c svneol=native#text/plain
@ -1968,8 +1968,8 @@ src/emu/cpu/z8000/z8000.c svneol=native#text/plain
src/emu/cpu/z8000/z8000.h svneol=native#text/plain src/emu/cpu/z8000/z8000.h svneol=native#text/plain
src/emu/cpu/z8000/z8000cpu.h svneol=native#text/plain src/emu/cpu/z8000/z8000cpu.h svneol=native#text/plain
src/emu/cpu/z8000/z8000dab.h svneol=native#text/plain src/emu/cpu/z8000/z8000dab.h svneol=native#text/plain
src/emu/cpu/z8000/z8000ops.c svneol=native#text/plain src/emu/cpu/z8000/z8000ops.inc svneol=native#text/plain
src/emu/cpu/z8000/z8000tbl.c svneol=native#text/plain src/emu/cpu/z8000/z8000tbl.inc svneol=native#text/plain
src/emu/crsshair.c svneol=native#text/plain src/emu/crsshair.c svneol=native#text/plain
src/emu/crsshair.h svneol=native#text/plain src/emu/crsshair.h svneol=native#text/plain
src/emu/debug/debugcmd.c svneol=native#text/plain src/emu/debug/debugcmd.c svneol=native#text/plain

68
src/emu/cpu/cpu.mak
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@ -185,13 +185,13 @@ endif
$(CPUOBJ)/sharc/sharc.o: $(CPUSRC)/sharc/sharc.c \ $(CPUOBJ)/sharc/sharc.o: $(CPUSRC)/sharc/sharc.c \
$(CPUSRC)/sharc/sharc.h \ $(CPUSRC)/sharc/sharc.h \
$(CPUSRC)/sharc/sharcops.c \ $(CPUSRC)/sharc/sharcops.inc \
$(CPUSRC)/sharc/sharcops.h \ $(CPUSRC)/sharc/sharcops.h \
$(CPUSRC)/sharc/sharcdsm.c \ $(CPUSRC)/sharc/sharcdsm.c \
$(CPUSRC)/sharc/sharcdsm.h \ $(CPUSRC)/sharc/sharcdsm.h \
$(CPUSRC)/sharc/compute.c \ $(CPUSRC)/sharc/compute.inc \
$(CPUSRC)/sharc/sharcdma.c \ $(CPUSRC)/sharc/sharcdma.inc \
$(CPUSRC)/sharc/sharcmem.c $(CPUSRC)/sharc/sharcmem.inc
@ -418,8 +418,8 @@ endif
$(CPUOBJ)/t11/t11.o: $(CPUSRC)/t11/t11.c \ $(CPUOBJ)/t11/t11.o: $(CPUSRC)/t11/t11.c \
$(CPUSRC)/t11/t11.h \ $(CPUSRC)/t11/t11.h \
$(CPUSRC)/t11/t11ops.c \ $(CPUSRC)/t11/t11ops.inc \
$(CPUSRC)/t11/t11table.c $(CPUSRC)/t11/t11table.inc
@ -1581,18 +1581,18 @@ CPUOBJS += $(CPUOBJ)/v60/v60.o
DASMOBJS += $(CPUOBJ)/v60/v60d.o DASMOBJS += $(CPUOBJ)/v60/v60d.o
endif endif
$(CPUOBJ)/v60/v60.o: $(CPUSRC)/v60/am.c \ $(CPUOBJ)/v60/v60.o: $(CPUSRC)/v60/am.inc \
$(CPUSRC)/v60/am1.c \ $(CPUSRC)/v60/am1.inc \
$(CPUSRC)/v60/am2.c \ $(CPUSRC)/v60/am2.inc \
$(CPUSRC)/v60/am3.c \ $(CPUSRC)/v60/am3.inc \
$(CPUSRC)/v60/op12.c \ $(CPUSRC)/v60/op12.inc \
$(CPUSRC)/v60/op2.c \ $(CPUSRC)/v60/op2.inc \
$(CPUSRC)/v60/op3.c \ $(CPUSRC)/v60/op3.inc \
$(CPUSRC)/v60/op4.c \ $(CPUSRC)/v60/op4.inc \
$(CPUSRC)/v60/op5.c \ $(CPUSRC)/v60/op5.inc \
$(CPUSRC)/v60/op6.c \ $(CPUSRC)/v60/op6.inc \
$(CPUSRC)/v60/op7a.c \ $(CPUSRC)/v60/op7a.inc \
$(CPUSRC)/v60/optable.c \ $(CPUSRC)/v60/optable.inc \
$(CPUSRC)/v60/v60.c \ $(CPUSRC)/v60/v60.c \
$(CPUSRC)/v60/v60.h \ $(CPUSRC)/v60/v60.h \
$(CPUSRC)/v60/v60d.c $(CPUSRC)/v60/v60d.c
@ -1717,8 +1717,8 @@ DASMOBJS += $(CPUOBJ)/saturn/saturnds.o
endif endif
$(CPUOBJ)/saturn/saturn.o: $(CPUSRC)/saturn/saturn.c \ $(CPUOBJ)/saturn/saturn.o: $(CPUSRC)/saturn/saturn.c \
$(CPUSRC)/saturn/sattable.c \ $(CPUSRC)/saturn/sattable.inc \
$(CPUSRC)/saturn/satops.c \ $(CPUSRC)/saturn/satops.inc \
$(CPUSRC)/saturn/saturn.h $(CPUSRC)/saturn/saturn.h
@ -1752,8 +1752,8 @@ DASMOBJS += $(CPUOBJ)/sc61860/scdasm.o
endif endif
$(CPUOBJ)/sc61860/sc61860.o: $(CPUSRC)/sc61860/sc61860.h \ $(CPUOBJ)/sc61860/sc61860.o: $(CPUSRC)/sc61860/sc61860.h \
$(CPUSRC)/sc61860/scops.c \ $(CPUSRC)/sc61860/scops.inc \
$(CPUSRC)/sc61860/sctable.c $(CPUSRC)/sc61860/sctable.inc
@ -1871,8 +1871,8 @@ endif
$(CPUOBJ)/tms7000/tms7000.o: $(CPUSRC)/tms7000/tms7000.h \ $(CPUOBJ)/tms7000/tms7000.o: $(CPUSRC)/tms7000/tms7000.h \
$(CPUSRC)/tms7000/tms7000.c \ $(CPUSRC)/tms7000/tms7000.c \
$(CPUSRC)/tms7000/tms70op.c \ $(CPUSRC)/tms7000/tms70op.inc \
$(CPUSRC)/tms7000/tms70tb.c $(CPUSRC)/tms7000/tms70tb.inc
$(CPUOBJ)/tms7000/7000dasm.o: $(CPUSRC)/tms7000/tms7000.h \ $(CPUOBJ)/tms7000/7000dasm.o: $(CPUSRC)/tms7000/tms7000.h \
$(CPUSRC)/tms7000/7000dasm.c $(CPUSRC)/tms7000/7000dasm.c
@ -2074,7 +2074,7 @@ DASMOBJS += $(CPUOBJ)/tlcs900/dasm900.o
endif endif
$(CPUOBJ)/tlcs900/tlcs900.o: $(CPUSRC)/tlcs900/tlcs900.c \ $(CPUOBJ)/tlcs900/tlcs900.o: $(CPUSRC)/tlcs900/tlcs900.c \
$(CPUSRC)/tlcs900/900tbl.c \ $(CPUSRC)/tlcs900/900tbl.inc \
$(CPUSRC)/tlcs900/tlcs900.h $(CPUSRC)/tlcs900/tlcs900.h
$(CPUOBJ)/tlcs900/dasm900.o: $(CPUSRC)/tlcs900/dasm900.c $(CPUOBJ)/tlcs900/dasm900.o: $(CPUSRC)/tlcs900/dasm900.c
@ -2128,14 +2128,14 @@ endif
$(CPUOBJ)/z180/z180.o: $(CPUSRC)/z180/z180.c \ $(CPUOBJ)/z180/z180.o: $(CPUSRC)/z180/z180.c \
$(CPUSRC)/z180/z180.h \ $(CPUSRC)/z180/z180.h \
$(CPUSRC)/z180/z180op.c \ $(CPUSRC)/z180/z180op.inc \
$(CPUSRC)/z180/z180ops.h \ $(CPUSRC)/z180/z180ops.h \
$(CPUSRC)/z180/z180tbl.h \ $(CPUSRC)/z180/z180tbl.h \
$(CPUSRC)/z180/z180cb.c \ $(CPUSRC)/z180/z180cb.inc \
$(CPUSRC)/z180/z180dd.c \ $(CPUSRC)/z180/z180dd.inc \
$(CPUSRC)/z180/z180ed.c \ $(CPUSRC)/z180/z180ed.inc \
$(CPUSRC)/z180/z180fd.c \ $(CPUSRC)/z180/z180fd.inc \
$(CPUSRC)/z180/z180xy.c $(CPUSRC)/z180/z180xy.inc
@ -2154,8 +2154,8 @@ $(CPUOBJ)/z8000/z8000.o: $(CPUSRC)/z8000/z8000.c \
$(CPUSRC)/z8000/z8000.h \ $(CPUSRC)/z8000/z8000.h \
$(CPUSRC)/z8000/z8000cpu.h \ $(CPUSRC)/z8000/z8000cpu.h \
$(CPUSRC)/z8000/z8000dab.h \ $(CPUSRC)/z8000/z8000dab.h \
$(CPUSRC)/z8000/z8000ops.c \ $(CPUSRC)/z8000/z8000ops.inc \
$(CPUSRC)/z8000/z8000tbl.c $(CPUSRC)/z8000/z8000tbl.inc
@ -2171,7 +2171,7 @@ DASMOBJS += $(CPUOBJ)/z8/z8dasm.o
endif endif
$(CPUOBJ)/z8/z8.o: $(CPUSRC)/z8/z8.c \ $(CPUOBJ)/z8/z8.o: $(CPUSRC)/z8/z8.c \
$(CPUSRC)/z8/z8ops.c \ $(CPUSRC)/z8/z8ops.inc \
$(CPUSRC)/z8/z8.h $(CPUSRC)/z8/z8.h

0
src/emu/cpu/saturn/satops.c → src/emu/cpu/saturn/satops.inc
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0
src/emu/cpu/saturn/sattable.c → src/emu/cpu/saturn/sattable.inc
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4
src/emu/cpu/saturn/saturn.c
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@ -81,8 +81,8 @@ offs_t saturn_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *o
* include the opcode macros, functions and tables * include the opcode macros, functions and tables
***************************************************************/ ***************************************************************/
#include "satops.c" #include "satops.inc"
#include "sattable.c" #include "sattable.inc"
/***************************************************************************** /*****************************************************************************
* *

4
src/emu/cpu/sc61860/sc61860.c
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@ -99,8 +99,8 @@ TIMER_CALLBACK_MEMBER(sc61860_device::sc61860_2ms_tick)
/*************************************************************** /***************************************************************
* include the opcode macros, functions and tables * include the opcode macros, functions and tables
***************************************************************/ ***************************************************************/
#include "scops.c" #include "scops.inc"
#include "sctable.c" #include "sctable.inc"
void sc61860_device::device_reset() void sc61860_device::device_reset()
{ {

2
src/emu/cpu/sc61860/scops.c → src/emu/cpu/sc61860/scops.inc
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@ -1,6 +1,6 @@
/***************************************************************************** /*****************************************************************************
* *
* scops.c * scops.inc
* portable sharp 61860 emulator interface * portable sharp 61860 emulator interface
* (sharp pocket computers) * (sharp pocket computers)
* *

0
src/emu/cpu/sc61860/sctable.c → src/emu/cpu/sc61860/sctable.inc
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0
src/emu/cpu/sharc/compute.c → src/emu/cpu/sharc/compute.inc
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6
src/emu/cpu/sharc/sharc.c
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@ -195,9 +195,9 @@ void adsp21062_device::sharc_iop_w(UINT32 address, UINT32 data)
} }
#include "sharcmem.c" #include "sharcmem.inc"
#include "sharcdma.c" #include "sharcdma.inc"
#include "sharcops.c" #include "sharcops.inc"
#include "sharcops.h" #include "sharcops.h"

0
src/emu/cpu/sharc/sharcdma.c → src/emu/cpu/sharc/sharcdma.inc
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0
src/emu/cpu/sharc/sharcmem.c → src/emu/cpu/sharc/sharcmem.inc
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2
src/emu/cpu/sharc/sharcops.c → src/emu/cpu/sharc/sharcops.inc
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@ -696,7 +696,7 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx
} }
} }
#include "compute.c" #include "compute.inc"
void adsp21062_device::COMPUTE(UINT32 opcode) void adsp21062_device::COMPUTE(UINT32 opcode)
{ {

4
src/emu/cpu/t11/t11.c
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@ -216,10 +216,10 @@ void t11_device::t11_check_irqs()
*************************************/ *************************************/
/* includes the static function prototypes and the master opcode table */ /* includes the static function prototypes and the master opcode table */
#include "t11table.c" #include "t11table.inc"
/* includes the actual opcode implementations */ /* includes the actual opcode implementations */
#include "t11ops.c" #include "t11ops.inc"

0
src/emu/cpu/t11/t11ops.c → src/emu/cpu/t11/t11ops.inc
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0
src/emu/cpu/t11/t11table.c → src/emu/cpu/t11/t11table.inc
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0
src/emu/cpu/tlcs900/900tbl.c → src/emu/cpu/tlcs900/900tbl.inc
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2
src/emu/cpu/tlcs900/tlcs900.c
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@ -498,7 +498,7 @@ void tmp95c061_device::device_reset()
} }
#include "900tbl.c" #include "900tbl.inc"
#define TMP95C061_NUM_MASKABLE_IRQS 22 #define TMP95C061_NUM_MASKABLE_IRQS 22

4
src/emu/cpu/tms7000/tms7000.c
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@ -328,8 +328,8 @@ void tms7000_device::tms7000_do_interrupt( UINT16 address, UINT8 line )
standard_irq_callback(line); standard_irq_callback(line);
} }
#include "tms70op.c" #include "tms70op.inc"
#include "tms70tb.c" #include "tms70tb.inc"
void tms7000_device::execute_run() void tms7000_device::execute_run()
{ {

2
src/emu/cpu/tms7000/tms70op.c → src/emu/cpu/tms7000/tms70op.inc
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@ -1,6 +1,6 @@
/***************************************************************************** /*****************************************************************************
* *
* tms70op.c (Op code functions) * tms70op.inc (Op code functions)
* Portable TMS7000 emulator (Texas Instruments 7000) * Portable TMS7000 emulator (Texas Instruments 7000)
* *
* Copyright tim lindner, all rights reserved. * Copyright tim lindner, all rights reserved.

2
src/emu/cpu/tms7000/tms70tb.c → src/emu/cpu/tms7000/tms70tb.inc
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@ -1,6 +1,6 @@
/***************************************************************************** /*****************************************************************************
* *
* tms70tb.c (function table) * tms70tb.inc (function table)
* Portable TMS7000 emulator (Texas Instruments 7000) * Portable TMS7000 emulator (Texas Instruments 7000)
* *
* Copyright tim lindner, all rights reserved. * Copyright tim lindner, all rights reserved.

6
src/emu/cpu/v60/am.c
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@ -8,9 +8,9 @@
// Addressing mode functions and tables // Addressing mode functions and tables
#include "am1.c" // ReadAM #include "am1.inc" // ReadAM
#include "am2.c" // ReadAMAddress #include "am2.inc" // ReadAMAddress
#include "am3.c" // WriteAM #include "am3.inc" // WriteAM
/* /*
Input: Input:

0
src/emu/cpu/v60/am1.c → src/emu/cpu/v60/am1.inc
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0
src/emu/cpu/v60/am2.c → src/emu/cpu/v60/am2.inc
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0
src/emu/cpu/v60/am3.c → src/emu/cpu/v60/am3.inc
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0
src/emu/cpu/v60/op12.c → src/emu/cpu/v60/op12.inc
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0
src/emu/cpu/v60/op2.c → src/emu/cpu/v60/op2.inc
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0
src/emu/cpu/v60/op3.c → src/emu/cpu/v60/op3.inc
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0
src/emu/cpu/v60/op4.c → src/emu/cpu/v60/op4.inc
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0
src/emu/cpu/v60/op5.c → src/emu/cpu/v60/op5.inc
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0
src/emu/cpu/v60/op6.c → src/emu/cpu/v60/op6.inc
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0
src/emu/cpu/v60/op7a.c → src/emu/cpu/v60/op7a.inc
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0
src/emu/cpu/v60/optable.c → src/emu/cpu/v60/optable.inc
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18
src/emu/cpu/v60/v60.c
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@ -293,16 +293,16 @@ UINT32 v60_device::v60_update_psw_for_exception(int is_interrupt, int target_lev
// Addressing mode decoding functions // Addressing mode decoding functions
#include "am.c" #include "am.inc"
// Opcode functions // Opcode functions
#include "op12.c" #include "op12.inc"
#include "op2.c" #include "op2.inc"
#include "op3.c" #include "op3.inc"
#include "op4.c" #include "op4.inc"
#include "op5.c" #include "op5.inc"
#include "op6.c" #include "op6.inc"
#include "op7a.c" #include "op7a.inc"
UINT32 v60_device::opUNHANDLED() UINT32 v60_device::opUNHANDLED()
{ {
@ -311,7 +311,7 @@ UINT32 v60_device::opUNHANDLED()
} }
// Opcode jump table // Opcode jump table
#include "optable.c" #include "optable.inc"
void v60_device::device_start() void v60_device::device_start()
{ {

12
src/emu/cpu/z180/z180.c
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@ -796,12 +796,12 @@ static UINT8 *SZHVC_sub;
#include "z180ops.h" #include "z180ops.h"
#include "z180tbl.h" #include "z180tbl.h"
#include "z180cb.c" #include "z180cb.inc"
#include "z180xy.c" #include "z180xy.inc"
#include "z180dd.c" #include "z180dd.inc"
#include "z180fd.c" #include "z180fd.inc"
#include "z180ed.c" #include "z180ed.inc"
#include "z180op.c" #include "z180op.inc"
UINT8 z180_device::z180_readcontrol(offs_t port) UINT8 z180_device::z180_readcontrol(offs_t port)
{ {

0
src/emu/cpu/z180/z180cb.c → src/emu/cpu/z180/z180cb.inc
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0
src/emu/cpu/z180/z180dd.c → src/emu/cpu/z180/z180dd.inc
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0
src/emu/cpu/z180/z180ed.c → src/emu/cpu/z180/z180ed.inc
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0
src/emu/cpu/z180/z180fd.c → src/emu/cpu/z180/z180fd.inc
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0
src/emu/cpu/z180/z180op.c → src/emu/cpu/z180/z180op.inc
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0
src/emu/cpu/z180/z180xy.c → src/emu/cpu/z180/z180xy.inc
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2
src/emu/cpu/z8/z8.c
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@ -542,7 +542,7 @@ INSTRUCTION( illegal )
logerror("Z8: PC = %04x, Illegal opcode = %02x\n", m_pc - 1, opcode); logerror("Z8: PC = %04x, Illegal opcode = %02x\n", m_pc - 1, opcode);
} }
#include "z8ops.c" #include "z8ops.inc"
/*************************************************************************** /***************************************************************************
OPCODE TABLES OPCODE TABLES

0
src/emu/cpu/z8/z8ops.c → src/emu/cpu/z8/z8ops.inc
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4
src/emu/cpu/z8000/z8000.c
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@ -390,8 +390,8 @@ void z8002_device::cycles(int cycles)
m_icount -= cycles; m_icount -= cycles;
} }
#include "z8000ops.c" #include "z8000ops.inc"
#include "z8000tbl.c" #include "z8000tbl.inc"
void z8002_device::set_irq(int type) void z8002_device::set_irq(int type)
{ {

2
src/emu/cpu/z8000/z8000cpu.h
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@ -2,7 +2,7 @@
* *
* z8000cpu.h * z8000cpu.h
* Portable Z8000(2) emulator * Portable Z8000(2) emulator
* Macros and types used in z8000.c / z8000ops.c / z8000tbl.c * Macros and types used in z8000.c / z8000ops.inc / z8000tbl.inc
* *
* Copyright Juergen Buchmueller, all rights reserved. * Copyright Juergen Buchmueller, all rights reserved.
* Bug fixes and MSB_FIRST compliance Ernesto Corvi. * Bug fixes and MSB_FIRST compliance Ernesto Corvi.

2
src/emu/cpu/z8000/z8000ops.c → src/emu/cpu/z8000/z8000ops.inc
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@ -1,6 +1,6 @@
/***************************************************************************** /*****************************************************************************
* *
* z8000ops.c * z8000ops.inc
* Portable Z8000(2) emulator * Portable Z8000(2) emulator
* Opcode functions * Opcode functions
* *

2
src/emu/cpu/z8000/z8000tbl.c → src/emu/cpu/z8000/z8000tbl.inc
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@ -1,6 +1,6 @@
/***************************************************************************** /*****************************************************************************
* *
* z8000tbl.c * z8000tbl.inc
* Portable Z8000(2) emulator * Portable Z8000(2) emulator
* Opcode table (including mnemonics) and initialization * Opcode table (including mnemonics) and initialization
* *