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https://github.com/holub/mame
synced 2025-05-24 14:56:21 +03:00
Hooked up TMS34020 in Metal Maniax [Phil Bennett]
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a37b9332fa
commit
7ca8ec9cc9
@ -252,17 +252,6 @@ Logic:
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#include "includes/metalmx.h"
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#include "includes/metalmx.h"
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/*************************************
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*
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* Static globals (move to driver state!)
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*
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*************************************/
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static UINT32 *gsp_dram;
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static UINT32 *gsp_vram;
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static UINT32 *vreg_base;
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/*************************************
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/*************************************
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*
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*
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* Forward definitions
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* Forward definitions
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@ -285,22 +274,21 @@ static VIDEO_START( metalmx )
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static VIDEO_UPDATE( metalmx )
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static VIDEO_UPDATE( metalmx )
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{
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{
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UINT32 *src_base = &gsp_vram[(vreg_base[0x40/4] & 0x40) ? 0x20000 : 0];
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/* TODO: TMS34020 should take care of this */
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metalmx_state *state = (metalmx_state *)screen->machine->driver_data;
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// UINT32 *src_base = &gsp_vram[(vreg_base[0x40/4] & 0x40) ? 0x20000 : 0];
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UINT16 *src_base = state->gsp_vram;
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int y;
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int y;
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for (y = 0; y < 384; ++y)
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for (y = 0; y < 384; ++y)
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{
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{
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int x;
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int x;
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UINT32 *src = &src_base[512/2 * y];
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UINT16 *src = &src_base[512 * y];
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UINT16 *dst = BITMAP_ADDR16(bitmap, y, 0);
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UINT16 *dst = BITMAP_ADDR16(bitmap, y, 0);
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for(x = 0; x < 512; x+=2)
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for(x = 0; x < 512; x++)
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{
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*dst++ = *src++;
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UINT32 src_pix = *src++;
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*dst++ = (src_pix >> 16);
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*dst++ = (src_pix >> 0);
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}
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}
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}
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return 0;
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return 0;
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@ -417,6 +405,71 @@ static READ32_HANDLER( dsp32c_2_r )
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}
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}
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/*************************************
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*
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* Host/TMS34020 accesors
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*
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*************************************/
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static WRITE32_HANDLER( host_gsp_w )
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{
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const address_space *gsp_space = cputag_get_address_space(space->machine, "gsp", ADDRESS_SPACE_PROGRAM);
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memory_write_word(gsp_space, (0xc0000000 + (offset << 5) + 0x10) / 8, data);
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memory_write_word(gsp_space, (0xc0000000 + (offset << 5))/ 8 , data >> 16);
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}
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static READ32_HANDLER( host_gsp_r )
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{
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const address_space *gsp_space = cputag_get_address_space(space->machine, "gsp", ADDRESS_SPACE_PROGRAM);
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UINT32 val;
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val = memory_read_word(gsp_space, (0xc0000000 + (offset << 5) + 0x10) / 8);
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val |= memory_read_word(gsp_space, (0xc0000000 + (offset << 5)) / 8) << 16;
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return val;
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}
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static READ32_HANDLER( host_dram_r )
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{
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metalmx_state *state = (metalmx_state *)space->machine->driver_data;
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return (state->gsp_dram[offset * 2] << 16) | state->gsp_dram[offset * 2 + 1];
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}
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static WRITE32_HANDLER( host_dram_w )
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{
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metalmx_state *state = (metalmx_state *)space->machine->driver_data;
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COMBINE_DATA(state->gsp_dram + offset * 2 + 1);
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data >>= 16;
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mem_mask >>= 16;
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COMBINE_DATA(state->gsp_dram + offset * 2);
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}
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static READ32_HANDLER( host_vram_r )
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{
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metalmx_state *state = (metalmx_state *)space->machine->driver_data;
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return (state->gsp_vram[offset * 2] << 16) | state->gsp_vram[offset * 2 + 1];
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}
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static WRITE32_HANDLER( host_vram_w )
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{
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metalmx_state *state = (metalmx_state *)space->machine->driver_data;
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COMBINE_DATA(state->gsp_vram + offset * 2 + 1);
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data >>= 16;
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mem_mask >>= 16;
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COMBINE_DATA(state->gsp_vram + offset * 2);
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}
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static void tms_interrupt(const device_config *device, int state)
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{
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cputag_set_input_line(device->machine, "maincpu", 4, state ? HOLD_LINE : CLEAR_LINE);
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}
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/*************************************
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/*************************************
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*
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*
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* Main 68EC020 Memory Map
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* Main 68EC020 Memory Map
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@ -426,10 +479,11 @@ static READ32_HANDLER( dsp32c_2_r )
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static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32 )
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static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32 )
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AM_RANGE(0x000000, 0x1fffff) AM_ROM
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AM_RANGE(0x000000, 0x1fffff) AM_ROM
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AM_RANGE(0x200000, 0x3fffff) AM_ROM
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AM_RANGE(0x200000, 0x3fffff) AM_ROM
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AM_RANGE(0x400000, 0x4000ff) AM_RAM AM_BASE(&vreg_base)
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AM_RANGE(0x400000, 0x4000ff) AM_READWRITE(host_gsp_r, host_gsp_w)
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AM_RANGE(0x600000, 0x6fffff) AM_RAM AM_BASE(&gsp_dram)
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AM_RANGE(0x600000, 0x6fffff) AM_READWRITE(host_dram_r, host_dram_w)
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AM_RANGE(0x700000, 0x7fffff) AM_RAM AM_BASE(&gsp_vram)
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AM_RANGE(0x700000, 0x7fffff) AM_READWRITE(host_vram_r, host_vram_w)
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AM_RANGE(0x800000, 0x80001f) AM_READWRITE(dsp32c_2_r, dsp32c_2_w)
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AM_RANGE(0x800000, 0x80001f) AM_READWRITE(dsp32c_2_r, dsp32c_2_w)
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AM_RANGE(0x800000, 0x85ffff) AM_NOP /* Unknown */
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AM_RANGE(0x880000, 0x88001f) AM_READWRITE(dsp32c_1_r, dsp32c_1_w)
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AM_RANGE(0x880000, 0x88001f) AM_READWRITE(dsp32c_1_r, dsp32c_1_w)
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AM_RANGE(0x980000, 0x9800ff) AM_WRITE(reset_w)
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AM_RANGE(0x980000, 0x9800ff) AM_WRITE(reset_w)
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AM_RANGE(0xf02000, 0xf02003) AM_READWRITE(watchdog_r, shifter_w)
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AM_RANGE(0xf02000, 0xf02003) AM_READWRITE(watchdog_r, shifter_w)
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@ -463,7 +517,11 @@ ADDRESS_MAP_END
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*************************************/
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*************************************/
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static ADDRESS_MAP_START( gsp_map, ADDRESS_SPACE_PROGRAM, 16 )
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static ADDRESS_MAP_START( gsp_map, ADDRESS_SPACE_PROGRAM, 16 )
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AM_RANGE(0x88800000, 0x8880000f) AM_RAM /* ? */
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AM_RANGE(0x88c00000, 0x88c0000f) AM_RAM /* ? */
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AM_RANGE(0xc0000000, 0xc00003ff) AM_READWRITE(tms34020_io_register_r, tms34020_io_register_w)
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AM_RANGE(0xc0000000, 0xc00003ff) AM_READWRITE(tms34020_io_register_r, tms34020_io_register_w)
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AM_RANGE(0xff000000, 0xff7fffff) AM_RAM AM_BASE_MEMBER(metalmx_state, gsp_dram)
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AM_RANGE(0xff800000, 0xffffffff) AM_RAM AM_BASE_MEMBER(metalmx_state, gsp_vram)
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ADDRESS_MAP_END
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ADDRESS_MAP_END
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@ -477,7 +535,7 @@ static ADDRESS_MAP_START( dsp32c_1_map, ADDRESS_SPACE_PROGRAM, 32 )
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ADDRESS_MAP_UNMAP_HIGH
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x000000, 0x03ffff) AM_RAM
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AM_RANGE(0x000000, 0x03ffff) AM_RAM
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AM_RANGE(0x600000, 0x67ffff) AM_RAM
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AM_RANGE(0x600000, 0x67ffff) AM_RAM
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AM_RANGE(0xf00000, 0xffffff) AM_RAM /* TODO: Video registers here? */
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AM_RANGE(0xf00000, 0xffffff) AM_RAM /* TODO: 3D registers here? */
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ADDRESS_MAP_END
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ADDRESS_MAP_END
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/*************************************
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/*************************************
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@ -623,7 +681,7 @@ static const tms34010_config gsp_config =
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4000000, /* pixel clock */
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4000000, /* pixel clock */
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2, /* pixels per clock */
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2, /* pixels per clock */
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NULL, /* scanline callback */
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NULL, /* scanline callback */
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NULL, /* generate interrupt */
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tms_interrupt, /* generate interrupt */
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};
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};
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static const dsp32_config dsp32c_config =
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static const dsp32_config dsp32c_config =
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@ -697,7 +755,6 @@ static MACHINE_RESET( metalmx )
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metalmx_state *state = (metalmx_state *)machine->driver_data;
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metalmx_state *state = (metalmx_state *)machine->driver_data;
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cpu_set_input_line(state->adsp, INPUT_LINE_RESET, ASSERT_LINE);
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cpu_set_input_line(state->adsp, INPUT_LINE_RESET, ASSERT_LINE);
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cpu_set_input_line(state->gsp, INPUT_LINE_RESET, ASSERT_LINE);
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cpu_set_input_line(state->dsp32c_1, INPUT_LINE_RESET, ASSERT_LINE);
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cpu_set_input_line(state->dsp32c_1, INPUT_LINE_RESET, ASSERT_LINE);
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cpu_set_input_line(state->dsp32c_2, INPUT_LINE_RESET, ASSERT_LINE);
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cpu_set_input_line(state->dsp32c_2, INPUT_LINE_RESET, ASSERT_LINE);
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}
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}
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@ -1,9 +1,12 @@
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typedef struct _metalmx_state metalmx_state;
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typedef struct _metalmx_state metalmx_state;
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struct _metalmx_state
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struct _metalmx_state
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{
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{
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const device_config * maincpu;
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const device_config *maincpu;
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const device_config * gsp;
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const device_config *gsp;
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const device_config * adsp;
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const device_config *adsp;
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const device_config * dsp32c_1;
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const device_config *dsp32c_1;
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const device_config * dsp32c_2;
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const device_config *dsp32c_2;
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UINT16 *gsp_dram;
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UINT16 *gsp_vram;
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};
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};
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