From 7d021d4d5100e2600de1ee915dd6a0454382af6a Mon Sep 17 00:00:00 2001 From: Fabio Priuli Date: Fri, 21 Sep 2012 15:23:07 +0000 Subject: [PATCH] nes.c: modernized the driver by moving most code into the class, work by Micko. no whatsnew. --- src/mess/drivers/nes.c | 9 +- src/mess/includes/nes.h | 300 ++- src/mess/machine/nes.c | 148 +- src/mess/machine/nes_ines.c | 65 +- src/mess/machine/nes_mmc.c | 50 +- src/mess/machine/nes_mmc.h | 15 - src/mess/machine/nes_pcb.c | 4326 +++++++++++++++++------------------ 7 files changed, 2497 insertions(+), 2416 deletions(-) diff --git a/src/mess/drivers/nes.c b/src/mess/drivers/nes.c index 1995b033ab0..1dcc1174468 100644 --- a/src/mess/drivers/nes.c +++ b/src/mess/drivers/nes.c @@ -50,7 +50,7 @@ static ADDRESS_MAP_START( nes_map, AS_PROGRAM, 8, nes_state ) AM_RANGE(0x4016, 0x4016) AM_READWRITE(nes_IN0_r, nes_IN0_w) /* IN0 - input port 1 */ AM_RANGE(0x4017, 0x4017) AM_READ(nes_IN1_r) /* IN1 - input port 2 */ AM_RANGE(0x4017, 0x4017) AM_DEVWRITE_LEGACY("nessound", psg_4017_w) /* PSG second control register */ - AM_RANGE(0x4100, 0x5fff) AM_READWRITE_LEGACY(nes_low_mapper_r, nes_low_mapper_w) /* Perform unholy acts on the machine */ + AM_RANGE(0x4100, 0x5fff) AM_READWRITE(nes_low_mapper_r, nes_low_mapper_w) /* Perform unholy acts on the machine */ ADDRESS_MAP_END @@ -544,6 +544,9 @@ static MACHINE_CONFIG_DERIVED( famicom, nes ) MCFG_SOFTWARE_LIST_ADD("flop_list","famicom_flop") MACHINE_CONFIG_END +//static MACHINE_CONFIG_DERIVED( nes_test, nes ) +//MACHINE_CONFIG_END + /* rom regions are just place-holders: they get removed and re-allocated when a cart is loaded */ ROM_START( nes ) @@ -596,6 +599,8 @@ ROM_START( dendy ) ROM_REGION( 0x800, "ciram", ROMREGION_ERASE00 ) /* CI RAM */ ROM_END +//#define rom_nes_test rom_nes + /*************************************************************************** Game driver(s) @@ -610,3 +615,5 @@ CONS( 1986, famitwin, nes, 0, famicom, famicom, nes_state, famicom, "Sh CONS( 198?, m82, nes, 0, nes, nes, driver_device, 0, "Nintendo", "M82 Display Unit", GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING ) CONS( 1996, drpcjr, nes, 0, famicom, famicom, nes_state, famicom, "Bung", "Doctor PC Jr", GAME_IMPERFECT_GRAPHICS ) CONS( 1992, dendy, nes, 0, dendy, nes, driver_device, 0, "Steepler", "Dendy Classic", GAME_IMPERFECT_GRAPHICS ) + +//CONS( 1985, nes_test, 0, 0, nes_test, nes, driver_device, 0, "Nintendo", "Nintendo Entertainment System (Testdriver)", GAME_IMPERFECT_GRAPHICS ) diff --git a/src/mess/includes/nes.h b/src/mess/includes/nes.h index c143e0e3ebb..0369fdd1652 100644 --- a/src/mess/includes/nes.h +++ b/src/mess/includes/nes.h @@ -108,18 +108,12 @@ public: int m_last_frame_flip; /* misc */ - write8_space_func m_mmc_write_low; - const char *m_mmc_write_low_name; - write8_space_func m_mmc_write_mid; - const char *m_mmc_write_mid_name; - write8_space_func m_mmc_write; - const char *m_mmc_write_name; - read8_space_func m_mmc_read_low; - const char *m_mmc_read_low_name; - read8_space_func m_mmc_read_mid; - const char *m_mmc_read_mid_name; - read8_space_func m_mmc_read; - const char *m_mmc_read_name; + write8_delegate m_mmc_write_low; + write8_delegate m_mmc_write_mid; + write8_delegate m_mmc_write; + read8_delegate m_mmc_read_low; + read8_delegate m_mmc_read_mid; + read8_delegate m_mmc_read; emu_timer *m_irq_timer; nes_prg_callback m_mmc3_prg_cb; // these are used to simplify a lot emulation of some MMC3 pirate clones @@ -260,6 +254,288 @@ public: virtual void video_start(); virtual void palette_init(); UINT32 screen_update_nes(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + DECLARE_WRITE8_MEMBER(mapper6_l_w); + DECLARE_WRITE8_MEMBER(mapper6_w); + DECLARE_WRITE8_MEMBER(mapper8_w); + DECLARE_WRITE8_MEMBER(mapper17_l_w); + DECLARE_WRITE8_MEMBER(nes_chr_w); + DECLARE_READ8_MEMBER(nes_chr_r); + DECLARE_WRITE8_MEMBER(nes_nt_w); + DECLARE_READ8_MEMBER(nes_nt_r); + DECLARE_WRITE8_MEMBER(nes_low_mapper_w); + DECLARE_READ8_MEMBER(nes_low_mapper_r); + DECLARE_WRITE8_MEMBER(uxrom_w); + DECLARE_WRITE8_MEMBER(uxrom_cc_w); + DECLARE_WRITE8_MEMBER(un1rom_w); + DECLARE_WRITE8_MEMBER(cnrom_w); + DECLARE_WRITE8_MEMBER(bandai_pt554_m_w); + DECLARE_WRITE8_MEMBER(cprom_w); + DECLARE_WRITE8_MEMBER(axrom_w); + DECLARE_WRITE8_MEMBER(bxrom_w); + DECLARE_WRITE8_MEMBER(gxrom_w); + DECLARE_WRITE8_MEMBER(sxrom_w); + DECLARE_WRITE8_MEMBER(pxrom_w); + DECLARE_WRITE8_MEMBER(fxrom_w); + DECLARE_WRITE8_MEMBER(txrom_w); + DECLARE_WRITE8_MEMBER(hkrom_m_w); + DECLARE_READ8_MEMBER(hkrom_m_r); + DECLARE_WRITE8_MEMBER(hkrom_w); + DECLARE_WRITE8_MEMBER(txsrom_w); + DECLARE_WRITE8_MEMBER(tqrom_w); + DECLARE_WRITE8_MEMBER(zz_m_w); + DECLARE_WRITE8_MEMBER(qj_m_w); + DECLARE_READ8_MEMBER(exrom_l_r); + DECLARE_WRITE8_MEMBER(exrom_l_w); + DECLARE_WRITE8_MEMBER(ntbrom_w); + DECLARE_WRITE8_MEMBER(jxrom_w); + DECLARE_WRITE8_MEMBER(dxrom_w); + DECLARE_WRITE8_MEMBER(namcot3453_w); + DECLARE_WRITE8_MEMBER(namcot3446_w); + DECLARE_WRITE8_MEMBER(namcot3425_w); + DECLARE_WRITE8_MEMBER(dis_74x377_w); + DECLARE_WRITE8_MEMBER(dis_74x139x74_m_w); + DECLARE_WRITE8_MEMBER(dis_74x161x138_m_w); + DECLARE_WRITE8_MEMBER(dis_74x161x161x32_w); + DECLARE_WRITE8_MEMBER(lz93d50_w); + DECLARE_WRITE8_MEMBER(lz93d50_m_w); + DECLARE_WRITE8_MEMBER(fjump2_w); + DECLARE_WRITE8_MEMBER(bandai_ks_w); + DECLARE_WRITE8_MEMBER(bandai_ok_w); + DECLARE_WRITE8_MEMBER(lrog017_w); + DECLARE_WRITE8_MEMBER(irem_hd_w); + DECLARE_WRITE8_MEMBER(tam_s1_w); + DECLARE_WRITE8_MEMBER(g101_w); + DECLARE_WRITE8_MEMBER(h3001_w); + DECLARE_WRITE8_MEMBER(ss88006_w); + DECLARE_WRITE8_MEMBER(jf11_m_w); + DECLARE_WRITE8_MEMBER(jf13_m_w); + DECLARE_WRITE8_MEMBER(jf16_w); + DECLARE_WRITE8_MEMBER(jf17_w); + DECLARE_WRITE8_MEMBER(jf19_w); + DECLARE_WRITE8_MEMBER(konami_vrc1_w); + DECLARE_WRITE8_MEMBER(konami_vrc2_w); + DECLARE_WRITE8_MEMBER(konami_vrc3_w); + DECLARE_WRITE8_MEMBER(konami_vrc4_w); + DECLARE_WRITE8_MEMBER(konami_vrc6_w); + DECLARE_WRITE8_MEMBER(konami_vrc7_w); + DECLARE_WRITE8_MEMBER(namcot163_l_w); + DECLARE_READ8_MEMBER(namcot163_l_r); + DECLARE_WRITE8_MEMBER(namcot163_w); + DECLARE_WRITE8_MEMBER(sunsoft1_m_w); + DECLARE_WRITE8_MEMBER(sunsoft2_w); + DECLARE_WRITE8_MEMBER(sunsoft3_w); + DECLARE_WRITE8_MEMBER(tc0190fmc_w); + DECLARE_WRITE8_MEMBER(tc0190fmc_p16_w); + DECLARE_WRITE8_MEMBER(x1005_m_w); + DECLARE_READ8_MEMBER(x1005_m_r); + DECLARE_WRITE8_MEMBER(x1005a_m_w); + DECLARE_WRITE8_MEMBER(x1017_m_w); + DECLARE_READ8_MEMBER(x1017_m_r); + DECLARE_WRITE8_MEMBER(agci_50282_w); + DECLARE_WRITE8_MEMBER(nina01_m_w); + DECLARE_WRITE8_MEMBER(nina06_l_w); + DECLARE_WRITE8_MEMBER(ae_act52_w); + DECLARE_WRITE8_MEMBER(cne_decathl_w); + DECLARE_WRITE8_MEMBER(cne_fsb_m_w); + DECLARE_WRITE8_MEMBER(cne_shlz_l_w); + DECLARE_WRITE8_MEMBER(caltron6in1_m_w); + DECLARE_WRITE8_MEMBER(caltron6in1_w); + DECLARE_WRITE8_MEMBER(bf9093_w); + DECLARE_WRITE8_MEMBER(bf9096_w); + DECLARE_WRITE8_MEMBER(golden5_w); + DECLARE_WRITE8_MEMBER(cony_l_w); + DECLARE_READ8_MEMBER(cony_l_r); + DECLARE_WRITE8_MEMBER(cony_w); + DECLARE_WRITE8_MEMBER(yoko_l_w); + DECLARE_READ8_MEMBER(yoko_l_r); + DECLARE_WRITE8_MEMBER(yoko_w); + DECLARE_WRITE8_MEMBER(dreamtech_l_w); + DECLARE_WRITE8_MEMBER(fukutake_l_w); + DECLARE_READ8_MEMBER(fukutake_l_r); + DECLARE_WRITE8_MEMBER(futuremedia_w); + DECLARE_WRITE8_MEMBER(gouder_sf4_l_w); + DECLARE_READ8_MEMBER(gouder_sf4_l_r); + DECLARE_WRITE8_MEMBER(henggedianzi_w); + DECLARE_WRITE8_MEMBER(heng_xjzb_l_w); + DECLARE_WRITE8_MEMBER(heng_xjzb_w); + DECLARE_WRITE8_MEMBER(hes6in1_l_w); + DECLARE_WRITE8_MEMBER(hes_l_w); + DECLARE_WRITE8_MEMBER(hosenkan_w); + DECLARE_WRITE8_MEMBER(ks7058_w); + DECLARE_WRITE8_MEMBER(ks7022_w); + DECLARE_READ8_MEMBER(ks7022_r); + DECLARE_WRITE8_MEMBER(ks7032_w); + DECLARE_WRITE8_MEMBER(ks202_w); + DECLARE_WRITE8_MEMBER(ks7017_l_w); + DECLARE_WRITE8_MEMBER(ks7017_extra_w); + DECLARE_READ8_MEMBER(ks7017_extra_r); + DECLARE_WRITE8_MEMBER(kay_pp_l_w); + DECLARE_READ8_MEMBER(kay_pp_l_r); + DECLARE_WRITE8_MEMBER(kay_pp_w); + DECLARE_WRITE8_MEMBER(kasing_m_w); + DECLARE_WRITE8_MEMBER(magics_md_w); + DECLARE_WRITE8_MEMBER(nanjing_l_w); + DECLARE_READ8_MEMBER(nanjing_l_r); + DECLARE_WRITE8_MEMBER(nitra_w); + DECLARE_WRITE8_MEMBER(ntdec_asder_w); + DECLARE_WRITE8_MEMBER(ntdec_fh_m_w); + DECLARE_WRITE8_MEMBER(daou306_w); + DECLARE_WRITE8_MEMBER(gs2015_w); + DECLARE_WRITE8_MEMBER(rcm_tf_w); + DECLARE_WRITE8_MEMBER(rex_dbz_l_w); + DECLARE_READ8_MEMBER(rex_dbz_l_r); + DECLARE_WRITE8_MEMBER(rex_sl1632_w); + DECLARE_WRITE8_MEMBER(rumblestation_m_w); + DECLARE_WRITE8_MEMBER(rumblestation_w); + DECLARE_WRITE8_MEMBER(sachen_74x374_l_w); + DECLARE_READ8_MEMBER(sachen_74x374_l_r); + DECLARE_WRITE8_MEMBER(sachen_74x374a_l_w); + DECLARE_WRITE8_MEMBER(s8259_l_w); + DECLARE_WRITE8_MEMBER(s8259_m_w); + DECLARE_WRITE8_MEMBER(sa009_l_w); + DECLARE_WRITE8_MEMBER(sa0036_w); + DECLARE_WRITE8_MEMBER(sa0037_w); + DECLARE_WRITE8_MEMBER(sa72007_l_w); + DECLARE_WRITE8_MEMBER(sa72008_l_w); + DECLARE_READ8_MEMBER(tca01_l_r); + DECLARE_WRITE8_MEMBER(tcu01_l_w); + DECLARE_WRITE8_MEMBER(tcu01_m_w); + DECLARE_WRITE8_MEMBER(tcu01_w); + DECLARE_WRITE8_MEMBER(tcu02_l_w); + DECLARE_READ8_MEMBER(tcu02_l_r); + DECLARE_WRITE8_MEMBER(subor0_w); + DECLARE_WRITE8_MEMBER(subor1_w); + DECLARE_WRITE8_MEMBER(sgame_boog_l_w); + DECLARE_WRITE8_MEMBER(sgame_boog_m_w); + DECLARE_WRITE8_MEMBER(sgame_boog_w); + DECLARE_WRITE8_MEMBER(sgame_lion_m_w); + DECLARE_WRITE8_MEMBER(sgame_lion_w); + DECLARE_WRITE8_MEMBER(tengen_800008_w); + DECLARE_WRITE8_MEMBER(tengen_800032_w); + DECLARE_WRITE8_MEMBER(tengen_800037_w); + DECLARE_WRITE8_MEMBER(txc_22211_l_w); + DECLARE_READ8_MEMBER(txc_22211_l_r); + DECLARE_WRITE8_MEMBER(txc_22211_w); + DECLARE_WRITE8_MEMBER(txc_22211b_w); + DECLARE_READ8_MEMBER(txc_22211c_l_r); + DECLARE_WRITE8_MEMBER(txc_tw_l_w); + DECLARE_WRITE8_MEMBER(txc_tw_m_w); + DECLARE_WRITE8_MEMBER(txc_strikewolf_w); + DECLARE_READ8_MEMBER(txc_mxmdhtwo_l_r); + DECLARE_WRITE8_MEMBER(txc_mxmdhtwo_w); + DECLARE_WRITE8_MEMBER(waixing_a_w); + DECLARE_WRITE8_MEMBER(waixing_f_w); + DECLARE_WRITE8_MEMBER(waixing_g_w); + DECLARE_WRITE8_MEMBER(waixing_h_w); + DECLARE_WRITE8_MEMBER(waixing_sgz_w); + DECLARE_WRITE8_MEMBER(waixing_sgzlz_l_w); + DECLARE_WRITE8_MEMBER(waixing_ffv_l_w); + DECLARE_WRITE8_MEMBER(waixing_zs_w); + DECLARE_WRITE8_MEMBER(waixing_dq8_w); + DECLARE_WRITE8_MEMBER(waixing_ps2_w); + DECLARE_WRITE8_MEMBER(waixing_sec_l_w); + DECLARE_READ8_MEMBER(waixing_sh2_chr_r); + DECLARE_WRITE8_MEMBER(unl_8237_l_w); + DECLARE_WRITE8_MEMBER(unl_8237_w); + DECLARE_WRITE8_MEMBER(unl_ax5705_w); + DECLARE_WRITE8_MEMBER(unl_cc21_w); + DECLARE_WRITE8_MEMBER(unl_kof97_w); + DECLARE_WRITE8_MEMBER(ks7057_w); + DECLARE_WRITE8_MEMBER(unl_t230_w); + DECLARE_WRITE8_MEMBER(kof96_l_w); + DECLARE_READ8_MEMBER(kof96_l_r); + DECLARE_WRITE8_MEMBER(kof96_w); + DECLARE_WRITE8_MEMBER(mk2_m_w); + DECLARE_WRITE8_MEMBER(n625092_w); + DECLARE_WRITE8_MEMBER(sc127_w); + DECLARE_WRITE8_MEMBER(smb2j_w); + DECLARE_WRITE8_MEMBER(smb2jb_l_w); + DECLARE_WRITE8_MEMBER(smb2jb_extra_w); + DECLARE_WRITE8_MEMBER(unl_sf3_w); + DECLARE_WRITE8_MEMBER(unl_xzy_l_w); + DECLARE_WRITE8_MEMBER(unl_racmate_w); + DECLARE_WRITE8_MEMBER(unl_fs304_l_w); + DECLARE_WRITE8_MEMBER(btl_smb11_w); + DECLARE_WRITE8_MEMBER(btl_mariobaby_w); + DECLARE_WRITE8_MEMBER(btl_smb2a_w); + DECLARE_WRITE8_MEMBER(whirl2706_w); + DECLARE_WRITE8_MEMBER(btl_tobi_l_w); + DECLARE_WRITE8_MEMBER(btl_smb3_w); + DECLARE_WRITE8_MEMBER(btl_dn_w); + DECLARE_WRITE8_MEMBER(btl_pika_y2k_w); + DECLARE_WRITE8_MEMBER(btl_pika_y2k_m_w); + DECLARE_READ8_MEMBER(btl_pika_y2k_m_r); + DECLARE_WRITE8_MEMBER(fk23c_l_w); + DECLARE_WRITE8_MEMBER(fk23c_w); + DECLARE_WRITE8_MEMBER(bmc_64in1nr_l_w); + DECLARE_WRITE8_MEMBER(bmc_64in1nr_w); + DECLARE_WRITE8_MEMBER(bmc_190in1_w); + DECLARE_WRITE8_MEMBER(bmc_a65as_w); + DECLARE_WRITE8_MEMBER(bmc_gs2004_w); + DECLARE_WRITE8_MEMBER(bmc_gs2013_w); + DECLARE_WRITE8_MEMBER(bmc_s24in1sc03_l_w); + DECLARE_WRITE8_MEMBER(bmc_t262_w); + DECLARE_WRITE8_MEMBER(bmc_ws_m_w); + DECLARE_WRITE8_MEMBER(novel1_w); + DECLARE_WRITE8_MEMBER(novel2_w); + DECLARE_WRITE8_MEMBER(bmc_gka_w); + DECLARE_WRITE8_MEMBER(sng32_w); + DECLARE_WRITE8_MEMBER(bmc_gkb_w); + DECLARE_WRITE8_MEMBER(bmc_super700in1_w); + DECLARE_WRITE8_MEMBER(bmc_36in1_w); + DECLARE_WRITE8_MEMBER(bmc_21in1_w); + DECLARE_WRITE8_MEMBER(bmc_150in1_w); + DECLARE_WRITE8_MEMBER(bmc_35in1_w); + DECLARE_WRITE8_MEMBER(bmc_64in1_w); + DECLARE_WRITE8_MEMBER(bmc_15in1_m_w); + DECLARE_WRITE8_MEMBER(bmc_hik300_w); + DECLARE_WRITE8_MEMBER(supergun20in1_w); + DECLARE_WRITE8_MEMBER(bmc_72in1_w); + DECLARE_WRITE8_MEMBER(bmc_76in1_w); + DECLARE_WRITE8_MEMBER(bmc_1200in1_w); + DECLARE_WRITE8_MEMBER(bmc_31in1_w); + DECLARE_WRITE8_MEMBER(bmc_22g_w); + DECLARE_WRITE8_MEMBER(bmc_20in1_w); + DECLARE_WRITE8_MEMBER(bmc_110in1_w); + DECLARE_WRITE8_MEMBER(bmc_sbig7_w); + DECLARE_WRITE8_MEMBER(bmc_hik8_m_w); + DECLARE_WRITE8_MEMBER(bmc_hik4in1_m_w); + DECLARE_WRITE8_MEMBER(bmc_ball11_m_w); + DECLARE_WRITE8_MEMBER(bmc_ball11_w); + DECLARE_WRITE8_MEMBER(bmc_mario7in1_m_w); + DECLARE_WRITE8_MEMBER(bmc_gold7in1_m_w); + DECLARE_WRITE8_MEMBER(bmc_gc6in1_l_w); + DECLARE_WRITE8_MEMBER(bmc_gc6in1_w); + DECLARE_WRITE8_MEMBER(bmc_family4646_m_w); + DECLARE_WRITE8_MEMBER(bmc_vt5201_w); + DECLARE_READ8_MEMBER(bmc_vt5201_r); + DECLARE_WRITE8_MEMBER(bmc_bs5_w); + DECLARE_WRITE8_MEMBER(bmc_810544_w); + DECLARE_WRITE8_MEMBER(bmc_ntd03_w); + DECLARE_WRITE8_MEMBER(bmc_gb63_w); + DECLARE_READ8_MEMBER(bmc_gb63_r); + DECLARE_WRITE8_MEMBER(edu2k_w); + DECLARE_WRITE8_MEMBER(h2288_l_w); + DECLARE_READ8_MEMBER(h2288_l_r); + DECLARE_WRITE8_MEMBER(h2288_w); + DECLARE_WRITE8_MEMBER(shjy3_w); + DECLARE_WRITE8_MEMBER(unl_6035052_extra_w); + DECLARE_READ8_MEMBER(unl_6035052_extra_r); + DECLARE_WRITE8_MEMBER(pjoy84_m_w); + DECLARE_WRITE8_MEMBER(someri_mmc1_w); + DECLARE_WRITE8_MEMBER(someri_mmc3_w); + DECLARE_WRITE8_MEMBER(someri_vrc2_w); + DECLARE_WRITE8_MEMBER(someri_w); + DECLARE_WRITE8_MEMBER(someri_l_w); + DECLARE_WRITE8_MEMBER(fujiya_m_w); + DECLARE_READ8_MEMBER(fujiya_m_r); + DECLARE_WRITE8_MEMBER(dummy_l_w); + DECLARE_WRITE8_MEMBER(dummy_m_w); + DECLARE_WRITE8_MEMBER(dummy_w); + DECLARE_READ8_MEMBER(dummy_l_r); + DECLARE_READ8_MEMBER(dummy_m_r); + DECLARE_READ8_MEMBER(dummy_r); + void init_nes_core(); }; /*----------- defined in machine/nes.c -----------*/ diff --git a/src/mess/machine/nes.c b/src/mess/machine/nes.c index 2b305d71f95..1033e988d55 100644 --- a/src/mess/machine/nes.c +++ b/src/mess/machine/nes.c @@ -23,7 +23,6 @@ FUNCTION PROTOTYPES ***************************************************************************/ -static void init_nes_core(running_machine &machine); static void nes_machine_stop(running_machine &machine); @@ -33,55 +32,54 @@ static void fds_irq(device_t *device, int scanline, int vblank, int blanked); FUNCTIONS ***************************************************************************/ -static void init_nes_core( running_machine &machine ) +void nes_state::init_nes_core() { - nes_state *state = machine.driver_data(); - address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM); + address_space &space = machine().device("maincpu")->memory().space(AS_PROGRAM); static const char *const bank_names[] = { "bank1", "bank2", "bank3", "bank4" }; - int prg_banks = (state->m_prg_chunks == 1) ? (2 * 2) : (state->m_prg_chunks * 2); + int prg_banks = (m_prg_chunks == 1) ? (2 * 2) : (m_prg_chunks * 2); int i; - state->m_rom = machine.root_device().memregion("maincpu")->base(); - state->m_ciram = machine.root_device().memregion("ciram")->base(); + m_rom = machine().root_device().memregion("maincpu")->base(); + m_ciram = machine().root_device().memregion("ciram")->base(); // other pointers got set in the loading routine /* Brutal hack put in as a consequence of the new memory system; we really need to fix the NES code */ space.install_readwrite_bank(0x0000, 0x07ff, 0, 0x1800, "bank10"); - machine.device("ppu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0, 0x1fff, FUNC(nes_chr_r), FUNC(nes_chr_w)); - machine.device("ppu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x2000, 0x3eff, FUNC(nes_nt_r), FUNC(nes_nt_w)); + machine().device("ppu")->memory().space(AS_PROGRAM).install_readwrite_handler(0, 0x1fff, read8_delegate(FUNC(nes_state::nes_chr_r),this), write8_delegate(FUNC(nes_state::nes_chr_w),this)); + machine().device("ppu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x2000, 0x3eff, read8_delegate(FUNC(nes_state::nes_nt_r),this), write8_delegate(FUNC(nes_state::nes_nt_w),this)); - state->membank("bank10")->set_base(state->m_rom); + membank("bank10")->set_base(m_rom); /* If there is Disk Expansion and no cart has been loaded, setup memory accordingly */ - if (state->m_disk_expansion && state->m_pcb_id == NO_BOARD) + if (m_disk_expansion && m_pcb_id == NO_BOARD) { - /* If we are loading a disk we have already filled state->m_fds_data and we don't want to overwrite it, + /* If we are loading a disk we have already filled m_fds_data and we don't want to overwrite it, if we are loading a cart image identified as mapper 20 (probably wrong mapper...) we need to alloc memory for use in nes_fds_r/nes_fds_w. Same goes for allocation of fds_ram (used for bank2) */ - if (state->m_fds_data == NULL) + if (m_fds_data == NULL) { - UINT32 size = (state->m_prg_chunks == 1) ? 2 * 0x4000 : state->m_prg_chunks * 0x4000; - state->m_fds_data = auto_alloc_array_clear(machine, UINT8, size); - memcpy(state->m_fds_data, state->m_prg, size); // copy in fds_data the cart PRG + UINT32 size = (m_prg_chunks == 1) ? 2 * 0x4000 : m_prg_chunks * 0x4000; + m_fds_data = auto_alloc_array_clear(machine(), UINT8, size); + memcpy(m_fds_data, m_prg, size); // copy in fds_data the cart PRG } - if (state->m_fds_ram == NULL) - state->m_fds_ram = auto_alloc_array(machine, UINT8, 0x8000); + if (m_fds_ram == NULL) + m_fds_ram = auto_alloc_array(machine(), UINT8, 0x8000); - space.install_read_handler(0x4030, 0x403f, read8_delegate(FUNC(nes_state::nes_fds_r),state)); + space.install_read_handler(0x4030, 0x403f, read8_delegate(FUNC(nes_state::nes_fds_r),this)); space.install_read_bank(0x6000, 0xdfff, "bank2"); space.install_read_bank(0xe000, 0xffff, "bank1"); - space.install_write_handler(0x4020, 0x402f, write8_delegate(FUNC(nes_state::nes_fds_w),state)); + space.install_write_handler(0x4020, 0x402f, write8_delegate(FUNC(nes_state::nes_fds_w),this)); space.install_write_bank(0x6000, 0xdfff, "bank2"); - state->membank("bank1")->set_base(&state->m_rom[0xe000]); - state->membank("bank2")->set_base(state->m_fds_ram); + membank("bank1")->set_base(&m_rom[0xe000]); + membank("bank2")->set_base(m_fds_ram); return; } /* Set up the mapper callbacks */ - pcb_handlers_setup(machine); + pcb_handlers_setup(machine()); /* Set up the memory handlers for the mapper */ space.install_read_bank(0x8000, 0x9fff, "bank1"); @@ -93,107 +91,107 @@ static void init_nes_core( running_machine &machine ) /* configure banks 1-4 */ for (i = 0; i < 4; i++) { - state->membank(bank_names[i])->configure_entries(0, prg_banks, state->m_prg, 0x2000); + membank(bank_names[i])->configure_entries(0, prg_banks, m_prg, 0x2000); // some mappers (e.g. MMC5) can map PRG RAM in 0x8000-0xffff as well - if (state->m_prg_ram) - state->membank(bank_names[i])->configure_entries(prg_banks, state->m_wram_size / 0x2000, state->m_wram, 0x2000); + if (m_prg_ram) + membank(bank_names[i])->configure_entries(prg_banks, m_wram_size / 0x2000, m_wram, 0x2000); // however, at start we point to PRG ROM - state->membank(bank_names[i])->set_entry(i); - state->m_prg_bank[i] = i; + membank(bank_names[i])->set_entry(i); + m_prg_bank[i] = i; } /* bank 5 configuration is more delicate, since it can have PRG RAM, PRG ROM or SRAM mapped to it */ - /* we first map PRG ROM banks, then the battery bank (if a battery is present), and finally PRG RAM (state->m_wram) */ - state->membank("bank5")->configure_entries(0, prg_banks, state->m_prg, 0x2000); - state->m_battery_bank5_start = prg_banks; - state->m_prgram_bank5_start = prg_banks; - state->m_empty_bank5_start = prg_banks; + /* we first map PRG ROM banks, then the battery bank (if a battery is present), and finally PRG RAM (m_wram) */ + membank("bank5")->configure_entries(0, prg_banks, m_prg, 0x2000); + m_battery_bank5_start = prg_banks; + m_prgram_bank5_start = prg_banks; + m_empty_bank5_start = prg_banks; /* add battery ram, but only if there's no trainer since they share overlapping memory. */ - if (state->m_battery && !state->m_trainer) + if (m_battery && !m_trainer) { - UINT32 bank_size = (state->m_battery_size > 0x2000) ? 0x2000 : state->m_battery_size; - int bank_num = (state->m_battery_size > 0x2000) ? state->m_battery_size / 0x2000 : 1; - state->membank("bank5")->configure_entries(prg_banks, bank_num, state->m_battery_ram, bank_size); - state->m_prgram_bank5_start += bank_num; - state->m_empty_bank5_start += bank_num; + UINT32 bank_size = (m_battery_size > 0x2000) ? 0x2000 : m_battery_size; + int bank_num = (m_battery_size > 0x2000) ? m_battery_size / 0x2000 : 1; + membank("bank5")->configure_entries(prg_banks, bank_num, m_battery_ram, bank_size); + m_prgram_bank5_start += bank_num; + m_empty_bank5_start += bank_num; } /* add prg ram. */ - if (state->m_prg_ram) + if (m_prg_ram) { - state->membank("bank5")->configure_entries(state->m_prgram_bank5_start, state->m_wram_size / 0x2000, state->m_wram, 0x2000); - state->m_empty_bank5_start += state->m_wram_size / 0x2000; + membank("bank5")->configure_entries(m_prgram_bank5_start, m_wram_size / 0x2000, m_wram, 0x2000); + m_empty_bank5_start += m_wram_size / 0x2000; } - state->membank("bank5")->configure_entry(state->m_empty_bank5_start, state->m_rom + 0x6000); + membank("bank5")->configure_entry(m_empty_bank5_start, m_rom + 0x6000); /* if we have any additional PRG RAM, point bank5 to its first bank */ - if (state->m_battery || state->m_prg_ram) - state->m_prg_bank[4] = state->m_battery_bank5_start; + if (m_battery || m_prg_ram) + m_prg_bank[4] = m_battery_bank5_start; else - state->m_prg_bank[4] = state->m_empty_bank5_start; // or shall we point to "maincpu" region at 0x6000? point is that we should never access this region if no sram or wram is present! + m_prg_bank[4] = m_empty_bank5_start; // or shall we point to "maincpu" region at 0x6000? point is that we should never access this region if no sram or wram is present! - state->membank("bank5")->set_entry(state->m_prg_bank[4]); + membank("bank5")->set_entry(m_prg_bank[4]); - if (state->m_four_screen_vram) + if (m_four_screen_vram) { - state->m_extended_ntram = auto_alloc_array_clear(machine, UINT8, 0x2000); - state->save_pointer(NAME(state->m_extended_ntram), 0x2000); + m_extended_ntram = auto_alloc_array_clear(machine(), UINT8, 0x2000); + save_pointer(NAME(m_extended_ntram), 0x2000); } - if (state->m_four_screen_vram) - set_nt_mirroring(machine, PPU_MIRROR_4SCREEN); + if (m_four_screen_vram) + set_nt_mirroring(machine(), PPU_MIRROR_4SCREEN); else { - switch (state->m_hard_mirroring) + switch (m_hard_mirroring) { case PPU_MIRROR_HORZ: case PPU_MIRROR_VERT: case PPU_MIRROR_HIGH: case PPU_MIRROR_LOW: - set_nt_mirroring(machine, state->m_hard_mirroring); + set_nt_mirroring(machine(), m_hard_mirroring); break; default: - set_nt_mirroring(machine, PPU_MIRROR_NONE); + set_nt_mirroring(machine(), PPU_MIRROR_NONE); break; } } // there are still some quirk about writes to bank5... I hope to fix them soon. (mappers 34,45,52,246 have both mid_w and WRAM-->check) - if (state->m_mmc_write_mid) - space.install_legacy_write_handler(0x6000, 0x7fff, state->m_mmc_write_mid,state->m_mmc_write_mid_name); - if (state->m_mmc_write) - space.install_legacy_write_handler(0x8000, 0xffff, state->m_mmc_write, state->m_mmc_write_name); + if (!m_mmc_write_mid.isnull()) + space.install_write_handler(0x6000, 0x7fff, m_mmc_write_mid); + if (!m_mmc_write.isnull()) + space.install_write_handler(0x8000, 0xffff, m_mmc_write); // In fact, we also allow single pcbs to overwrite the bank read handlers defined above, // because some pcbs (mainly pirate ones) require protection values to be read instead of // the expected ROM banks: these handlers, though, must take care of the ROM access as well - if (state->m_mmc_read_mid) - space.install_legacy_read_handler(0x6000, 0x7fff, state->m_mmc_read_mid,state->m_mmc_read_mid_name); - if (state->m_mmc_read) - space.install_legacy_read_handler(0x8000, 0xffff, state->m_mmc_read,state->m_mmc_read_name); + if (!m_mmc_read_mid.isnull()) + space.install_read_handler(0x6000, 0x7fff, m_mmc_read_mid); + if (!m_mmc_read.isnull()) + space.install_read_handler(0x8000, 0xffff, m_mmc_read); // install additional handlers - if (state->m_pcb_id == BTL_SMB2B || state->m_mapper == 50) + if (m_pcb_id == BTL_SMB2B || m_mapper == 50) { - space.install_legacy_write_handler(0x4020, 0x403f, FUNC(smb2jb_extra_w)); - space.install_legacy_write_handler(0x40a0, 0x40bf, FUNC(smb2jb_extra_w)); + space.install_write_handler(0x4020, 0x403f, write8_delegate(FUNC(nes_state::smb2jb_extra_w),this)); + space.install_write_handler(0x40a0, 0x40bf, write8_delegate(FUNC(nes_state::smb2jb_extra_w),this)); } - if (state->m_pcb_id == KAISER_KS7017) + if (m_pcb_id == KAISER_KS7017) { - space.install_legacy_read_handler(0x4030, 0x4030, FUNC(ks7017_extra_r)); - space.install_legacy_write_handler(0x4020, 0x40ff, FUNC(ks7017_extra_w)); + space.install_read_handler(0x4030, 0x4030, read8_delegate(FUNC(nes_state::ks7017_extra_r),this)); + space.install_write_handler(0x4020, 0x40ff, write8_delegate(FUNC(nes_state::ks7017_extra_w),this)); } - if (state->m_pcb_id == UNL_603_5052) + if (m_pcb_id == UNL_603_5052) { - space.install_legacy_read_handler(0x4020, 0x40ff, FUNC(unl_6035052_extra_r)); - space.install_legacy_write_handler(0x4020, 0x40ff, FUNC(unl_6035052_extra_w)); + space.install_read_handler(0x4020, 0x40ff, read8_delegate(FUNC(nes_state::unl_6035052_extra_r),this)); + space.install_write_handler(0x4020, 0x40ff, write8_delegate(FUNC(nes_state::unl_6035052_extra_w),this)); } - if (state->m_pcb_id == WAIXING_SH2) - machine.device("ppu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0, 0x1fff, FUNC(waixing_sh2_chr_r)); + if (m_pcb_id == WAIXING_SH2) + machine().device("ppu")->memory().space(AS_PROGRAM).install_read_handler(0, 0x1fff, read8_delegate(FUNC(nes_state::waixing_sh2_chr_r),this)); } // to be probably removed (it does nothing since a long time) @@ -291,7 +289,7 @@ void nes_state::machine_start() { m_ppu = machine().device("ppu"); - init_nes_core(machine()); + init_nes_core(); machine().add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(FUNC(nes_machine_stop),&machine())); m_maincpu = machine().device("maincpu"); diff --git a/src/mess/machine/nes_ines.c b/src/mess/machine/nes_ines.c index e791df460c7..4da1b89a11a 100644 --- a/src/mess/machine/nes_ines.c +++ b/src/mess/machine/nes_ines.c @@ -45,49 +45,47 @@ static void ffe_irq( device_t *device, int scanline, int vblank, int blanked ) } } -static WRITE8_HANDLER( mapper6_l_w ) +WRITE8_MEMBER(nes_state::mapper6_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("mapper6_l_w, offset: %04x, data: %02x\n", offset, data)); switch (offset) { case 0x1fe: - state->m_mmc_latch1 = data & 0x80; - set_nt_mirroring(space.machine(), BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); + m_mmc_latch1 = data & 0x80; + set_nt_mirroring(machine(), BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); break; case 0x1ff: - set_nt_mirroring(space.machine(), BIT(data, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; case 0x401: - state->m_IRQ_enable = data & 0x01; + m_IRQ_enable = data & 0x01; break; case 0x402: - state->m_IRQ_count = (state->m_IRQ_count & 0xff00) | data; + m_IRQ_count = (m_IRQ_count & 0xff00) | data; break; case 0x403: - state->m_IRQ_enable = 1; - state->m_IRQ_count = (state->m_IRQ_count & 0x00ff) | (data << 8); + m_IRQ_enable = 1; + m_IRQ_count = (m_IRQ_count & 0x00ff) | (data << 8); break; } } -static WRITE8_HANDLER( mapper6_w ) +WRITE8_MEMBER(nes_state::mapper6_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("mapper6_w, offset: %04x, data: %02x\n", offset, data)); - if (!state->m_mmc_latch1) // when in "FFE mode" we are forced to use CHRRAM/EXRAM bank? + if (!m_mmc_latch1) // when in "FFE mode" we are forced to use CHRRAM/EXRAM bank? { - prg16_89ab(space.machine(), data >> 2); - // chr8(space.machine(), data & 0x03, ???); + prg16_89ab(machine(), data >> 2); + // chr8(machine(), data & 0x03, ???); // due to lack of info on the exact behavior, we simply act as if mmc_latch1=1 - if (state->m_mmc_chr_source == CHRROM) - chr8(space.machine(), data & 0x03, CHRROM); + if (m_mmc_chr_source == CHRROM) + chr8(machine(), data & 0x03, CHRROM); } - else if (state->m_mmc_chr_source == CHRROM) // otherwise, we can use CHRROM (when present) - chr8(space.machine(), data, CHRROM); + else if (m_mmc_chr_source == CHRROM) // otherwise, we can use CHRROM (when present) + chr8(machine(), data, CHRROM); } /************************************************************* @@ -101,12 +99,12 @@ static WRITE8_HANDLER( mapper6_w ) *************************************************************/ -static WRITE8_HANDLER( mapper8_w ) +WRITE8_MEMBER(nes_state::mapper8_w) { LOG_MMC(("mapper8_w, offset: %04x, data: %02x\n", offset, data)); - chr8(space.machine(), data & 0x07, CHRROM); - prg16_89ab(space.machine(), data >> 3); + chr8(machine(), data & 0x07, CHRROM); + prg16_89ab(machine(), data >> 3); } /************************************************************* @@ -121,42 +119,41 @@ static WRITE8_HANDLER( mapper8_w ) *************************************************************/ -static WRITE8_HANDLER( mapper17_l_w ) +WRITE8_MEMBER(nes_state::mapper17_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("mapper17_l_w, offset: %04x, data: %02x\n", offset, data)); switch (offset) { case 0x1fe: - set_nt_mirroring(space.machine(), BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); + set_nt_mirroring(machine(), BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); break; case 0x1ff: - set_nt_mirroring(space.machine(), BIT(data, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; case 0x401: - state->m_IRQ_enable = data & 0x01; + m_IRQ_enable = data & 0x01; break; case 0x402: - state->m_IRQ_count = (state->m_IRQ_count & 0xff00) | data; + m_IRQ_count = (m_IRQ_count & 0xff00) | data; break; case 0x403: - state->m_IRQ_enable = 1; - state->m_IRQ_count = (state->m_IRQ_count & 0x00ff) | (data << 8); + m_IRQ_enable = 1; + m_IRQ_count = (m_IRQ_count & 0x00ff) | (data << 8); break; case 0x404: - prg8_89(space.machine(), data); + prg8_89(machine(), data); break; case 0x405: - prg8_ab(space.machine(), data); + prg8_ab(machine(), data); break; case 0x406: - prg8_cd(space.machine(), data); + prg8_cd(machine(), data); break; case 0x407: - prg8_ef(space.machine(), data); + prg8_ef(machine(), data); break; case 0x410: @@ -167,7 +164,7 @@ static WRITE8_HANDLER( mapper17_l_w ) case 0x415: case 0x416: case 0x417: - chr1_x(space.machine(), offset & 7, data, CHRROM); + chr1_x(machine(), offset & 7, data, CHRROM); break; } } diff --git a/src/mess/machine/nes_mmc.c b/src/mess/machine/nes_mmc.c index 5e4bc2f436e..f74420b3b71 100644 --- a/src/mess/machine/nes_mmc.c +++ b/src/mess/machine/nes_mmc.c @@ -137,10 +137,6 @@ #define LOG_FDS(x) do { if (VERBOSE) logerror x; } while (0) static void ffe_irq( device_t *device, int scanline, int vblank, int blanked ); -static DECLARE_WRITE8_HANDLER( mapper6_l_w ); -static DECLARE_WRITE8_HANDLER( mapper6_w ); -static DECLARE_WRITE8_HANDLER( mapper8_w ); -static DECLARE_WRITE8_HANDLER( mapper17_l_w ); /************************************************************* @@ -165,74 +161,68 @@ static DECLARE_WRITE8_HANDLER( mapper17_l_w ); *************************************************************/ -WRITE8_HANDLER( nes_chr_w ) +WRITE8_MEMBER(nes_state::nes_chr_w) { - nes_state *state = space.machine().driver_data(); int bank = offset >> 10; - if (state->m_chr_map[bank].source == CHRRAM) + if (m_chr_map[bank].source == CHRRAM) { - state->m_chr_map[bank].access[offset & 0x3ff] = data; + m_chr_map[bank].access[offset & 0x3ff] = data; } } -READ8_HANDLER( nes_chr_r ) +READ8_MEMBER(nes_state::nes_chr_r) { - nes_state *state = space.machine().driver_data(); int bank = offset >> 10; // a few CNROM boards contained copy protection schemes through // suitably configured diodes, so that subsequent CHR reads can // give actual VROM content or open bus values. // For most boards, chr_open_bus remains always zero. - if (state->m_chr_open_bus) + if (m_chr_open_bus) return 0xff; - return state->m_chr_map[bank].access[offset & 0x3ff]; + return m_chr_map[bank].access[offset & 0x3ff]; } -WRITE8_HANDLER( nes_nt_w ) +WRITE8_MEMBER(nes_state::nes_nt_w) { - nes_state *state = space.machine().driver_data(); int page = ((offset & 0xc00) >> 10); - if (state->m_nt_page[page].writable == 0) + if (m_nt_page[page].writable == 0) return; - state->m_nt_page[page].access[offset & 0x3ff] = data; + m_nt_page[page].access[offset & 0x3ff] = data; } -READ8_HANDLER( nes_nt_r ) +READ8_MEMBER(nes_state::nes_nt_r) { - nes_state *state = space.machine().driver_data(); int page = ((offset & 0xc00) >> 10); - if (state->m_nt_page[page].source == MMC5FILL) + if (m_nt_page[page].source == MMC5FILL) { if ((offset & 0x3ff) >= 0x3c0) - return state->m_MMC5_floodattr; + return m_MMC5_floodattr; - return state->m_MMC5_floodtile; + return m_MMC5_floodtile; } - return state->m_nt_page[page].access[offset & 0x3ff]; + return m_nt_page[page].access[offset & 0x3ff]; } -WRITE8_HANDLER( nes_low_mapper_w ) +WRITE8_MEMBER(nes_state::nes_low_mapper_w) { - nes_state *state = space.machine().driver_data(); - if (state->m_mmc_write_low) - (*state->m_mmc_write_low)(space, offset, data, mem_mask); + if (!m_mmc_write_low.isnull()) + (m_mmc_write_low)(space, offset, data, mem_mask); else logerror("Unimplemented LOW mapper write, offset: %04x, data: %02x\n", offset + 0x4100, data); } -READ8_HANDLER( nes_low_mapper_r ) +READ8_MEMBER(nes_state::nes_low_mapper_r) { - nes_state *state = space.machine().driver_data(); - if (state->m_mmc_read_low) - return (*state->m_mmc_read_low)(space, offset, mem_mask); + if (!m_mmc_read_low.isnull()) + return (m_mmc_read_low)(space, offset, mem_mask); else logerror("Unimplemented LOW mapper read, offset: %04x\n", offset + 0x4100); diff --git a/src/mess/machine/nes_mmc.h b/src/mess/machine/nes_mmc.h index 680693594c1..ad0c0c43634 100644 --- a/src/mess/machine/nes_mmc.h +++ b/src/mess/machine/nes_mmc.h @@ -116,21 +116,6 @@ int nes_get_mmc_id(running_machine &machine, int mapper); // for iNES files void pcb_handlers_setup(running_machine &machine); int nes_pcb_reset(running_machine &machine); - -DECLARE_WRITE8_HANDLER( nes_low_mapper_w ); -DECLARE_READ8_HANDLER( nes_low_mapper_r ); -DECLARE_WRITE8_HANDLER( nes_chr_w ); -DECLARE_READ8_HANDLER( nes_chr_r ); -DECLARE_WRITE8_HANDLER( nes_nt_w ); -DECLARE_READ8_HANDLER( nes_nt_r ); - -DECLARE_WRITE8_HANDLER( smb2jb_extra_w ); -DECLARE_WRITE8_HANDLER( ks7017_extra_w ); -DECLARE_READ8_HANDLER( ks7017_extra_r ); -DECLARE_WRITE8_HANDLER( unl_6035052_extra_w ); -DECLARE_READ8_HANDLER( unl_6035052_extra_r ); -DECLARE_READ8_HANDLER( waixing_sh2_chr_r ); - //TEMPORARY PPU STUFF /* mirroring types */ diff --git a/src/mess/machine/nes_pcb.c b/src/mess/machine/nes_pcb.c index bb2ee8136be..4e587a5ab98 100644 --- a/src/mess/machine/nes_pcb.c +++ b/src/mess/machine/nes_pcb.c @@ -714,11 +714,11 @@ INLINE UINT8 mmc_hi_access_rom( running_machine &machine, UINT32 offset ) *************************************************************/ -static WRITE8_HANDLER( uxrom_w ) +WRITE8_MEMBER(nes_state::uxrom_w) { LOG_MMC(("uxrom_w, offset: %04x, data: %02x\n", offset, data)); - prg16_89ab(space.machine(), data); + prg16_89ab(machine(), data); } /************************************************************* @@ -737,11 +737,11 @@ static WRITE8_HANDLER( uxrom_w ) *************************************************************/ -static WRITE8_HANDLER( uxrom_cc_w ) +WRITE8_MEMBER(nes_state::uxrom_cc_w) { LOG_MMC(("uxrom_cc_w, offset: %04x, data: %02x\n", offset, data)); - prg16_cdef(space.machine(), data); + prg16_cdef(machine(), data); } /************************************************************* @@ -760,11 +760,11 @@ static WRITE8_HANDLER( uxrom_cc_w ) *************************************************************/ -static WRITE8_HANDLER( un1rom_w ) +WRITE8_MEMBER(nes_state::un1rom_w) { LOG_MMC(("un1rom_w, offset: %04x, data: %02x\n", offset, data)); - prg16_89ab(space.machine(), data >> 2); + prg16_89ab(machine(), data >> 2); } /************************************************************* @@ -791,22 +791,21 @@ static WRITE8_HANDLER( un1rom_w ) *************************************************************/ -static WRITE8_HANDLER( cnrom_w ) +WRITE8_MEMBER(nes_state::cnrom_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("cnrom_w, offset: %04x, data: %02x\n", offset, data)); - if (state->m_ce_mask) + if (m_ce_mask) { - chr8(space.machine(), data & ~state->m_ce_mask, CHRROM); + chr8(machine(), data & ~m_ce_mask, CHRROM); - if ((data & state->m_ce_mask) == state->m_ce_state) - state->m_chr_open_bus = 0; + if ((data & m_ce_mask) == m_ce_state) + m_chr_open_bus = 0; else - state->m_chr_open_bus = 1; + m_chr_open_bus = 1; } else - chr8(space.machine(), data, CHRROM); + chr8(machine(), data, CHRROM); } /************************************************************* @@ -821,7 +820,7 @@ static WRITE8_HANDLER( cnrom_w ) *************************************************************/ -static WRITE8_HANDLER( bandai_pt554_m_w ) +WRITE8_MEMBER(nes_state::bandai_pt554_m_w) { LOG_MMC(("Bandai PT-554 Sound write, data: %02x\n", data)); @@ -846,10 +845,10 @@ static WRITE8_HANDLER( bandai_pt554_m_w ) *************************************************************/ -static WRITE8_HANDLER( cprom_w ) +WRITE8_MEMBER(nes_state::cprom_w) { LOG_MMC(("cprom_w, offset: %04x, data: %02x\n", offset, data)); - chr4_4(space.machine(), data, CHRRAM); + chr4_4(machine(), data, CHRRAM); } /************************************************************* @@ -868,12 +867,12 @@ static WRITE8_HANDLER( cprom_w ) *************************************************************/ -static WRITE8_HANDLER( axrom_w ) +WRITE8_MEMBER(nes_state::axrom_w) { LOG_MMC(("axrom_w, offset: %04x, data: %02x\n", offset, data)); - set_nt_mirroring(space.machine(), BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); - prg32(space.machine(), data); + set_nt_mirroring(machine(), BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); + prg32(machine(), data); } /************************************************************* @@ -888,13 +887,13 @@ static WRITE8_HANDLER( axrom_w ) *************************************************************/ -static WRITE8_HANDLER( bxrom_w ) +WRITE8_MEMBER(nes_state::bxrom_w) { /* This portion of the mapper is nearly identical to Mapper 7, except no one-screen mirroring */ /* Deadly Towers is really a BxROM game - the demo screens look wrong using mapper 7. */ LOG_MMC(("bxrom_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), data); + prg32(machine(), data); } /************************************************************* @@ -909,12 +908,12 @@ static WRITE8_HANDLER( bxrom_w ) *************************************************************/ -static WRITE8_HANDLER( gxrom_w ) +WRITE8_MEMBER(nes_state::gxrom_w) { LOG_MMC(("gxrom_w, offset %04x, data: %02x\n", offset, data)); - prg32(space.machine(), (data & 0xf0) >> 4); - chr8(space.machine(), data & 0x0f, CHRROM); + prg32(machine(), (data & 0xf0) >> 4); + chr8(machine(), data & 0x0f, CHRROM); } /************************************************************* @@ -1101,12 +1100,11 @@ static void common_sxrom_write_handler( address_space &space, offs_t offset, UIN } } -static WRITE8_HANDLER( sxrom_w ) +WRITE8_MEMBER(nes_state::sxrom_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("sxrom_w, offset: %04x, data: %02x\n", offset, data)); - common_sxrom_write_handler(space, offset, data, state->m_pcb_id); + common_sxrom_write_handler(space, offset, data, m_pcb_id); } /************************************************************* @@ -1150,37 +1148,36 @@ static void mmc2_latch( device_t *device, offs_t offset ) } } -static WRITE8_HANDLER( pxrom_w ) +WRITE8_MEMBER(nes_state::pxrom_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("pxrom_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x7000) { case 0x2000: - prg8_89(space.machine(), data); + prg8_89(machine(), data); break; case 0x3000: - state->m_mmc_reg[0] = data; - if (state->m_mmc_latch1 == 0xfd) - chr4_0(space.machine(), state->m_mmc_reg[0], CHRROM); + m_mmc_reg[0] = data; + if (m_mmc_latch1 == 0xfd) + chr4_0(machine(), m_mmc_reg[0], CHRROM); break; case 0x4000: - state->m_mmc_reg[1] = data; - if (state->m_mmc_latch1 == 0xfe) - chr4_0(space.machine(), state->m_mmc_reg[1], CHRROM); + m_mmc_reg[1] = data; + if (m_mmc_latch1 == 0xfe) + chr4_0(machine(), m_mmc_reg[1], CHRROM); break; case 0x5000: - state->m_mmc_reg[2] = data; - if (state->m_mmc_latch2 == 0xfd) - chr4_4(space.machine(), state->m_mmc_reg[2], CHRROM); + m_mmc_reg[2] = data; + if (m_mmc_latch2 == 0xfd) + chr4_4(machine(), m_mmc_reg[2], CHRROM); break; case 0x6000: - state->m_mmc_reg[3] = data; - if (state->m_mmc_latch2 == 0xfe) - chr4_4(space.machine(), state->m_mmc_reg[3], CHRROM); + m_mmc_reg[3] = data; + if (m_mmc_latch2 == 0xfe) + chr4_4(machine(), m_mmc_reg[3], CHRROM); break; case 0x7000: - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; default: LOG_MMC(("MMC2 uncaught w: %04x:%02x\n", offset, data)); @@ -1200,13 +1197,13 @@ static WRITE8_HANDLER( pxrom_w ) *************************************************************/ -static WRITE8_HANDLER( fxrom_w ) +WRITE8_MEMBER(nes_state::fxrom_w) { LOG_MMC(("fxrom_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x7000) { case 0x2000: - prg16_89ab(space.machine(), data); + prg16_89ab(machine(), data); break; default: pxrom_w(space, offset, data, mem_mask); @@ -1228,7 +1225,7 @@ static void mmc3_set_wram( address_space &space ) nes_state *state = machine.driver_data(); // skip this function if we are emulating a MMC3 clone with mid writes - if (state->m_mmc_write_mid != NULL) + if (!state->m_mmc_write_mid.isnull()) return; if (BIT(state->m_mmc3_wram_protect, 7)) @@ -1297,9 +1294,8 @@ static void mmc3_irq( device_t *device, int scanline, int vblank, int blanked ) state->m_IRQ_clear = 0; } -static WRITE8_HANDLER( txrom_w ) +WRITE8_MEMBER(nes_state::txrom_w) { - nes_state *state = space.machine().driver_data(); UINT8 mmc_helper, cmd; LOG_MMC(("txrom_w, offset: %04x, data: %02x\n", offset, data)); @@ -1307,58 +1303,58 @@ static WRITE8_HANDLER( txrom_w ) switch (offset & 0x6001) { case 0x0000: - mmc_helper = state->m_mmc3_latch ^ data; - state->m_mmc3_latch = data; + mmc_helper = m_mmc3_latch ^ data; + m_mmc3_latch = data; /* Has PRG Mode changed? */ if (mmc_helper & 0x40) - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); /* Has CHR Mode changed? */ if (mmc_helper & 0x80) - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); break; case 0x0001: - cmd = state->m_mmc3_latch & 0x07; + cmd = m_mmc3_latch & 0x07; switch (cmd) { case 0: case 1: // these do not need to be separated: we take care of them in set_chr! case 2: case 3: case 4: case 5: - state->m_mmc_vrom_bank[cmd] = data; - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_vrom_bank[cmd] = data; + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); break; case 6: case 7: - state->m_mmc_prg_bank[cmd - 6] = data; - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + m_mmc_prg_bank[cmd - 6] = data; + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); break; } break; case 0x2000: - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; case 0x2001: - state->m_mmc3_wram_protect = data; + m_mmc3_wram_protect = data; mmc3_set_wram(space); break; case 0x4000: - state->m_IRQ_count_latch = data; + m_IRQ_count_latch = data; break; case 0x4001: - state->m_IRQ_count = 0; + m_IRQ_count = 0; break; case 0x6000: - state->m_IRQ_enable = 0; + m_IRQ_enable = 0; break; case 0x6001: - state->m_IRQ_enable = 1; + m_IRQ_enable = 1; break; default: @@ -1375,9 +1371,8 @@ static WRITE8_HANDLER( txrom_w ) *************************************************************/ -static WRITE8_HANDLER( hkrom_m_w ) +WRITE8_MEMBER(nes_state::hkrom_m_w) { - nes_state *state = space.machine().driver_data(); UINT8 write_hi, write_lo; LOG_MMC(("hkrom_m_w, offset: %04x, data: %02x\n", offset, data)); @@ -1385,69 +1380,67 @@ static WRITE8_HANDLER( hkrom_m_w ) return; // banks can be written only if both read & write is enabled! - write_hi = ((state->m_mmc6_reg & 0xc0) == 0xc0); - write_lo = ((state->m_mmc6_reg & 0x30) == 0x30); + write_hi = ((m_mmc6_reg & 0xc0) == 0xc0); + write_lo = ((m_mmc6_reg & 0x30) == 0x30); if (BIT(offset, 9) && write_hi) // access to upper 1k - state->m_mapper_bram[offset & (state->m_mapper_bram_size - 1)] = data; + m_mapper_bram[offset & (m_mapper_bram_size - 1)] = data; if (!BIT(offset, 9) && write_lo) // access to lower 1k - state->m_mapper_bram[offset & (state->m_mapper_bram_size - 1)] = data; + m_mapper_bram[offset & (m_mapper_bram_size - 1)] = data; } -static READ8_HANDLER( hkrom_m_r ) +READ8_MEMBER(nes_state::hkrom_m_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("hkrom_m_r, offset: %04x\n", offset)); if (offset < 0x1000) return 0xff; // here it should be open bus - if (!(state->m_mmc6_reg & 0xa0)) + if (!(m_mmc6_reg & 0xa0)) return 0xff; // here it should be open bus - if (BIT(offset, 9) && BIT(state->m_mmc6_reg, 7)) // access to upper 1k when upper read is enabled - return state->m_mapper_bram[offset & (state->m_mapper_bram_size - 1)]; + if (BIT(offset, 9) && BIT(m_mmc6_reg, 7)) // access to upper 1k when upper read is enabled + return m_mapper_bram[offset & (m_mapper_bram_size - 1)]; - if (!BIT(offset, 9) && BIT(state->m_mmc6_reg, 5)) // access to lower 1k when lower read is enabled - return state->m_mapper_bram[offset & (state->m_mapper_bram_size - 1)]; + if (!BIT(offset, 9) && BIT(m_mmc6_reg, 5)) // access to lower 1k when lower read is enabled + return m_mapper_bram[offset & (m_mapper_bram_size - 1)]; // If only one bank is enabled for reading, the other reads back as zero return 0x00; } -static WRITE8_HANDLER( hkrom_w ) +WRITE8_MEMBER(nes_state::hkrom_w) { - nes_state *state = space.machine().driver_data(); UINT8 mmc6_helper; LOG_MMC(("hkrom_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x6001) { case 0x0000: - mmc6_helper = state->m_mmc3_latch ^ data; - state->m_mmc3_latch = data; + mmc6_helper = m_mmc3_latch ^ data; + m_mmc3_latch = data; - if (!state->m_mmc_latch2 && BIT(data, 5)) // if WRAM is disabled and has to be enabled, write - state->m_mmc_latch2 = BIT(data, 5); // (once WRAM has been enabled, it cannot be disabled without resetting the game) + if (!m_mmc_latch2 && BIT(data, 5)) // if WRAM is disabled and has to be enabled, write + m_mmc_latch2 = BIT(data, 5); // (once WRAM has been enabled, it cannot be disabled without resetting the game) /* Has PRG Mode changed? */ if (BIT(mmc6_helper, 6)) - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); /* Has CHR Mode changed? */ if (BIT(mmc6_helper, 7)) - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); break; case 0x2001: - if (state->m_mmc_latch2) - state->m_mmc6_reg = data; + if (m_mmc_latch2) + m_mmc6_reg = data; break; case 0x4001: - state->m_IRQ_count = 0; - state->m_IRQ_clear = 1; + m_IRQ_count = 0; + m_IRQ_clear = 1; break; default: @@ -1494,7 +1487,7 @@ static void txsrom_chr_cb( running_machine &machine, int start, int bank, int so chr1_x(machine, start, bank, source); } -static WRITE8_HANDLER( txsrom_w ) +WRITE8_MEMBER(nes_state::txsrom_w) { LOG_MMC(("txsrom_w, offset: %04x, data: %02x\n", offset, data)); @@ -1544,39 +1537,38 @@ static void tqrom_set_chr( running_machine &machine ) chr1_x(machine, chr_page ^ 7, (state->m_mmc_vrom_bank[5] & chr_mask[5]), chr_src[5]); } -static WRITE8_HANDLER( tqrom_w ) +WRITE8_MEMBER(nes_state::tqrom_w) { - nes_state *state = space.machine().driver_data(); UINT8 mmc_helper, cmd; LOG_MMC(("tqrom_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x6001) { case 0x0000: - mmc_helper = state->m_mmc3_latch ^ data; - state->m_mmc3_latch = data; + mmc_helper = m_mmc3_latch ^ data; + m_mmc3_latch = data; /* Has PRG Mode changed? */ if (mmc_helper & 0x40) - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); /* Has CHR Mode changed? */ if (mmc_helper & 0x80) - tqrom_set_chr(space.machine()); + tqrom_set_chr(machine()); break; case 0x0001: /* $8001 */ - cmd = state->m_mmc3_latch & 0x07; + cmd = m_mmc3_latch & 0x07; switch (cmd) { case 0: case 1: // these do not need to be separated: we take care of them in set_chr! case 2: case 3: case 4: case 5: - state->m_mmc_vrom_bank[cmd] = data; - tqrom_set_chr(space.machine()); + m_mmc_vrom_bank[cmd] = data; + tqrom_set_chr(machine()); break; case 6: case 7: - state->m_mmc_prg_bank[cmd - 6] = data; - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + m_mmc_prg_bank[cmd - 6] = data; + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); break; } break; @@ -1596,18 +1588,17 @@ static WRITE8_HANDLER( tqrom_w ) *************************************************************/ -static WRITE8_HANDLER( zz_m_w ) +WRITE8_MEMBER(nes_state::zz_m_w) { - nes_state *state = space.machine().driver_data(); UINT8 mmc_helper = data & 0x07; LOG_MMC(("zz_m_w, offset: %04x, data: %02x\n", offset, data)); - state->m_mmc_prg_base = (BIT(mmc_helper, 2) << 4) | (((mmc_helper & 0x03) == 0x03) ? 0x08 : 0); - state->m_mmc_prg_mask = (mmc_helper << 1) | 0x07; - state->m_mmc_chr_base = BIT(mmc_helper, 2) << 7; - state->m_mmc_chr_mask = 0x7f; - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_prg_base = (BIT(mmc_helper, 2) << 4) | (((mmc_helper & 0x03) == 0x03) ? 0x08 : 0); + m_mmc_prg_mask = (mmc_helper << 1) | 0x07; + m_mmc_chr_base = BIT(mmc_helper, 2) << 7; + m_mmc_chr_mask = 0x7f; + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); } /************************************************************* @@ -1619,17 +1610,16 @@ static WRITE8_HANDLER( zz_m_w ) *************************************************************/ -static WRITE8_HANDLER( qj_m_w ) +WRITE8_MEMBER(nes_state::qj_m_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("qj_m_w, offset: %04x, data: %02x\n", offset, data)); - state->m_mmc_prg_base = BIT(data, 0) << 4; - state->m_mmc_prg_mask = 0x0f; - state->m_mmc_chr_base = BIT(data, 0) << 7; - state->m_mmc_chr_mask = 0x7f; - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_prg_base = BIT(data, 0) << 4; + m_mmc_prg_mask = 0x0f; + m_mmc_chr_base = BIT(data, 0) << 7; + m_mmc_chr_mask = 0x7f; + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); } /************************************************************* @@ -1856,15 +1846,14 @@ static void mmc5_ppu_mirror( running_machine &machine, int page, int src ) } } -static READ8_HANDLER( exrom_l_r ) +READ8_MEMBER(nes_state::exrom_l_r) { - nes_state *state = space.machine().driver_data(); int retVal; /* $5c00 - $5fff: extended videoram attributes */ if ((offset >= 0x1b00) && (offset <= 0x1eff)) { - return state->m_mapper_ram[offset - 0x1b00]; + return m_mapper_ram[offset - 0x1b00]; } switch (offset) @@ -1876,15 +1865,15 @@ static READ8_HANDLER( exrom_l_r ) else return 0x00; #else - retVal = state->m_IRQ_status; - state->m_IRQ_status &= ~0x80; + retVal = m_IRQ_status; + m_IRQ_status &= ~0x80; return retVal; #endif case 0x1105: /* $5205 */ - return (state->m_mult1 * state->m_mult2) & 0xff; + return (m_mult1 * m_mult2) & 0xff; case 0x1106: /* $5206 */ - return ((state->m_mult1 * state->m_mult2) & 0xff00) >> 8; + return ((m_mult1 * m_mult2) & 0xff00) >> 8; default: logerror("** MMC5 uncaught read, offset: %04x\n", offset + 0x4100); @@ -1893,74 +1882,73 @@ static READ8_HANDLER( exrom_l_r ) } -static WRITE8_HANDLER( exrom_l_w ) +WRITE8_MEMBER(nes_state::exrom_l_w) { - nes_state *state = space.machine().driver_data(); // LOG_MMC(("Mapper 5 write, offset: %04x, data: %02x\n", offset + 0x4100, data)); /* Send $5000-$5015 to the sound chip */ if ((offset >= 0xf00) && (offset <= 0xf15)) { - nes_psg_w(state->m_sound, space, offset & 0x1f, data); + nes_psg_w(m_sound, space, offset & 0x1f, data); return; } /* $5c00 - $5fff: extended videoram attributes */ if ((offset >= 0x1b00) && (offset <= 0x1eff)) { - if (state->m_MMC5_vram_protect == 0x03) - state->m_mapper_ram[offset - 0x1b00] = data; + if (m_MMC5_vram_protect == 0x03) + m_mapper_ram[offset - 0x1b00] = data; return; } switch (offset) { case 0x1000: /* $5100 */ - state->m_mmc5_prg_mode = data & 0x03; - // mmc5_update_prg(space.machine()); + m_mmc5_prg_mode = data & 0x03; + // mmc5_update_prg(machine()); LOG_MMC(("MMC5 rom bank mode: %02x\n", data)); break; case 0x1001: /* $5101 */ - state->m_mmc5_chr_mode = data & 0x03; + m_mmc5_chr_mode = data & 0x03; // update chr LOG_MMC(("MMC5 vrom bank mode: %02x\n", data)); break; case 0x1002: /* $5102 */ if (data == 0x02) - state->m_MMC5_vram_protect |= 1; + m_MMC5_vram_protect |= 1; else - state->m_MMC5_vram_protect = 0; + m_MMC5_vram_protect = 0; LOG_MMC(("MMC5 vram protect 1: %02x\n", data)); break; case 0x1003: /* 5103 */ if (data == 0x01) - state->m_MMC5_vram_protect |= 2; + m_MMC5_vram_protect |= 2; else - state->m_MMC5_vram_protect = 0; + m_MMC5_vram_protect = 0; LOG_MMC(("MMC5 vram protect 2: %02x\n", data)); break; case 0x1004: /* $5104 - Extra VRAM (EXRAM) control */ - state->m_mmc5_vram_control = data & 0x03; + m_mmc5_vram_control = data & 0x03; // update render - mmc5_update_render_mode(space.machine()); + mmc5_update_render_mode(machine()); LOG_MMC(("MMC5 exram control: %02x\n", data)); break; case 0x1005: /* $5105 */ - mmc5_ppu_mirror(space.machine(), 0, data & 0x03); - mmc5_ppu_mirror(space.machine(), 1, (data & 0x0c) >> 2); - mmc5_ppu_mirror(space.machine(), 2, (data & 0x30) >> 4); - mmc5_ppu_mirror(space.machine(), 3, (data & 0xc0) >> 6); + mmc5_ppu_mirror(machine(), 0, data & 0x03); + mmc5_ppu_mirror(machine(), 1, (data & 0x0c) >> 2); + mmc5_ppu_mirror(machine(), 2, (data & 0x30) >> 4); + mmc5_ppu_mirror(machine(), 3, (data & 0xc0) >> 6); // update render - mmc5_update_render_mode(space.machine()); + mmc5_update_render_mode(machine()); break; /* tile data for MMC5 flood-fill NT mode */ case 0x1006: - state->m_MMC5_floodtile = data; + m_MMC5_floodtile = data; break; /* attr data for MMC5 flood-fill NT mode */ @@ -1968,20 +1956,20 @@ static WRITE8_HANDLER( exrom_l_w ) switch (data & 3) { default: - case 0: state->m_MMC5_floodattr = 0x00; break; - case 1: state->m_MMC5_floodattr = 0x55; break; - case 2: state->m_MMC5_floodattr = 0xaa; break; - case 3: state->m_MMC5_floodattr = 0xff; break; + case 0: m_MMC5_floodattr = 0x00; break; + case 1: m_MMC5_floodattr = 0x55; break; + case 2: m_MMC5_floodattr = 0xaa; break; + case 3: m_MMC5_floodattr = 0xff; break; } break; case 0x1013: /* $5113 */ LOG_MMC(("MMC5 mid RAM bank select: %02x\n", data & 0x07)); // FIXME: a few Koei games have both WRAM & BWRAM but here we don't support this (yet) - if (state->m_battery) - wram_bank(space.machine(), data, NES_BATTERY); + if (m_battery) + wram_bank(machine(), data, NES_BATTERY); else - wram_bank(space.machine(), data, NES_WRAM); + wram_bank(machine(), data, NES_WRAM); break; @@ -1989,8 +1977,8 @@ static WRITE8_HANDLER( exrom_l_w ) case 0x1015: /* $5115 */ case 0x1016: /* $5116 */ case 0x1017: /* $5117 */ - state->m_mmc5_prg_regs[offset & 3] = data; - mmc5_update_prg(space.machine()); + m_mmc5_prg_regs[offset & 3] = data; + mmc5_update_prg(machine()); break; #if 0 @@ -2003,13 +1991,13 @@ static WRITE8_HANDLER( exrom_l_w ) case 0x1025: /* $5125 */ case 0x1026: /* $5126 */ case 0x1027: /* $5127 */ - data |= (state->m_mmc5_chr_high << 8); - if (!state->m_mmc5_last_chr_a) + data |= (m_mmc5_chr_high << 8); + if (!m_mmc5_last_chr_a) { - state->m_mmc5_vrom_regA[offset & 0x07] = data; - state->m_mmc5_last_chr_a = 1; - if (state->m_ppu->get_current_scanline() == 240 || !state->m_ppu->is_sprite_8x16()) - mmc5_update_chr_a(space.machine()); + m_mmc5_vrom_regA[offset & 0x07] = data; + m_mmc5_last_chr_a = 1; + if (m_ppu->get_current_scanline() == 240 || !m_ppu->is_sprite_8x16()) + mmc5_update_chr_a(machine()); } break; @@ -2018,18 +2006,18 @@ static WRITE8_HANDLER( exrom_l_w ) case 0x1029: /* $5129 */ case 0x102a: /* $512a */ case 0x102b: /* $512b */ - data |= (state->m_mmc5_chr_high << 8); - state->m_mmc5_vrom_regB[offset & 0x03] = data; - state->m_mmc5_last_chr_a = 0; - if (state->m_ppu->get_current_scanline() == 240 || !state->m_ppu->is_sprite_8x16()) - mmc5_update_chr_b(space.machine()); + data |= (m_mmc5_chr_high << 8); + m_mmc5_vrom_regB[offset & 0x03] = data; + m_mmc5_last_chr_a = 0; + if (m_ppu->get_current_scanline() == 240 || !m_ppu->is_sprite_8x16()) + mmc5_update_chr_b(machine()); break; case 0x1030: /* $5130 */ - state->m_mmc5_chr_high = data & 0x03; - if (state->m_mmc5_vram_control == 1) + m_mmc5_chr_high = data & 0x03; + if (m_mmc5_vram_control == 1) { - // in this case state->m_mmc5_chr_high selects which 256KB of CHR ROM + // in this case m_mmc5_chr_high selects which 256KB of CHR ROM // is to be used for all background tiles on the screen. } break; @@ -2037,15 +2025,15 @@ static WRITE8_HANDLER( exrom_l_w ) #endif case 0x1020: /* $5120 */ - LOG_MMC(("MMC5 $5120 vrom select: %02x (mode: %d)\n", data, state->m_mmc5_chr_mode)); - switch (state->m_mmc5_chr_mode) + LOG_MMC(("MMC5 $5120 vrom select: %02x (mode: %d)\n", data, m_mmc5_chr_mode)); + switch (m_mmc5_chr_mode) { case 0x03: /* 1k switch */ - state->m_MMC5_vrom_bank[0] = data | (state->m_mmc5_high_chr << 8); + m_MMC5_vrom_bank[0] = data | (m_mmc5_high_chr << 8); // mapper5_sync_vrom(0); - chr1_0(space.machine(), state->m_MMC5_vrom_bank[0], CHRROM); - // state->m_nes_vram_sprite[0] = state->m_MMC5_vrom_bank[0] * 64; + chr1_0(machine(), m_MMC5_vrom_bank[0], CHRROM); + // m_nes_vram_sprite[0] = m_MMC5_vrom_bank[0] * 64; // vrom_next[0] = 4; // vrom_page_a = 1; // vrom_page_b = 0; @@ -2053,19 +2041,19 @@ static WRITE8_HANDLER( exrom_l_w ) } break; case 0x1021: /* $5121 */ - LOG_MMC(("MMC5 $5121 vrom select: %02x (mode: %d)\n", data, state->m_mmc5_chr_mode)); - switch (state->m_mmc5_chr_mode) + LOG_MMC(("MMC5 $5121 vrom select: %02x (mode: %d)\n", data, m_mmc5_chr_mode)); + switch (m_mmc5_chr_mode) { case 0x02: /* 2k switch */ - chr2_0(space.machine(), data | (state->m_mmc5_high_chr << 8), CHRROM); + chr2_0(machine(), data | (m_mmc5_high_chr << 8), CHRROM); break; case 0x03: /* 1k switch */ - state->m_MMC5_vrom_bank[1] = data | (state->m_mmc5_high_chr << 8); + m_MMC5_vrom_bank[1] = data | (m_mmc5_high_chr << 8); // mapper5_sync_vrom(0); - chr1_1(space.machine(), state->m_MMC5_vrom_bank[1], CHRROM); - // state->m_nes_vram_sprite[1] = state->m_MMC5_vrom_bank[0] * 64; + chr1_1(machine(), m_MMC5_vrom_bank[1], CHRROM); + // m_nes_vram_sprite[1] = m_MMC5_vrom_bank[0] * 64; // vrom_next[1] = 5; // vrom_page_a = 1; // vrom_page_b = 0; @@ -2073,15 +2061,15 @@ static WRITE8_HANDLER( exrom_l_w ) } break; case 0x1022: /* $5122 */ - LOG_MMC(("MMC5 $5122 vrom select: %02x (mode: %d)\n", data, state->m_mmc5_chr_mode)); - switch (state->m_mmc5_chr_mode) + LOG_MMC(("MMC5 $5122 vrom select: %02x (mode: %d)\n", data, m_mmc5_chr_mode)); + switch (m_mmc5_chr_mode) { case 0x03: /* 1k switch */ - state->m_MMC5_vrom_bank[2] = data | (state->m_mmc5_high_chr << 8); + m_MMC5_vrom_bank[2] = data | (m_mmc5_high_chr << 8); // mapper5_sync_vrom(0); - chr1_2(space.machine(), state->m_MMC5_vrom_bank[2], CHRROM); - // state->m_nes_vram_sprite[2] = state->m_MMC5_vrom_bank[0] * 64; + chr1_2(machine(), m_MMC5_vrom_bank[2], CHRROM); + // m_nes_vram_sprite[2] = m_MMC5_vrom_bank[0] * 64; // vrom_next[2] = 6; // vrom_page_a = 1; // vrom_page_b = 0; @@ -2089,22 +2077,22 @@ static WRITE8_HANDLER( exrom_l_w ) } break; case 0x1023: /* $5123 */ - LOG_MMC(("MMC5 $5123 vrom select: %02x (mode: %d)\n", data, state->m_mmc5_chr_mode)); - switch (state->m_mmc5_chr_mode) + LOG_MMC(("MMC5 $5123 vrom select: %02x (mode: %d)\n", data, m_mmc5_chr_mode)); + switch (m_mmc5_chr_mode) { case 0x01: - chr4_0(space.machine(), data, CHRROM); + chr4_0(machine(), data, CHRROM); break; case 0x02: /* 2k switch */ - chr2_2(space.machine(), data | (state->m_mmc5_high_chr << 8), CHRROM); + chr2_2(machine(), data | (m_mmc5_high_chr << 8), CHRROM); break; case 0x03: /* 1k switch */ - state->m_MMC5_vrom_bank[3] = data | (state->m_mmc5_high_chr << 8); + m_MMC5_vrom_bank[3] = data | (m_mmc5_high_chr << 8); // mapper5_sync_vrom(0); - chr1_3(space.machine(), state->m_MMC5_vrom_bank[3], CHRROM); - // state->m_nes_vram_sprite[3] = state->m_MMC5_vrom_bank[0] * 64; + chr1_3(machine(), m_MMC5_vrom_bank[3], CHRROM); + // m_nes_vram_sprite[3] = m_MMC5_vrom_bank[0] * 64; // vrom_next[3] = 7; // vrom_page_a = 1; // vrom_page_b = 0; @@ -2112,15 +2100,15 @@ static WRITE8_HANDLER( exrom_l_w ) } break; case 0x1024: /* $5124 */ - LOG_MMC(("MMC5 $5124 vrom select: %02x (mode: %d)\n", data, state->m_mmc5_chr_mode)); - switch (state->m_mmc5_chr_mode) + LOG_MMC(("MMC5 $5124 vrom select: %02x (mode: %d)\n", data, m_mmc5_chr_mode)); + switch (m_mmc5_chr_mode) { case 0x03: /* 1k switch */ - state->m_MMC5_vrom_bank[4] = data | (state->m_mmc5_high_chr << 8); + m_MMC5_vrom_bank[4] = data | (m_mmc5_high_chr << 8); // mapper5_sync_vrom(0); - chr1_4(space.machine(), state->m_MMC5_vrom_bank[4], CHRROM); - // state->m_nes_vram_sprite[4] = state->m_MMC5_vrom_bank[0] * 64; + chr1_4(machine(), m_MMC5_vrom_bank[4], CHRROM); + // m_nes_vram_sprite[4] = m_MMC5_vrom_bank[0] * 64; // vrom_next[0] = 0; // vrom_page_a = 0; // vrom_page_b = 0; @@ -2128,19 +2116,19 @@ static WRITE8_HANDLER( exrom_l_w ) } break; case 0x1025: /* $5125 */ - LOG_MMC(("MMC5 $5125 vrom select: %02x (mode: %d)\n", data, state->m_mmc5_chr_mode)); - switch (state->m_mmc5_chr_mode) + LOG_MMC(("MMC5 $5125 vrom select: %02x (mode: %d)\n", data, m_mmc5_chr_mode)); + switch (m_mmc5_chr_mode) { case 0x02: /* 2k switch */ - chr2_4(space.machine(), data | (state->m_mmc5_high_chr << 8), CHRROM); + chr2_4(machine(), data | (m_mmc5_high_chr << 8), CHRROM); break; case 0x03: /* 1k switch */ - state->m_MMC5_vrom_bank[5] = data | (state->m_mmc5_high_chr << 8); + m_MMC5_vrom_bank[5] = data | (m_mmc5_high_chr << 8); // mapper5_sync_vrom(0); - chr1_5(space.machine(), state->m_MMC5_vrom_bank[5], CHRROM); - // state->m_nes_vram_sprite[5] = state->m_MMC5_vrom_bank[0] * 64; + chr1_5(machine(), m_MMC5_vrom_bank[5], CHRROM); + // m_nes_vram_sprite[5] = m_MMC5_vrom_bank[0] * 64; // vrom_next[1] = 1; // vrom_page_a = 0; // vrom_page_b = 0; @@ -2148,15 +2136,15 @@ static WRITE8_HANDLER( exrom_l_w ) } break; case 0x1026: /* $5126 */ - LOG_MMC(("MMC5 $5126 vrom select: %02x (mode: %d)\n", data, state->m_mmc5_chr_mode)); - switch (state->m_mmc5_chr_mode) + LOG_MMC(("MMC5 $5126 vrom select: %02x (mode: %d)\n", data, m_mmc5_chr_mode)); + switch (m_mmc5_chr_mode) { case 0x03: /* 1k switch */ - state->m_MMC5_vrom_bank[6] = data | (state->m_mmc5_high_chr << 8); + m_MMC5_vrom_bank[6] = data | (m_mmc5_high_chr << 8); // mapper5_sync_vrom(0); - chr1_6(space.machine(), state->m_MMC5_vrom_bank[6], CHRROM); - // state->m_nes_vram_sprite[6] = state->m_MMC5_vrom_bank[0] * 64; + chr1_6(machine(), m_MMC5_vrom_bank[6], CHRROM); + // m_nes_vram_sprite[6] = m_MMC5_vrom_bank[0] * 64; // vrom_next[2] = 2; // vrom_page_a = 0; // vrom_page_b = 0; @@ -2164,27 +2152,27 @@ static WRITE8_HANDLER( exrom_l_w ) } break; case 0x1027: /* $5127 */ - LOG_MMC(("MMC5 $5127 vrom select: %02x (mode: %d)\n", data, state->m_mmc5_chr_mode)); - switch (state->m_mmc5_chr_mode) + LOG_MMC(("MMC5 $5127 vrom select: %02x (mode: %d)\n", data, m_mmc5_chr_mode)); + switch (m_mmc5_chr_mode) { case 0x00: /* 8k switch */ - chr8(space.machine(), data, CHRROM); + chr8(machine(), data, CHRROM); break; case 0x01: /* 4k switch */ - chr4_4(space.machine(), data, CHRROM); + chr4_4(machine(), data, CHRROM); break; case 0x02: /* 2k switch */ - chr2_6(space.machine(), data | (state->m_mmc5_high_chr << 8), CHRROM); + chr2_6(machine(), data | (m_mmc5_high_chr << 8), CHRROM); break; case 0x03: /* 1k switch */ - state->m_MMC5_vrom_bank[7] = data | (state->m_mmc5_high_chr << 8); + m_MMC5_vrom_bank[7] = data | (m_mmc5_high_chr << 8); // mapper5_sync_vrom(0); - chr1_7(space.machine(), state->m_MMC5_vrom_bank[7], CHRROM); - // state->m_nes_vram_sprite[7] = state->m_MMC5_vrom_bank[0] * 64; + chr1_7(machine(), m_MMC5_vrom_bank[7], CHRROM); + // m_nes_vram_sprite[7] = m_MMC5_vrom_bank[0] * 64; // vrom_next[3] = 3; // vrom_page_a = 0; // vrom_page_b = 0; @@ -2192,147 +2180,147 @@ static WRITE8_HANDLER( exrom_l_w ) } break; case 0x1028: /* $5128 */ - LOG_MMC(("MMC5 $5128 vrom select: %02x (mode: %d)\n", data, state->m_mmc5_chr_mode)); - switch (state->m_mmc5_chr_mode) + LOG_MMC(("MMC5 $5128 vrom select: %02x (mode: %d)\n", data, m_mmc5_chr_mode)); + switch (m_mmc5_chr_mode) { case 0x03: /* 1k switch */ - state->m_MMC5_vrom_bank[8] = data | (state->m_mmc5_high_chr << 8); + m_MMC5_vrom_bank[8] = data | (m_mmc5_high_chr << 8); // nes_vram[vrom_next[0]] = data * 64; // nes_vram[0 + (vrom_page_a*4)] = data * 64; // nes_vram[0] = data * 64; - chr1_4(space.machine(), state->m_MMC5_vrom_bank[8], CHRROM); + chr1_4(machine(), m_MMC5_vrom_bank[8], CHRROM); // mapper5_sync_vrom(1); - if (!state->m_vrom_page_b) + if (!m_vrom_page_b) { - state->m_vrom_page_a ^= 0x01; - state->m_vrom_page_b = 1; + m_vrom_page_a ^= 0x01; + m_vrom_page_b = 1; } break; } break; case 0x1029: /* $5129 */ - LOG_MMC(("MMC5 $5129 vrom select: %02x (mode: %d)\n", data, state->m_mmc5_chr_mode)); - switch (state->m_mmc5_chr_mode) + LOG_MMC(("MMC5 $5129 vrom select: %02x (mode: %d)\n", data, m_mmc5_chr_mode)); + switch (m_mmc5_chr_mode) { case 0x02: /* 2k switch */ - chr2_0(space.machine(), data | (state->m_mmc5_high_chr << 8), CHRROM); - chr2_4(space.machine(), data | (state->m_mmc5_high_chr << 8), CHRROM); + chr2_0(machine(), data | (m_mmc5_high_chr << 8), CHRROM); + chr2_4(machine(), data | (m_mmc5_high_chr << 8), CHRROM); break; case 0x03: /* 1k switch */ - state->m_MMC5_vrom_bank[9] = data | (state->m_mmc5_high_chr << 8); + m_MMC5_vrom_bank[9] = data | (m_mmc5_high_chr << 8); // nes_vram[vrom_next[1]] = data * 64; // nes_vram[1 + (vrom_page_a*4)] = data * 64; // nes_vram[1] = data * 64; - chr1_5(space.machine(), state->m_MMC5_vrom_bank[9], CHRROM); + chr1_5(machine(), m_MMC5_vrom_bank[9], CHRROM); // mapper5_sync_vrom(1); - if (!state->m_vrom_page_b) + if (!m_vrom_page_b) { - state->m_vrom_page_a ^= 0x01; - state->m_vrom_page_b = 1; + m_vrom_page_a ^= 0x01; + m_vrom_page_b = 1; } break; } break; case 0x102a: /* $512a */ - LOG_MMC(("MMC5 $512a vrom select: %02x (mode: %d)\n", data, state->m_mmc5_chr_mode)); - switch (state->m_mmc5_chr_mode) + LOG_MMC(("MMC5 $512a vrom select: %02x (mode: %d)\n", data, m_mmc5_chr_mode)); + switch (m_mmc5_chr_mode) { case 0x03: /* 1k switch */ - state->m_MMC5_vrom_bank[10] = data | (state->m_mmc5_high_chr << 8); + m_MMC5_vrom_bank[10] = data | (m_mmc5_high_chr << 8); // nes_vram[vrom_next[2]] = data * 64; // nes_vram[2 + (vrom_page_a*4)] = data * 64; // nes_vram[2] = data * 64; - chr1_6(space.machine(), state->m_MMC5_vrom_bank[10], CHRROM); + chr1_6(machine(), m_MMC5_vrom_bank[10], CHRROM); // mapper5_sync_vrom(1); - if (!state->m_vrom_page_b) + if (!m_vrom_page_b) { - state->m_vrom_page_a ^= 0x01; - state->m_vrom_page_b = 1; + m_vrom_page_a ^= 0x01; + m_vrom_page_b = 1; } break; } break; case 0x102b: /* $512b */ - LOG_MMC(("MMC5 $512b vrom select: %02x (mode: %d)\n", data, state->m_mmc5_chr_mode)); - switch (state->m_mmc5_chr_mode) + LOG_MMC(("MMC5 $512b vrom select: %02x (mode: %d)\n", data, m_mmc5_chr_mode)); + switch (m_mmc5_chr_mode) { case 0x00: /* 8k switch */ /* switches in first half of an 8K bank!) */ - chr4_0(space.machine(), data << 1, CHRROM); - chr4_4(space.machine(), data << 1, CHRROM); + chr4_0(machine(), data << 1, CHRROM); + chr4_4(machine(), data << 1, CHRROM); break; case 0x01: /* 4k switch */ - chr4_0(space.machine(), data, CHRROM); - chr4_4(space.machine(), data, CHRROM); + chr4_0(machine(), data, CHRROM); + chr4_4(machine(), data, CHRROM); break; case 0x02: /* 2k switch */ - chr2_2(space.machine(), data | (state->m_mmc5_high_chr << 8), CHRROM); - chr2_6(space.machine(), data | (state->m_mmc5_high_chr << 8), CHRROM); + chr2_2(machine(), data | (m_mmc5_high_chr << 8), CHRROM); + chr2_6(machine(), data | (m_mmc5_high_chr << 8), CHRROM); break; case 0x03: /* 1k switch */ - state->m_MMC5_vrom_bank[11] = data | (state->m_mmc5_high_chr << 8); + m_MMC5_vrom_bank[11] = data | (m_mmc5_high_chr << 8); // nes_vram[vrom_next[3]] = data * 64; // nes_vram[3 + (vrom_page_a*4)] = data * 64; // nes_vram[3] = data * 64; - chr1_7(space.machine(), state->m_MMC5_vrom_bank[11], CHRROM); + chr1_7(machine(), m_MMC5_vrom_bank[11], CHRROM); // mapper5_sync_vrom(1); - if (!state->m_vrom_page_b) + if (!m_vrom_page_b) { - state->m_vrom_page_a ^= 0x01; - state->m_vrom_page_b = 1; + m_vrom_page_a ^= 0x01; + m_vrom_page_b = 1; } break; } break; case 0x1030: /* $5130 */ - state->m_mmc5_high_chr = data & 0x03; - if (state->m_mmc5_vram_control == 1) + m_mmc5_high_chr = data & 0x03; + if (m_mmc5_vram_control == 1) { - // in this case state->m_mmc5_high_chr selects which 256KB of CHR ROM + // in this case m_mmc5_high_chr selects which 256KB of CHR ROM // is to be used for all background tiles on the screen. } break; case 0x1100: /* $5200 */ - state->m_mmc5_split_scr = data; + m_mmc5_split_scr = data; // in EX2 and EX3 modes, no split screen - if (state->m_mmc5_vram_control & 0x02) - state->m_mmc5_split_scr &= 0x7f; - state->m_mmc5_split_ctrl = data; + if (m_mmc5_vram_control & 0x02) + m_mmc5_split_scr &= 0x7f; + m_mmc5_split_ctrl = data; break; case 0x1101: /* $5201 */ - state->m_mmc5_split_yst = (data >= 240) ? data - 16 : data; + m_mmc5_split_yst = (data >= 240) ? data - 16 : data; break; case 0x1102: /* $5202 */ - state->m_mmc5_split_bank = data; + m_mmc5_split_bank = data; break; case 0x1103: /* $5203 */ - state->m_IRQ_count = data; - state->m_MMC5_scanline = data; - LOG_MMC(("MMC5 irq scanline: %d\n", state->m_IRQ_count)); + m_IRQ_count = data; + m_MMC5_scanline = data; + LOG_MMC(("MMC5 irq scanline: %d\n", m_IRQ_count)); break; case 0x1104: /* $5204 */ - state->m_IRQ_enable = data & 0x80; + m_IRQ_enable = data & 0x80; LOG_MMC(("MMC5 irq enable: %02x\n", data)); break; case 0x1105: /* $5205 */ - state->m_mult1 = data; + m_mult1 = data; break; case 0x1106: /* $5206 */ - state->m_mult2 = data; + m_mult2 = data; break; default: @@ -2395,40 +2383,39 @@ static void ntbrom_mirror( running_machine &machine, int mirror, int mirr0, int } } -static WRITE8_HANDLER( ntbrom_w ) +WRITE8_MEMBER(nes_state::ntbrom_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("ntbrom_w, offset %04x, data: %02x\n", offset, data)); switch (offset & 0x7000) { case 0x0000: - chr2_0(space.machine(), data, CHRROM); + chr2_0(machine(), data, CHRROM); break; case 0x1000: - chr2_2(space.machine(), data, CHRROM); + chr2_2(machine(), data, CHRROM); break; case 0x2000: - chr2_4(space.machine(), data, CHRROM); + chr2_4(machine(), data, CHRROM); break; case 0x3000: - chr2_6(space.machine(), data, CHRROM); + chr2_6(machine(), data, CHRROM); break; case 0x4000: - state->m_mmc_latch1 = data & 0x7f; - ntbrom_mirror(space.machine(), state->m_mmc_reg[0], state->m_mmc_latch1, state->m_mmc_latch2); + m_mmc_latch1 = data & 0x7f; + ntbrom_mirror(machine(), m_mmc_reg[0], m_mmc_latch1, m_mmc_latch2); break; case 0x5000: - state->m_mmc_latch2 = data & 0x7f; - ntbrom_mirror(space.machine(), state->m_mmc_reg[0], state->m_mmc_latch1, state->m_mmc_latch2); + m_mmc_latch2 = data & 0x7f; + ntbrom_mirror(machine(), m_mmc_reg[0], m_mmc_latch1, m_mmc_latch2); break; case 0x6000: - state->m_mmc_reg[0] = data & 0x13; - ntbrom_mirror(space.machine(), state->m_mmc_reg[0], state->m_mmc_latch1, state->m_mmc_latch2); + m_mmc_reg[0] = data & 0x13; + ntbrom_mirror(machine(), m_mmc_reg[0], m_mmc_latch1, m_mmc_latch2); break; case 0x7000: - prg16_89ab(space.machine(), data); + prg16_89ab(machine(), data); break; default: LOG_MMC(("ntbrom_w uncaught write, offset: %04x, data: %02x\n", offset, data)); @@ -2474,22 +2461,21 @@ static void jxrom_irq( device_t *device, int scanline, int vblank, int blanked ) } } -static WRITE8_HANDLER( jxrom_w ) +WRITE8_MEMBER(nes_state::jxrom_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("jxrom_w, offset %04x, data: %02x\n", offset, data)); switch (offset & 0x6000) { case 0x0000: - state->m_mmc_latch1 = data & 0x0f; + m_mmc_latch1 = data & 0x0f; break; case 0x2000: - switch (state->m_mmc_latch1) + switch (m_mmc_latch1) { case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7: - chr1_x(space.machine(), state->m_mmc_latch1, data, CHRROM); + chr1_x(machine(), m_mmc_latch1, data, CHRROM); break; case 8: @@ -2497,43 +2483,43 @@ static WRITE8_HANDLER( jxrom_w ) { // is PRG ROM space.unmap_write(0x6000, 0x7fff); - prg8_67(space.machine(), data & 0x3f); + prg8_67(machine(), data & 0x3f); } else if (data & 0x80) { // is PRG RAM space.install_write_bank(0x6000, 0x7fff, "bank5"); - state->m_prg_bank[4] = state->m_battery_bank5_start + (data & 0x3f); - state->membank("bank5")->set_entry(state->m_prg_bank[4]); + m_prg_bank[4] = m_battery_bank5_start + (data & 0x3f); + membank("bank5")->set_entry(m_prg_bank[4]); } break; case 9: - prg8_89(space.machine(), data); + prg8_89(machine(), data); break; case 0x0a: - prg8_ab(space.machine(), data); + prg8_ab(machine(), data); break; case 0x0b: - prg8_cd(space.machine(), data); + prg8_cd(machine(), data); break; case 0x0c: switch (data & 0x03) { - case 0x00: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break; - case 0x01: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break; - case 0x02: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break; - case 0x03: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break; + case 0x00: set_nt_mirroring(machine(), PPU_MIRROR_VERT); break; + case 0x01: set_nt_mirroring(machine(), PPU_MIRROR_HORZ); break; + case 0x02: set_nt_mirroring(machine(), PPU_MIRROR_LOW); break; + case 0x03: set_nt_mirroring(machine(), PPU_MIRROR_HIGH); break; } break; case 0x0d: - state->m_IRQ_enable = data; + m_IRQ_enable = data; break; case 0x0e: - state->m_IRQ_count = (state->m_IRQ_count & 0xff00) | data; + m_IRQ_count = (m_IRQ_count & 0xff00) | data; break; case 0x0f: - state->m_IRQ_count = (state->m_IRQ_count & 0x00ff) | (data << 8); + m_IRQ_count = (m_IRQ_count & 0x00ff) | (data << 8); break; } break; @@ -2567,9 +2553,8 @@ static WRITE8_HANDLER( jxrom_w ) *************************************************************/ -static WRITE8_HANDLER( dxrom_w ) +WRITE8_MEMBER(nes_state::dxrom_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("dxrom_w, offset: %04x, data: %02x\n", offset, data)); if (offset >= 0x2000) @@ -2578,20 +2563,20 @@ static WRITE8_HANDLER( dxrom_w ) switch (offset & 1) { case 1: - switch (state->m_mmc_latch1 & 0x07) + switch (m_mmc_latch1 & 0x07) { - case 0: chr2_0(space.machine(), data >> 1, CHRROM); break; - case 1: chr2_2(space.machine(), data >> 1, CHRROM); break; - case 2: chr1_4(space.machine(), data | 0x40, CHRROM); break; - case 3: chr1_5(space.machine(), data | 0x40, CHRROM); break; - case 4: chr1_6(space.machine(), data | 0x40, CHRROM); break; - case 5: chr1_7(space.machine(), data | 0x40, CHRROM); break; - case 6: prg8_89(space.machine(), data); break; - case 7: prg8_ab(space.machine(), data); break; + case 0: chr2_0(machine(), data >> 1, CHRROM); break; + case 1: chr2_2(machine(), data >> 1, CHRROM); break; + case 2: chr1_4(machine(), data | 0x40, CHRROM); break; + case 3: chr1_5(machine(), data | 0x40, CHRROM); break; + case 4: chr1_6(machine(), data | 0x40, CHRROM); break; + case 5: chr1_7(machine(), data | 0x40, CHRROM); break; + case 6: prg8_89(machine(), data); break; + case 7: prg8_ab(machine(), data); break; } break; case 0: - state->m_mmc_latch1 = data; + m_mmc_latch1 = data; break; } } @@ -2610,13 +2595,13 @@ static WRITE8_HANDLER( dxrom_w ) *************************************************************/ -static WRITE8_HANDLER( namcot3453_w ) +WRITE8_MEMBER(nes_state::namcot3453_w) { LOG_MMC(("namcot3453_w, offset: %04x, data: %02x\n", offset, data)); // additional mirroring control when writing to even addresses if (!(offset & 1)) - set_nt_mirroring(space.machine(), BIT(data, 6) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); + set_nt_mirroring(machine(), BIT(data, 6) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); dxrom_w(space, offset, data, mem_mask); } @@ -2633,34 +2618,33 @@ static WRITE8_HANDLER( namcot3453_w ) *************************************************************/ -static WRITE8_HANDLER( namcot3446_w ) +WRITE8_MEMBER(nes_state::namcot3446_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("namcot3446_w, offset: %04x, data: %02x\n", offset, data)); // NEStopia does not have this! if (offset >= 0x2000) { if (!(offset & 1)) - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); return; } switch (offset & 1) { case 1: - switch (state->m_mmc_latch1 & 0x07) + switch (m_mmc_latch1 & 0x07) { - case 2: chr2_0(space.machine(), data, CHRROM); break; - case 3: chr2_2(space.machine(), data, CHRROM); break; - case 4: chr2_4(space.machine(), data, CHRROM); break; - case 5: chr2_6(space.machine(), data, CHRROM); break; - case 6: BIT(state->m_mmc_latch1, 6) ? prg8_cd(space.machine(), data) : prg8_89(space.machine(), data); break; - case 7: prg8_ab(space.machine(), data); break; + case 2: chr2_0(machine(), data, CHRROM); break; + case 3: chr2_2(machine(), data, CHRROM); break; + case 4: chr2_4(machine(), data, CHRROM); break; + case 5: chr2_6(machine(), data, CHRROM); break; + case 6: BIT(m_mmc_latch1, 6) ? prg8_cd(machine(), data) : prg8_89(machine(), data); break; + case 7: prg8_ab(machine(), data); break; } break; case 0: - state->m_mmc_latch1 = data; + m_mmc_latch1 = data; break; } } @@ -2678,9 +2662,8 @@ static WRITE8_HANDLER( namcot3446_w ) *************************************************************/ -static WRITE8_HANDLER( namcot3425_w ) +WRITE8_MEMBER(nes_state::namcot3425_w) { - nes_state *state = space.machine().driver_data(); UINT8 mode; LOG_MMC(("namcot3425_w, offset: %04x, data: %02x\n", offset, data)); if (offset >= 0x2000) @@ -2689,33 +2672,33 @@ static WRITE8_HANDLER( namcot3425_w ) switch (offset & 1) { case 1: - mode = state->m_mmc_latch1 & 0x07; + mode = m_mmc_latch1 & 0x07; switch (mode) { - case 0: chr2_0(space.machine(), data >> 1, CHRROM); break; - case 1: chr2_2(space.machine(), data >> 1, CHRROM); break; + case 0: chr2_0(machine(), data >> 1, CHRROM); break; + case 1: chr2_2(machine(), data >> 1, CHRROM); break; case 2: case 3: case 4: case 5: - chr1_x(space.machine(), 2 + mode, data, CHRROM); - state->m_mmc_reg[mode - 2] = BIT(data, 5); - if (!BIT(state->m_mmc_latch1, 7)) + chr1_x(machine(), 2 + mode, data, CHRROM); + m_mmc_reg[mode - 2] = BIT(data, 5); + if (!BIT(m_mmc_latch1, 7)) { - set_nt_page(space.machine(), 0, CIRAM, state->m_mmc_reg[0], 1); - set_nt_page(space.machine(), 1, CIRAM, state->m_mmc_reg[1], 1); - set_nt_page(space.machine(), 2, CIRAM, state->m_mmc_reg[2], 1); - set_nt_page(space.machine(), 3, CIRAM, state->m_mmc_reg[3], 1); + set_nt_page(machine(), 0, CIRAM, m_mmc_reg[0], 1); + set_nt_page(machine(), 1, CIRAM, m_mmc_reg[1], 1); + set_nt_page(machine(), 2, CIRAM, m_mmc_reg[2], 1); + set_nt_page(machine(), 3, CIRAM, m_mmc_reg[3], 1); } else - set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); + set_nt_mirroring(machine(), PPU_MIRROR_HORZ); break; - case 6: prg8_89(space.machine(), data); break; - case 7: prg8_ab(space.machine(), data); break; + case 6: prg8_89(machine(), data); break; + case 7: prg8_ab(machine(), data); break; } break; case 0: - state->m_mmc_latch1 = data; + m_mmc_latch1 = data; break; } } @@ -2732,13 +2715,12 @@ static WRITE8_HANDLER( namcot3425_w ) *************************************************************/ -static WRITE8_HANDLER( dis_74x377_w ) +WRITE8_MEMBER(nes_state::dis_74x377_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("dis_74x377_w, offset: %04x, data: %02x\n", offset, data)); - chr8(space.machine(), data >> 4, state->m_mmc_chr_source); - prg32(space.machine(), data & 0x0f); + chr8(machine(), data >> 4, m_mmc_chr_source); + prg32(machine(), data & 0x0f); } /************************************************************* @@ -2749,11 +2731,11 @@ static WRITE8_HANDLER( dis_74x377_w ) *************************************************************/ -static WRITE8_HANDLER( dis_74x139x74_m_w ) +WRITE8_MEMBER(nes_state::dis_74x139x74_m_w) { LOG_MMC(("dis_74x139x74_m_w, offset: %04x, data: %02x\n", offset, data)); - chr8(space.machine(), ((data & 0x02) >> 1) | ((data & 0x01) << 1), CHRROM); + chr8(machine(), ((data & 0x02) >> 1) | ((data & 0x01) << 1), CHRROM); } /************************************************************* @@ -2766,12 +2748,12 @@ static WRITE8_HANDLER( dis_74x139x74_m_w ) *************************************************************/ -static WRITE8_HANDLER( dis_74x161x138_m_w ) +WRITE8_MEMBER(nes_state::dis_74x161x138_m_w) { LOG_MMC(("dis_74x161x138_m_w, offset: %04x, data: %02x\n", offset, data)); - chr8(space.machine(), data >> 2, CHRROM); - prg32(space.machine(), data); + chr8(machine(), data >> 2, CHRROM); + prg32(machine(), data); } /************************************************************* @@ -2786,15 +2768,14 @@ static WRITE8_HANDLER( dis_74x161x138_m_w ) *************************************************************/ -static WRITE8_HANDLER( dis_74x161x161x32_w ) +WRITE8_MEMBER(nes_state::dis_74x161x161x32_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("dis_74x161x161x32_w, offset: %04x, data: %02x\n", offset, data)); - if (!state->m_hard_mirroring) // there are two 'variants' depending on hardwired or mapper ctrl mirroring - set_nt_mirroring(space.machine(), BIT(data, 7) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); - chr8(space.machine(), data, CHRROM); - prg16_89ab(space.machine(), data >> 4); + if (!m_hard_mirroring) // there are two 'variants' depending on hardwired or mapper ctrl mirroring + set_nt_mirroring(machine(), BIT(data, 7) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); + chr8(machine(), data, CHRROM); + prg16_89ab(machine(), data >> 4); } /************************************************************* @@ -2840,37 +2821,36 @@ static void bandai_lz_irq( device_t *device, int scanline, int vblank, int blank } } -static WRITE8_HANDLER( lz93d50_w ) +WRITE8_MEMBER(nes_state::lz93d50_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("lz93d50_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x000f) { case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7: - chr1_x(space.machine(), offset & 0x07, data, state->m_mmc_chr_source); + chr1_x(machine(), offset & 0x07, data, m_mmc_chr_source); break; case 8: - prg16_89ab(space.machine(), data); + prg16_89ab(machine(), data); break; case 9: switch (data & 0x03) { - case 0: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break; - case 1: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break; - case 2: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break; - case 3: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break; + case 0: set_nt_mirroring(machine(), PPU_MIRROR_VERT); break; + case 1: set_nt_mirroring(machine(), PPU_MIRROR_HORZ); break; + case 2: set_nt_mirroring(machine(), PPU_MIRROR_LOW); break; + case 3: set_nt_mirroring(machine(), PPU_MIRROR_HIGH); break; } break; case 0x0a: - state->m_IRQ_enable = data & 0x01; + m_IRQ_enable = data & 0x01; break; case 0x0b: - state->m_IRQ_count = (state->m_IRQ_count & 0xff00) | data; + m_IRQ_count = (m_IRQ_count & 0xff00) | data; break; case 0x0c: - state->m_IRQ_count = (state->m_IRQ_count & 0x00ff) | (data << 8); + m_IRQ_count = (m_IRQ_count & 0x00ff) | (data << 8); break; default: logerror("lz93d50_w uncaught write, offset: %04x, data: %02x\n", offset, data); @@ -2878,17 +2858,16 @@ static WRITE8_HANDLER( lz93d50_w ) } } -static WRITE8_HANDLER( lz93d50_m_w ) +WRITE8_MEMBER(nes_state::lz93d50_m_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("lz93d50_m_w, offset: %04x, data: %02x\n", offset, data)); - if (!state->m_battery && !state->m_wram) + if (!m_battery && !m_wram) lz93d50_w(space, offset & 0x0f, data, mem_mask); - else if (state->m_battery) - state->m_battery_ram[offset] = data; + else if (m_battery) + m_battery_ram[offset] = data; else - state->m_wram[offset] = data; + m_wram[offset] = data; } static void fjump2_set_prg( running_machine &machine ) @@ -2904,21 +2883,20 @@ static void fjump2_set_prg( running_machine &machine ) prg16_cdef(machine, mmc_helper | 0x0f); } -static WRITE8_HANDLER( fjump2_w ) +WRITE8_MEMBER(nes_state::fjump2_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("fjump2_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x000f) { case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7: - state->m_mmc_reg[offset & 0x000f] = data; - fjump2_set_prg(space.machine()); + m_mmc_reg[offset & 0x000f] = data; + fjump2_set_prg(machine()); break; case 8: - state->m_mmc_latch1 = (data & 0x0f); - fjump2_set_prg(space.machine()); + m_mmc_latch1 = (data & 0x0f); + fjump2_set_prg(machine()); break; default: lz93d50_m_w(space, offset & 0x0f, data, mem_mask); @@ -2938,11 +2916,11 @@ static WRITE8_HANDLER( fjump2_w ) *************************************************************/ -static WRITE8_HANDLER( bandai_ks_w ) +WRITE8_MEMBER(nes_state::bandai_ks_w) { LOG_MMC(("bandai_ks_w, offset: %04x, data: %02x\n", offset, data)); - prg16_89ab(space.machine(), data ^ 0x08); + prg16_89ab(machine(), data ^ 0x08); } /************************************************************* @@ -2958,18 +2936,17 @@ static WRITE8_HANDLER( bandai_ks_w ) *************************************************************/ -static WRITE8_HANDLER( bandai_ok_w ) +WRITE8_MEMBER(nes_state::bandai_ok_w) { - nes_state *state = space.machine().driver_data(); UINT8 mmc_helper; LOG_MMC(("mapper96_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), data); + prg32(machine(), data); - state->m_mmc_latch1 = data; - mmc_helper = (state->m_mmc_latch1 & 0x03) | (data & 0x04); - chr4_0(space.machine(), mmc_helper, CHRRAM); - chr4_4(space.machine(), 0x03 | (data & 0x04), CHRRAM); + m_mmc_latch1 = data; + mmc_helper = (m_mmc_latch1 & 0x03) | (data & 0x04); + chr4_0(machine(), mmc_helper, CHRRAM); + chr4_4(machine(), 0x03 | (data & 0x04), CHRRAM); } /************************************************************* @@ -2982,12 +2959,12 @@ static WRITE8_HANDLER( bandai_ok_w ) *************************************************************/ -static WRITE8_HANDLER( lrog017_w ) +WRITE8_MEMBER(nes_state::lrog017_w) { LOG_MMC(("lrog017_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), data); - chr2_0(space.machine(), (data >> 4), CHRROM); + prg32(machine(), data); + chr2_0(machine(), (data >> 4), CHRROM); } /************************************************************* @@ -2998,13 +2975,13 @@ static WRITE8_HANDLER( lrog017_w ) *************************************************************/ -static WRITE8_HANDLER( irem_hd_w ) +WRITE8_MEMBER(nes_state::irem_hd_w) { LOG_MMC(("irem_hd_w, offset: %04x, data: %02x\n", offset, data)); - set_nt_mirroring(space.machine(), BIT(data, 3) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ); - chr8(space.machine(), data >> 4, CHRROM); - prg16_89ab(space.machine(), data); + set_nt_mirroring(machine(), BIT(data, 3) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ); + chr8(machine(), data >> 4, CHRROM); + prg16_89ab(machine(), data); } /************************************************************* @@ -3019,14 +2996,14 @@ static WRITE8_HANDLER( irem_hd_w ) *************************************************************/ -static WRITE8_HANDLER( tam_s1_w ) +WRITE8_MEMBER(nes_state::tam_s1_w) { LOG_MMC(("tam_s1_w, offset: %04x, data: %02x\n", offset, data)); if (offset < 0x4000) { - set_nt_mirroring(space.machine(), BIT(data, 7) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ); - prg16_cdef(space.machine(), data); + set_nt_mirroring(machine(), BIT(data, 7) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ); + prg16_cdef(machine(), data); } } @@ -3040,27 +3017,26 @@ static WRITE8_HANDLER( tam_s1_w ) *************************************************************/ -static WRITE8_HANDLER( g101_w ) +WRITE8_MEMBER(nes_state::g101_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("g101_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x7000) { case 0x0000: // NEStopia here differs a little bit - state->m_mmc_latch1 ? prg8_cd(space.machine(), data) : prg8_89(space.machine(), data); + m_mmc_latch1 ? prg8_cd(machine(), data) : prg8_89(machine(), data); break; case 0x1000: - state->m_mmc_latch1 = BIT(data, 1); - if (!state->m_hard_mirroring) // there are two 'variants' depending on hardwired or mapper ctrl mirroring - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + m_mmc_latch1 = BIT(data, 1); + if (!m_hard_mirroring) // there are two 'variants' depending on hardwired or mapper ctrl mirroring + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; case 0x2000: - prg8_ab(space.machine(), data); + prg8_ab(machine(), data); break; case 0x3000: - chr1_x(space.machine(), offset & 0x07, data, CHRROM); + chr1_x(machine(), offset & 0x07, data, CHRROM); break; } } @@ -3096,48 +3072,47 @@ static void h3001_irq( device_t *device, int scanline, int vblank, int blanked ) } } -static WRITE8_HANDLER( h3001_w ) +WRITE8_MEMBER(nes_state::h3001_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("h3001_w, offset %04x, data: %02x\n", offset, data)); switch (offset & 0x7fff) { case 0x0000: - prg8_89(space.machine(), data); + prg8_89(machine(), data); break; case 0x1001: - set_nt_mirroring(space.machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; case 0x1003: - state->m_IRQ_enable = data & 0x80; + m_IRQ_enable = data & 0x80; break; case 0x1004: - state->m_IRQ_count = state->m_IRQ_count_latch; + m_IRQ_count = m_IRQ_count_latch; break; case 0x1005: - state->m_IRQ_count_latch = (state->m_IRQ_count_latch & 0x00ff) | (data << 8); + m_IRQ_count_latch = (m_IRQ_count_latch & 0x00ff) | (data << 8); break; case 0x1006: - state->m_IRQ_count_latch = (state->m_IRQ_count_latch & 0xff00) | data; + m_IRQ_count_latch = (m_IRQ_count_latch & 0xff00) | data; break; case 0x2000: - prg8_ab(space.machine(), data); + prg8_ab(machine(), data); break; case 0x3000: case 0x3001: case 0x3002: case 0x3003: case 0x3004: case 0x3005: case 0x3006: case 0x3007: - chr1_x(space.machine(), offset & 0x07, data, CHRROM); + chr1_x(machine(), offset & 0x07, data, CHRROM); break; case 0x4000: - prg8_cd(space.machine(), data); + prg8_cd(machine(), data); break; default: @@ -3209,37 +3184,36 @@ static void ss88006_irq( device_t *device, int scanline, int vblank, int blanked } } -static WRITE8_HANDLER( ss88006_w ) +WRITE8_MEMBER(nes_state::ss88006_w) { - nes_state *state = space.machine().driver_data(); UINT8 bank; LOG_MMC(("mapper18_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x7003) { case 0x0000: - state->m_mmc_prg_bank[0] = (state->m_mmc_prg_bank[0] & 0xf0) | (data & 0x0f); - prg8_89(space.machine(), state->m_mmc_prg_bank[0]); + m_mmc_prg_bank[0] = (m_mmc_prg_bank[0] & 0xf0) | (data & 0x0f); + prg8_89(machine(), m_mmc_prg_bank[0]); break; case 0x0001: - state->m_mmc_prg_bank[0] = (state->m_mmc_prg_bank[0] & 0x0f) | (data << 4); - prg8_89(space.machine(), state->m_mmc_prg_bank[0]); + m_mmc_prg_bank[0] = (m_mmc_prg_bank[0] & 0x0f) | (data << 4); + prg8_89(machine(), m_mmc_prg_bank[0]); break; case 0x0002: - state->m_mmc_prg_bank[1] = (state->m_mmc_prg_bank[1] & 0xf0) | (data & 0x0f); - prg8_ab(space.machine(), state->m_mmc_prg_bank[1]); + m_mmc_prg_bank[1] = (m_mmc_prg_bank[1] & 0xf0) | (data & 0x0f); + prg8_ab(machine(), m_mmc_prg_bank[1]); break; case 0x0003: - state->m_mmc_prg_bank[1] = (state->m_mmc_prg_bank[1] & 0x0f) | (data << 4); - prg8_ab(space.machine(), state->m_mmc_prg_bank[1]); + m_mmc_prg_bank[1] = (m_mmc_prg_bank[1] & 0x0f) | (data << 4); + prg8_ab(machine(), m_mmc_prg_bank[1]); break; case 0x1000: - state->m_mmc_prg_bank[2] = (state->m_mmc_prg_bank[2] & 0xf0) | (data & 0x0f); - prg8_cd(space.machine(), state->m_mmc_prg_bank[2]); + m_mmc_prg_bank[2] = (m_mmc_prg_bank[2] & 0xf0) | (data & 0x0f); + prg8_cd(machine(), m_mmc_prg_bank[2]); break; case 0x1001: - state->m_mmc_prg_bank[2] = (state->m_mmc_prg_bank[2] & 0x0f) | (data << 4); - prg8_cd(space.machine(), state->m_mmc_prg_bank[2]); + m_mmc_prg_bank[2] = (m_mmc_prg_bank[2] & 0x0f) | (data << 4); + prg8_cd(machine(), m_mmc_prg_bank[2]); break; /* $9002, 3 (1002, 3) uncaught = Jaleco Baseball writes 0 */ @@ -3251,41 +3225,41 @@ static WRITE8_HANDLER( ss88006_w ) case 0x5000: case 0x5001: case 0x5002: case 0x5003: bank = ((offset & 0x7000) - 0x2000) / 0x0800 + ((offset & 0x0002) >> 1); if (offset & 0x0001) - state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & 0x0f) | ((data & 0x0f)<< 4); + m_mmc_vrom_bank[bank] = (m_mmc_vrom_bank[bank] & 0x0f) | ((data & 0x0f)<< 4); else - state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & 0xf0) | (data & 0x0f); + m_mmc_vrom_bank[bank] = (m_mmc_vrom_bank[bank] & 0xf0) | (data & 0x0f); - chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM); + chr1_x(machine(), bank, m_mmc_vrom_bank[bank], CHRROM); break; case 0x6000: - state->m_IRQ_count_latch = (state->m_IRQ_count_latch & 0xfff0) | (data & 0x0f); + m_IRQ_count_latch = (m_IRQ_count_latch & 0xfff0) | (data & 0x0f); break; case 0x6001: - state->m_IRQ_count_latch = (state->m_IRQ_count_latch & 0xff0f) | ((data & 0x0f) << 4); + m_IRQ_count_latch = (m_IRQ_count_latch & 0xff0f) | ((data & 0x0f) << 4); break; case 0x6002: - state->m_IRQ_count_latch = (state->m_IRQ_count_latch & 0xf0ff) | ((data & 0x0f) << 8); + m_IRQ_count_latch = (m_IRQ_count_latch & 0xf0ff) | ((data & 0x0f) << 8); break; case 0x6003: - state->m_IRQ_count_latch = (state->m_IRQ_count_latch & 0x0fff) | ((data & 0x0f) << 12); + m_IRQ_count_latch = (m_IRQ_count_latch & 0x0fff) | ((data & 0x0f) << 12); break; case 0x7000: - state->m_IRQ_count = state->m_IRQ_count_latch; + m_IRQ_count = m_IRQ_count_latch; break; case 0x7001: - state->m_IRQ_enable = data & 0x01; - state->m_IRQ_mode = data & 0x0e; + m_IRQ_enable = data & 0x01; + m_IRQ_mode = data & 0x0e; break; case 0x7002: switch (data & 0x03) { - case 0: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break; - case 1: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break; - case 2: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break; - case 3: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break; + case 0: set_nt_mirroring(machine(), PPU_MIRROR_HORZ); break; + case 1: set_nt_mirroring(machine(), PPU_MIRROR_VERT); break; + case 2: set_nt_mirroring(machine(), PPU_MIRROR_LOW); break; + case 3: set_nt_mirroring(machine(), PPU_MIRROR_HIGH); break; } break; @@ -3307,11 +3281,11 @@ static WRITE8_HANDLER( ss88006_w ) *************************************************************/ -static WRITE8_HANDLER( jf11_m_w ) +WRITE8_MEMBER(nes_state::jf11_m_w) { LOG_MMC(("jf11_m_w, offset: %04x, data: %02x\n", offset, data)); - chr8(space.machine(), data, CHRROM); - prg32(space.machine(), data >> 4); + chr8(machine(), data, CHRROM); + prg32(machine(), data >> 4); } /************************************************************* @@ -3328,14 +3302,14 @@ static WRITE8_HANDLER( jf11_m_w ) *************************************************************/ -static WRITE8_HANDLER( jf13_m_w ) +WRITE8_MEMBER(nes_state::jf13_m_w) { LOG_MMC(("jf13_m_w, offset: %04x, data: %02x\n", offset, data)); if (offset == 0) { - prg32(space.machine(), (data >> 4) & 0x03); - chr8(space.machine(), ((data >> 4) & 0x04) | (data & 0x03), CHRROM); + prg32(machine(), (data >> 4) & 0x03); + chr8(machine(), ((data >> 4) & 0x04) | (data & 0x03), CHRROM); } if (offset == 0x1000) @@ -3357,13 +3331,13 @@ static WRITE8_HANDLER( jf13_m_w ) *************************************************************/ -static WRITE8_HANDLER( jf16_w ) +WRITE8_MEMBER(nes_state::jf16_w) { LOG_MMC(("jf16_w, offset: %04x, data: %02x\n", offset, data)); - set_nt_mirroring(space.machine(), BIT(data, 3) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); - chr8(space.machine(), data >> 4, CHRROM); - prg16_89ab(space.machine(), data); + set_nt_mirroring(machine(), BIT(data, 3) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); + chr8(machine(), data >> 4, CHRROM); + prg16_89ab(machine(), data); } /************************************************************* @@ -3381,14 +3355,14 @@ static WRITE8_HANDLER( jf16_w ) *************************************************************/ -static WRITE8_HANDLER( jf17_w ) +WRITE8_MEMBER(nes_state::jf17_w) { LOG_MMC(("jf17_w, offset: %04x, data: %02x\n", offset, data)); if (BIT(data, 7)) - prg16_89ab(space.machine(), data & 0x0f); + prg16_89ab(machine(), data & 0x0f); if (BIT(data, 6)) - chr8(space.machine(), data & 0x0f, CHRROM); + chr8(machine(), data & 0x0f, CHRROM); if (BIT(data, 5) && !BIT(data,4)) LOG_MMC(("Jaleco JF-17 sound write, data: %02x\n", data & 0x1f)); } @@ -3407,14 +3381,14 @@ static WRITE8_HANDLER( jf17_w ) *************************************************************/ -static WRITE8_HANDLER( jf19_w ) +WRITE8_MEMBER(nes_state::jf19_w) { LOG_MMC(("jf19_w, offset: %04x, data: %02x\n", offset, data)); if (BIT(data, 7)) - prg16_cdef(space.machine(), data & 0x0f); + prg16_cdef(machine(), data & 0x0f); if (BIT(data, 6)) - chr8(space.machine(), data & 0x0f, CHRROM); + chr8(machine(), data & 0x0f, CHRROM); if (BIT(data, 5) && !BIT(data,4)) LOG_MMC(("Jaleco JF-19 sound write, data: %02x\n", data & 0x1f)); } @@ -3431,36 +3405,35 @@ static WRITE8_HANDLER( jf19_w ) *************************************************************/ -static WRITE8_HANDLER( konami_vrc1_w ) +WRITE8_MEMBER(nes_state::konami_vrc1_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("konami_vrc1_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x7000) { case 0x0000: - prg8_89(space.machine(), data); + prg8_89(machine(), data); break; case 0x1000: - set_nt_mirroring(space.machine(), (data & 0x01) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); - state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & 0x0f) | ((data & 0x02) << 3); - state->m_mmc_vrom_bank[1] = (state->m_mmc_vrom_bank[1] & 0x0f) | ((data & 0x04) << 2); - chr4_0(space.machine(), state->m_mmc_vrom_bank[0], CHRROM); - chr4_4(space.machine(), state->m_mmc_vrom_bank[1], CHRROM); + set_nt_mirroring(machine(), (data & 0x01) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + m_mmc_vrom_bank[0] = (m_mmc_vrom_bank[0] & 0x0f) | ((data & 0x02) << 3); + m_mmc_vrom_bank[1] = (m_mmc_vrom_bank[1] & 0x0f) | ((data & 0x04) << 2); + chr4_0(machine(), m_mmc_vrom_bank[0], CHRROM); + chr4_4(machine(), m_mmc_vrom_bank[1], CHRROM); break; case 0x2000: - prg8_ab(space.machine(), data); + prg8_ab(machine(), data); break; case 0x4000: - prg8_cd(space.machine(), data); + prg8_cd(machine(), data); break; case 0x6000: - state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & 0x10) | (data & 0x0f); - chr4_0(space.machine(), state->m_mmc_vrom_bank[0], CHRROM); + m_mmc_vrom_bank[0] = (m_mmc_vrom_bank[0] & 0x10) | (data & 0x0f); + chr4_0(machine(), m_mmc_vrom_bank[0], CHRROM); break; case 0x7000: - state->m_mmc_vrom_bank[1] = (state->m_mmc_vrom_bank[1] & 0x10) | (data & 0x0f); - chr4_4(space.machine(), state->m_mmc_vrom_bank[1], CHRROM); + m_mmc_vrom_bank[1] = (m_mmc_vrom_bank[1] & 0x10) | (data & 0x0f); + chr4_4(machine(), m_mmc_vrom_bank[1], CHRROM); break; } } @@ -3473,37 +3446,36 @@ static WRITE8_HANDLER( konami_vrc1_w ) *************************************************************/ -static WRITE8_HANDLER( konami_vrc2_w ) +WRITE8_MEMBER(nes_state::konami_vrc2_w) { - nes_state *state = space.machine().driver_data(); UINT8 bank, shift, mask; UINT32 shifted_offs = (offset & 0x7000) - | ((offset << (9 - state->m_vrc_ls_prg_a)) & 0x200) - | ((offset << (8 - state->m_vrc_ls_prg_b)) & 0x100); + | ((offset << (9 - m_vrc_ls_prg_a)) & 0x200) + | ((offset << (8 - m_vrc_ls_prg_b)) & 0x100); LOG_MMC(("konami_vrc2_w, offset: %04x, data: %02x\n", offset, data)); if (offset < 0x1000) - prg8_89(space.machine(), data); + prg8_89(machine(), data); else if (offset < 0x2000) { switch (data & 0x03) { - case 0x00: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break; - case 0x01: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break; - case 0x02: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break; - case 0x03: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break; + case 0x00: set_nt_mirroring(machine(), PPU_MIRROR_VERT); break; + case 0x01: set_nt_mirroring(machine(), PPU_MIRROR_HORZ); break; + case 0x02: set_nt_mirroring(machine(), PPU_MIRROR_LOW); break; + case 0x03: set_nt_mirroring(machine(), PPU_MIRROR_HIGH); break; } } else if (offset < 0x3000) - prg8_ab(space.machine(), data); + prg8_ab(machine(), data); else if (offset < 0x7000) { bank = ((shifted_offs & 0x7000) - 0x3000) / 0x0800 + BIT(shifted_offs, 9); shift = BIT(shifted_offs, 8) * 4; mask = (0xf0 >> shift); - state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & mask) - | (((data >> state->m_vrc_ls_chr) & 0x0f) << shift); - chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM); + m_mmc_vrom_bank[bank] = (m_mmc_vrom_bank[bank] & mask) + | (((data >> m_vrc_ls_chr) & 0x0f) << shift); + chr1_x(machine(), bank, m_mmc_vrom_bank[bank], CHRROM); } else logerror("konami_vrc2_w uncaught write, addr: %04x value: %02x\n", offset + 0x8000, data); @@ -3521,32 +3493,31 @@ static WRITE8_HANDLER( konami_vrc2_w ) *************************************************************/ -static WRITE8_HANDLER( konami_vrc3_w ) +WRITE8_MEMBER(nes_state::konami_vrc3_w) { LOG_MMC(("konami_vrc3_w, offset: %04x, data: %02x\n", offset, data)); - nes_state *state = space.machine().driver_data(); switch (offset & 0x7000) { case 0x0000: case 0x1000: /* dunno which address controls these */ - state->m_IRQ_count_latch = data; - state->m_IRQ_enable_latch = data; + m_IRQ_count_latch = data; + m_IRQ_enable_latch = data; break; case 0x2000: - state->m_IRQ_enable = data; + m_IRQ_enable = data; break; case 0x3000: - state->m_IRQ_count &= ~0x0f; - state->m_IRQ_count |= data & 0x0f; + m_IRQ_count &= ~0x0f; + m_IRQ_count |= data & 0x0f; break; case 0x4000: - state->m_IRQ_count &= ~0xf0; - state->m_IRQ_count |= (data & 0x0f) << 4; + m_IRQ_count &= ~0xf0; + m_IRQ_count |= (data & 0x0f) << 4; break; case 0x7000: - prg16_89ab(space.machine(), data); + prg16_89ab(machine(), data); break; default: logerror("konami_vrc3_w uncaught write, offset %04x, data: %02x\n", offset, data); @@ -3589,22 +3560,21 @@ static void konami_irq( device_t *device, int scanline, int vblank, int blanked } } -static WRITE8_HANDLER( konami_vrc4_w ) +WRITE8_MEMBER(nes_state::konami_vrc4_w) { - nes_state *state = space.machine().driver_data(); UINT8 bank, shift, mask; UINT32 shifted_offs = (offset & 0x7000) - | ((offset << (9 - state->m_vrc_ls_prg_a)) & 0x200) - | ((offset << (8 - state->m_vrc_ls_prg_b)) & 0x100); + | ((offset << (9 - m_vrc_ls_prg_a)) & 0x200) + | ((offset << (8 - m_vrc_ls_prg_b)) & 0x100); LOG_MMC(("konami_vrc4_w, offset: %04x, data: %02x\n", offset, data)); if (offset < 0x1000) { - state->m_mmc_prg_bank[0] = data; - vrc4_set_prg(space.machine()); + m_mmc_prg_bank[0] = data; + vrc4_set_prg(machine()); } else if (offset >= 0x2000 && offset < 0x3000) - prg8_ab(space.machine(), data); + prg8_ab(machine(), data); else { switch (shifted_offs & 0x7300) @@ -3613,16 +3583,16 @@ static WRITE8_HANDLER( konami_vrc4_w ) case 0x1100: switch (data & 0x03) { - case 0x00: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break; - case 0x01: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break; - case 0x02: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break; - case 0x03: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break; + case 0x00: set_nt_mirroring(machine(), PPU_MIRROR_VERT); break; + case 0x01: set_nt_mirroring(machine(), PPU_MIRROR_HORZ); break; + case 0x02: set_nt_mirroring(machine(), PPU_MIRROR_LOW); break; + case 0x03: set_nt_mirroring(machine(), PPU_MIRROR_HIGH); break; } break; case 0x1200: case 0x1300: - state->m_mmc_latch1 = data & 0x02; - vrc4_set_prg(space.machine()); + m_mmc_latch1 = data & 0x02; + vrc4_set_prg(machine()); break; case 0x3000: case 0x3100: @@ -3643,24 +3613,24 @@ static WRITE8_HANDLER( konami_vrc4_w ) bank = ((shifted_offs & 0x7000) - 0x3000) / 0x0800 + BIT(shifted_offs, 9); shift = BIT(shifted_offs, 8) * 4; mask = (0xf0 >> shift); - state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & mask) | ((data & 0x0f) << shift); - chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM); + m_mmc_vrom_bank[bank] = (m_mmc_vrom_bank[bank] & mask) | ((data & 0x0f) << shift); + chr1_x(machine(), bank, m_mmc_vrom_bank[bank], CHRROM); break; case 0x7000: - state->m_IRQ_count_latch = (state->m_IRQ_count_latch & 0xf0) | (data & 0x0f); + m_IRQ_count_latch = (m_IRQ_count_latch & 0xf0) | (data & 0x0f); break; case 0x7100: - state->m_IRQ_count_latch = (state->m_IRQ_count_latch & 0x0f) | ((data & 0x0f) << 4); + m_IRQ_count_latch = (m_IRQ_count_latch & 0x0f) | ((data & 0x0f) << 4); break; case 0x7200: - state->m_IRQ_mode = data & 0x04; // currently not implemented: 0 = prescaler mode / 1 = CPU mode - state->m_IRQ_enable = data & 0x02; - state->m_IRQ_enable_latch = data & 0x01; + m_IRQ_mode = data & 0x04; // currently not implemented: 0 = prescaler mode / 1 = CPU mode + m_IRQ_enable = data & 0x02; + m_IRQ_enable_latch = data & 0x01; if (data & 0x02) - state->m_IRQ_count = state->m_IRQ_count_latch; + m_IRQ_count = m_IRQ_count_latch; break; case 0x7300: - state->m_IRQ_enable = state->m_IRQ_enable_latch; + m_IRQ_enable = m_IRQ_enable_latch; break; default: logerror("konami_vrc4_w uncaught write, addr: %04x value: %02x\n", shifted_offs + 0x8000, data); @@ -3678,19 +3648,18 @@ static WRITE8_HANDLER( konami_vrc4_w ) *************************************************************/ -static WRITE8_HANDLER( konami_vrc6_w ) +WRITE8_MEMBER(nes_state::konami_vrc6_w) { - nes_state *state = space.machine().driver_data(); UINT8 bank; UINT32 shifted_offs = (offset & 0x7000) - | ((offset << (9 - state->m_vrc_ls_prg_a)) & 0x200) - | ((offset << (8 - state->m_vrc_ls_prg_b)) & 0x100); + | ((offset << (9 - m_vrc_ls_prg_a)) & 0x200) + | ((offset << (8 - m_vrc_ls_prg_b)) & 0x100); LOG_MMC(("konami_vrc6_w, offset: %04x, data: %02x\n", offset, data)); if (offset < 0x1000) - prg16_89ab(space.machine(), data); + prg16_89ab(machine(), data); else if (offset >= 0x4000 && offset < 0x5000) - prg8_cd(space.machine(), data); + prg8_cd(machine(), data); else { switch (shifted_offs & 0x7300) @@ -3709,10 +3678,10 @@ static WRITE8_HANDLER( konami_vrc6_w ) case 0x3300: switch (data & 0x0c) { - case 0x00: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break; - case 0x04: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break; - case 0x08: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break; - case 0x0c: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break; + case 0x00: set_nt_mirroring(machine(), PPU_MIRROR_VERT); break; + case 0x04: set_nt_mirroring(machine(), PPU_MIRROR_HORZ); break; + case 0x08: set_nt_mirroring(machine(), PPU_MIRROR_LOW); break; + case 0x0c: set_nt_mirroring(machine(), PPU_MIRROR_HIGH); break; } break; case 0x5000: @@ -3724,20 +3693,20 @@ static WRITE8_HANDLER( konami_vrc6_w ) case 0x6200: case 0x6300: bank = ((shifted_offs & 0x7000) - 0x5000) / 0x0400 + ((shifted_offs & 0x0300) >> 8); - chr1_x(space.machine(), bank, data, CHRROM); + chr1_x(machine(), bank, data, CHRROM); break; case 0x7000: - state->m_IRQ_count_latch = data; + m_IRQ_count_latch = data; break; case 0x7100: - state->m_IRQ_mode = data & 0x04; // currently not implemented: 0 = prescaler mode / 1 = CPU mode - state->m_IRQ_enable = data & 0x02; - state->m_IRQ_enable_latch = data & 0x01; + m_IRQ_mode = data & 0x04; // currently not implemented: 0 = prescaler mode / 1 = CPU mode + m_IRQ_enable = data & 0x02; + m_IRQ_enable_latch = data & 0x01; if (data & 0x02) - state->m_IRQ_count = state->m_IRQ_count_latch; + m_IRQ_count = m_IRQ_count_latch; break; case 0x7200: - state->m_IRQ_enable = state->m_IRQ_enable_latch; + m_IRQ_enable = m_IRQ_enable_latch; break; default: logerror("konami_vrc6_w uncaught write, addr: %04x value: %02x\n", shifted_offs + 0x8000, data); @@ -3758,25 +3727,24 @@ static WRITE8_HANDLER( konami_vrc6_w ) *************************************************************/ -static WRITE8_HANDLER( konami_vrc7_w ) +WRITE8_MEMBER(nes_state::konami_vrc7_w) { - nes_state *state = space.machine().driver_data(); UINT8 bank; LOG_MMC(("konami_vrc7_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x7018) { case 0x0000: - prg8_89(space.machine(), data); + prg8_89(machine(), data); break; case 0x0008: case 0x0010: case 0x0018: - prg8_ab(space.machine(), data); + prg8_ab(machine(), data); break; case 0x1000: - prg8_cd(space.machine(), data); + prg8_cd(machine(), data); break; /* TODO: there are sound regs in here */ @@ -3798,30 +3766,30 @@ static WRITE8_HANDLER( konami_vrc7_w ) case 0x5010: case 0x5018: bank = ((offset & 0x7000) - 0x2000) / 0x0800 + ((offset & 0x0018) ? 1 : 0); - chr1_x(space.machine(), bank, data, state->m_mmc_chr_source); + chr1_x(machine(), bank, data, m_mmc_chr_source); break; case 0x6000: switch (data & 0x03) { - case 0x00: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break; - case 0x01: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break; - case 0x02: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break; - case 0x03: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break; + case 0x00: set_nt_mirroring(machine(), PPU_MIRROR_VERT); break; + case 0x01: set_nt_mirroring(machine(), PPU_MIRROR_HORZ); break; + case 0x02: set_nt_mirroring(machine(), PPU_MIRROR_LOW); break; + case 0x03: set_nt_mirroring(machine(), PPU_MIRROR_HIGH); break; } break; case 0x6008: case 0x6010: case 0x6018: - state->m_IRQ_count_latch = data; + m_IRQ_count_latch = data; break; case 0x7000: - state->m_IRQ_mode = data & 0x04; // currently not implemented: 0 = prescaler mode / 1 = CPU mode - state->m_IRQ_enable = data & 0x02; - state->m_IRQ_enable_latch = data & 0x01; + m_IRQ_mode = data & 0x04; // currently not implemented: 0 = prescaler mode / 1 = CPU mode + m_IRQ_enable = data & 0x02; + m_IRQ_enable_latch = data & 0x01; if (data & 0x02) - state->m_IRQ_count = state->m_IRQ_count_latch; + m_IRQ_count = m_IRQ_count_latch; break; case 0x7008: case 0x7010: case 0x7018: - state->m_IRQ_enable = state->m_IRQ_enable_latch; + m_IRQ_enable = m_IRQ_enable_latch; break; default: @@ -3862,9 +3830,8 @@ static void namcot_irq( device_t *device, int scanline, int vblank, int blanked } } -static WRITE8_HANDLER( namcot163_l_w ) +WRITE8_MEMBER(nes_state::namcot163_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("namcot163_l_w, offset: %04x, data: %02x\n", offset, data)); offset += 0x100; @@ -3874,27 +3841,26 @@ static WRITE8_HANDLER( namcot163_l_w ) LOG_MMC(("Namcot-163 sound reg write, data: %02x\n", data)); break; case 0x1000: /* low byte of IRQ */ - state->m_IRQ_count = (state->m_IRQ_count & 0x7f00) | data; + m_IRQ_count = (m_IRQ_count & 0x7f00) | data; break; case 0x1800: /* high byte of IRQ, IRQ enable in high bit */ - state->m_IRQ_count = (state->m_IRQ_count & 0xff) | ((data & 0x7f) << 8); - state->m_IRQ_enable = data & 0x80; + m_IRQ_count = (m_IRQ_count & 0xff) | ((data & 0x7f) << 8); + m_IRQ_enable = data & 0x80; break; } } -static READ8_HANDLER( namcot163_l_r ) +READ8_MEMBER(nes_state::namcot163_l_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("namcot163_l_r, offset: %04x\n", offset)); offset += 0x100; switch (offset & 0x1800) { case 0x1000: - return state->m_IRQ_count & 0xff; + return m_IRQ_count & 0xff; case 0x1800: - return (state->m_IRQ_count >> 8) & 0xff; + return (m_IRQ_count >> 8) & 0xff; case 0x0800: LOG_MMC(("Namcot-163 sound reg read\n")); default: @@ -3910,9 +3876,8 @@ static void namcot163_set_mirror( running_machine &machine, UINT8 page, UINT8 da set_nt_page(machine, page, ROM, data, 0); } -static WRITE8_HANDLER( namcot163_w ) +WRITE8_MEMBER(nes_state::namcot163_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("namcot163_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x7800) { @@ -3920,29 +3885,29 @@ static WRITE8_HANDLER( namcot163_w ) case 0x1000: case 0x1800: case 0x2000: case 0x2800: case 0x3000: case 0x3800: - chr1_x(space.machine(), offset / 0x800, data, CHRROM); + chr1_x(machine(), offset / 0x800, data, CHRROM); break; case 0x4000: - namcot163_set_mirror(space.machine(), 0, data); + namcot163_set_mirror(machine(), 0, data); break; case 0x4800: - namcot163_set_mirror(space.machine(), 1, data); + namcot163_set_mirror(machine(), 1, data); break; case 0x5000: - namcot163_set_mirror(space.machine(), 2, data); + namcot163_set_mirror(machine(), 2, data); break; case 0x5800: - namcot163_set_mirror(space.machine(), 3, data); + namcot163_set_mirror(machine(), 3, data); break; case 0x6000: - prg8_89(space.machine(), data & 0x3f); + prg8_89(machine(), data & 0x3f); break; case 0x6800: - state->m_mmc_latch1 = data & 0xc0; // this should enable High CHRRAM, but we still have to properly implement it! - prg8_ab(space.machine(), data & 0x3f); + m_mmc_latch1 = data & 0xc0; // this should enable High CHRRAM, but we still have to properly implement it! + prg8_ab(machine(), data & 0x3f); break; case 0x7000: - prg8_cd(space.machine(), data & 0x3f); + prg8_cd(machine(), data & 0x3f); break; case 0x7800: LOG_MMC(("Namcot-163 sound address write, data: %02x\n", data)); @@ -3962,18 +3927,17 @@ static WRITE8_HANDLER( namcot163_w ) *************************************************************/ -static WRITE8_HANDLER( sunsoft1_m_w ) +WRITE8_MEMBER(nes_state::sunsoft1_m_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("sunsoft1_m_w, offset: %04x, data: %02x\n", offset, data)); - if (state->m_chr_chunks) + if (m_chr_chunks) { - chr4_0(space.machine(), data & 0x0f, CHRROM); - chr4_4(space.machine(), data >> 4, CHRROM); + chr4_0(machine(), data & 0x0f, CHRROM); + chr4_4(machine(), data >> 4, CHRROM); } else - prg16_89ab(space.machine(), data & 0x0f); + prg16_89ab(machine(), data & 0x0f); } /************************************************************* @@ -3987,18 +3951,17 @@ static WRITE8_HANDLER( sunsoft1_m_w ) *************************************************************/ -static WRITE8_HANDLER( sunsoft2_w ) +WRITE8_MEMBER(nes_state::sunsoft2_w) { - nes_state *state = space.machine().driver_data(); UINT8 sunsoft_helper = (data & 0x07) | ((data & 0x80) ? 0x08 : 0x00); LOG_MMC(("sunsoft2_w, offset: %04x, data: %02x\n", offset, data)); - if (!state->m_hard_mirroring) // there are two 'variants' depending on hardwired or mapper ctrl mirroring - set_nt_mirroring(space.machine(), BIT(data, 3) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); - if (state->m_chr_chunks) - chr8(space.machine(), sunsoft_helper, CHRROM); + if (!m_hard_mirroring) // there are two 'variants' depending on hardwired or mapper ctrl mirroring + set_nt_mirroring(machine(), BIT(data, 3) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); + if (m_chr_chunks) + chr8(machine(), sunsoft_helper, CHRROM); - prg16_89ab(space.machine(), data >> 4); + prg16_89ab(machine(), data >> 4); } /************************************************************* @@ -4034,48 +3997,47 @@ static void sunsoft3_irq( device_t *device, int scanline, int vblank, int blanke } } -static WRITE8_HANDLER( sunsoft3_w ) +WRITE8_MEMBER(nes_state::sunsoft3_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("sunsoft3_w, offset %04x, data: %02x\n", offset, data)); switch (offset & 0x7800) { case 0x0800: - chr2_0(space.machine(), data, CHRROM); + chr2_0(machine(), data, CHRROM); break; case 0x1800: - chr2_2(space.machine(), data, CHRROM); + chr2_2(machine(), data, CHRROM); break; case 0x2800: - chr2_4(space.machine(), data, CHRROM); + chr2_4(machine(), data, CHRROM); break; case 0x3800: - chr2_6(space.machine(), data, CHRROM); + chr2_6(machine(), data, CHRROM); break; case 0x4000: case 0x4800: - state->m_IRQ_toggle ^= 1; - if (state->m_IRQ_toggle) - state->m_IRQ_count = (state->m_IRQ_count & 0x00ff) | (data << 8); + m_IRQ_toggle ^= 1; + if (m_IRQ_toggle) + m_IRQ_count = (m_IRQ_count & 0x00ff) | (data << 8); else - state->m_IRQ_count = (state->m_IRQ_count & 0xff00) | data; + m_IRQ_count = (m_IRQ_count & 0xff00) | data; break; case 0x5800: - state->m_IRQ_enable = BIT(data, 4); - state->m_IRQ_toggle = 0; + m_IRQ_enable = BIT(data, 4); + m_IRQ_toggle = 0; break; case 0x6800: switch (data & 3) { - case 0x00: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break; - case 0x01: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break; - case 0x02: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break; - case 0x03: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break; + case 0x00: set_nt_mirroring(machine(), PPU_MIRROR_VERT); break; + case 0x01: set_nt_mirroring(machine(), PPU_MIRROR_HORZ); break; + case 0x02: set_nt_mirroring(machine(), PPU_MIRROR_LOW); break; + case 0x03: set_nt_mirroring(machine(), PPU_MIRROR_HIGH); break; } break; case 0x7800: - prg16_89ab(space.machine(), data); + prg16_89ab(machine(), data); break; default: LOG_MMC(("sunsoft3_w uncaught write, offset: %04x, data: %02x\n", offset, data)); @@ -4097,36 +4059,36 @@ static WRITE8_HANDLER( sunsoft3_w ) *************************************************************/ -static WRITE8_HANDLER( tc0190fmc_w ) +WRITE8_MEMBER(nes_state::tc0190fmc_w) { LOG_MMC(("tc0190fmc_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x7003) { case 0x0000: - set_nt_mirroring(space.machine(), BIT(data, 6) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); - prg8_89(space.machine(), data); + set_nt_mirroring(machine(), BIT(data, 6) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + prg8_89(machine(), data); break; case 0x0001: - prg8_ab(space.machine(), data); + prg8_ab(machine(), data); break; case 0x0002: - chr2_0(space.machine(), data, CHRROM); + chr2_0(machine(), data, CHRROM); break; case 0x0003: - chr2_2(space.machine(), data, CHRROM); + chr2_2(machine(), data, CHRROM); break; case 0x2000: - chr1_4(space.machine(), data, CHRROM); + chr1_4(machine(), data, CHRROM); break; case 0x2001: - chr1_5(space.machine(), data, CHRROM); + chr1_5(machine(), data, CHRROM); break; case 0x2002: - chr1_6(space.machine(), data, CHRROM); + chr1_6(machine(), data, CHRROM); break; case 0x2003: - chr1_7(space.machine(), data, CHRROM); + chr1_7(machine(), data, CHRROM); break; } } @@ -4150,15 +4112,14 @@ static WRITE8_HANDLER( tc0190fmc_w ) *************************************************************/ -static WRITE8_HANDLER( tc0190fmc_p16_w ) +WRITE8_MEMBER(nes_state::tc0190fmc_p16_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("tc0190fmc_p16_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x7003) { case 0x0000: - prg8_89(space.machine(), data); + prg8_89(machine(), data); break; case 0x0001: case 0x0002: @@ -4170,19 +4131,19 @@ static WRITE8_HANDLER( tc0190fmc_p16_w ) tc0190fmc_w(space, offset, data, mem_mask); break; case 0x4000: - state->m_IRQ_count_latch = (0x100 - data) & 0xff; + m_IRQ_count_latch = (0x100 - data) & 0xff; break; case 0x4001: - state->m_IRQ_count = state->m_IRQ_count_latch; + m_IRQ_count = m_IRQ_count_latch; break; case 0x4002: - state->m_IRQ_enable = 1; + m_IRQ_enable = 1; break; case 0x4003: - state->m_IRQ_enable = 0; + m_IRQ_enable = 0; break; case 0x6000: - set_nt_mirroring(space.machine(), BIT(data, 6) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 6) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; } } @@ -4201,76 +4162,74 @@ static WRITE8_HANDLER( tc0190fmc_p16_w ) *************************************************************/ -static WRITE8_HANDLER( x1005_m_w ) +WRITE8_MEMBER(nes_state::x1005_m_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("x1005_m_w, offset: %04x, data: %02x\n", offset, data)); switch (offset) { case 0x1ef0: - chr2_0(space.machine(), (data & 0x7f) >> 1, CHRROM); + chr2_0(machine(), (data & 0x7f) >> 1, CHRROM); break; case 0x1ef1: - chr2_2(space.machine(), (data & 0x7f) >> 1, CHRROM); + chr2_2(machine(), (data & 0x7f) >> 1, CHRROM); break; case 0x1ef2: - chr1_4(space.machine(), data, CHRROM); + chr1_4(machine(), data, CHRROM); break; case 0x1ef3: - chr1_5(space.machine(), data, CHRROM); + chr1_5(machine(), data, CHRROM); break; case 0x1ef4: - chr1_6(space.machine(), data, CHRROM); + chr1_6(machine(), data, CHRROM); break; case 0x1ef5: - chr1_7(space.machine(), data, CHRROM); + chr1_7(machine(), data, CHRROM); break; case 0x1ef6: case 0x1ef7: - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ); break; case 0x1ef8: case 0x1ef9: - state->m_mmc_latch1 = data; + m_mmc_latch1 = data; break; case 0x1efa: case 0x1efb: - prg8_89(space.machine(), data); + prg8_89(machine(), data); break; case 0x1efc: case 0x1efd: - prg8_ab(space.machine(), data); + prg8_ab(machine(), data); break; case 0x1efe: case 0x1eff: - prg8_cd(space.machine(), data); + prg8_cd(machine(), data); break; default: logerror("mapper80_m_w uncaught addr: %04x, value: %02x\n", offset + 0x6000, data); break; } - if (offset >= 0x1f00 && state->m_mapper_ram != NULL && state->m_mmc_latch1 == 0xa3) - state->m_mapper_ram[offset & (state->m_mapper_ram_size - 1)] = data; - else if (offset >= 0x1f00 && state->m_mapper_bram != NULL && state->m_mmc_latch1 == 0xa3) - state->m_mapper_bram[offset & (state->m_mapper_bram_size - 1)] = data; + if (offset >= 0x1f00 && m_mapper_ram != NULL && m_mmc_latch1 == 0xa3) + m_mapper_ram[offset & (m_mapper_ram_size - 1)] = data; + else if (offset >= 0x1f00 && m_mapper_bram != NULL && m_mmc_latch1 == 0xa3) + m_mapper_bram[offset & (m_mapper_bram_size - 1)] = data; } -static READ8_HANDLER( x1005_m_r ) +READ8_MEMBER(nes_state::x1005_m_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("x1005a_m_r, offset: %04x\n", offset)); - if (offset >= 0x1f00 && state->m_mapper_ram != NULL && state->m_mmc_latch1 == 0xa3) - return state->m_mapper_ram[offset & (state->m_mapper_ram_size - 1)]; - else if (offset >= 0x1f00 && state->m_mapper_bram != NULL && state->m_mmc_latch1 == 0xa3) - return state->m_mapper_bram[offset & (state->m_mapper_bram_size - 1)]; + if (offset >= 0x1f00 && m_mapper_ram != NULL && m_mmc_latch1 == 0xa3) + return m_mapper_ram[offset & (m_mapper_ram_size - 1)]; + else if (offset >= 0x1f00 && m_mapper_bram != NULL && m_mmc_latch1 == 0xa3) + return m_mapper_bram[offset & (m_mapper_bram_size - 1)]; return 0xff; } -static WRITE8_HANDLER( x1005a_m_w ) +WRITE8_MEMBER(nes_state::x1005a_m_w) { LOG_MMC(("x1005a_m_w, offset: %04x, data: %02x\n", offset, data)); @@ -4281,12 +4240,12 @@ static WRITE8_HANDLER( x1005a_m_w ) switch (offset) { case 0x1ef0: - set_nt_page(space.machine(), 0, CIRAM, (data & 0x80) ? 1 : 0, 1); - set_nt_page(space.machine(), 1, CIRAM, (data & 0x80) ? 1 : 0, 1); + set_nt_page(machine(), 0, CIRAM, (data & 0x80) ? 1 : 0, 1); + set_nt_page(machine(), 1, CIRAM, (data & 0x80) ? 1 : 0, 1); break; case 0x1ef1: - set_nt_page(space.machine(), 2, CIRAM, (data & 0x80) ? 1 : 0, 1); - set_nt_page(space.machine(), 3, CIRAM, (data & 0x80) ? 1 : 0, 1); + set_nt_page(machine(), 2, CIRAM, (data & 0x80) ? 1 : 0, 1); + set_nt_page(machine(), 3, CIRAM, (data & 0x80) ? 1 : 0, 1); break; } @@ -4328,9 +4287,8 @@ static void x1017_set_chr( running_machine &machine ) chr1_x(machine, 7 ^ state->m_mmc_latch1, state->m_mmc_vrom_bank[5], CHRROM); } -static WRITE8_HANDLER( x1017_m_w ) +WRITE8_MEMBER(nes_state::x1017_m_w) { - nes_state *state = space.machine().driver_data(); UINT8 reg = offset & 0x07; LOG_MMC(("x1017_m_w, offset: %04x, data: %02x\n", offset, data)); @@ -4338,40 +4296,40 @@ static WRITE8_HANDLER( x1017_m_w ) { case 0x1ef0: case 0x1ef1: - if (state->m_mmc_vrom_bank[reg] != data) + if (m_mmc_vrom_bank[reg] != data) { - state->m_mmc_vrom_bank[reg] = data; - x1017_set_chr(space.machine()); + m_mmc_vrom_bank[reg] = data; + x1017_set_chr(machine()); } break; case 0x1ef2: case 0x1ef3: case 0x1ef4: case 0x1ef5: - if (state->m_mmc_vrom_bank[reg] != data) + if (m_mmc_vrom_bank[reg] != data) { - state->m_mmc_vrom_bank[reg] = data; - x1017_set_chr(space.machine()); + m_mmc_vrom_bank[reg] = data; + x1017_set_chr(machine()); } break; case 0x1ef6: - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ); - state->m_mmc_latch1 = ((data & 0x02) << 1); - x1017_set_chr(space.machine()); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ); + m_mmc_latch1 = ((data & 0x02) << 1); + x1017_set_chr(machine()); break; case 0x1ef7: case 0x1ef8: case 0x1ef9: - state->m_mmc_reg[(offset & 0x0f) - 7] = data; + m_mmc_reg[(offset & 0x0f) - 7] = data; break; case 0x1efa: - prg8_89(space.machine(), data >> 2); + prg8_89(machine(), data >> 2); break; case 0x1efb: - prg8_ab(space.machine(), data >> 2); + prg8_ab(machine(), data >> 2); break; case 0x1efc: - prg8_cd(space.machine(), data >> 2); + prg8_cd(machine(), data >> 2); break; default: logerror("x1017_m_w uncaught write, addr: %04x, value: %02x\n", offset + 0x6000, data); @@ -4379,18 +4337,17 @@ static WRITE8_HANDLER( x1017_m_w ) } } -static READ8_HANDLER( x1017_m_r ) +READ8_MEMBER(nes_state::x1017_m_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("x1017_m_r, offset: %04x\n", offset)); // 2+2+1 KB of Internal RAM can be independently enabled/disabled! - if (offset < 0x0800 && state->m_mapper_bram != NULL && state->m_mmc_reg[0] == 0xca) - return state->m_mapper_bram[offset & (state->m_mapper_bram_size - 1)]; - if (offset < 0x1000 && state->m_mapper_bram != NULL && state->m_mmc_reg[1] == 0x69) - return state->m_mapper_bram[offset & (state->m_mapper_bram_size - 1)]; - if (offset < 0x1800 && state->m_mapper_bram != NULL && state->m_mmc_reg[2] == 0x84) - return state->m_mapper_bram[offset & (state->m_mapper_bram_size - 1)]; + if (offset < 0x0800 && m_mapper_bram != NULL && m_mmc_reg[0] == 0xca) + return m_mapper_bram[offset & (m_mapper_bram_size - 1)]; + if (offset < 0x1000 && m_mapper_bram != NULL && m_mmc_reg[1] == 0x69) + return m_mapper_bram[offset & (m_mapper_bram_size - 1)]; + if (offset < 0x1800 && m_mapper_bram != NULL && m_mmc_reg[2] == 0x84) + return m_mapper_bram[offset & (m_mapper_bram_size - 1)]; return 0xff; } @@ -4413,15 +4370,15 @@ static READ8_HANDLER( x1017_m_r ) *************************************************************/ -static WRITE8_HANDLER( agci_50282_w ) +WRITE8_MEMBER(nes_state::agci_50282_w) { LOG_MMC(("agci_50282_w, offset: %04x, data: %02x\n", offset, data)); offset += 0x8000; data |= (space.read_byte(offset) & 1); - chr8(space.machine(), data >> 4, CHRROM); - prg32(space.machine(), data); + chr8(machine(), data >> 4, CHRROM); + prg32(machine(), data); } /************************************************************* @@ -4432,20 +4389,20 @@ static WRITE8_HANDLER( agci_50282_w ) *************************************************************/ -static WRITE8_HANDLER( nina01_m_w ) +WRITE8_MEMBER(nes_state::nina01_m_w) { LOG_MMC(("nina01_m_w, offset: %04x, data: %02x\n", offset, data)); switch (offset) { case 0x1ffd: - prg32(space.machine(), data); + prg32(machine(), data); break; case 0x1ffe: - chr4_0(space.machine(), data, CHRROM); + chr4_0(machine(), data, CHRROM); break; case 0x1fff: - chr4_4(space.machine(), data, CHRROM); + chr4_4(machine(), data, CHRROM); break; } } @@ -4463,14 +4420,14 @@ static WRITE8_HANDLER( nina01_m_w ) *************************************************************/ -static WRITE8_HANDLER( nina06_l_w ) +WRITE8_MEMBER(nes_state::nina06_l_w) { LOG_MMC(("nina06_l_w, offset: %04x, data: %02x\n", offset, data)); if (!(offset & 0x0100)) { - prg32(space.machine(), data >> 3); - chr8(space.machine(), data, CHRROM); + prg32(machine(), data >> 3); + chr8(machine(), data, CHRROM); } } @@ -4482,26 +4439,26 @@ static WRITE8_HANDLER( nina06_l_w ) *************************************************************/ -static WRITE8_HANDLER( ae_act52_w ) +WRITE8_MEMBER(nes_state::ae_act52_w) { int pbank, cbank; UINT8 pmode; LOG_MMC(("ae_act52_w, offset: %04x, data: %02x\n", offset, data)); - set_nt_mirroring(space.machine(), BIT(offset, 13) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(offset, 13) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); cbank = (data & 0x03) | ((offset & 0x0f) << 2); - chr8(space.machine(), cbank, CHRROM); + chr8(machine(), cbank, CHRROM); pmode = offset & 0x20; pbank = (offset & 0x1fc0) >> 6; if (pmode) { - prg16_89ab(space.machine(), pbank); - prg16_cdef(space.machine(), pbank); + prg16_89ab(machine(), pbank); + prg16_cdef(machine(), pbank); } else - prg32(space.machine(), pbank >> 1); + prg32(machine(), pbank >> 1); } @@ -4520,7 +4477,7 @@ static WRITE8_HANDLER( ae_act52_w ) *************************************************************/ -static WRITE8_HANDLER( cne_decathl_w ) +WRITE8_MEMBER(nes_state::cne_decathl_w) { LOG_MMC(("cne_decathl_w, offset: %04x, data: %02x\n", offset, data)); @@ -4528,12 +4485,12 @@ static WRITE8_HANDLER( cne_decathl_w ) return; if (offset < 0x00a5) { - prg32(space.machine(), (offset - 0x0065) & 0x03); + prg32(machine(), (offset - 0x0065) & 0x03); return; } if (offset < 0x00e5) { - chr8(space.machine(), (offset - 0x00a5) & 0x07, CHRROM); + chr8(machine(), (offset - 0x00a5) & 0x07, CHRROM); } } @@ -4554,9 +4511,8 @@ static WRITE8_HANDLER( cne_decathl_w ) *************************************************************/ -static WRITE8_HANDLER( cne_fsb_m_w ) +WRITE8_MEMBER(nes_state::cne_fsb_m_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("cne_fsb_m_w, offset: %04x, data: %02x\n", offset, data)); if (offset < 0x0800) @@ -4564,33 +4520,33 @@ static WRITE8_HANDLER( cne_fsb_m_w ) switch (offset & 0x0007) { case 0x0000: - prg8_89(space.machine(), data); + prg8_89(machine(), data); break; case 0x0001: - prg8_ab(space.machine(), data); + prg8_ab(machine(), data); break; case 0x0002: - prg8_cd(space.machine(), data); + prg8_cd(machine(), data); break; case 0x0003: - prg8_ef(space.machine(), data); + prg8_ef(machine(), data); break; case 0x0004: - chr2_0(space.machine(), data, CHRROM); + chr2_0(machine(), data, CHRROM); break; case 0x0005: - chr2_2(space.machine(), data, CHRROM); + chr2_2(machine(), data, CHRROM); break; case 0x0006: - chr2_4(space.machine(), data, CHRROM); + chr2_4(machine(), data, CHRROM); break; case 0x0007: - chr2_6(space.machine(), data, CHRROM); + chr2_6(machine(), data, CHRROM); break; } } else - state->m_battery_ram[offset] = data; + m_battery_ram[offset] = data; } /************************************************************* @@ -4610,12 +4566,12 @@ static WRITE8_HANDLER( cne_fsb_m_w ) *************************************************************/ -static WRITE8_HANDLER( cne_shlz_l_w ) +WRITE8_MEMBER(nes_state::cne_shlz_l_w) { LOG_MMC(("cne_shlz_l_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), data >> 4); - chr8(space.machine(), data & 0x0f, CHRROM); + prg32(machine(), data >> 4); + chr8(machine(), data & 0x0f, CHRROM); } /************************************************************* @@ -4630,23 +4586,21 @@ static WRITE8_HANDLER( cne_shlz_l_w ) *************************************************************/ -static WRITE8_HANDLER( caltron6in1_m_w ) +WRITE8_MEMBER(nes_state::caltron6in1_m_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("caltron6in1_m_w, offset: %04x, data: %02x\n", offset, data)); - state->m_mmc_latch1 = offset & 0xff; - set_nt_mirroring(space.machine(), BIT(data, 5) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); - prg32(space.machine(), offset & 0x07); + m_mmc_latch1 = offset & 0xff; + set_nt_mirroring(machine(), BIT(data, 5) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + prg32(machine(), offset & 0x07); } -static WRITE8_HANDLER( caltron6in1_w ) +WRITE8_MEMBER(nes_state::caltron6in1_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("caltron6in1_w, offset: %04x, data: %02x\n", offset, data)); - if (state->m_mmc_latch1 & 0x04) - chr8(space.machine(), ((state->m_mmc_latch1 & 0x18) >> 1) | (data & 0x03), CHRROM); + if (m_mmc_latch1 & 0x04) + chr8(machine(), ((m_mmc_latch1 & 0x18) >> 1) | (data & 0x03), CHRROM); } /************************************************************* @@ -4666,23 +4620,22 @@ static WRITE8_HANDLER( caltron6in1_w ) *************************************************************/ -static WRITE8_HANDLER( bf9093_w ) +WRITE8_MEMBER(nes_state::bf9093_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("bf9093_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x7000) { case 0x0000: case 0x1000: - if (!state->m_hard_mirroring) - set_nt_mirroring(space.machine(), BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); + if (!m_hard_mirroring) + set_nt_mirroring(machine(), BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); break; case 0x4000: case 0x5000: case 0x6000: case 0x7000: - prg16_89ab(space.machine(), data); + prg16_89ab(machine(), data); break; } } @@ -4712,17 +4665,16 @@ static void bf9096_set_prg( running_machine &machine ) prg16_cdef(machine, 0x03 | ((state->m_mmc_latch1 & 0x18) >> 1)); } -static WRITE8_HANDLER( bf9096_w ) +WRITE8_MEMBER(nes_state::bf9096_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("bf9096_w, offset: %04x, data: %02x\n", offset, data)); if (offset < 0x2000) - state->m_mmc_latch1 = data; + m_mmc_latch1 = data; else - state->m_mmc_latch2 = data; + m_mmc_latch2 = data; - bf9096_set_prg(space.machine()); + bf9096_set_prg(machine()); } /************************************************************* @@ -4737,25 +4689,24 @@ static WRITE8_HANDLER( bf9096_w ) *************************************************************/ -static WRITE8_HANDLER( golden5_w ) +WRITE8_MEMBER(nes_state::golden5_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("golden5_w, offset: %04x, data: %02x\n", offset, data)); if (offset < 0x4000) { if (data & 0x08) { - state->m_mmc_prg_bank[0] = ((data & 0x07) << 4) | (state->m_mmc_prg_bank[0] & 0x0f); - prg16_89ab(space.machine(), state->m_mmc_prg_bank[0]); - prg16_cdef(space.machine(), ((data & 0x07) << 4) | 0x0f); + m_mmc_prg_bank[0] = ((data & 0x07) << 4) | (m_mmc_prg_bank[0] & 0x0f); + prg16_89ab(machine(), m_mmc_prg_bank[0]); + prg16_cdef(machine(), ((data & 0x07) << 4) | 0x0f); } } else { - state->m_mmc_prg_bank[0] = (state->m_mmc_prg_bank[0] & 0x70) | (data & 0x0f); - prg16_89ab(space.machine(), state->m_mmc_prg_bank[0]); + m_mmc_prg_bank[0] = (m_mmc_prg_bank[0] & 0x70) | (data & 0x0f); + prg16_89ab(machine(), m_mmc_prg_bank[0]); } } @@ -4772,18 +4723,16 @@ static WRITE8_HANDLER( golden5_w ) *************************************************************/ -static WRITE8_HANDLER( cony_l_w ) +WRITE8_MEMBER(nes_state::cony_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("cony_l_w, offset: %04x, data: %02x\n", offset, data)); if (offset >= 0x1000 && offset < 0x1103) // from 0x5100-0x51ff - state->m_mapper83_low_reg[offset & 0x03] = data; + m_mapper83_low_reg[offset & 0x03] = data; } -static READ8_HANDLER( cony_l_r ) +READ8_MEMBER(nes_state::cony_l_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("cony_l_r, offset: %04x\n", offset)); if (offset == 0x0f00) // 0x5000 @@ -4791,7 +4740,7 @@ static READ8_HANDLER( cony_l_r ) // read dipswitch bit! - currently unimplemented } if (offset >= 0x1000 && offset < 0x1103) // from 0x5100-0x51ff - return state->m_mapper83_low_reg[offset & 0x03]; + return m_mapper83_low_reg[offset & 0x03]; else return 0x00; } @@ -4831,71 +4780,70 @@ static void cony_set_chr( running_machine &machine ) } } -static WRITE8_HANDLER( cony_w ) +WRITE8_MEMBER(nes_state::cony_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("cony_w, offset: %04x, data: %02x\n", offset, data)); switch (offset) { case 0x0000: - state->m_mmc_latch1 = 1; + m_mmc_latch1 = 1; case 0x3000: case 0x30ff: case 0x31ff: - state->m_mapper83_reg[8] = data; - cony_set_prg(space.machine()); - cony_set_chr(space.machine()); + m_mapper83_reg[8] = data; + cony_set_prg(machine()); + cony_set_chr(machine()); break; case 0x0100: - state->m_mmc_reg[0] = data & 0x80; + m_mmc_reg[0] = data & 0x80; switch (data & 0x03) { case 0: - set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); + set_nt_mirroring(machine(), PPU_MIRROR_VERT); break; case 1: - set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); + set_nt_mirroring(machine(), PPU_MIRROR_HORZ); break; case 2: - set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); + set_nt_mirroring(machine(), PPU_MIRROR_LOW); break; case 3: - set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); + set_nt_mirroring(machine(), PPU_MIRROR_HIGH); break; } break; case 0x0200: - state->m_IRQ_count = (state->m_IRQ_count & 0xff00) | data; + m_IRQ_count = (m_IRQ_count & 0xff00) | data; break; case 0x0201: - state->m_IRQ_enable = state->m_mmc_reg[0]; - state->m_IRQ_count = (data << 8) | (state->m_IRQ_count & 0xff); + m_IRQ_enable = m_mmc_reg[0]; + m_IRQ_count = (data << 8) | (m_IRQ_count & 0xff); break; case 0x0300: - prg8_89(space.machine(), data); + prg8_89(machine(), data); break; case 0x0301: - prg8_ab(space.machine(), data); + prg8_ab(machine(), data); break; case 0x0302: - prg8_cd(space.machine(), data); + prg8_cd(machine(), data); break; case 0x0312: case 0x0313: case 0x0314: case 0x0315: - state->m_mmc_latch2 = 1; + m_mmc_latch2 = 1; case 0x0310: case 0x0311: case 0x0316: case 0x0317: - state->m_mapper83_reg[offset - 0x0310] = data; - cony_set_chr(space.machine()); + m_mapper83_reg[offset - 0x0310] = data; + cony_set_chr(machine()); break; case 0x0318: - state->m_mapper83_reg[9] = data; - cony_set_prg(space.machine()); + m_mapper83_reg[9] = data; + cony_set_prg(machine()); break; } } @@ -4913,18 +4861,16 @@ static WRITE8_HANDLER( cony_w ) *************************************************************/ -static WRITE8_HANDLER( yoko_l_w ) +WRITE8_MEMBER(nes_state::yoko_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("cony_l_w, offset: %04x, data: %02x\n", offset, data)); if (offset >= 0x1300) // from 0x5400 - state->m_mapper83_low_reg[offset & 0x03] = data; + m_mapper83_low_reg[offset & 0x03] = data; } -static READ8_HANDLER( yoko_l_r ) +READ8_MEMBER(nes_state::yoko_l_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("cony_l_r, offset: %04x\n", offset)); if (offset >= 0x0f00 && offset < 0x1300) // 0x5000 @@ -4932,7 +4878,7 @@ static READ8_HANDLER( yoko_l_r ) // read dipswitch bit! - currently unimplemented } if (offset >= 0x1300) // from 0x5400 - return state->m_mapper83_low_reg[offset & 0x03]; + return m_mapper83_low_reg[offset & 0x03]; else return 0x00; } @@ -4966,44 +4912,43 @@ static void yoko_set_chr( running_machine &machine ) chr2_6(machine, state->m_mapper83_reg[7], CHRROM); } -static WRITE8_HANDLER( yoko_w ) +WRITE8_MEMBER(nes_state::yoko_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("yoko_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x0c17) { case 0x0000: - state->m_mmc_reg[1] = data; - yoko_set_prg(space.machine()); + m_mmc_reg[1] = data; + yoko_set_prg(machine()); break; case 0x400: - state->m_mmc_reg[0] = data; + m_mmc_reg[0] = data; if (data & 1) - set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); + set_nt_mirroring(machine(), PPU_MIRROR_HORZ); else - set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); - yoko_set_prg(space.machine()); + set_nt_mirroring(machine(), PPU_MIRROR_VERT); + yoko_set_prg(machine()); break; case 0x0800: - state->m_IRQ_count = (state->m_IRQ_count & 0xff00) | data; + m_IRQ_count = (m_IRQ_count & 0xff00) | data; break; case 0x0801: - state->m_IRQ_enable = state->m_mmc_reg[0] & 0x80; - state->m_IRQ_count = (data << 8) | (state->m_IRQ_count & 0xff); + m_IRQ_enable = m_mmc_reg[0] & 0x80; + m_IRQ_count = (data << 8) | (m_IRQ_count & 0xff); break; case 0x0c00: case 0x0c01: case 0x0c02: - state->m_mapper83_reg[offset & 3] = data; - yoko_set_prg(space.machine()); + m_mapper83_reg[offset & 3] = data; + yoko_set_prg(machine()); break; case 0x0c10: case 0x0c11: case 0x0c16: case 0x0c17: - state->m_mapper83_reg[4 + (offset & 3)] = data; - yoko_set_chr(space.machine()); + m_mapper83_reg[4 + (offset & 3)] = data; + yoko_set_chr(machine()); break; } } @@ -5018,13 +4963,13 @@ static WRITE8_HANDLER( yoko_w ) *************************************************************/ -static WRITE8_HANDLER( dreamtech_l_w ) +WRITE8_MEMBER(nes_state::dreamtech_l_w) { LOG_MMC(("dreamtech_l_w offset: %04x, data: %02x\n", offset, data)); offset += 0x100; if (offset == 0x1020) /* 0x5020 */ - prg16_89ab(space.machine(), data); + prg16_89ab(machine(), data); } /************************************************************* @@ -5040,26 +4985,24 @@ static WRITE8_HANDLER( dreamtech_l_w ) *************************************************************/ -static WRITE8_HANDLER( fukutake_l_w ) +WRITE8_MEMBER(nes_state::fukutake_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("fukutake_l_w offset: %04x, data: %02x\n", offset, data)); offset += 0x100; if (offset >= 0x200 && offset < 0x400) { if (offset & 1) - prg16_89ab(space.machine(), data); + prg16_89ab(machine(), data); else - wram_bank(space.machine(), data >> 6, NES_WRAM); + wram_bank(machine(), data >> 6, NES_WRAM); } else if (offset >= 0x400 && offset < 0xf00) - state->m_mapper_ram[offset - 0x400] = data; + m_mapper_ram[offset - 0x400] = data; } -static READ8_HANDLER( fukutake_l_r ) +READ8_MEMBER(nes_state::fukutake_l_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("fukutake_l_r offset: %04x\n", offset)); offset += 0x100; @@ -5073,7 +5016,7 @@ static READ8_HANDLER( fukutake_l_r ) return 0xff; } else if (offset >= 0x400 && offset < 0xf00) - return state->m_mapper_ram[offset - 0x400]; + return m_mapper_ram[offset - 0x400]; return 0; } @@ -5104,24 +5047,23 @@ static void futuremedia_irq( device_t *device, int scanline, int vblank, int bla } } -static WRITE8_HANDLER( futuremedia_w ) +WRITE8_MEMBER(nes_state::futuremedia_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("futuremedia_w, offset: %04x, data: %02x\n", offset, data)); switch (offset) { case 0x0000: - prg8_89(space.machine(), data); + prg8_89(machine(), data); break; case 0x0001: - prg8_ab(space.machine(), data); + prg8_ab(machine(), data); break; case 0x0002: - prg8_cd(space.machine(), data); + prg8_cd(machine(), data); break; case 0x0003: - prg8_ef(space.machine(), data); + prg8_ef(machine(), data); break; case 0x2000: case 0x2001: @@ -5131,24 +5073,24 @@ static WRITE8_HANDLER( futuremedia_w ) case 0x2005: case 0x2006: case 0x2007: - chr1_x(space.machine(), offset & 0x07, data, CHRROM); + chr1_x(machine(), offset & 0x07, data, CHRROM); break; case 0x5000: - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; case 0x4001: - state->m_IRQ_count_latch = data; + m_IRQ_count_latch = data; break; case 0x4002: // IRQ cleared break; case 0x4003: - state->m_IRQ_count = state->m_IRQ_count_latch; + m_IRQ_count = m_IRQ_count_latch; break; case 0x6000: - state->m_IRQ_enable = data & 0x01; + m_IRQ_enable = data & 0x01; break; } } @@ -5167,9 +5109,8 @@ static WRITE8_HANDLER( futuremedia_w ) *************************************************************/ -static WRITE8_HANDLER( gouder_sf4_l_w ) +WRITE8_MEMBER(nes_state::gouder_sf4_l_w) { - nes_state *state = space.machine().driver_data(); static const UINT8 conv_table[256] = { 0x59,0x59,0x59,0x59,0x59,0x59,0x59,0x59,0x59,0x49,0x19,0x09,0x59,0x49,0x19,0x09, @@ -5193,20 +5134,19 @@ static WRITE8_HANDLER( gouder_sf4_l_w ) LOG_MMC(("gouder_sf4_l_w, offset: %04x, data: %02x\n", offset, data)); if (!(offset < 0x1700)) - state->m_mmc_reg[offset & 0x03] = data ^ conv_table[state->m_mmc_reg[4]]; + m_mmc_reg[offset & 0x03] = data ^ conv_table[m_mmc_reg[4]]; else if (!(offset < 0xf00)) - state->m_mmc_reg[4] = data; + m_mmc_reg[4] = data; else if (!(offset < 0x700)) - prg32(space.machine(), ((data >> 3) & 0x02) | (data & 0x01)); + prg32(machine(), ((data >> 3) & 0x02) | (data & 0x01)); } -static READ8_HANDLER( gouder_sf4_l_r ) +READ8_MEMBER(nes_state::gouder_sf4_l_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("gouder_sf4_l_r, offset: %04x\n", offset)); if (!(offset < 0x1700)) - return state->m_mmc_reg[offset & 0x03]; + return m_mmc_reg[offset & 0x03]; return 0x00; } @@ -5234,12 +5174,12 @@ static void gouder_sf4_prg_cb( running_machine &machine, int start, int bank ) *************************************************************/ -static WRITE8_HANDLER( henggedianzi_w ) +WRITE8_MEMBER(nes_state::henggedianzi_w) { LOG_MMC(("henggedianzi_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), data); - set_nt_mirroring(space.machine(), BIT(data, 5) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + prg32(machine(), data); + set_nt_mirroring(machine(), BIT(data, 5) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); } /************************************************************* @@ -5257,20 +5197,20 @@ static WRITE8_HANDLER( henggedianzi_w ) *************************************************************/ -static WRITE8_HANDLER( heng_xjzb_l_w ) +WRITE8_MEMBER(nes_state::heng_xjzb_l_w) { LOG_MMC(("heng_xjzb_l_w, offset: %04x, data: %02x\n", offset, data)); offset += 0x4100; if (offset & 0x5000) - prg32(space.machine(), data >> 1); + prg32(machine(), data >> 1); } -static WRITE8_HANDLER( heng_xjzb_w ) +WRITE8_MEMBER(nes_state::heng_xjzb_w) { LOG_MMC(("heng_xjzb_w, offset: %04x, data: %02x\n", offset, data)); - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); } /************************************************************* @@ -5289,26 +5229,26 @@ static WRITE8_HANDLER( heng_xjzb_w ) *************************************************************/ -static WRITE8_HANDLER( hes6in1_l_w ) +WRITE8_MEMBER(nes_state::hes6in1_l_w) { LOG_MMC(("hes6in1_l_w, offset: %04x, data: %02x\n", offset, data)); if (!(offset & 0x100)) { - prg32(space.machine(), (data & 0x38) >> 3); - chr8(space.machine(), (data & 0x07) | ((data & 0x40) >> 3), CHRROM); - set_nt_mirroring(space.machine(), BIT(data, 7) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ); + prg32(machine(), (data & 0x38) >> 3); + chr8(machine(), (data & 0x07) | ((data & 0x40) >> 3), CHRROM); + set_nt_mirroring(machine(), BIT(data, 7) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ); } } -static WRITE8_HANDLER( hes_l_w ) +WRITE8_MEMBER(nes_state::hes_l_w) { LOG_MMC(("hes_l_w, offset: %04x, data: %02x\n", offset, data)); if (!(offset & 0x100)) { - prg32(space.machine(), (data & 0x38) >> 3); - chr8(space.machine(), (data & 0x07) | ((data & 0x40) >> 3), CHRROM); + prg32(machine(), (data & 0x38) >> 3); + chr8(machine(), (data & 0x07) | ((data & 0x40) >> 3), CHRROM); } } @@ -5324,56 +5264,55 @@ static WRITE8_HANDLER( hes_l_w ) *************************************************************/ -static WRITE8_HANDLER( hosenkan_w ) +WRITE8_MEMBER(nes_state::hosenkan_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("hosenkan_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x7003) { case 0x0001: - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; case 0x2000: - state->m_mmc_latch1 = data; + m_mmc_latch1 = data; break; case 0x4000: - switch (state->m_mmc_latch1) + switch (m_mmc_latch1) { case 0: - chr2_0(space.machine(), data >> 1, CHRROM); + chr2_0(machine(), data >> 1, CHRROM); break; case 1: - chr1_5(space.machine(), data, CHRROM); + chr1_5(machine(), data, CHRROM); break; case 2: - chr2_2(space.machine(), data >> 1, CHRROM); + chr2_2(machine(), data >> 1, CHRROM); break; case 3: - chr1_7(space.machine(), data, CHRROM); + chr1_7(machine(), data, CHRROM); break; case 4: - prg8_89(space.machine(), data); + prg8_89(machine(), data); break; case 5: - prg8_ab(space.machine(), data); + prg8_ab(machine(), data); break; case 6: - chr1_4(space.machine(), data, CHRROM); + chr1_4(machine(), data, CHRROM); break; case 7: - chr1_6(space.machine(), data, CHRROM); + chr1_6(machine(), data, CHRROM); break; } break; case 0x6003: if (data) { - state->m_IRQ_count = data; - state->m_IRQ_enable = 1; + m_IRQ_count = data; + m_IRQ_enable = 1; } else - state->m_IRQ_enable = 0; + m_IRQ_enable = 0; break; } } @@ -5394,17 +5333,17 @@ static WRITE8_HANDLER( hosenkan_w ) *************************************************************/ -static WRITE8_HANDLER( ks7058_w ) +WRITE8_MEMBER(nes_state::ks7058_w) { LOG_MMC(("ks7058_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x7080) { case 0x7000: - chr4_0(space.machine(), data, CHRROM); + chr4_0(machine(), data, CHRROM); break; case 0x7080: - chr4_4(space.machine(), data, CHRROM); + chr4_4(machine(), data, CHRROM); break; } } @@ -5421,31 +5360,29 @@ static WRITE8_HANDLER( ks7058_w ) *************************************************************/ -static WRITE8_HANDLER( ks7022_w ) +WRITE8_MEMBER(nes_state::ks7022_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("ks7022_w, offset: %04x, data: %02x\n", offset, data)); if (offset == 0) - set_nt_mirroring(space.machine(), BIT(data, 2) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 2) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); if (offset == 0x2000) - state->m_mmc_latch1 = data & 0x0f; + m_mmc_latch1 = data & 0x0f; } -static READ8_HANDLER( ks7022_r ) +READ8_MEMBER(nes_state::ks7022_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("ks7022_r, offset: %04x\n", offset)); if (offset == 0x7ffc) { - chr8(space.machine(), state->m_mmc_latch1, CHRROM); - prg16_89ab(space.machine(), state->m_mmc_latch1); - prg16_cdef(space.machine(), state->m_mmc_latch1); + chr8(machine(), m_mmc_latch1, CHRROM); + prg16_89ab(machine(), m_mmc_latch1); + prg16_cdef(machine(), m_mmc_latch1); } - return mmc_hi_access_rom(space.machine(), offset); + return mmc_hi_access_rom(machine(), offset); } /************************************************************* @@ -5487,34 +5424,33 @@ static void ks7032_irq( device_t *device, int scanline, int vblank, int blanked } } -static WRITE8_HANDLER( ks7032_w ) +WRITE8_MEMBER(nes_state::ks7032_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("ks7032_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x7000) { case 0x0000: - state->m_IRQ_count = (state->m_IRQ_count & 0xfff0) | (data & 0x0f); + m_IRQ_count = (m_IRQ_count & 0xfff0) | (data & 0x0f); break; case 0x1000: - state->m_IRQ_count = (state->m_IRQ_count & 0xff0f) | ((data & 0x0f) << 4); + m_IRQ_count = (m_IRQ_count & 0xff0f) | ((data & 0x0f) << 4); break; case 0x2000: - state->m_IRQ_count = (state->m_IRQ_count & 0xf0ff) | ((data & 0x0f) << 8); + m_IRQ_count = (m_IRQ_count & 0xf0ff) | ((data & 0x0f) << 8); break; case 0x3000: - state->m_IRQ_count = (state->m_IRQ_count & 0x0fff) | ((data & 0x0f) << 12); + m_IRQ_count = (m_IRQ_count & 0x0fff) | ((data & 0x0f) << 12); break; case 0x4000: - state->m_IRQ_enable = 1; + m_IRQ_enable = 1; break; case 0x6000: - state->m_mmc_latch1 = data & 0x07; + m_mmc_latch1 = data & 0x07; break; case 0x7000: - state->m_mmc_reg[state->m_mmc_latch1] = data; - ks7032_prg_update(space.machine()); + m_mmc_reg[m_mmc_latch1] = data; + ks7032_prg_update(machine()); break; } } @@ -5532,41 +5468,40 @@ static WRITE8_HANDLER( ks7032_w ) *************************************************************/ -static WRITE8_HANDLER( ks202_w ) +WRITE8_MEMBER(nes_state::ks202_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("ks202_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x7000) { case 0x0000: - state->m_IRQ_count = (state->m_IRQ_count & 0xfff0) | (data & 0x0f); + m_IRQ_count = (m_IRQ_count & 0xfff0) | (data & 0x0f); break; case 0x1000: - state->m_IRQ_count = (state->m_IRQ_count & 0xff0f) | ((data & 0x0f) << 4); + m_IRQ_count = (m_IRQ_count & 0xff0f) | ((data & 0x0f) << 4); break; case 0x2000: - state->m_IRQ_count = (state->m_IRQ_count & 0xf0ff) | ((data & 0x0f) << 8); + m_IRQ_count = (m_IRQ_count & 0xf0ff) | ((data & 0x0f) << 8); break; case 0x3000: - state->m_IRQ_count = (state->m_IRQ_count & 0x0fff) | ((data & 0x0f) << 12); + m_IRQ_count = (m_IRQ_count & 0x0fff) | ((data & 0x0f) << 12); break; case 0x4000: - state->m_IRQ_enable = 1; + m_IRQ_enable = 1; break; case 0x6000: - state->m_mmc_latch1 = data & 0x07; + m_mmc_latch1 = data & 0x07; break; case 0x7000: - state->m_mmc_reg[state->m_mmc_latch1] = data; - ks7032_prg_update(space.machine()); + m_mmc_reg[m_mmc_latch1] = data; + ks7032_prg_update(machine()); switch (offset & 0xc00) { case 0x800: - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ); break; case 0xc00: - chr1_x(space.machine(), offset & 0x07, data, CHRROM); + chr1_x(machine(), offset & 0x07, data, CHRROM); break; } break; @@ -5602,44 +5537,41 @@ static void mmc_fds_irq( device_t *device, int scanline, int vblank, int blanked } } -static WRITE8_HANDLER( ks7017_l_w ) +WRITE8_MEMBER(nes_state::ks7017_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("ks7022_w, offset: %04x, data: %02x\n", offset, data)); offset += 0x100; if (offset >= 0xa00 && offset < 0xb00) - state->m_mmc_latch1 = ((offset >> 2) & 0x03) | ((offset >> 4) & 0x04); + m_mmc_latch1 = ((offset >> 2) & 0x03) | ((offset >> 4) & 0x04); if (offset >= 0x1000 && offset < 0x1100) - prg16_89ab(space.machine(), state->m_mmc_latch1); + prg16_89ab(machine(), m_mmc_latch1); } -WRITE8_HANDLER( ks7017_extra_w ) +WRITE8_MEMBER(nes_state::ks7017_extra_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("ks7017_extra_w, offset: %04x, data: %02x\n", offset, data)); offset += 0x20; if (offset == 0x0020) /* 0x4020 */ - state->m_IRQ_count = (state->m_IRQ_count & 0xff00) | data; + m_IRQ_count = (m_IRQ_count & 0xff00) | data; if (offset == 0x0021) /* 0x4021 */ - state->m_IRQ_count = (state->m_IRQ_count & 0x00ff) | (data << 8); + m_IRQ_count = (m_IRQ_count & 0x00ff) | (data << 8); if (offset == 0x0025) /* 0x4025 */ - set_nt_mirroring(space.machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); } -READ8_HANDLER( ks7017_extra_r ) +READ8_MEMBER(nes_state::ks7017_extra_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("ks7017_extra_r, offset: %04x\n", offset)); - state->m_IRQ_status &= ~0x01; - return state->m_IRQ_status; + m_IRQ_status &= ~0x01; + return m_IRQ_status; } /************************************************************* @@ -5657,9 +5589,8 @@ READ8_HANDLER( ks7017_extra_r ) *************************************************************/ -static WRITE8_HANDLER( kay_pp_l_w ) +WRITE8_MEMBER(nes_state::kay_pp_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("kay_pp_l_w, offset: %04x, data: %02x\n", offset, data)); offset += 0x100; @@ -5669,26 +5600,25 @@ static WRITE8_HANDLER( kay_pp_l_w ) { case 0x00: case 0x01: - state->m_mmc_reg[0] = 0x83; + m_mmc_reg[0] = 0x83; break; case 0x02: - state->m_mmc_reg[0] = 0x42; + m_mmc_reg[0] = 0x42; break; case 0x03: - state->m_mmc_reg[0] = 0x00; + m_mmc_reg[0] = 0x00; break; } } } -static READ8_HANDLER( kay_pp_l_r ) +READ8_MEMBER(nes_state::kay_pp_l_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("kay_pp_l_r, offset: %04x\n", offset)); offset += 0x100; if (offset >= 0x1000) - return state->m_mmc_reg[0]; + return m_mmc_reg[0]; else return 0xff; } @@ -5761,32 +5691,31 @@ static void kay_pp_chr_cb( running_machine &machine, int start, int bank, int so chr1_x(machine, start, bank, source); } -static WRITE8_HANDLER( kay_pp_w ) +WRITE8_MEMBER(nes_state::kay_pp_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("kay_pp_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x6003) { case 0x0000: txrom_w(space, offset, data, mem_mask); - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); break; case 0x0001: - state->m_mmc_reg[6] = (BIT(data, 0) << 5) | (BIT(data, 1) << 4) | (BIT(data, 2) << 3) + m_mmc_reg[6] = (BIT(data, 0) << 5) | (BIT(data, 1) << 4) | (BIT(data, 2) << 3) | (BIT(data, 3) << 2) | (BIT(data, 4) << 1) | BIT(data, 5); - if (!state->m_mmc_reg[7]) - kay_pp_update_regs(space.machine()); + if (!m_mmc_reg[7]) + kay_pp_update_regs(machine()); txrom_w(space, offset, data, mem_mask); - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); break; case 0x0003: - state->m_mmc_reg[5] = data; - kay_pp_update_regs(space.machine()); + m_mmc_reg[5] = data; + kay_pp_update_regs(machine()); txrom_w(space, 0x0000, data, mem_mask); - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); break; default: @@ -5819,20 +5748,19 @@ static void kasing_prg_cb( running_machine &machine, int start, int bank ) prg8_x(machine, start, bank); } -static WRITE8_HANDLER( kasing_m_w ) +WRITE8_MEMBER(nes_state::kasing_m_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("kasing_m_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x01) { case 0x00: - state->m_mmc_reg[0] = data; - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + m_mmc_reg[0] = data; + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); break; case 0x01: - state->m_mmc_chr_base = (data & 0x01) ? 0x100 : 0x000; - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_chr_base = (data & 0x01) ? 0x100 : 0x000; + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); break; } } @@ -5852,12 +5780,12 @@ static WRITE8_HANDLER( kasing_m_w ) *************************************************************/ -static WRITE8_HANDLER( magics_md_w ) +WRITE8_MEMBER(nes_state::magics_md_w) { LOG_MMC(("magics_md_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), data >> 1); - chr8(space.machine(), data, CHRROM); + prg32(machine(), data >> 1); + chr8(machine(), data, CHRROM); } /************************************************************* @@ -5893,9 +5821,8 @@ static void nanjing_irq( device_t *device, int scanline, int vblank, int blanked } -static WRITE8_HANDLER( nanjing_l_w ) +WRITE8_MEMBER(nes_state::nanjing_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("nanjing_l_w, offset: %04x, data: %02x\n", offset, data)); offset += 0x100; @@ -5906,38 +5833,37 @@ static WRITE8_HANDLER( nanjing_l_w ) if (offset == 0x1100) // 0x5100 { if (data == 6) - prg32(space.machine(), 3); + prg32(machine(), 3); return; } if (offset == 0x1101) // 0x5101 { - UINT8 temp = state->m_mmc_count; - state->m_mmc_count = data; + UINT8 temp = m_mmc_count; + m_mmc_count = data; if (temp & !data) - state->m_mmc_latch2 ^= 0xff; + m_mmc_latch2 ^= 0xff; } switch (offset & 0x300) { case 0x000: case 0x200: - state->m_mmc_reg[BIT(offset, 9)] = data; - if (!BIT(state->m_mmc_reg[0], 7) && state->m_ppu->get_current_scanline() <= 127) - chr8(space.machine(), 0, CHRRAM); + m_mmc_reg[BIT(offset, 9)] = data; + if (!BIT(m_mmc_reg[0], 7) && m_ppu->get_current_scanline() <= 127) + chr8(machine(), 0, CHRRAM); break; case 0x300: - state->m_mmc_latch1 = data; + m_mmc_latch1 = data; break; } - prg32(space.machine(), (state->m_mmc_reg[0] & 0x0f) | ((state->m_mmc_reg[1] & 0x0f) << 4)); + prg32(machine(), (m_mmc_reg[0] & 0x0f) | ((m_mmc_reg[1] & 0x0f) << 4)); } -static READ8_HANDLER( nanjing_l_r ) +READ8_MEMBER(nes_state::nanjing_l_r) { - nes_state *state = space.machine().driver_data(); UINT8 value = 0; LOG_MMC(("nanjing_l_r, offset: %04x\n", offset)); @@ -5949,10 +5875,10 @@ static READ8_HANDLER( nanjing_l_r ) switch (offset & 0x700) { case 0x100: - value = state->m_mmc_latch1; + value = m_mmc_latch1; break; case 0x500: - value = state->m_mmc_latch2 & state->m_mmc_latch1; + value = m_mmc_latch2 & m_mmc_latch1; break; case 0x000: case 0x200: @@ -5981,7 +5907,7 @@ static READ8_HANDLER( nanjing_l_r ) *************************************************************/ -static WRITE8_HANDLER( nitra_w ) +WRITE8_MEMBER(nes_state::nitra_w) { LOG_MMC(("nitra_w, offset: %04x, data: %02x\n", offset, data)); @@ -6001,51 +5927,50 @@ static WRITE8_HANDLER( nitra_w ) *************************************************************/ -static WRITE8_HANDLER( ntdec_asder_w ) +WRITE8_MEMBER(nes_state::ntdec_asder_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("ntdec_asder_w, offset: %04x, data: %02x\n", offset, data)); switch (offset) { case 0x0000: - state->m_mmc_latch1 = data & 0x07; + m_mmc_latch1 = data & 0x07; break; case 0x2000: - switch (state->m_mmc_latch1) + switch (m_mmc_latch1) { case 0: - prg8_89(space.machine(), data); + prg8_89(machine(), data); break; case 1: - prg8_ab(space.machine(), data); + prg8_ab(machine(), data); break; case 2: data &= 0xfe; - chr1_0(space.machine(), data, CHRROM); - chr1_1(space.machine(), data + 1, CHRROM); + chr1_0(machine(), data, CHRROM); + chr1_1(machine(), data + 1, CHRROM); break; case 3: data &= 0xfe; - chr1_2(space.machine(), data, CHRROM); - chr1_3(space.machine(), data + 1, CHRROM); + chr1_2(machine(), data, CHRROM); + chr1_3(machine(), data + 1, CHRROM); break; case 4: - chr1_4(space.machine(), data, CHRROM); + chr1_4(machine(), data, CHRROM); break; case 5: - chr1_5(space.machine(), data, CHRROM); + chr1_5(machine(), data, CHRROM); break; case 6: - chr1_6(space.machine(), data, CHRROM); + chr1_6(machine(), data, CHRROM); break; case 7: - chr1_7(space.machine(), data, CHRROM); + chr1_7(machine(), data, CHRROM); break; } break; case 0x6000: - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; } } @@ -6065,23 +5990,23 @@ static WRITE8_HANDLER( ntdec_asder_w ) *************************************************************/ -static WRITE8_HANDLER( ntdec_fh_m_w ) +WRITE8_MEMBER(nes_state::ntdec_fh_m_w) { LOG_MMC(("ntdec_fh_m_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x03) { case 0: - chr4_0(space.machine(), data >> 2, CHRROM); + chr4_0(machine(), data >> 2, CHRROM); break; case 1: - chr2_4(space.machine(), data >> 1, CHRROM); + chr2_4(machine(), data >> 1, CHRROM); break; case 2: - chr2_6(space.machine(), data >> 1 , CHRROM); + chr2_6(machine(), data >> 1 , CHRROM); break; case 3: - prg8_89(space.machine(), data); + prg8_89(machine(), data); break; } } @@ -6101,9 +6026,8 @@ static WRITE8_HANDLER( ntdec_fh_m_w ) *************************************************************/ -static WRITE8_HANDLER( daou306_w ) +WRITE8_MEMBER(nes_state::daou306_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("daou306_w, offset: %04x, data: %02x\n", offset, data)); int reg = BIT(offset, 2) ? 8 : 0; @@ -6111,52 +6035,52 @@ static WRITE8_HANDLER( daou306_w ) { case 0x4000: case 0x4004: - state->m_mmc_reg[reg + 0] = data; - chr1_0(space.machine(), state->m_mmc_reg[0] | (state->m_mmc_reg[8] << 8), CHRROM); + m_mmc_reg[reg + 0] = data; + chr1_0(machine(), m_mmc_reg[0] | (m_mmc_reg[8] << 8), CHRROM); break; case 0x4001: case 0x4005: - state->m_mmc_reg[reg + 1] = data; - chr1_1(space.machine(), state->m_mmc_reg[1] | (state->m_mmc_reg[9] << 8), CHRROM); + m_mmc_reg[reg + 1] = data; + chr1_1(machine(), m_mmc_reg[1] | (m_mmc_reg[9] << 8), CHRROM); break; case 0x4002: case 0x4006: - state->m_mmc_reg[reg + 2] = data; - chr1_2(space.machine(), state->m_mmc_reg[2] | (state->m_mmc_reg[10] << 8), CHRROM); + m_mmc_reg[reg + 2] = data; + chr1_2(machine(), m_mmc_reg[2] | (m_mmc_reg[10] << 8), CHRROM); break; case 0x4003: case 0x4007: - state->m_mmc_reg[reg + 3] = data; - chr1_3(space.machine(), state->m_mmc_reg[3] | (state->m_mmc_reg[11] << 8), CHRROM); + m_mmc_reg[reg + 3] = data; + chr1_3(machine(), m_mmc_reg[3] | (m_mmc_reg[11] << 8), CHRROM); break; case 0x4008: case 0x400c: - state->m_mmc_reg[reg + 4] = data; - chr1_4(space.machine(), state->m_mmc_reg[4] | (state->m_mmc_reg[12] << 8), CHRROM); + m_mmc_reg[reg + 4] = data; + chr1_4(machine(), m_mmc_reg[4] | (m_mmc_reg[12] << 8), CHRROM); break; case 0x4009: case 0x400d: - state->m_mmc_reg[reg + 5] = data; - chr1_5(space.machine(), state->m_mmc_reg[5] | (state->m_mmc_reg[13] << 8), CHRROM); + m_mmc_reg[reg + 5] = data; + chr1_5(machine(), m_mmc_reg[5] | (m_mmc_reg[13] << 8), CHRROM); break; case 0x400a: case 0x400e: - state->m_mmc_reg[reg + 6] = data; - chr1_6(space.machine(), state->m_mmc_reg[6] | (state->m_mmc_reg[14] << 8), CHRROM); + m_mmc_reg[reg + 6] = data; + chr1_6(machine(), m_mmc_reg[6] | (m_mmc_reg[14] << 8), CHRROM); break; case 0x400b: case 0x400f: - state->m_mmc_reg[reg + 7] = data; - chr1_7(space.machine(), state->m_mmc_reg[7] | (state->m_mmc_reg[15] << 8), CHRROM); + m_mmc_reg[reg + 7] = data; + chr1_7(machine(), m_mmc_reg[7] | (m_mmc_reg[15] << 8), CHRROM); break; case 0x4010: - prg16_89ab(space.machine(), data); + prg16_89ab(machine(), data); break; case 0x4014: if (data & 1) - set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); + set_nt_mirroring(machine(), PPU_MIRROR_HORZ); else - set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); + set_nt_mirroring(machine(), PPU_MIRROR_VERT); break; } } @@ -6176,13 +6100,12 @@ static WRITE8_HANDLER( daou306_w ) *************************************************************/ -static WRITE8_HANDLER( gs2015_w ) +WRITE8_MEMBER(nes_state::gs2015_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("gs2015_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), offset); - chr8(space.machine(), offset >> 1, state->m_mmc_chr_source); + prg32(machine(), offset); + chr8(machine(), offset >> 1, m_mmc_chr_source); } /************************************************************* @@ -6203,7 +6126,7 @@ static WRITE8_HANDLER( gs2015_w ) *************************************************************/ -static WRITE8_HANDLER( rcm_tf_w ) +WRITE8_MEMBER(nes_state::rcm_tf_w) { LOG_MMC(("rcm_tf_w, offset: %04x, data: %02x\n", offset, data)); @@ -6211,15 +6134,15 @@ static WRITE8_HANDLER( rcm_tf_w ) { case 0x00: case 0x30: - prg32(space.machine(), offset & 0x0f); + prg32(machine(), offset & 0x0f); break; case 0x10: case 0x20: - prg16_89ab(space.machine(), ((offset & 0x0f) << 1) | ((offset & 0x20) >> 4)); - prg16_cdef(space.machine(), ((offset & 0x0f) << 1) | ((offset & 0x20) >> 4)); + prg16_89ab(machine(), ((offset & 0x0f) << 1) | ((offset & 0x20) >> 4)); + prg16_cdef(machine(), ((offset & 0x0f) << 1) | ((offset & 0x20) >> 4)); break; } - set_nt_mirroring(space.machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); } /************************************************************* @@ -6236,17 +6159,16 @@ static WRITE8_HANDLER( rcm_tf_w ) *************************************************************/ -static WRITE8_HANDLER( rex_dbz_l_w ) +WRITE8_MEMBER(nes_state::rex_dbz_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("rex_dbz_l_w, offset: %04x, data: %02x\n", offset, data)); - state->m_mmc_reg[0] = data; - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_reg[0] = data; + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); } /* we would need to use this read handler in 0x6000-0x7fff as well */ -static READ8_HANDLER( rex_dbz_l_r ) +READ8_MEMBER(nes_state::rex_dbz_l_r) { LOG_MMC(("rex_dbz_l_r, offset: %04x\n", offset)); return 0x01; @@ -6328,62 +6250,61 @@ static void rex_sl1632_set_chr( running_machine &machine, UINT8 chr, int chr_bas chr1_x(machine, chr_page ^ 7, chr_base2[7] | (bank[7] & chr_mask), chr); } -static WRITE8_HANDLER( rex_sl1632_w ) +WRITE8_MEMBER(nes_state::rex_sl1632_w) { - nes_state *state = space.machine().driver_data(); UINT8 map14_helper1, map14_helper2, mmc_helper, cmd; LOG_MMC(("rex_sl1632_w, offset: %04x, data: %02x\n", offset, data)); if (offset == 0x2131) { - state->m_mmc_reg[0] = data; - rex_sl1632_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); - rex_sl1632_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_reg[0] = data; + rex_sl1632_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); + rex_sl1632_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); - if (!(state->m_mmc_reg[0] & 0x02)) - set_nt_mirroring(space.machine(), BIT(state->m_mmc_reg[1], 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + if (!(m_mmc_reg[0] & 0x02)) + set_nt_mirroring(machine(), BIT(m_mmc_reg[1], 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); } - if (state->m_mmc_reg[0] & 0x02) + if (m_mmc_reg[0] & 0x02) { switch (offset & 0x6001) { case 0x0000: - mmc_helper = state->m_mmc3_latch ^ data; - state->m_mmc3_latch = data; + mmc_helper = m_mmc3_latch ^ data; + m_mmc3_latch = data; /* Has PRG Mode changed? */ if (mmc_helper & 0x40) - rex_sl1632_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + rex_sl1632_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); /* Has CHR Mode changed? */ if (mmc_helper & 0x80) - rex_sl1632_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + rex_sl1632_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); break; case 0x0001: - cmd = state->m_mmc3_latch & 0x07; + cmd = m_mmc3_latch & 0x07; switch (cmd) { case 0: case 1: // these have to be changed due to the different way rex_sl1632_set_chr works (it handles 1k banks)! - state->m_mmc_vrom_bank[2 * cmd] = data; - state->m_mmc_vrom_bank[2 * cmd + 1] = data; - rex_sl1632_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_vrom_bank[2 * cmd] = data; + m_mmc_vrom_bank[2 * cmd + 1] = data; + rex_sl1632_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); break; case 2: case 3: case 4: case 5: - state->m_mmc_vrom_bank[cmd + 2] = data; - rex_sl1632_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_vrom_bank[cmd + 2] = data; + rex_sl1632_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); break; case 6: case 7: - state->m_mmc_prg_bank[cmd - 6] = data; - rex_sl1632_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + m_mmc_prg_bank[cmd - 6] = data; + rex_sl1632_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); break; } break; case 0x2000: - set_nt_mirroring(space.machine(), BIT(state->m_mmc_reg[1], 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ); + set_nt_mirroring(machine(), BIT(m_mmc_reg[1], 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ); break; default: @@ -6395,9 +6316,9 @@ static WRITE8_HANDLER( rex_sl1632_w ) { map14_helper1 = (offset & 0x01) << 2; offset = ((offset & 0x02) | (offset >> 10)) >> 1; - map14_helper2 = ((offset + 2) & 0x07) + 4; // '+4' because first 4 state->m_mmc_extra_banks are for PRG! - state->m_mmc_extra_bank[map14_helper2] = (state->m_mmc_extra_bank[map14_helper2] & (0xf0 >> map14_helper1)) | ((data & 0x0f) << map14_helper1); - rex_sl1632_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + map14_helper2 = ((offset + 2) & 0x07) + 4; // '+4' because first 4 m_mmc_extra_banks are for PRG! + m_mmc_extra_bank[map14_helper2] = (m_mmc_extra_bank[map14_helper2] & (0xf0 >> map14_helper1)) | ((data & 0x0f) << map14_helper1); + rex_sl1632_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); } else { @@ -6405,13 +6326,13 @@ static WRITE8_HANDLER( rex_sl1632_w ) { case 0x0000: case 0x2000: - state->m_mmc_extra_bank[offset >> 13] = data; - rex_sl1632_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + m_mmc_extra_bank[offset >> 13] = data; + rex_sl1632_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); break; case 0x1000: - state->m_mmc_reg[1] = data; - set_nt_mirroring(space.machine(), BIT(state->m_mmc_reg[1], 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + m_mmc_reg[1] = data; + set_nt_mirroring(machine(), BIT(m_mmc_reg[1], 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; } } @@ -6429,26 +6350,24 @@ static WRITE8_HANDLER( rex_sl1632_w ) *************************************************************/ -static WRITE8_HANDLER( rumblestation_m_w ) +WRITE8_MEMBER(nes_state::rumblestation_m_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("rumblestation_m_w, offset: %04x, data: %02x\n", offset, data)); - state->m_mmc_prg_bank[0] = (state->m_mmc_prg_bank[0] & 0x01) | ((data & 0x0f) << 1); - state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & 0x07) | ((data & 0xf0) >> 1); - prg32(space.machine(), state->m_mmc_prg_bank[0]); - chr8(space.machine(), state->m_mmc_vrom_bank[0], CHRROM); + m_mmc_prg_bank[0] = (m_mmc_prg_bank[0] & 0x01) | ((data & 0x0f) << 1); + m_mmc_vrom_bank[0] = (m_mmc_vrom_bank[0] & 0x07) | ((data & 0xf0) >> 1); + prg32(machine(), m_mmc_prg_bank[0]); + chr8(machine(), m_mmc_vrom_bank[0], CHRROM); } -static WRITE8_HANDLER( rumblestation_w ) +WRITE8_MEMBER(nes_state::rumblestation_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("rumblestation_w, offset: %04x, data: %02x\n", offset, data)); - state->m_mmc_prg_bank[0] = (state->m_mmc_prg_bank[0] & ~0x01) | (data & 0x01); - state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & ~0x07) | ((data & 0x70) >> 4); - prg32(space.machine(), state->m_mmc_prg_bank[0]); - chr8(space.machine(), state->m_mmc_vrom_bank[0], CHRROM); + m_mmc_prg_bank[0] = (m_mmc_prg_bank[0] & ~0x01) | (data & 0x01); + m_mmc_vrom_bank[0] = (m_mmc_vrom_bank[0] & ~0x07) | ((data & 0x70) >> 4); + prg32(machine(), m_mmc_prg_bank[0]); + chr8(machine(), m_mmc_vrom_bank[0], CHRROM); } /************************************************************* @@ -6485,38 +6404,37 @@ static void sachen_set_mirror( running_machine &machine, UINT8 nt ) // used by m } } -static WRITE8_HANDLER( sachen_74x374_l_w ) +WRITE8_MEMBER(nes_state::sachen_74x374_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("sachen_74x374_l_w, offset: %04x, data: %02x\n", offset, data)); /* write happens only if we are at 0x4100 + k * 0x200, but 0x4100 is offset = 0 */ if (!(offset & 0x100)) { if (!(offset & 0x01)) - state->m_mmc_latch1 = data & 0x07; + m_mmc_latch1 = data & 0x07; else { - switch (state->m_mmc_latch1) + switch (m_mmc_latch1) { case 0x02: - state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & ~0x08) | ((data << 3) & 0x08); - chr8(space.machine(), state->m_mmc_vrom_bank[0], CHRROM); - prg32(space.machine(), data & 0x01); + m_mmc_vrom_bank[0] = (m_mmc_vrom_bank[0] & ~0x08) | ((data << 3) & 0x08); + chr8(machine(), m_mmc_vrom_bank[0], CHRROM); + prg32(machine(), data & 0x01); break; case 0x04: - state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & ~0x04) | ((data << 2) & 0x04); - chr8(space.machine(), state->m_mmc_vrom_bank[0], CHRROM); + m_mmc_vrom_bank[0] = (m_mmc_vrom_bank[0] & ~0x04) | ((data << 2) & 0x04); + chr8(machine(), m_mmc_vrom_bank[0], CHRROM); break; case 0x05: - prg32(space.machine(), data & 0x07); + prg32(machine(), data & 0x07); break; case 0x06: - state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & ~0x03) | ((data << 0) & 0x03); - chr8(space.machine(), state->m_mmc_vrom_bank[0], CHRROM); + m_mmc_vrom_bank[0] = (m_mmc_vrom_bank[0] & ~0x03) | ((data << 0) & 0x03); + chr8(machine(), m_mmc_vrom_bank[0], CHRROM); break; case 0x07: - sachen_set_mirror(space.machine(), (data >> 1) & 0x03); + sachen_set_mirror(machine(), (data >> 1) & 0x03); break; default: break; @@ -6525,53 +6443,51 @@ static WRITE8_HANDLER( sachen_74x374_l_w ) } } -static READ8_HANDLER( sachen_74x374_l_r ) +READ8_MEMBER(nes_state::sachen_74x374_l_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("sachen_74x374_l_r, offset: %04x", offset)); /* read happens only if we are at 0x4100 + k * 0x200, but 0x4100 is offset = 0 */ if (!(offset & 0x100)) - return (~state->m_mmc_latch1 & 0x3f) /* ^ dips*/; // we would need to check the Dips here + return (~m_mmc_latch1 & 0x3f) /* ^ dips*/; // we would need to check the Dips here else return 0; } -static WRITE8_HANDLER( sachen_74x374a_l_w ) +WRITE8_MEMBER(nes_state::sachen_74x374a_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("sachen_74x374a_l_w, offset: %04x, data: %02x\n", offset, data)); /* write happens only if we are at 0x4100 + k * 0x200, but 0x4100 is offset = 0 */ if (!(offset & 0x100)) { if (!(offset & 0x01)) - state->m_mmc_latch1 = data; + m_mmc_latch1 = data; else { - switch (state->m_mmc_latch1 & 0x07) + switch (m_mmc_latch1 & 0x07) { case 0x00: - prg32(space.machine(), 0); - chr8(space.machine(), 3, CHRROM); + prg32(machine(), 0); + chr8(machine(), 3, CHRROM); break; case 0x02: - state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & ~0x08) | ((data << 3) & 0x08); - chr8(space.machine(), state->m_mmc_vrom_bank[0], CHRROM); + m_mmc_vrom_bank[0] = (m_mmc_vrom_bank[0] & ~0x08) | ((data << 3) & 0x08); + chr8(machine(), m_mmc_vrom_bank[0], CHRROM); break; case 0x04: - state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & ~0x01) | ((data << 0) & 0x01); - chr8(space.machine(), state->m_mmc_vrom_bank[0], CHRROM); + m_mmc_vrom_bank[0] = (m_mmc_vrom_bank[0] & ~0x01) | ((data << 0) & 0x01); + chr8(machine(), m_mmc_vrom_bank[0], CHRROM); break; case 0x05: - prg32(space.machine(), data & 0x01); + prg32(machine(), data & 0x01); break; case 0x06: - state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & ~0x06) | ((data << 1) & 0x06); - chr8(space.machine(), state->m_mmc_vrom_bank[0], CHRROM); + m_mmc_vrom_bank[0] = (m_mmc_vrom_bank[0] & ~0x06) | ((data << 1) & 0x06); + chr8(machine(), m_mmc_vrom_bank[0], CHRROM); break; case 0x07: - sachen_set_mirror(space.machine(), BIT(data, 0)); + sachen_set_mirror(machine(), BIT(data, 0)); break; default: break; @@ -6644,20 +6560,18 @@ static void common_s8259_write_handler( address_space &space, offs_t offset, UIN } } -static WRITE8_HANDLER( s8259_l_w ) +WRITE8_MEMBER(nes_state::s8259_l_w) { - nes_state *state = space.machine().driver_data(); - LOG_MMC(("s8259_w, type: %d, offset: %04x, data: %02x\n", state->m_pcb_id, offset, data)); + LOG_MMC(("s8259_w, type: %d, offset: %04x, data: %02x\n", m_pcb_id, offset, data)); - common_s8259_write_handler(space, offset, data, state->m_pcb_id); + common_s8259_write_handler(space, offset, data, m_pcb_id); } -static WRITE8_HANDLER( s8259_m_w ) +WRITE8_MEMBER(nes_state::s8259_m_w) { - nes_state *state = space.machine().driver_data(); - LOG_MMC(("s8259_w, type: %d, offset: %04x, data: %02x\n", state->m_pcb_id, offset, data)); + LOG_MMC(("s8259_w, type: %d, offset: %04x, data: %02x\n", m_pcb_id, offset, data)); - common_s8259_write_handler(space, (offset + 0x100) & 0xfff, data, state->m_pcb_id); + common_s8259_write_handler(space, (offset + 0x100) & 0xfff, data, m_pcb_id); } @@ -6673,12 +6587,11 @@ static WRITE8_HANDLER( s8259_m_w ) *************************************************************/ -static WRITE8_HANDLER( sa009_l_w ) +WRITE8_MEMBER(nes_state::sa009_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("sa009_l_w, offset: %04x, data: %02x\n", offset, data)); - chr8(space.machine(), data, state->m_mmc_chr_source); + chr8(machine(), data, m_mmc_chr_source); } /************************************************************* @@ -6693,11 +6606,11 @@ static WRITE8_HANDLER( sa009_l_w ) *************************************************************/ -static WRITE8_HANDLER( sa0036_w ) +WRITE8_MEMBER(nes_state::sa0036_w) { LOG_MMC(("sa0036_w, offset: %04x, data: %02x\n", offset, data)); - chr8(space.machine(), data >> 7, CHRROM); + chr8(machine(), data >> 7, CHRROM); } /************************************************************* @@ -6712,12 +6625,12 @@ static WRITE8_HANDLER( sa0036_w ) *************************************************************/ -static WRITE8_HANDLER( sa0037_w ) +WRITE8_MEMBER(nes_state::sa0037_w) { LOG_MMC(("sa0037_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), data >> 3); - chr8(space.machine(), data, CHRROM); + prg32(machine(), data >> 3); + chr8(machine(), data, CHRROM); } /************************************************************* @@ -6732,13 +6645,13 @@ static WRITE8_HANDLER( sa0037_w ) *************************************************************/ -static WRITE8_HANDLER( sa72007_l_w ) +WRITE8_MEMBER(nes_state::sa72007_l_w) { LOG_MMC(("sa72007_l_w, offset: %04x, data: %02x\n", offset, data)); /* only if we are at 0x4100 + k * 0x200, but 0x4100 is offset = 0 */ if (!(offset & 0x100)) - chr8(space.machine(), data >> 7, CHRROM); + chr8(machine(), data >> 7, CHRROM); } /************************************************************* @@ -6753,12 +6666,12 @@ static WRITE8_HANDLER( sa72007_l_w ) *************************************************************/ -static WRITE8_HANDLER( sa72008_l_w ) +WRITE8_MEMBER(nes_state::sa72008_l_w) { LOG_MMC(("sa72008_l_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), data >> 2); - chr8(space.machine(), data, CHRROM); + prg32(machine(), data >> 2); + chr8(machine(), data, CHRROM); } /************************************************************* @@ -6773,7 +6686,7 @@ static WRITE8_HANDLER( sa72008_l_w ) *************************************************************/ -static READ8_HANDLER( tca01_l_r ) +READ8_MEMBER(nes_state::tca01_l_r) { LOG_MMC(("tca01_l_r, offset: %04x\n", offset)); @@ -6796,25 +6709,25 @@ static READ8_HANDLER( tca01_l_r ) *************************************************************/ -static WRITE8_HANDLER( tcu01_l_w ) +WRITE8_MEMBER(nes_state::tcu01_l_w) { LOG_MMC(("tcu01_l_w, offset: %04x, data: %02x\n", offset, data)); if ((offset & 0x103) == 0x002) { - prg32(space.machine(), ((data >> 6) & 0x02) | ((data >> 2) & 0x01)); - chr8(space.machine(), data >> 3, CHRROM); + prg32(machine(), ((data >> 6) & 0x02) | ((data >> 2) & 0x01)); + chr8(machine(), data >> 3, CHRROM); } } -static WRITE8_HANDLER( tcu01_m_w ) +WRITE8_MEMBER(nes_state::tcu01_m_w) { LOG_MMC(("tcu01_m_w, offset: %04x, data: %02x\n", offset, data)); tcu01_l_w(space, (offset + 0x100) & 0xfff, data, mem_mask); } -static WRITE8_HANDLER( tcu01_w ) +WRITE8_MEMBER(nes_state::tcu01_w) { LOG_MMC(("tcu01_w, offset: %04x, data: %02x\n", offset, data)); @@ -6833,25 +6746,23 @@ static WRITE8_HANDLER( tcu01_w ) *************************************************************/ -static WRITE8_HANDLER( tcu02_l_w ) +WRITE8_MEMBER(nes_state::tcu02_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("tcu02_l_w, offset: %04x, data: %02x\n", offset, data)); if ((offset & 0x103) == 0x002) { - state->m_mmc_latch1 = (data & 0x30) | ((data + 3) & 0x0f); - chr8(space.machine(), state->m_mmc_latch1, CHRROM); + m_mmc_latch1 = (data & 0x30) | ((data + 3) & 0x0f); + chr8(machine(), m_mmc_latch1, CHRROM); } } -static READ8_HANDLER( tcu02_l_r ) +READ8_MEMBER(nes_state::tcu02_l_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("tcu02_l_r, offset: %04x\n", offset)); if ((offset & 0x103) == 0x000) - return state->m_mmc_latch1 | 0x40; + return m_mmc_latch1 | 0x40; else return 0x00; } @@ -6865,23 +6776,22 @@ static READ8_HANDLER( tcu02_l_r ) *************************************************************/ -static WRITE8_HANDLER( subor0_w ) +WRITE8_MEMBER(nes_state::subor0_w) { - nes_state *state = space.machine().driver_data(); UINT8 subor_helper1, subor_helper2; LOG_MMC(("subor0_w, offset: %04x, data: %02x\n", offset, data)); - state->m_subor_reg[(offset >> 13) & 0x03] = data; - subor_helper1 = ((state->m_subor_reg[0] ^ state->m_subor_reg[1]) << 1) & 0x20; - subor_helper2 = ((state->m_subor_reg[2] ^ state->m_subor_reg[3]) << 0) & 0x1f; + m_subor_reg[(offset >> 13) & 0x03] = data; + subor_helper1 = ((m_subor_reg[0] ^ m_subor_reg[1]) << 1) & 0x20; + subor_helper2 = ((m_subor_reg[2] ^ m_subor_reg[3]) << 0) & 0x1f; - if (state->m_subor_reg[1] & 0x08) + if (m_subor_reg[1] & 0x08) { subor_helper1 += subor_helper2 & 0xfe; subor_helper2 = subor_helper1; subor_helper1 += 1; } - else if (state->m_subor_reg[1] & 0x04) + else if (m_subor_reg[1] & 0x04) { subor_helper2 += subor_helper1; subor_helper1 = 0x1f; @@ -6892,8 +6802,8 @@ static WRITE8_HANDLER( subor0_w ) subor_helper2 = 0x20; } - prg16_89ab(space.machine(), subor_helper1); - prg16_cdef(space.machine(), subor_helper2); + prg16_89ab(machine(), subor_helper1); + prg16_cdef(machine(), subor_helper2); } /************************************************************* @@ -6904,23 +6814,22 @@ static WRITE8_HANDLER( subor0_w ) *************************************************************/ -static WRITE8_HANDLER( subor1_w ) +WRITE8_MEMBER(nes_state::subor1_w) { - nes_state *state = space.machine().driver_data(); UINT8 subor_helper1, subor_helper2; LOG_MMC(("subor1_w, offset: %04x, data: %02x\n", offset, data)); - state->m_subor_reg[(offset >> 13) & 0x03] = data; - subor_helper1 = ((state->m_subor_reg[0] ^ state->m_subor_reg[1]) << 1) & 0x20; - subor_helper2 = ((state->m_subor_reg[2] ^ state->m_subor_reg[3]) << 0) & 0x1f; + m_subor_reg[(offset >> 13) & 0x03] = data; + subor_helper1 = ((m_subor_reg[0] ^ m_subor_reg[1]) << 1) & 0x20; + subor_helper2 = ((m_subor_reg[2] ^ m_subor_reg[3]) << 0) & 0x1f; - if (state->m_subor_reg[1] & 0x08) + if (m_subor_reg[1] & 0x08) { subor_helper1 += subor_helper2 & 0xfe; subor_helper2 = subor_helper1; subor_helper2 += 1; } - else if (state->m_subor_reg[1] & 0x04) + else if (m_subor_reg[1] & 0x04) { subor_helper2 += subor_helper1; subor_helper1 = 0x1f; @@ -6931,8 +6840,8 @@ static WRITE8_HANDLER( subor1_w ) subor_helper2 = 0x07; } - prg16_89ab(space.machine(), subor_helper1); - prg16_cdef(space.machine(), subor_helper2); + prg16_89ab(machine(), subor_helper1); + prg16_cdef(machine(), subor_helper2); } /************************************************************* @@ -6988,106 +6897,103 @@ static void sgame_boog_set_prg( running_machine &machine ) mmc3_set_prg(machine, state->m_mmc_prg_base, state->m_mmc_prg_mask); } -static WRITE8_HANDLER( sgame_boog_l_w ) +WRITE8_MEMBER(nes_state::sgame_boog_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("sgame_boog_l_w, offset: %04x, data: %02x\n", offset, data)); offset += 0x100; if (offset == 0x1000) { - state->m_mmc_reg[0] = data; - sgame_boog_set_prg(space.machine()); + m_mmc_reg[0] = data; + sgame_boog_set_prg(machine()); } else if (offset == 0x1001) { - state->m_mmc_reg[1] = data; - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_reg[1] = data; + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); } else if (offset == 0x1007) { - state->m_mmc3_latch = 0; - state->m_mmc_reg[2] = data; - sgame_boog_set_prg(space.machine()); - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc3_latch = 0; + m_mmc_reg[2] = data; + sgame_boog_set_prg(machine()); + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); } } -static WRITE8_HANDLER( sgame_boog_m_w ) +WRITE8_MEMBER(nes_state::sgame_boog_m_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("sgame_boog_m_w, offset: %04x, data: %02x\n", offset, data)); if (offset == 0x0000) { - state->m_mmc_reg[0] = data; - sgame_boog_set_prg(space.machine()); + m_mmc_reg[0] = data; + sgame_boog_set_prg(machine()); } else if (offset == 0x0001) { - state->m_mmc_reg[1] = data; - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_reg[1] = data; + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); } else if (offset == 0x0007) { - state->m_mmc3_latch = 0; - state->m_mmc_reg[2] = data; - sgame_boog_set_prg(space.machine()); - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc3_latch = 0; + m_mmc_reg[2] = data; + sgame_boog_set_prg(machine()); + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); } } -static WRITE8_HANDLER( sgame_boog_w ) +WRITE8_MEMBER(nes_state::sgame_boog_w) { - nes_state *state = space.machine().driver_data(); static const UINT8 conv_table[8] = {0,2,5,3,6,1,7,4}; LOG_MMC(("sgame_boog_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x6001) { case 0x0000: - if (!state->m_mmc_reg[2]) + if (!m_mmc_reg[2]) txrom_w(space, 0x0000, data, mem_mask); break; case 0x0001: - if (!state->m_mmc_reg[2]) + if (!m_mmc_reg[2]) txrom_w(space, 0x0001, data, mem_mask); - else if (state->m_mmc_reg[3] && ((state->m_mmc_reg[0] & 0x80) == 0 || (state->m_mmc_latch1 & 0x07) < 6)) // if we use the prg16 banks and cmd=6,7 DON'T enter! + else if (m_mmc_reg[3] && ((m_mmc_reg[0] & 0x80) == 0 || (m_mmc_latch1 & 0x07) < 6)) // if we use the prg16 banks and cmd=6,7 DON'T enter! { - state->m_mmc_reg[3] = 0; + m_mmc_reg[3] = 0; txrom_w(space, 0x0001, data, mem_mask); } break; case 0x2000: - if (!state->m_mmc_reg[2]) + if (!m_mmc_reg[2]) txrom_w(space, 0x2000, data, mem_mask); else { data = (data & 0xc0) | conv_table[data & 0x07]; - state->m_mmc_reg[3] = 1; + m_mmc_reg[3] = 1; txrom_w(space, 0x0000, data, mem_mask); break; } break; case 0x4000: - if (!state->m_mmc_reg[2]) + if (!m_mmc_reg[2]) txrom_w(space, 0x4000, data, mem_mask); else - set_nt_mirroring(space.machine(), ((data >> 7) | data) & 0x01 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), ((data >> 7) | data) & 0x01 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; case 0x4001: - if (!state->m_mmc_reg[2]) + if (!m_mmc_reg[2]) txrom_w(space, 0x4001, data, mem_mask); else txrom_w(space, 0x6001, data, mem_mask); break; case 0x6001: - if (!state->m_mmc_reg[2]) + if (!m_mmc_reg[2]) txrom_w(space, 0x6001, data, mem_mask); else { @@ -7116,26 +7022,24 @@ static WRITE8_HANDLER( sgame_boog_w ) *************************************************************/ -static WRITE8_HANDLER( sgame_lion_m_w ) +WRITE8_MEMBER(nes_state::sgame_lion_m_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("sgame_lion_m_w, offset: %04x, data: %02x\n", offset, data)); - state->m_map114_reg = data; + m_map114_reg = data; - if (state->m_map114_reg & 0x80) + if (m_map114_reg & 0x80) { - prg16_89ab(space.machine(), data & 0x1f); - prg16_cdef(space.machine(), data & 0x1f); + prg16_89ab(machine(), data & 0x1f); + prg16_cdef(machine(), data & 0x1f); } else - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); } -static WRITE8_HANDLER( sgame_lion_w ) +WRITE8_MEMBER(nes_state::sgame_lion_w) { - nes_state *state = space.machine().driver_data(); static const UINT8 conv_table[8] = {0, 3, 1, 5, 6, 7, 2, 4}; LOG_MMC(("sgame_lion_w, offset: %04x, data: %02x\n", offset, data)); @@ -7144,17 +7048,17 @@ static WRITE8_HANDLER( sgame_lion_w ) switch (offset & 0x6000) { case 0x0000: - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; case 0x2000: - state->m_map114_reg_enabled = 1; + m_map114_reg_enabled = 1; data = (data & 0xc0) | conv_table[data & 0x07]; txrom_w(space, 0x0000, data, mem_mask); break; case 0x4000: - if (state->m_map114_reg_enabled && (state->m_map114_reg & 0x80) == 0) + if (m_map114_reg_enabled && (m_map114_reg & 0x80) == 0) { - state->m_map114_reg_enabled = 0; + m_map114_reg_enabled = 0; txrom_w(space, 0x0001, data, mem_mask); } break; @@ -7186,12 +7090,12 @@ static WRITE8_HANDLER( sgame_lion_w ) *************************************************************/ -static WRITE8_HANDLER( tengen_800008_w ) +WRITE8_MEMBER(nes_state::tengen_800008_w) { LOG_MMC(("tengen_800008_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), data >> 3); - chr8(space.machine(), data, CHRROM); + prg32(machine(), data >> 3); + chr8(machine(), data, CHRROM); } /************************************************************* @@ -7300,71 +7204,70 @@ static void tengen_800032_set_chr( running_machine &machine ) chr1_x(machine, 7 ^ chr_page, state->m_mmc_vrom_bank[5], CHRROM); } -static WRITE8_HANDLER( tengen_800032_w ) +WRITE8_MEMBER(nes_state::tengen_800032_w) { - nes_state *state = space.machine().driver_data(); UINT8 map64_helper, cmd; LOG_MMC(("tengen_800032_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x6001) { case 0x0000: - map64_helper = state->m_mmc_latch1 ^ data; - state->m_mmc_latch1 = data; + map64_helper = m_mmc_latch1 ^ data; + m_mmc_latch1 = data; /* Has PRG Mode changed? */ if (map64_helper & 0x40) - tengen_800032_set_prg(space.machine()); + tengen_800032_set_prg(machine()); /* Has CHR Mode changed? */ if (map64_helper & 0xa0) - tengen_800032_set_chr(space.machine()); + tengen_800032_set_chr(machine()); break; case 0x0001: - cmd = state->m_mmc_latch1 & 0x0f; + cmd = m_mmc_latch1 & 0x0f; switch (cmd) { case 0: case 1: case 2: case 3: case 4: case 5: - state->m_mmc_vrom_bank[cmd] = data; - tengen_800032_set_chr(space.machine()); + m_mmc_vrom_bank[cmd] = data; + tengen_800032_set_chr(machine()); break; case 6: case 7: - state->m_mmc_prg_bank[cmd - 6] = data; - tengen_800032_set_prg(space.machine()); + m_mmc_prg_bank[cmd - 6] = data; + tengen_800032_set_prg(machine()); break; case 8: case 9: - state->m_mmc_vrom_bank[cmd - 2] = data; - tengen_800032_set_chr(space.machine()); + m_mmc_vrom_bank[cmd - 2] = data; + tengen_800032_set_chr(machine()); break; case 0x0f: - state->m_mmc_prg_bank[2] = data; - tengen_800032_set_prg(space.machine()); + m_mmc_prg_bank[2] = data; + tengen_800032_set_prg(machine()); break; } break; case 0x2000: - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; case 0x4000: - state->m_IRQ_count_latch = data; + m_IRQ_count_latch = data; break; case 0x4001: /* $c001 - IRQ scanline latch */ - state->m_IRQ_mode = data & 0x01; - state->m_IRQ_reset = 1; + m_IRQ_mode = data & 0x01; + m_IRQ_reset = 1; break; case 0x6000: - state->m_IRQ_enable = 0; + m_IRQ_enable = 0; break; case 0x6001: - state->m_IRQ_enable = 1; + m_IRQ_enable = 1; break; default: @@ -7397,53 +7300,52 @@ static void tengen_800037_set_mirror( running_machine &machine ) set_nt_page(machine, 3, ROM, state->m_mmc_vrom_bank[nt_mode ? 5 : 1], 0); } -static WRITE8_HANDLER( tengen_800037_w ) +WRITE8_MEMBER(nes_state::tengen_800037_w) { - nes_state *state = space.machine().driver_data(); UINT8 map158_helper, cmd; LOG_MMC(("tengen_800037_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x6001) { case 0x0000: - map158_helper = state->m_mmc_latch1 ^ data; - state->m_mmc_latch1 = data; + map158_helper = m_mmc_latch1 ^ data; + m_mmc_latch1 = data; /* Has PRG Mode changed? */ if (map158_helper & 0x40) - tengen_800032_set_prg(space.machine()); + tengen_800032_set_prg(machine()); /* Has CHR Mode changed? */ if (map158_helper & 0xa0) { - tengen_800032_set_chr(space.machine()); - tengen_800037_set_mirror(space.machine()); + tengen_800032_set_chr(machine()); + tengen_800037_set_mirror(machine()); } break; case 0x0001: - cmd = state->m_mmc_latch1 & 0x0f; + cmd = m_mmc_latch1 & 0x0f; switch (cmd) { case 0: case 1: case 2: case 3: case 4: case 5: - state->m_mmc_vrom_bank[cmd] = data; - tengen_800032_set_chr(space.machine()); - tengen_800037_set_mirror(space.machine()); + m_mmc_vrom_bank[cmd] = data; + tengen_800032_set_chr(machine()); + tengen_800037_set_mirror(machine()); break; case 6: case 7: - state->m_mmc_prg_bank[cmd - 6] = data; - tengen_800032_set_prg(space.machine()); + m_mmc_prg_bank[cmd - 6] = data; + tengen_800032_set_prg(machine()); break; case 8: case 9: - state->m_mmc_vrom_bank[cmd - 2] = data; - tengen_800032_set_chr(space.machine()); - tengen_800037_set_mirror(space.machine()); + m_mmc_vrom_bank[cmd - 2] = data; + tengen_800032_set_chr(machine()); + tengen_800037_set_mirror(machine()); break; case 0x0f: - state->m_mmc_prg_bank[2] = data; - tengen_800032_set_prg(space.machine()); + m_mmc_prg_bank[2] = data; + tengen_800032_set_prg(machine()); break; } break; @@ -7473,33 +7375,30 @@ static WRITE8_HANDLER( tengen_800037_w ) *************************************************************/ -static WRITE8_HANDLER( txc_22211_l_w ) +WRITE8_MEMBER(nes_state::txc_22211_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("txc_22211_l_w, offset: %04x, data: %02x\n", offset, data)); if (offset < 4) - state->m_txc_reg[offset & 0x03] = data; + m_txc_reg[offset & 0x03] = data; } -static READ8_HANDLER( txc_22211_l_r ) +READ8_MEMBER(nes_state::txc_22211_l_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("txc_22211_l_r, offset: %04x\n", offset)); if (offset == 0x0000) - return (state->m_txc_reg[1] ^ state->m_txc_reg[2]) | 0x40; + return (m_txc_reg[1] ^ m_txc_reg[2]) | 0x40; else return 0x00; } -static WRITE8_HANDLER( txc_22211_w ) +WRITE8_MEMBER(nes_state::txc_22211_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("txc_22211_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), state->m_txc_reg[2] >> 2); - chr8(space.machine(), state->m_txc_reg[2], CHRROM); + prg32(machine(), m_txc_reg[2] >> 2); + chr8(machine(), m_txc_reg[2], CHRROM); } /************************************************************* @@ -7517,13 +7416,12 @@ static WRITE8_HANDLER( txc_22211_w ) *************************************************************/ -static WRITE8_HANDLER( txc_22211b_w ) +WRITE8_MEMBER(nes_state::txc_22211b_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("txc_22211b_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), state->m_txc_reg[2] >> 2); - chr8(space.machine(), (((data ^ state->m_txc_reg[2]) >> 3) & 0x02) | (((data ^ state->m_txc_reg[2]) >> 5) & 0x01), CHRROM); + prg32(machine(), m_txc_reg[2] >> 2); + chr8(machine(), (((data ^ m_txc_reg[2]) >> 3) & 0x02) | (((data ^ m_txc_reg[2]) >> 5) & 0x01), CHRROM); } /************************************************************* @@ -7541,13 +7439,12 @@ static WRITE8_HANDLER( txc_22211b_w ) *************************************************************/ -static READ8_HANDLER( txc_22211c_l_r ) +READ8_MEMBER(nes_state::txc_22211c_l_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("txc_22211c_l_r, offset: %04x\n", offset)); if (offset == 0x0000) - return (state->m_txc_reg[1] ^ state->m_txc_reg[2]) | 0x41; + return (m_txc_reg[1] ^ m_txc_reg[2]) | 0x41; else return 0x00; } @@ -7566,14 +7463,14 @@ static READ8_HANDLER( txc_22211c_l_r ) *************************************************************/ -static WRITE8_HANDLER( txc_tw_l_w ) +WRITE8_MEMBER(nes_state::txc_tw_l_w) { LOG_MMC(("txctw_l_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), (data >> 4) | data); + prg32(machine(), (data >> 4) | data); } -static WRITE8_HANDLER( txc_tw_m_w ) +WRITE8_MEMBER(nes_state::txc_tw_m_w) { LOG_MMC(("txctw_m_w, offset: %04x, data: %04x\n", offset, data)); @@ -7600,14 +7497,14 @@ static void txc_tw_prg_cb( running_machine &machine, int start, int bank ) *************************************************************/ -static WRITE8_HANDLER( txc_strikewolf_w ) +WRITE8_MEMBER(nes_state::txc_strikewolf_w) { LOG_MMC(("txc_strikewolf_w, offset: %04x, data: %02x\n", offset, data)); if ((offset >= 0x400) && (offset < 0x7fff)) { - prg32(space.machine(), data >> 4); - chr8(space.machine(), data & 0x0f, CHRROM); + prg32(machine(), data >> 4); + chr8(machine(), data & 0x0f, CHRROM); } } @@ -7627,16 +7524,16 @@ static WRITE8_HANDLER( txc_strikewolf_w ) *************************************************************/ -static READ8_HANDLER( txc_mxmdhtwo_l_r ) +READ8_MEMBER(nes_state::txc_mxmdhtwo_l_r) { return 0x50; } -static WRITE8_HANDLER( txc_mxmdhtwo_w ) +WRITE8_MEMBER(nes_state::txc_mxmdhtwo_w) { LOG_MMC(("txc_mxmdhtwo_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), data); + prg32(machine(), data); } /************************************************************* @@ -7691,14 +7588,14 @@ static void waixing_a1_chr_cb( running_machine &machine, int start, int bank, in chr1_x(machine, start, bank, chr_src); } -static WRITE8_HANDLER( waixing_a_w ) +WRITE8_MEMBER(nes_state::waixing_a_w) { LOG_MMC(("waixing_a_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x6001) { case 0x2000: - waixing_set_mirror(space.machine(), data); //maybe data & 0x03? + waixing_set_mirror(machine(), data); //maybe data & 0x03? break; case 0x2001: @@ -7813,20 +7710,19 @@ static void waixing_e_chr_cb( running_machine &machine, int start, int bank, int *************************************************************/ -static WRITE8_HANDLER( waixing_f_w ) +WRITE8_MEMBER(nes_state::waixing_f_w) { - nes_state *state = space.machine().driver_data(); UINT8 cmd; LOG_MMC(("waixing_f_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x6001) { case 0x0001: - cmd = state->m_mmc_latch1 & 0x07; + cmd = m_mmc_latch1 & 0x07; if (cmd >= 6) { - state->m_mmc_prg_bank[cmd - 6] = data & ((data > 0x3f) ? 0x4f : 0x3f); - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + m_mmc_prg_bank[cmd - 6] = data & ((data > 0x3f) ? 0x4f : 0x3f); + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); } else waixing_a_w(space, offset, data, mem_mask); @@ -7874,46 +7770,45 @@ static void waixing_g_set_chr( running_machine &machine, int chr_base, int chr_m state->m_mmc3_chr_cb(machine, chr_page ^ 7, chr_base | (state->m_mmc_vrom_bank[5] & chr_mask), state->m_mmc_chr_source); } -static WRITE8_HANDLER( waixing_g_w ) +WRITE8_MEMBER(nes_state::waixing_g_w) { - nes_state *state = space.machine().driver_data(); UINT8 MMC3_helper, cmd; LOG_MMC(("waixing_g_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x6001) { case 0x0000: - MMC3_helper = state->m_mmc_latch1 ^ data; - state->m_mmc_latch1 = data; + MMC3_helper = m_mmc_latch1 ^ data; + m_mmc_latch1 = data; /* Has PRG Mode changed? */ if (MMC3_helper & 0x40) - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); /* Has CHR Mode changed? */ if (MMC3_helper & 0x80) - waixing_g_set_chr(space.machine(), state->m_mmc_chr_base, state->m_mmc_chr_mask); + waixing_g_set_chr(machine(), m_mmc_chr_base, m_mmc_chr_mask); break; case 0x0001: - cmd = state->m_mmc_latch1 & 0x0f; + cmd = m_mmc_latch1 & 0x0f; switch (cmd) { case 0: case 1: // these do not need to be separated: we take care of them in set_chr! case 2: case 3: case 4: case 5: - state->m_mmc_vrom_bank[cmd] = data; - waixing_g_set_chr(space.machine(), state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_vrom_bank[cmd] = data; + waixing_g_set_chr(machine(), m_mmc_chr_base, m_mmc_chr_mask); break; case 6: case 7: case 8: case 9: - state->m_mmc_prg_bank[cmd - 6] = data; - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + m_mmc_prg_bank[cmd - 6] = data; + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); break; case 0x0a: case 0x0b: - state->m_mmc_vrom_bank[cmd - 4] = data; - waixing_g_set_chr(space.machine(), state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_vrom_bank[cmd - 4] = data; + waixing_g_set_chr(machine(), m_mmc_chr_base, m_mmc_chr_mask); break; } break; @@ -7945,22 +7840,21 @@ static void waixing_h_chr_cb( running_machine &machine, int start, int bank, int chr1_x(machine, start, bank, source); } -static WRITE8_HANDLER( waixing_h_w ) +WRITE8_MEMBER(nes_state::waixing_h_w) { - nes_state *state = space.machine().driver_data(); UINT8 cmd; LOG_MMC(("waixing_h_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x6001) { case 0x0001: - cmd = state->m_mmc3_latch & 0x07; + cmd = m_mmc3_latch & 0x07; switch (cmd) { - case 0: // in this case we set prg_base in addition to state->m_mmc_vrom_bank! - state->m_mmc_prg_base = (data << 5) & 0x40; - state->m_mmc_prg_mask = 0x3f; - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + case 0: // in this case we set prg_base in addition to m_mmc_vrom_bank! + m_mmc_prg_base = (data << 5) & 0x40; + m_mmc_prg_mask = 0x3f; + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); txrom_w(space, offset, data, mem_mask); default: txrom_w(space, offset, data, mem_mask); @@ -7991,19 +7885,18 @@ static WRITE8_HANDLER( waixing_h_w ) *************************************************************/ -static WRITE8_HANDLER( waixing_sgz_w ) +WRITE8_MEMBER(nes_state::waixing_sgz_w) { - nes_state *state = space.machine().driver_data(); UINT8 mmc_helper, bank; LOG_MMC(("waixing_sgz_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x7000) { case 0x0000: - prg8_89(space.machine(), data); + prg8_89(machine(), data); break; case 0x2000: - prg8_ab(space.machine(), data); + prg8_ab(machine(), data); break; case 0x3000: case 0x4000: @@ -8012,28 +7905,28 @@ static WRITE8_HANDLER( waixing_sgz_w ) bank = ((offset & 0x7000) - 0x3000) / 0x0800 + ((offset & 0x0008) >> 3); mmc_helper = offset & 0x04; if (mmc_helper) - state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & 0x0f) | ((data & 0x0f) << 4); + m_mmc_vrom_bank[bank] = (m_mmc_vrom_bank[bank] & 0x0f) | ((data & 0x0f) << 4); else - state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & 0xf0) | (data & 0x0f); - chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM); + m_mmc_vrom_bank[bank] = (m_mmc_vrom_bank[bank] & 0xf0) | (data & 0x0f); + chr1_x(machine(), bank, m_mmc_vrom_bank[bank], CHRROM); break; case 0x7000: switch (offset & 0x0c) { case 0x00: - state->m_IRQ_count_latch = (state->m_IRQ_count_latch & 0xf0) | (data & 0x0f); + m_IRQ_count_latch = (m_IRQ_count_latch & 0xf0) | (data & 0x0f); break; case 0x04: - state->m_IRQ_count_latch = (state->m_IRQ_count_latch & 0x0f) | ((data & 0x0f) << 4); + m_IRQ_count_latch = (m_IRQ_count_latch & 0x0f) | ((data & 0x0f) << 4); break; case 0x08: - state->m_IRQ_enable = data & 0x02; - state->m_IRQ_enable_latch = data & 0x01; + m_IRQ_enable = data & 0x02; + m_IRQ_enable_latch = data & 0x01; if (data & 0x02) - state->m_IRQ_count = state->m_IRQ_count_latch; + m_IRQ_count = m_IRQ_count_latch; break; case 0x0c: - state->m_IRQ_enable = state->m_IRQ_enable_latch; + m_IRQ_enable = m_IRQ_enable_latch; break; } break; @@ -8054,22 +7947,21 @@ static WRITE8_HANDLER( waixing_sgz_w ) *************************************************************/ -static WRITE8_HANDLER( waixing_sgzlz_l_w ) +WRITE8_MEMBER(nes_state::waixing_sgzlz_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("waixing_sgzlz_l_w, offset: %04x, data: %02x\n", offset, data)); switch (offset) { case 0x700: - set_nt_mirroring(space.machine(), data ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), data ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; case 0x701: - state->m_mmc_latch1 = (state->m_mmc_latch1 & 0x0c) | ((data >> 1) & 0x03); - prg32(space.machine(), state->m_mmc_latch1); + m_mmc_latch1 = (m_mmc_latch1 & 0x0c) | ((data >> 1) & 0x03); + prg32(machine(), m_mmc_latch1); break; case 0x702: - state->m_mmc_latch1 = (state->m_mmc_latch1 & 0x03) | ((data << 2) & 0x0c); + m_mmc_latch1 = (m_mmc_latch1 & 0x03) | ((data << 2) & 0x0c); break; } } @@ -8087,32 +7979,31 @@ static WRITE8_HANDLER( waixing_sgzlz_l_w ) *************************************************************/ -static WRITE8_HANDLER( waixing_ffv_l_w ) +WRITE8_MEMBER(nes_state::waixing_ffv_l_w) { - nes_state *state = space.machine().driver_data(); UINT8 mmc_helper; LOG_MMC(("waixing_ffv_l_w, offset: %04x, data: %02x\n", offset, data)); offset += 0x100; /* the checks work better on addresses */ if (0x1000 == (offset & 0x1200)) { - state->m_mmc_reg[BIT(offset, 8)] = data; - mmc_helper = BIT(state->m_mmc_reg[1], 0) << 5; - switch (state->m_mmc_reg[0] & 0x70) + m_mmc_reg[BIT(offset, 8)] = data; + mmc_helper = BIT(m_mmc_reg[1], 0) << 5; + switch (m_mmc_reg[0] & 0x70) { case 0x00: case 0x20: case 0x40: case 0x60: - prg16_89ab(space.machine(), mmc_helper | ((state->m_mmc_reg[0] >> 1) & 0x10) | (state->m_mmc_reg[0] & 0x0f)); - prg16_cdef(space.machine(), mmc_helper & 0x1f); + prg16_89ab(machine(), mmc_helper | ((m_mmc_reg[0] >> 1) & 0x10) | (m_mmc_reg[0] & 0x0f)); + prg16_cdef(machine(), mmc_helper & 0x1f); break; case 0x50: - prg32(space.machine(), (mmc_helper >> 1) | (state->m_mmc_reg[0] & 0x0f)); + prg32(machine(), (mmc_helper >> 1) | (m_mmc_reg[0] & 0x0f)); break; case 0x70: - prg16_89ab(space.machine(), mmc_helper | ((state->m_mmc_reg[0] << 1) & 0x10) | (state->m_mmc_reg[0] & 0x0f)); - prg16_cdef(space.machine(), mmc_helper & 0x1f); + prg16_89ab(machine(), mmc_helper | ((m_mmc_reg[0] << 1) & 0x10) | (m_mmc_reg[0] & 0x0f)); + prg16_cdef(machine(), mmc_helper & 0x1f); break; } } @@ -8137,18 +8028,18 @@ static WRITE8_HANDLER( waixing_ffv_l_w ) *************************************************************/ -static WRITE8_HANDLER( waixing_zs_w ) +WRITE8_MEMBER(nes_state::waixing_zs_w) { LOG_MMC(("waixing_zs_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), offset >> 3); + prg32(machine(), offset >> 3); switch (data & 0x03) { - case 0: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break; - case 1: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break; - case 2: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break; - case 3: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break; + case 0: set_nt_mirroring(machine(), PPU_MIRROR_VERT); break; + case 1: set_nt_mirroring(machine(), PPU_MIRROR_HORZ); break; + case 2: set_nt_mirroring(machine(), PPU_MIRROR_LOW); break; + case 3: set_nt_mirroring(machine(), PPU_MIRROR_HIGH); break; } } @@ -8167,11 +8058,11 @@ static WRITE8_HANDLER( waixing_zs_w ) *************************************************************/ -static WRITE8_HANDLER( waixing_dq8_w ) +WRITE8_MEMBER(nes_state::waixing_dq8_w) { LOG_MMC(("waixing_dq8_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), offset >> 3); + prg32(machine(), offset >> 3); } @@ -8187,43 +8078,43 @@ static WRITE8_HANDLER( waixing_dq8_w ) *************************************************************/ -static WRITE8_HANDLER( waixing_ps2_w ) +WRITE8_MEMBER(nes_state::waixing_ps2_w) { UINT8 map15_flip = (data & 0x80) >> 7; UINT8 map15_helper = (data & 0x7f) << 1; LOG_MMC(("waixing_ps2_w, offset: %04x, data: %02x\n", offset, data)); - set_nt_mirroring(space.machine(), BIT(data, 6) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 6) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); switch (offset & 0x0fff) { case 0x000: - prg8_89(space.machine(), (map15_helper + 0) ^ map15_flip); - prg8_ab(space.machine(), (map15_helper + 1) ^ map15_flip); - prg8_cd(space.machine(), (map15_helper + 2) ^ map15_flip); - prg8_ef(space.machine(), (map15_helper + 3) ^ map15_flip); + prg8_89(machine(), (map15_helper + 0) ^ map15_flip); + prg8_ab(machine(), (map15_helper + 1) ^ map15_flip); + prg8_cd(machine(), (map15_helper + 2) ^ map15_flip); + prg8_ef(machine(), (map15_helper + 3) ^ map15_flip); break; case 0x001: map15_helper |= map15_flip; - prg8_89(space.machine(), map15_helper); - prg8_ab(space.machine(), map15_helper + 1); - prg8_cd(space.machine(), map15_helper + 1); - prg8_ef(space.machine(), map15_helper + 1); + prg8_89(machine(), map15_helper); + prg8_ab(machine(), map15_helper + 1); + prg8_cd(machine(), map15_helper + 1); + prg8_ef(machine(), map15_helper + 1); break; case 0x002: map15_helper |= map15_flip; - prg8_89(space.machine(), map15_helper); - prg8_ab(space.machine(), map15_helper); - prg8_cd(space.machine(), map15_helper); - prg8_ef(space.machine(), map15_helper); + prg8_89(machine(), map15_helper); + prg8_ab(machine(), map15_helper); + prg8_cd(machine(), map15_helper); + prg8_ef(machine(), map15_helper); break; case 0x003: map15_helper |= map15_flip; - prg8_89(space.machine(), map15_helper); - prg8_ab(space.machine(), map15_helper + 1); - prg8_cd(space.machine(), map15_helper); - prg8_ef(space.machine(), map15_helper + 1); + prg8_89(machine(), map15_helper); + prg8_ab(machine(), map15_helper + 1); + prg8_cd(machine(), map15_helper); + prg8_ef(machine(), map15_helper + 1); break; } } @@ -8264,18 +8155,17 @@ static void waixing_sec_chr_cb( running_machine &machine, int start, int bank, i chr1_x(machine, start, bank, source); } -static WRITE8_HANDLER( waixing_sec_l_w ) +WRITE8_MEMBER(nes_state::waixing_sec_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("waixing_sec_l_w, offset: %04x, data: %02x\n", offset, data)); offset += 0x100; if (offset == 0x1000) { - state->m_mmc_reg[0] = data & 0x02; - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_reg[0] = data & 0x02; + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); } } @@ -8301,11 +8191,10 @@ static void waixing_sh2_chr_cb( running_machine &machine, int start, int bank, i chr4_4(machine, state->m_mmc_reg[1], state->m_mmc_reg[1] ? CHRRAM : CHRROM); } -READ8_HANDLER( waixing_sh2_chr_r ) +READ8_MEMBER(nes_state::waixing_sh2_chr_r) { - nes_state *state = space.machine().driver_data(); int bank = offset >> 10; - UINT8 val = state->m_chr_map[bank].access[offset & 0x3ff]; // this would be usual return value + UINT8 val = m_chr_map[bank].access[offset & 0x3ff]; // this would be usual return value int chr_helper; switch (offset & 0xff8) @@ -8315,11 +8204,11 @@ READ8_HANDLER( waixing_sh2_chr_r ) default: return val; } - state->m_mmc_reg[offset >> 12] = chr_helper; + m_mmc_reg[offset >> 12] = chr_helper; if (offset & 0x1000) - chr4_4(space.machine(), state->m_mmc_reg[1], state->m_mmc_reg[1] ? CHRRAM : CHRROM); + chr4_4(machine(), m_mmc_reg[1], m_mmc_reg[1] ? CHRRAM : CHRROM); else - chr4_0(space.machine(), state->m_mmc_reg[0], state->m_mmc_reg[0] ? CHRRAM : CHRROM); + chr4_0(machine(), m_mmc_reg[0], m_mmc_reg[0] ? CHRRAM : CHRROM); return val; } @@ -8352,39 +8241,37 @@ static void unl_8237_chr_cb( running_machine &machine, int start, int bank, int chr1_x(machine, start, bank, source); } -static WRITE8_HANDLER( unl_8237_l_w ) +WRITE8_MEMBER(nes_state::unl_8237_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("unl_8237_l_w offset: %04x, data: %02x\n", offset, data)); offset += 0x100; if (offset == 0x1000) { - state->m_mmc_reg[0] = data; - if (state->m_mmc_reg[0] & 0x80) + m_mmc_reg[0] = data; + if (m_mmc_reg[0] & 0x80) { - if (state->m_mmc_reg[0] & 0x20) - prg32(space.machine(), (state->m_mmc_reg[0] & 0x0f) >> 1); + if (m_mmc_reg[0] & 0x20) + prg32(machine(), (m_mmc_reg[0] & 0x0f) >> 1); else { - prg16_89ab(space.machine(), state->m_mmc_reg[0] & 0x1f); - prg16_cdef(space.machine(), state->m_mmc_reg[0] & 0x1f); + prg16_89ab(machine(), m_mmc_reg[0] & 0x1f); + prg16_cdef(machine(), m_mmc_reg[0] & 0x1f); } } else - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); } if (offset == 0x1001) { - state->m_mmc_reg[1] = data; - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_reg[1] = data; + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); } } -static WRITE8_HANDLER( unl_8237_w ) +WRITE8_MEMBER(nes_state::unl_8237_w) { - nes_state *state = space.machine().driver_data(); static const UINT8 conv_table[8] = {0, 2, 6, 1, 7, 3, 4, 5}; LOG_MMC(("unl_8237_w offset: %04x, data: %02x\n", offset, data)); @@ -8392,21 +8279,21 @@ static WRITE8_HANDLER( unl_8237_w ) { case 0x0000: case 0x1000: - set_nt_mirroring(space.machine(), (data | (data >> 7)) & 0x01 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), (data | (data >> 7)) & 0x01 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; case 0x2000: case 0x3000: - state->m_mmc_reg[2] = 1; + m_mmc_reg[2] = 1; data = (data & 0xc0) | conv_table[data & 0x07]; txrom_w(space, 0x0000, data, mem_mask); break; case 0x4000: case 0x5000: - if (state->m_mmc_reg[2]) + if (m_mmc_reg[2]) { - state->m_mmc_reg[2] = 0; + m_mmc_reg[2] = 0; txrom_w(space, 0x0001, data, mem_mask); } break; @@ -8439,24 +8326,23 @@ static void unl_ax5705_set_prg( running_machine &machine ) prg8_ab(machine, state->m_mmc_prg_bank[1]); } -static WRITE8_HANDLER( unl_ax5705_w ) +WRITE8_MEMBER(nes_state::unl_ax5705_w) { - nes_state *state = space.machine().driver_data(); UINT8 bank; LOG_MMC(("unl_ax5705_w offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x700f) { case 0x0000: - state->m_mmc_prg_bank[0] = (data & 0x05) | ((data & 0x08) >> 2) | ((data & 0x02) << 2); - unl_ax5705_set_prg(space.machine()); + m_mmc_prg_bank[0] = (data & 0x05) | ((data & 0x08) >> 2) | ((data & 0x02) << 2); + unl_ax5705_set_prg(machine()); break; case 0x0008: - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; case 0x2000: - state->m_mmc_prg_bank[1] = (data & 0x05) | ((data & 0x08) >> 2) | ((data & 0x02) << 2); - unl_ax5705_set_prg(space.machine()); + m_mmc_prg_bank[1] = (data & 0x05) | ((data & 0x08) >> 2) | ((data & 0x02) << 2); + unl_ax5705_set_prg(machine()); break; /* CHR banks 0, 1, 4, 5 */ case 0x2008: @@ -8464,16 +8350,16 @@ static WRITE8_HANDLER( unl_ax5705_w ) case 0x4008: case 0x400a: bank = ((offset & 0x4000) ? 4 : 0) + ((offset & 0x0002) ? 1 : 0); - state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & 0xf0) | (data & 0x0f); - chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM); + m_mmc_vrom_bank[bank] = (m_mmc_vrom_bank[bank] & 0xf0) | (data & 0x0f); + chr1_x(machine(), bank, m_mmc_vrom_bank[bank], CHRROM); break; case 0x2009: case 0x200b: case 0x4009: case 0x400b: bank = ((offset & 0x4000) ? 4 : 0) + ((offset & 0x0002) ? 1 : 0); - state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & 0x0f) | ((data & 0x04) << 3) | ((data & 0x02) << 5) | ((data & 0x09) << 4); - chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM); + m_mmc_vrom_bank[bank] = (m_mmc_vrom_bank[bank] & 0x0f) | ((data & 0x04) << 3) | ((data & 0x02) << 5) | ((data & 0x09) << 4); + chr1_x(machine(), bank, m_mmc_vrom_bank[bank], CHRROM); break; /* CHR banks 2, 3, 6, 7 */ case 0x4000: @@ -8481,16 +8367,16 @@ static WRITE8_HANDLER( unl_ax5705_w ) case 0x6000: case 0x6002: bank = 2 + ((offset & 0x2000) ? 4 : 0) + ((offset & 0x0002) ? 1 : 0); - state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & 0xf0) | (data & 0x0f); - chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM); + m_mmc_vrom_bank[bank] = (m_mmc_vrom_bank[bank] & 0xf0) | (data & 0x0f); + chr1_x(machine(), bank, m_mmc_vrom_bank[bank], CHRROM); break; case 0x4001: case 0x4003: case 0x6001: case 0x6003: bank = 2 + ((offset & 0x2000) ? 4 : 0) + ((offset & 0x0002) ? 1 : 0); - state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & 0x0f) | ((data & 0x04) << 3) | ((data & 0x02) << 5) | ((data & 0x09) << 4); - chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM); + m_mmc_vrom_bank[bank] = (m_mmc_vrom_bank[bank] & 0x0f) | ((data & 0x04) << 3) | ((data & 0x02) << 5) | ((data & 0x09) << 4); + chr1_x(machine(), bank, m_mmc_vrom_bank[bank], CHRROM); break; } } @@ -8505,12 +8391,12 @@ static WRITE8_HANDLER( unl_ax5705_w ) *************************************************************/ -static WRITE8_HANDLER( unl_cc21_w ) +WRITE8_MEMBER(nes_state::unl_cc21_w) { LOG_MMC(("unl_cc21_w offset: %04x, data: %02x\n", offset, data)); - set_nt_mirroring(space.machine(), BIT(data, 1) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); - chr8(space.machine(), (offset & 0x01), CHRROM); + set_nt_mirroring(machine(), BIT(data, 1) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); + chr8(machine(), (offset & 0x01), CHRROM); } /************************************************************* @@ -8530,7 +8416,7 @@ static UINT8 unl_kof97_unscramble( UINT8 data ) return ((data >> 1) & 0x01) | ((data >> 4) & 0x02) | ((data << 2) & 0x04) | ((data >> 0) & 0xd8) | ((data << 3) & 0x20); } -static WRITE8_HANDLER( unl_kof97_w ) +WRITE8_MEMBER(nes_state::unl_kof97_w) { LOG_MMC(("unl_kof97_w offset: %04x, data: %02x\n", offset, data)); @@ -8586,7 +8472,7 @@ static WRITE8_HANDLER( unl_kof97_w ) *************************************************************/ -static WRITE8_HANDLER( ks7057_w ) +WRITE8_MEMBER(nes_state::ks7057_w) { LOG_MMC(("ks7057_w, offset: %04x, data: %02x\n", offset, data)); offset = (BIT(offset, 0) << 1) | BIT(offset, 1) | (offset & ~0x03); @@ -8603,9 +8489,8 @@ static WRITE8_HANDLER( ks7057_w ) *************************************************************/ -static WRITE8_HANDLER( unl_t230_w ) +WRITE8_MEMBER(nes_state::unl_t230_w) { - nes_state *state = space.machine().driver_data(); UINT8 bank; LOG_MMC(("unl_t230_w offset: %04x, data: %02x\n", offset, data)); @@ -8614,7 +8499,7 @@ static WRITE8_HANDLER( unl_t230_w ) case 0x0000: break; case 0x2000: - prg16_89ab(space.machine(), data); + prg16_89ab(machine(), data); break; // the part below works like VRC-2. how was the original board wired up? @@ -8625,10 +8510,10 @@ static WRITE8_HANDLER( unl_t230_w ) case 0x100c: switch (data & 0x03) { - case 0x00: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break; - case 0x01: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break; - case 0x02: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break; - case 0x03: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break; + case 0x00: set_nt_mirroring(machine(), PPU_MIRROR_VERT); break; + case 0x01: set_nt_mirroring(machine(), PPU_MIRROR_HORZ); break; + case 0x02: set_nt_mirroring(machine(), PPU_MIRROR_LOW); break; + case 0x03: set_nt_mirroring(machine(), PPU_MIRROR_HIGH); break; } break; @@ -8650,26 +8535,26 @@ static WRITE8_HANDLER( unl_t230_w ) case 0x600c: bank = ((offset & 0x7000) - 0x3000) / 0x0800 + ((offset & 0x0008) >> 2); if (offset & 0x0004) - state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & 0x0f) | (data << 4); + m_mmc_vrom_bank[bank] = (m_mmc_vrom_bank[bank] & 0x0f) | (data << 4); else - state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & 0xf0) | (data & 0x0f); + m_mmc_vrom_bank[bank] = (m_mmc_vrom_bank[bank] & 0xf0) | (data & 0x0f); - chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[bank], state->m_mmc_chr_source); + chr1_x(machine(), bank, m_mmc_vrom_bank[bank], m_mmc_chr_source); break; case 0x7000: - state->m_IRQ_count_latch &= ~0x0f; - state->m_IRQ_count_latch |= data & 0x0f; + m_IRQ_count_latch &= ~0x0f; + m_IRQ_count_latch |= data & 0x0f; break; case 0x7004: - state->m_IRQ_count_latch &= ~0xf0; - state->m_IRQ_count_latch |= (data << 4) & 0xf0; + m_IRQ_count_latch &= ~0xf0; + m_IRQ_count_latch |= (data << 4) & 0xf0; break; case 0x7008: - state->m_IRQ_mode = data & 0x04; // currently not implemented: 0 = prescaler mode / 1 = CPU mode - state->m_IRQ_enable = data & 0x02; - state->m_IRQ_enable_latch = data & 0x01; + m_IRQ_mode = data & 0x04; // currently not implemented: 0 = prescaler mode / 1 = CPU mode + m_IRQ_enable = data & 0x02; + m_IRQ_enable_latch = data & 0x01; if (data & 0x02) - state->m_IRQ_count = state->m_IRQ_count_latch; + m_IRQ_count = m_IRQ_count_latch; break; default: @@ -8712,31 +8597,30 @@ static void kof96_chr_cb( running_machine &machine, int start, int bank, int sou chr1_x(machine, start, bank, source); } -static WRITE8_HANDLER( kof96_l_w ) +WRITE8_MEMBER(nes_state::kof96_l_w) { - nes_state *state = space.machine().driver_data(); UINT8 new_bank; LOG_MMC(("kof96_l_w, offset: %04x, data: %02x\n", offset, data)); offset += 0x100; if (offset == 0x1000) { - state->m_mmc_reg[0] = data; + m_mmc_reg[0] = data; - if (state->m_mmc_reg[0] & 0x80) + if (m_mmc_reg[0] & 0x80) { - new_bank = (state->m_mmc_reg[0] & 0x1f); + new_bank = (m_mmc_reg[0] & 0x1f); - if (state->m_mmc_reg[0] & 0x20) - prg32(space.machine(), new_bank >> 2); + if (m_mmc_reg[0] & 0x20) + prg32(machine(), new_bank >> 2); else { - prg16_89ab(space.machine(), new_bank); - prg16_cdef(space.machine(), new_bank); + prg16_89ab(machine(), new_bank); + prg16_cdef(machine(), new_bank); } } else - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); } if (offset >= 0x1000) @@ -8745,51 +8629,49 @@ static WRITE8_HANDLER( kof96_l_w ) { case 0x00: case 0x01: - state->m_mmc_reg[1] = 0x83; + m_mmc_reg[1] = 0x83; break; case 0x02: - state->m_mmc_reg[1] = 0x42; + m_mmc_reg[1] = 0x42; break; case 0x03: - state->m_mmc_reg[1] = 0x00; + m_mmc_reg[1] = 0x00; break; } } - if (!state->m_mmc_reg[3] && offset > 0x1000) + if (!m_mmc_reg[3] && offset > 0x1000) { - state->m_mmc_reg[3] = 1; + m_mmc_reg[3] = 1; space.write_byte(0x4017, 0x40); } } -static READ8_HANDLER( kof96_l_r ) +READ8_MEMBER(nes_state::kof96_l_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("kof96_l_r, offset: %04x\n", offset)); offset += 0x100; if (!(offset < 0x1000)) - return state->m_mmc_reg[1]; + return m_mmc_reg[1]; else return 0; } -static WRITE8_HANDLER( kof96_w ) +WRITE8_MEMBER(nes_state::kof96_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("kof96_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x6003) { case 0x0000: - state->m_mmc_reg[2] = 1; + m_mmc_reg[2] = 1; txrom_w(space, 0x0000, data, mem_mask); break; case 0x0001: - if (state->m_mmc_reg[2]) + if (m_mmc_reg[2]) txrom_w(space, 0x0001, data, mem_mask); break; @@ -8797,12 +8679,12 @@ static WRITE8_HANDLER( kof96_w ) break; case 0x0003: - state->m_mmc_reg[2] = 0; + m_mmc_reg[2] = 0; if (data == 0x28) - prg8_cd(space.machine(), 0x17); + prg8_cd(machine(), 0x17); else if (data == 0x2a) - prg8_ab(space.machine(), 0x0f); + prg8_ab(machine(), 0x0f); break; default: @@ -8827,9 +8709,8 @@ static WRITE8_HANDLER( kof96_w ) *************************************************************/ -static WRITE8_HANDLER( mk2_m_w ) +WRITE8_MEMBER(nes_state::mk2_m_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("mk2_m_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x1000) @@ -8837,19 +8718,19 @@ static WRITE8_HANDLER( mk2_m_w ) case 0x0000: switch (offset & 0x03) { - case 0x00: chr2_0(space.machine(), data, CHRROM); break; - case 0x01: chr2_2(space.machine(), data, CHRROM); break; - case 0x02: chr2_4(space.machine(), data, CHRROM); break; - case 0x03: chr2_6(space.machine(), data, CHRROM); break; + case 0x00: chr2_0(machine(), data, CHRROM); break; + case 0x01: chr2_2(machine(), data, CHRROM); break; + case 0x02: chr2_4(machine(), data, CHRROM); break; + case 0x03: chr2_6(machine(), data, CHRROM); break; } break; case 0x1000: switch (offset & 0x03) { - case 0x00: prg8_89(space.machine(), data); break; - case 0x01: prg8_ab(space.machine(), data); break; - case 0x02: state->m_IRQ_enable = 0; state->m_IRQ_count = 0; break; - case 0x03: state->m_IRQ_enable = 1; state->m_IRQ_count = 7; break; + case 0x00: prg8_89(machine(), data); break; + case 0x01: prg8_ab(machine(), data); break; + case 0x02: m_IRQ_enable = 0; m_IRQ_count = 0; break; + case 0x03: m_IRQ_enable = 1; m_IRQ_count = 7; break; } break; default: @@ -8883,30 +8764,29 @@ static void n625092_set_prg( running_machine &machine, UINT8 reg1, UINT8 reg2 ) prg16_cdef(machine, map221_helper2 | ((reg1 & 0x70) >> 1)); } -static WRITE8_HANDLER( n625092_w ) +WRITE8_MEMBER(nes_state::n625092_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("n625092_w, offset: %04x, data: %02x\n", offset, data)); if (offset < 0x4000) { - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); offset = (offset >> 1) & 0xff; - if (state->m_mmc_latch1 != offset) + if (m_mmc_latch1 != offset) { - state->m_mmc_latch1 = offset; - n625092_set_prg(space.machine(), state->m_mmc_latch1, state->m_mmc_latch2); + m_mmc_latch1 = offset; + n625092_set_prg(machine(), m_mmc_latch1, m_mmc_latch2); } } else { offset &= 0x07; - if (state->m_mmc_latch2 != offset) + if (m_mmc_latch2 != offset) { - state->m_mmc_latch2 = offset; - n625092_set_prg(space.machine(), state->m_mmc_latch1, state->m_mmc_latch2); + m_mmc_latch2 = offset; + n625092_set_prg(machine(), m_mmc_latch1, m_mmc_latch2); } } } @@ -8941,22 +8821,21 @@ static void sc127_irq( device_t *device, int scanline, int vblank, int blanked ) } } -static WRITE8_HANDLER( sc127_w ) +WRITE8_MEMBER(nes_state::sc127_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("sc127_w, offset: %04x, data: %02x\n", offset, data)); switch (offset) { case 0x0000: - prg8_89(space.machine(), data); + prg8_89(machine(), data); break; case 0x0001: - prg8_ab(space.machine(), data); + prg8_ab(machine(), data); break; case 0x0002: - // state->m_mmc_prg_bank[offset & 0x02] = data; - prg8_cd(space.machine(), data); + // m_mmc_prg_bank[offset & 0x02] = data; + prg8_cd(machine(), data); break; case 0x1000: case 0x1001: @@ -8966,20 +8845,20 @@ static WRITE8_HANDLER( sc127_w ) case 0x1005: case 0x1006: case 0x1007: - // state->m_mmc_vrom_bank[offset & 0x07] = data; - chr1_x(space.machine(), offset & 0x07, data, CHRROM); + // m_mmc_vrom_bank[offset & 0x07] = data; + chr1_x(machine(), offset & 0x07, data, CHRROM); break; case 0x4002: - state->m_IRQ_enable = 0; + m_IRQ_enable = 0; break; case 0x4003: - state->m_IRQ_enable = 1; + m_IRQ_enable = 1; break; case 0x4005: - state->m_IRQ_count = data; + m_IRQ_count = data; break; case 0x5001: - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; } } @@ -8997,57 +8876,56 @@ static WRITE8_HANDLER( sc127_w ) *************************************************************/ -static WRITE8_HANDLER( smb2j_w ) +WRITE8_MEMBER(nes_state::smb2j_w) { - nes_state *state = space.machine().driver_data(); int bank = (((offset >> 8) & 0x03) * 0x20) + (offset & 0x1f); LOG_MMC(("smb2j_w, offset: %04x, data: %02x\n", offset, data)); - set_nt_mirroring(space.machine(), (offset & 0x2000) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), (offset & 0x2000) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); if (offset & 0x0800) { if (offset & 0x1000) { - if (bank * 2 >= state->m_prg_chunks) + if (bank * 2 >= m_prg_chunks) { - state->membank("bank3")->set_base(state->m_wram); - state->membank("bank4")->set_base(state->m_wram); + membank("bank3")->set_base(m_wram); + membank("bank4")->set_base(m_wram); } else { LOG_MMC(("smb2j_w, selecting upper 16KB bank of #%02x\n", bank)); - prg16_cdef(space.machine(), 2 * bank + 1); + prg16_cdef(machine(), 2 * bank + 1); } } else { - if (bank * 2 >= state->m_prg_chunks) + if (bank * 2 >= m_prg_chunks) { - state->membank("bank1")->set_base(state->m_wram); - state->membank("bank2")->set_base(state->m_wram); + membank("bank1")->set_base(m_wram); + membank("bank2")->set_base(m_wram); } else { LOG_MMC(("smb2j_w, selecting lower 16KB bank of #%02x\n", bank)); - prg16_89ab(space.machine(), 2 * bank); + prg16_89ab(machine(), 2 * bank); } } } else { - if (bank * 2 >= state->m_prg_chunks) + if (bank * 2 >= m_prg_chunks) { - state->membank("bank1")->set_base(state->m_wram); - state->membank("bank2")->set_base(state->m_wram); - state->membank("bank3")->set_base(state->m_wram); - state->membank("bank4")->set_base(state->m_wram); + membank("bank1")->set_base(m_wram); + membank("bank2")->set_base(m_wram); + membank("bank3")->set_base(m_wram); + membank("bank4")->set_base(m_wram); } else { LOG_MMC(("smb2j_w, selecting 32KB bank #%02x\n", bank)); - prg32(space.machine(), bank); + prg32(machine(), bank); } } } @@ -9085,9 +8963,8 @@ static void smb2jb_irq( device_t *device, int scanline, int vblank, int blanked } } -static WRITE8_HANDLER( smb2jb_l_w ) +WRITE8_MEMBER(nes_state::smb2jb_l_w) { - nes_state *state = space.machine().driver_data(); UINT8 prg; LOG_MMC(("smb2jb_l_w, offset: %04x, data: %02x\n", offset, data)); offset += 0x100; @@ -9096,22 +8973,22 @@ static WRITE8_HANDLER( smb2jb_l_w ) { case 0x020: prg = (data & 0x08) | ((data & 0x06) >> 1) | ((data & 0x01) << 2); - prg8_cd(space.machine(), prg); + prg8_cd(machine(), prg); break; case 0x120: - state->m_IRQ_enable = data & 0x01; + m_IRQ_enable = data & 0x01; break; } } /* This goes to 0x4020-0x403f */ -WRITE8_HANDLER( smb2jb_extra_w ) +WRITE8_MEMBER(nes_state::smb2jb_extra_w) { UINT8 prg; LOG_MMC(("smb2jb_extra_w, offset: %04x, data: %02x\n", offset, data)); prg = (data & 0x08) | ((data & 0x06) >> 1) | ((data & 0x01) << 2); - prg8_cd(space.machine(), prg); + prg8_cd(machine(), prg); } /************************************************************* @@ -9134,39 +9011,38 @@ static void unl_sf3_set_chr( running_machine &machine, UINT8 chr_source, int chr chr2_6(machine, chr_base | (state->m_mmc_vrom_bank[2] & chr_mask), chr_source); } -static WRITE8_HANDLER( unl_sf3_w ) +WRITE8_MEMBER(nes_state::unl_sf3_w) { - nes_state *state = space.machine().driver_data(); UINT8 mmc_helper, cmd; LOG_MMC(("unl_sf3_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x6001) { case 0x0000: - mmc_helper = state->m_mmc3_latch ^ data; - state->m_mmc3_latch = data; + mmc_helper = m_mmc3_latch ^ data; + m_mmc3_latch = data; /* Has PRG Mode changed? */ if (mmc_helper & 0x40) - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); /* Has CHR Mode changed? */ if (mmc_helper & 0x80) - unl_sf3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + unl_sf3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); break; case 0x0001: - cmd = state->m_mmc3_latch & 0x0f; + cmd = m_mmc3_latch & 0x0f; switch (cmd) { case 0: case 2: case 4: - state->m_mmc_vrom_bank[cmd >> 1] = data; - unl_sf3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_vrom_bank[cmd >> 1] = data; + unl_sf3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); break; case 6: case 7: - state->m_mmc_prg_bank[cmd - 6] = data; - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + m_mmc_prg_bank[cmd - 6] = data; + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); break; } break; @@ -9192,17 +9068,17 @@ static WRITE8_HANDLER( unl_sf3_w ) *************************************************************/ -static WRITE8_HANDLER( unl_xzy_l_w ) +WRITE8_MEMBER(nes_state::unl_xzy_l_w) { LOG_MMC(("unl_xzy_l_w, offset: %04x, data: %02x\n", offset, data)); switch (offset) { case 0x1ef1: /* 0x5ff1 */ - prg32(space.machine(), data >> 1); + prg32(machine(), data >> 1); break; case 0x1ef2: /* 0x5ff2 */ - chr8(space.machine(), data, CHRROM); + chr8(machine(), data, CHRROM); break; } } @@ -9223,15 +9099,14 @@ static void racmate_update_banks( running_machine &machine ) prg16_89ab(machine, state->m_mmc_latch1 >> 1); } -static WRITE8_HANDLER( unl_racmate_w ) +WRITE8_MEMBER(nes_state::unl_racmate_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("unl_racmate_w offset: %04x, data: %02x\n", offset, data)); if (offset == 0x3000) { - state->m_mmc_latch1 = data; - racmate_update_banks(space.machine()); + m_mmc_latch1 = data; + racmate_update_banks(machine()); } } @@ -9248,19 +9123,18 @@ static WRITE8_HANDLER( unl_racmate_w ) *************************************************************/ -static WRITE8_HANDLER( unl_fs304_l_w ) +WRITE8_MEMBER(nes_state::unl_fs304_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("unl_fs304_l_w, offset: %04x, data: %02x\n", offset, data)); int bank; offset += 0x100; if (offset >= 0x1000) { - state->m_mmc_reg[(offset >> 8) & 3] = data; - bank = ((state->m_mmc_reg[2] & 0x0f) << 4) | BIT(state->m_mmc_reg[1], 1) | (state->m_mmc_reg[0] & 0x0e); - prg32(space.machine(), bank); - chr8(space.machine(), 0, CHRRAM); + m_mmc_reg[(offset >> 8) & 3] = data; + bank = ((m_mmc_reg[2] & 0x0f) << 4) | BIT(m_mmc_reg[1], 1) | (m_mmc_reg[0] & 0x0e); + prg32(machine(), bank); + chr8(machine(), 0, CHRRAM); } } @@ -9286,7 +9160,7 @@ static WRITE8_HANDLER( unl_fs304_l_w ) *************************************************************/ -static WRITE8_HANDLER( btl_smb11_w ) +WRITE8_MEMBER(nes_state::btl_smb11_w) { LOG_MMC(("btl_smb11_w, offset: %04x, data: %02x\n", offset, data)); @@ -9306,9 +9180,8 @@ static WRITE8_HANDLER( btl_smb11_w ) *************************************************************/ // is the code fine for ai senshi nicol?!? -static WRITE8_HANDLER( btl_mariobaby_w ) +WRITE8_MEMBER(nes_state::btl_mariobaby_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("btl_mariobaby_w, offset: %04x, data: %02x\n", offset, data)); if (offset >= 0x7000) @@ -9316,22 +9189,22 @@ static WRITE8_HANDLER( btl_mariobaby_w ) switch (offset & 0x03) { case 0x00: - prg8_67(space.machine(), data); + prg8_67(machine(), data); break; case 0x01: - set_nt_mirroring(space.machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; case 0x02: /* Check if IRQ is being enabled */ - if (!state->m_IRQ_enable && (data & 0x02)) + if (!m_IRQ_enable && (data & 0x02)) { - state->m_IRQ_enable = 1; - state->m_irq_timer->adjust(downcast(state->m_maincpu)->cycles_to_attotime(24576)); + m_IRQ_enable = 1; + m_irq_timer->adjust(downcast(m_maincpu)->cycles_to_attotime(24576)); } if (!(data & 0x02)) { - state->m_IRQ_enable = 0; - state->m_irq_timer->adjust(attotime::never); + m_IRQ_enable = 0; + m_irq_timer->adjust(attotime::never); } break; } @@ -9367,22 +9240,21 @@ static void btl_smb2a_irq( device_t *device, int scanline, int vblank, int blank } } -static WRITE8_HANDLER( btl_smb2a_w ) +WRITE8_MEMBER(nes_state::btl_smb2a_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("btl_smb2a_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x6000) { case 0x0000: - state->m_IRQ_enable = 0; - state->m_IRQ_count = 0; + m_IRQ_enable = 0; + m_IRQ_count = 0; break; case 0x2000: - state->m_IRQ_enable = 1; + m_IRQ_enable = 1; break; case 0x6000: - prg8_cd(space.machine(), data); + prg8_cd(machine(), data); break; } } @@ -9399,10 +9271,10 @@ static WRITE8_HANDLER( btl_smb2a_w ) *************************************************************/ -static WRITE8_HANDLER( whirl2706_w ) +WRITE8_MEMBER(nes_state::whirl2706_w) { LOG_MMC(("whirl2706_w, offset: %04x, data: %02x\n", offset, data)); - prg8_67(space.machine(), data); + prg8_67(machine(), data); } /************************************************************* @@ -9417,13 +9289,13 @@ static WRITE8_HANDLER( whirl2706_w ) *************************************************************/ -static WRITE8_HANDLER( btl_tobi_l_w ) +WRITE8_MEMBER(nes_state::btl_tobi_l_w) { LOG_MMC(("btl_tobi_l_w, offset: %04x, data: %02x\n", offset, data)); offset += 0x100; if ((offset & 0x43c0) == 0x41c0) - prg8_67(space.machine(), data & 0x07); + prg8_67(machine(), data & 0x07); } /************************************************************* @@ -9454,49 +9326,48 @@ static void btl_smb3_irq( device_t *device, int scanline, int vblank, int blanke } } -static WRITE8_HANDLER( btl_smb3_w ) +WRITE8_MEMBER(nes_state::btl_smb3_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("btl_smb3_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x0f) { case 0x00: case 0x02: - chr1_x(space.machine(), offset & 0x07, data & 0xfe, CHRROM); + chr1_x(machine(), offset & 0x07, data & 0xfe, CHRROM); break; case 0x01: case 0x03: - chr1_x(space.machine(), offset & 0x07, data | 0x01, CHRROM); + chr1_x(machine(), offset & 0x07, data | 0x01, CHRROM); break; case 0x04: case 0x05: case 0x06: case 0x07: - chr1_x(space.machine(), offset & 0x07, data, CHRROM); + chr1_x(machine(), offset & 0x07, data, CHRROM); break; case 0x08: - prg8_89(space.machine(), data | 0x10); + prg8_89(machine(), data | 0x10); break; case 0x09: - prg8_ab(space.machine(), data); + prg8_ab(machine(), data); break; case 0x0a: - prg8_cd(space.machine(), data); + prg8_cd(machine(), data); break; case 0x0b: - prg8_ef(space.machine(), data | 0x10); + prg8_ef(machine(), data | 0x10); break; case 0x0c: - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; case 0x0d: - state->m_IRQ_count = 0; - state->m_IRQ_enable = 0; + m_IRQ_count = 0; + m_IRQ_enable = 0; break; case 0x0e: - state->m_IRQ_count = (state->m_IRQ_count & 0xff00) | data; + m_IRQ_count = (m_IRQ_count & 0xff00) | data; break; case 0x0f: - state->m_IRQ_count = (state->m_IRQ_count & 0x00ff) | (data << 8); - state->m_IRQ_enable = 1; + m_IRQ_count = (m_IRQ_count & 0x00ff) | (data << 8); + m_IRQ_enable = 1; break; } } @@ -9529,22 +9400,21 @@ static void btl_dn_irq( device_t *device, int scanline, int vblank, int blanked } } -static WRITE8_HANDLER( btl_dn_w ) +WRITE8_MEMBER(nes_state::btl_dn_w) { - nes_state *state = space.machine().driver_data(); UINT8 bank; LOG_MMC(("btl_dn_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x7003) { case 0x0000: - prg8_89(space.machine(), data); + prg8_89(machine(), data); break; case 0x1000: - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; case 0x2000: - prg8_ab(space.machine(), data); + prg8_ab(machine(), data); break; case 0x3000: case 0x3002: @@ -9555,10 +9425,10 @@ static WRITE8_HANDLER( btl_dn_w ) case 0x6000: case 0x6002: bank = ((offset & 0x7000) - 0x3000) / 0x0800 + ((offset & 0x0002) >> 3); - chr1_x(space.machine(), bank, data, CHRROM); + chr1_x(machine(), bank, data, CHRROM); break; case 0x7000: - state->m_IRQ_count = data; + m_IRQ_count = data; break; } } @@ -9575,19 +9445,18 @@ static WRITE8_HANDLER( btl_dn_w ) *************************************************************/ -static WRITE8_HANDLER( btl_pika_y2k_w ) +WRITE8_MEMBER(nes_state::btl_pika_y2k_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("btl_pika_y2k_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x6001) { case 0x2001: - state->m_mmc_latch2 = data; + m_mmc_latch2 = data; break; case 0x2000: - state->m_mmc_reg[0] = 0; + m_mmc_reg[0] = 0; default: txrom_w(space, offset, data, mem_mask); break; @@ -9595,20 +9464,18 @@ static WRITE8_HANDLER( btl_pika_y2k_w ) } // strange WRAM usage: it is protected at start, and gets unprotected after the first write to 0xa000 -static WRITE8_HANDLER( btl_pika_y2k_m_w ) +WRITE8_MEMBER(nes_state::btl_pika_y2k_m_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("btl_pika_y2k_m_w, offset: %04x, data: %02x\n", offset, data)); - state->m_wram[offset] = data; + m_wram[offset] = data; } -static READ8_HANDLER( btl_pika_y2k_m_r ) +READ8_MEMBER(nes_state::btl_pika_y2k_m_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("btl_pika_y2k_m_r, offset: %04x\n", offset)); - return state->m_wram[offset] ^ (state->m_mmc_latch2 & state->m_mmc_reg[0]); + return m_wram[offset] ^ (m_mmc_latch2 & m_mmc_reg[0]); } /************************************************************* @@ -9714,37 +9581,35 @@ static void fk23c_set_chr( running_machine &machine ) } } -static WRITE8_HANDLER( fk23c_l_w ) +WRITE8_MEMBER(nes_state::fk23c_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("fk23c_l_w, offset: %04x, data: %02x\n", offset, data)); offset += 0x100; if (offset >= 0x1000) { - if (offset & (1 << 4)) // here it should be (4 + state->m_mmc_dipsetting) + if (offset & (1 << 4)) // here it should be (4 + m_mmc_dipsetting) { - state->m_mmc_reg[offset & 0x03] = data; + m_mmc_reg[offset & 0x03] = data; - fk23c_set_prg(space.machine()); - fk23c_set_chr(space.machine()); + fk23c_set_prg(machine()); + fk23c_set_chr(machine()); } } } -static WRITE8_HANDLER( fk23c_w ) +WRITE8_MEMBER(nes_state::fk23c_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("fk23c_w, offset: %04x, data: %02x\n", offset, data)); - if (state->m_mmc_reg[0] & 0x40) + if (m_mmc_reg[0] & 0x40) { - if (state->m_mmc_reg[0] & 0x30) - state->m_mmc_cmd1 = 0; + if (m_mmc_reg[0] & 0x30) + m_mmc_cmd1 = 0; else { - state->m_mmc_cmd1 = data & 0x03; - fk23c_set_chr(space.machine()); + m_mmc_cmd1 = data & 0x03; + fk23c_set_chr(machine()); } } else @@ -9752,18 +9617,18 @@ static WRITE8_HANDLER( fk23c_w ) switch (offset & 0x6001) { case 0x0001: - if ((state->m_mmc_reg[3] & 0x02) && (state->m_mmc3_latch & 0x08)) + if ((m_mmc_reg[3] & 0x02) && (m_mmc3_latch & 0x08)) { - state->m_mmc_reg[4 | (state->m_mmc3_latch & 0x03)] = data; - fk23c_set_prg(space.machine()); - fk23c_set_chr(space.machine()); + m_mmc_reg[4 | (m_mmc3_latch & 0x03)] = data; + fk23c_set_prg(machine()); + fk23c_set_chr(machine()); } else txrom_w(space, offset, data, mem_mask); break; case 0x2000: - set_nt_mirroring(space.machine(), data ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), data ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; default: @@ -9804,9 +9669,8 @@ static void bmc_64in1nr_set_prg( running_machine &machine ) prg16_cdef(machine, helper2); } -static WRITE8_HANDLER( bmc_64in1nr_l_w ) +WRITE8_MEMBER(nes_state::bmc_64in1nr_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("bmc_64in1nr_l_w offset: %04x, data: %02x\n", offset, data)); offset += 0x100; @@ -9816,21 +9680,20 @@ static WRITE8_HANDLER( bmc_64in1nr_l_w ) case 0x1001: case 0x1002: case 0x1003: - state->m_mmc_reg[offset & 0x03] = data; - bmc_64in1nr_set_prg(space.machine()); - chr8(space.machine(), ((state->m_mmc_reg[0] >> 1) & 0x03) | (state->m_mmc_reg[2] << 2), CHRROM); + m_mmc_reg[offset & 0x03] = data; + bmc_64in1nr_set_prg(machine()); + chr8(machine(), ((m_mmc_reg[0] >> 1) & 0x03) | (m_mmc_reg[2] << 2), CHRROM); break; } if (offset == 0x1000) /* reg[0] also sets mirroring */ - set_nt_mirroring(space.machine(), BIT(data, 5) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 5) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); } -static WRITE8_HANDLER( bmc_64in1nr_w ) +WRITE8_MEMBER(nes_state::bmc_64in1nr_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("bmc_64in1nr_w offset: %04x, data: %02x\n", offset, data)); - state->m_mmc_reg[3] = data; // reg[3] is currently unused?!? + m_mmc_reg[3] = data; // reg[3] is currently unused?!? } /************************************************************* @@ -9843,15 +9706,15 @@ static WRITE8_HANDLER( bmc_64in1nr_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_190in1_w ) +WRITE8_MEMBER(nes_state::bmc_190in1_w) { LOG_MMC(("bmc_190in1_w offset: %04x, data: %02x\n", offset, data)); - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); offset >>= 2; - prg16_89ab(space.machine(), offset); - prg16_cdef(space.machine(), offset); - chr8(space.machine(), offset, CHRROM); + prg16_89ab(machine(), offset); + prg16_cdef(machine(), offset); + chr8(machine(), offset, CHRROM); } /************************************************************* @@ -9864,22 +9727,22 @@ static WRITE8_HANDLER( bmc_190in1_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_a65as_w ) +WRITE8_MEMBER(nes_state::bmc_a65as_w) { UINT8 helper = (data & 0x30) >> 1; LOG_MMC(("bmc_a65as_w offset: %04x, data: %02x\n", offset, data)); if (data & 0x80) - set_nt_mirroring(space.machine(), BIT(data, 5) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); + set_nt_mirroring(machine(), BIT(data, 5) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); else - set_nt_mirroring(space.machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); if (data & 0x40) - prg32(space.machine(), data >> 1); + prg32(machine(), data >> 1); else { - prg16_89ab(space.machine(), helper | (data & 0x07)); - prg16_cdef(space.machine(), helper | 0x07); + prg16_89ab(machine(), helper | (data & 0x07)); + prg16_cdef(machine(), helper | 0x07); } } @@ -9894,11 +9757,11 @@ static WRITE8_HANDLER( bmc_a65as_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_gs2004_w ) +WRITE8_MEMBER(nes_state::bmc_gs2004_w) { LOG_MMC(("bmc_gs2004_w offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), data); + prg32(machine(), data); } /************************************************************* @@ -9912,14 +9775,14 @@ static WRITE8_HANDLER( bmc_gs2004_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_gs2013_w ) +WRITE8_MEMBER(nes_state::bmc_gs2013_w) { LOG_MMC(("bmc_gs2013_w offset: %04x, data: %02x\n", offset, data)); if (data & 0x08) - prg32(space.machine(), data & 0x09); + prg32(machine(), data & 0x09); else - prg32(space.machine(), data & 0x07); + prg32(machine(), data & 0x07); } /************************************************************* @@ -9952,29 +9815,28 @@ static void bmc_s24in1sc03_chr_cb( running_machine &machine, int start, int bank chr1_x(machine, start, chr_base | bank, chr); } -static WRITE8_HANDLER( bmc_s24in1sc03_l_w ) +WRITE8_MEMBER(nes_state::bmc_s24in1sc03_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("bmc_s24in1sc03_l_w offset: %04x, data: %02x\n", offset, data)); offset += 0x100; if (offset == 0x1ff0) { - state->m_mmc_reg[0] = data; - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + m_mmc_reg[0] = data; + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); } if (offset == 0x1ff1) { - state->m_mmc_reg[1] = data; - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + m_mmc_reg[1] = data; + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); } if (offset == 0x1ff2) { - state->m_mmc_reg[2] = data; - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_reg[2] = data; + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); } } @@ -9988,25 +9850,24 @@ static WRITE8_HANDLER( bmc_s24in1sc03_l_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_t262_w ) +WRITE8_MEMBER(nes_state::bmc_t262_w) { - nes_state *state = space.machine().driver_data(); UINT8 mmc_helper; LOG_MMC(("bmc_t262_w offset: %04x, data: %02x\n", offset, data)); - if (state->m_mmc_latch2 || offset == 0) + if (m_mmc_latch2 || offset == 0) { - state->m_mmc_latch1 = (state->m_mmc_latch1 & 0x38) | (data & 0x07); - prg16_89ab(space.machine(), state->m_mmc_latch1); + m_mmc_latch1 = (m_mmc_latch1 & 0x38) | (data & 0x07); + prg16_89ab(machine(), m_mmc_latch1); } else { - state->m_mmc_latch2 = 1; - set_nt_mirroring(space.machine(), BIT(data, 1) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + m_mmc_latch2 = 1; + set_nt_mirroring(machine(), BIT(data, 1) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); mmc_helper = ((offset >> 3) & 0x20) | ((offset >> 2) & 0x18); - state->m_mmc_latch1 = mmc_helper | (state->m_mmc_latch1 & 0x07); - prg16_89ab(space.machine(), state->m_mmc_latch1); - prg16_cdef(space.machine(), mmc_helper | 0x07); + m_mmc_latch1 = mmc_helper | (m_mmc_latch1 & 0x07); + prg16_89ab(machine(), m_mmc_latch1); + prg16_cdef(machine(), mmc_helper | 0x07); } } @@ -10021,9 +9882,8 @@ static WRITE8_HANDLER( bmc_t262_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_ws_m_w ) +WRITE8_MEMBER(nes_state::bmc_ws_m_w) { - nes_state *state = space.machine().driver_data(); UINT8 mmc_helper; LOG_MMC(("bmc_ws_m_w offset: %04x, data: %02x\n", offset, data)); @@ -10032,19 +9892,19 @@ static WRITE8_HANDLER( bmc_ws_m_w ) switch (offset & 0x01) { case 0: - if (!state->m_mmc_latch1) + if (!m_mmc_latch1) { - state->m_mmc_latch1 = data & 0x20; - set_nt_mirroring(space.machine(), BIT(data, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + m_mmc_latch1 = data & 0x20; + set_nt_mirroring(machine(), BIT(data, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); mmc_helper = (~data & 0x08) >> 3; - prg16_89ab(space.machine(), data & ~mmc_helper); - prg16_cdef(space.machine(), data | mmc_helper); + prg16_89ab(machine(), data & ~mmc_helper); + prg16_cdef(machine(), data | mmc_helper); } break; case 1: - if (!state->m_mmc_latch1) + if (!m_mmc_latch1) { - chr8(space.machine(), data, CHRROM); + chr8(machine(), data, CHRROM); } break; } @@ -10068,20 +9928,20 @@ static WRITE8_HANDLER( bmc_ws_m_w ) *************************************************************/ // Are this correct or should they work the same? -static WRITE8_HANDLER( novel1_w ) +WRITE8_MEMBER(nes_state::novel1_w) { LOG_MMC(("novel1_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), offset & 0x03); - chr8(space.machine(), offset & 0x07, CHRROM); + prg32(machine(), offset & 0x03); + chr8(machine(), offset & 0x07, CHRROM); } -static WRITE8_HANDLER( novel2_w ) +WRITE8_MEMBER(nes_state::novel2_w) { LOG_MMC(("novel2_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), offset >> 1); - chr8(space.machine(), offset >> 3, CHRROM); + prg32(machine(), offset >> 1); + chr8(machine(), offset >> 3, CHRROM); } /************************************************************* @@ -10097,27 +9957,26 @@ static WRITE8_HANDLER( novel2_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_gka_w ) +WRITE8_MEMBER(nes_state::bmc_gka_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("bmc_gka_w, offset: %04x, data: %02x\n", offset, data)); if (offset & 0x0800) - state->m_mmc_latch2 = data; + m_mmc_latch2 = data; else - state->m_mmc_latch1 = data; + m_mmc_latch1 = data; - if (state->m_mmc_latch2 & 0x80) - prg32(space.machine(), 2 | (state->m_mmc_latch2 >> 6)); + if (m_mmc_latch2 & 0x80) + prg32(machine(), 2 | (m_mmc_latch2 >> 6)); else { - prg16_89ab(space.machine(), (state->m_mmc_latch2 >> 5) & 0x03); - prg16_cdef(space.machine(), (state->m_mmc_latch2 >> 5) & 0x03); + prg16_89ab(machine(), (m_mmc_latch2 >> 5) & 0x03); + prg16_cdef(machine(), (m_mmc_latch2 >> 5) & 0x03); } - set_nt_mirroring(space.machine(), (state->m_mmc_latch2 & 0x08) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), (m_mmc_latch2 & 0x08) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); - chr8(space.machine(), (state->m_mmc_latch1 & 0x03) | (state->m_mmc_latch2 & 0x07) | ((state->m_mmc_latch2 & 0x10) >> 1), CHRROM); + chr8(machine(), (m_mmc_latch1 & 0x03) | (m_mmc_latch2 & 0x07) | ((m_mmc_latch2 & 0x10) >> 1), CHRROM); } @@ -10134,10 +9993,10 @@ static WRITE8_HANDLER( bmc_gka_w ) *************************************************************/ -static WRITE8_HANDLER( sng32_w ) +WRITE8_MEMBER(nes_state::sng32_w) { LOG_MMC(("sng32_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), data); + prg32(machine(), data); } /************************************************************* @@ -10153,16 +10012,15 @@ static WRITE8_HANDLER( sng32_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_gkb_w ) +WRITE8_MEMBER(nes_state::bmc_gkb_w) { - nes_state *state = space.machine().driver_data(); UINT8 bank = (offset & 0x40) ? 0 : 1; LOG_MMC(("bmc_gkb_w, offset: %04x, data: %02x\n", offset, data)); - prg16_89ab(space.machine(), offset & ~bank); - prg16_cdef(space.machine(), offset | bank); - chr8(space.machine(), offset >> 3, state->m_mmc_chr_source); - set_nt_mirroring(space.machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + prg16_89ab(machine(), offset & ~bank); + prg16_cdef(machine(), offset | bank); + chr8(machine(), offset >> 3, m_mmc_chr_source); + set_nt_mirroring(machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); } /************************************************************* @@ -10178,23 +10036,23 @@ static WRITE8_HANDLER( bmc_gkb_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_super700in1_w ) +WRITE8_MEMBER(nes_state::bmc_super700in1_w) { LOG_MMC(("bmc_super700in1_w, offset :%04x, data: %02x\n", offset, data)); - chr8(space.machine(), ((offset & 0x1f) << 2) | (data & 0x03), CHRROM); + chr8(machine(), ((offset & 0x1f) << 2) | (data & 0x03), CHRROM); if (offset & 0x20) { - prg16_89ab(space.machine(), (offset & 0x40) | ((offset >> 8) & 0x3f)); - prg16_cdef(space.machine(), (offset & 0x40) | ((offset >> 8) & 0x3f)); + prg16_89ab(machine(), (offset & 0x40) | ((offset >> 8) & 0x3f)); + prg16_cdef(machine(), (offset & 0x40) | ((offset >> 8) & 0x3f)); } else { - prg32(space.machine(), ((offset & 0x40) | ((offset >> 8) & 0x3f)) >> 1); + prg32(machine(), ((offset & 0x40) | ((offset >> 8) & 0x3f)) >> 1); } - set_nt_mirroring(space.machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); } /************************************************************* @@ -10210,15 +10068,15 @@ static WRITE8_HANDLER( bmc_super700in1_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_36in1_w ) +WRITE8_MEMBER(nes_state::bmc_36in1_w) { LOG_MMC(("bmc_36in1_w, offset: %04x, data: %02x\n", offset, data)); - prg16_89ab(space.machine(), offset & 0x07); - prg16_cdef(space.machine(), offset & 0x07); - chr8(space.machine(), offset & 0x07, CHRROM); + prg16_89ab(machine(), offset & 0x07); + prg16_cdef(machine(), offset & 0x07); + chr8(machine(), offset & 0x07, CHRROM); - set_nt_mirroring(space.machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); } /************************************************************* @@ -10234,12 +10092,12 @@ static WRITE8_HANDLER( bmc_36in1_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_21in1_w ) +WRITE8_MEMBER(nes_state::bmc_21in1_w) { LOG_MMC(("bmc_21in1_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), offset & 0x03); - chr8(space.machine(), offset & 0x03, CHRROM); + prg32(machine(), offset & 0x03); + chr8(machine(), offset & 0x03, CHRROM); } /************************************************************* @@ -10255,17 +10113,17 @@ static WRITE8_HANDLER( bmc_21in1_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_150in1_w ) +WRITE8_MEMBER(nes_state::bmc_150in1_w) { int bank = (offset >> 1) & 0x07; LOG_MMC(("bmc_150in1_w, offset: %04x, data: %02x\n", offset, data)); - prg16_89ab(space.machine(), bank); - prg16_cdef(space.machine(), bank + (((bank & 0x06) == 0x06) ? 1 : 0)); - chr8(space.machine(), bank, CHRROM); + prg16_89ab(machine(), bank); + prg16_cdef(machine(), bank + (((bank & 0x06) == 0x06) ? 1 : 0)); + chr8(machine(), bank, CHRROM); - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ: PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_HORZ: PPU_MIRROR_VERT); } /************************************************************* @@ -10281,13 +10139,13 @@ static WRITE8_HANDLER( bmc_150in1_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_35in1_w ) +WRITE8_MEMBER(nes_state::bmc_35in1_w) { LOG_MMC(("bmc_35in1_w, offset: %04x, data: %02x\n", offset, data)); - prg16_89ab(space.machine(), (data >> 2) & 0x03); - prg16_cdef(space.machine(), (data >> 2) & 0x03); - chr8(space.machine(), data & 0x03, CHRROM); + prg16_89ab(machine(), (data >> 2) & 0x03); + prg16_cdef(machine(), (data >> 2) & 0x03); + chr8(machine(), data & 0x03, CHRROM); } /************************************************************* @@ -10303,17 +10161,17 @@ static WRITE8_HANDLER( bmc_35in1_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_64in1_w ) +WRITE8_MEMBER(nes_state::bmc_64in1_w) { int bank = (offset >> 1) & (offset >> 2) & 0x01; LOG_MMC(("bmc_64in1_w, offset: %04x, data: %02x\n", offset, data)); - prg16_89ab(space.machine(), offset & ~bank); - prg16_cdef(space.machine(), offset | bank); - chr8(space.machine(), offset & ~bank, CHRROM); + prg16_89ab(machine(), offset & ~bank); + prg16_cdef(machine(), offset | bank); + chr8(machine(), offset & ~bank, CHRROM); - set_nt_mirroring(space.machine(), BIT(data, 4) ? PPU_MIRROR_HORZ: PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 4) ? PPU_MIRROR_HORZ: PPU_MIRROR_VERT); } /************************************************************* @@ -10329,19 +10187,18 @@ static WRITE8_HANDLER( bmc_64in1_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_15in1_m_w ) +WRITE8_MEMBER(nes_state::bmc_15in1_m_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("bmc_15in1_m_w, offset: %04x, data: %02x\n", offset, data)); if (offset & 0x0800) { - state->m_mmc_prg_base = (data & 0x03) << 4; - state->m_mmc_prg_mask = (data & 0x02) ? 0x0f : 0x1f; - state->m_mmc_chr_base = (data & 0x03) << 7; - state->m_mmc_chr_mask = (data & 0x02) ? 0x7f : 0xff; - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_prg_base = (data & 0x03) << 4; + m_mmc_prg_mask = (data & 0x02) ? 0x0f : 0x1f; + m_mmc_chr_base = (data & 0x03) << 7; + m_mmc_chr_mask = (data & 0x02) ? 0x7f : 0xff; + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); } } @@ -10358,20 +10215,20 @@ static WRITE8_HANDLER( bmc_15in1_m_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_hik300_w ) +WRITE8_MEMBER(nes_state::bmc_hik300_w) { LOG_MMC(("bmc_hik300_w, offset: %04x, data: %02x\n", offset, data)); - set_nt_mirroring(space.machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); - chr8(space.machine(), offset, CHRROM); + set_nt_mirroring(machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + chr8(machine(), offset, CHRROM); if (offset < 0x4000) { - prg16_89ab(space.machine(), offset); - prg16_cdef(space.machine(), offset); + prg16_89ab(machine(), offset); + prg16_cdef(machine(), offset); } else - prg32(space.machine(), offset >> 1); + prg32(machine(), offset >> 1); } /************************************************************* @@ -10387,13 +10244,13 @@ static WRITE8_HANDLER( bmc_hik300_w ) *************************************************************/ -static WRITE8_HANDLER( supergun20in1_w ) +WRITE8_MEMBER(nes_state::supergun20in1_w) { LOG_MMC(("supergun20in1_w, offset: %04x, data: %02x\n", offset, data)); - prg16_89ab(space.machine(), offset >> 2); - prg16_cdef(space.machine(), offset >> 2); - chr8(space.machine(), offset, CHRROM); + prg16_89ab(machine(), offset >> 2); + prg16_cdef(machine(), offset >> 2); + chr8(machine(), offset, CHRROM); } /************************************************************* @@ -10409,7 +10266,7 @@ static WRITE8_HANDLER( supergun20in1_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_72in1_w ) +WRITE8_MEMBER(nes_state::bmc_72in1_w) { int hi_bank; int size_16; @@ -10417,8 +10274,8 @@ static WRITE8_HANDLER( bmc_72in1_w ) LOG_MMC(("bmc_72in1_w, offset: %04x, data: %02x\n", offset, data)); - chr8(space.machine(), offset, CHRROM); - set_nt_mirroring(space.machine(), (offset & 0x2000) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + chr8(machine(), offset, CHRROM); + set_nt_mirroring(machine(), (offset & 0x2000) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); hi_bank = offset & 0x40; size_16 = offset & 0x1000; @@ -10429,11 +10286,11 @@ static WRITE8_HANDLER( bmc_72in1_w ) if (hi_bank) bank ++; - prg16_89ab(space.machine(), bank); - prg16_cdef(space.machine(), bank); + prg16_89ab(machine(), bank); + prg16_cdef(machine(), bank); } else - prg32(space.machine(), bank); + prg32(machine(), bank); } /************************************************************* @@ -10450,9 +10307,8 @@ static WRITE8_HANDLER( bmc_72in1_w ) *************************************************************/ // does this work for super42in1 as well?!? -static WRITE8_HANDLER( bmc_76in1_w ) +WRITE8_MEMBER(nes_state::bmc_76in1_w) { - nes_state *state = space.machine().driver_data(); int hi_bank; int size_16; int bank; @@ -10460,15 +10316,15 @@ static WRITE8_HANDLER( bmc_76in1_w ) LOG_MMC(("bmc_76in1_w, offset: %04x, data: %02x\n", offset, data)); if (offset & 0x01) - state->m_mmc_latch2 = data; + m_mmc_latch2 = data; else - state->m_mmc_latch1 = data; + m_mmc_latch1 = data; - set_nt_mirroring(space.machine(), BIT(state->m_mmc_latch1, 6) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(m_mmc_latch1, 6) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); - hi_bank = state->m_mmc_latch1 & 0x01; - size_16 = state->m_mmc_latch1 & 0x20; - bank = ((state->m_mmc_latch1 & 0x1e) >> 1) | ((state->m_mmc_latch1 & 0x80) >> 3) | ((state->m_mmc_latch2 & 0x01) << 5); + hi_bank = m_mmc_latch1 & 0x01; + size_16 = m_mmc_latch1 & 0x20; + bank = ((m_mmc_latch1 & 0x1e) >> 1) | ((m_mmc_latch1 & 0x80) >> 3) | ((m_mmc_latch2 & 0x01) << 5); if (size_16) { @@ -10476,11 +10332,11 @@ static WRITE8_HANDLER( bmc_76in1_w ) if (hi_bank) bank ++; - prg16_89ab(space.machine(), bank); - prg16_cdef(space.machine(), bank); + prg16_89ab(machine(), bank); + prg16_cdef(machine(), bank); } else - prg32(space.machine(), bank); + prg32(machine(), bank); } /************************************************************* @@ -10496,7 +10352,7 @@ static WRITE8_HANDLER( bmc_76in1_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_1200in1_w ) +WRITE8_MEMBER(nes_state::bmc_1200in1_w) { int hi_bank; int size_32; @@ -10513,21 +10369,21 @@ static WRITE8_HANDLER( bmc_1200in1_w ) if (hi_bank) bank ++; - prg16_89ab(space.machine(), bank); - prg16_cdef(space.machine(), bank); + prg16_89ab(machine(), bank); + prg16_cdef(machine(), bank); } else - prg32(space.machine(), bank); + prg32(machine(), bank); if (!(offset & 0x80)) { if (offset & 0x200) - prg16_cdef(space.machine(), ((bank << 1) & 0x38) + 7); + prg16_cdef(machine(), ((bank << 1) & 0x38) + 7); else - prg16_cdef(space.machine(), ((bank << 1) & 0x38)); + prg16_cdef(machine(), ((bank << 1) & 0x38)); } - set_nt_mirroring(space.machine(), BIT(data, 1) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 1) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); } /************************************************************* @@ -10543,22 +10399,22 @@ static WRITE8_HANDLER( bmc_1200in1_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_31in1_w ) +WRITE8_MEMBER(nes_state::bmc_31in1_w) { LOG_MMC(("bmc_31in1_w, offset: %04x, data: %02x\n", offset, data)); - set_nt_mirroring(space.machine(), BIT(data, 5) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); - chr8(space.machine(), offset, CHRROM); + set_nt_mirroring(machine(), BIT(data, 5) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + chr8(machine(), offset, CHRROM); if ((offset & 0x1e) == 0) { - prg16_89ab(space.machine(), 0); - prg16_89ab(space.machine(), 1); + prg16_89ab(machine(), 0); + prg16_89ab(machine(), 1); } else { - prg16_89ab(space.machine(), offset & 0x1f); - prg16_89ab(space.machine(), offset & 0x1f); + prg16_89ab(machine(), offset & 0x1f); + prg16_89ab(machine(), offset & 0x1f); } } @@ -10576,27 +10432,27 @@ static WRITE8_HANDLER( bmc_31in1_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_22g_w ) +WRITE8_MEMBER(nes_state::bmc_22g_w) { LOG_MMC(("bmc_22g_w, offset: %04x, data: %02x\n", offset, data)); if (1) // this should flip at reset { - prg16_89ab(space.machine(), data & 0x07); + prg16_89ab(machine(), data & 0x07); } else { if (data & 0x20) { - prg16_89ab(space.machine(), (data & 0x1f) + 8); - prg16_cdef(space.machine(), (data & 0x1f) + 8); + prg16_89ab(machine(), (data & 0x1f) + 8); + prg16_cdef(machine(), (data & 0x1f) + 8); } else { - prg16_89ab(space.machine(), (data & 0x1f) + 8); - prg16_cdef(space.machine(), (data & 0x1f) + 9); + prg16_89ab(machine(), (data & 0x1f) + 8); + prg16_cdef(machine(), (data & 0x1f) + 9); } - set_nt_mirroring(space.machine(), BIT(data, 6) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ); + set_nt_mirroring(machine(), BIT(data, 6) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ); } } @@ -10613,14 +10469,14 @@ static WRITE8_HANDLER( bmc_22g_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_20in1_w ) +WRITE8_MEMBER(nes_state::bmc_20in1_w) { LOG_MMC(("bmc_20in1_w, offset: %04x, data: %02x\n", offset, data)); - set_nt_mirroring(space.machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); - prg16_89ab(space.machine(), (offset & 0x1e)); - prg16_cdef(space.machine(), (offset & 0x1e) | ((offset & 0x20) ? 1 : 0)); + prg16_89ab(machine(), (offset & 0x1e)); + prg16_cdef(machine(), (offset & 0x1e) | ((offset & 0x20) ? 1 : 0)); } /************************************************************* @@ -10636,17 +10492,17 @@ static WRITE8_HANDLER( bmc_20in1_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_110in1_w ) +WRITE8_MEMBER(nes_state::bmc_110in1_w) { UINT8 map255_helper1 = (offset >> 12) ? 0 : 1; UINT8 map255_helper2 = ((offset >> 8) & 0x40) | ((offset >> 6) & 0x3f); LOG_MMC(("bmc_110in1_w, offset: %04x, data: %02x\n", offset, data)); - set_nt_mirroring(space.machine(), (offset & 0x2000) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); - prg16_89ab(space.machine(), map255_helper1 & ~map255_helper2); - prg16_cdef(space.machine(), map255_helper1 | map255_helper2); - chr8(space.machine(), ((offset >> 8) & 0x40) | (offset & 0x3f), CHRROM); + set_nt_mirroring(machine(), (offset & 0x2000) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + prg16_89ab(machine(), map255_helper1 & ~map255_helper2); + prg16_cdef(machine(), map255_helper1 | map255_helper2); + chr8(machine(), ((offset >> 8) & 0x40) | (offset & 0x3f), CHRROM); } /************************************************************* @@ -10662,9 +10518,8 @@ static WRITE8_HANDLER( bmc_110in1_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_sbig7_w ) +WRITE8_MEMBER(nes_state::bmc_sbig7_w) { - nes_state *state = space.machine().driver_data(); UINT8 page; LOG_MMC(("bmc_sbig7_w, offset: %04x, data: %02x\n", offset, data)); @@ -10675,12 +10530,12 @@ static WRITE8_HANDLER( bmc_sbig7_w ) if (page > 6) page = 6; - state->m_mmc_prg_base = page << 4; - state->m_mmc_prg_mask = (page > 5) ? 0x1f : 0x0f; - state->m_mmc_chr_base = page << 7; - state->m_mmc_chr_mask = (page > 5) ? 0xff : 0x7f; - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_prg_base = page << 4; + m_mmc_prg_mask = (page > 5) ? 0x1f : 0x0f; + m_mmc_chr_base = page << 7; + m_mmc_chr_mask = (page > 5) ? 0xff : 0x7f; + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); break; default: @@ -10702,37 +10557,36 @@ static WRITE8_HANDLER( bmc_sbig7_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_hik8_m_w ) +WRITE8_MEMBER(nes_state::bmc_hik8_m_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("bmc_hik8_m_w, offset: %04x, data: %02x\n", offset, data)); /* This bit is the "register lock". Once register are locked, writes go to WRAM and there is no way to unlock them (except by resetting the machine) */ - if ((state->m_mmc_reg[3] & 0x40) && state->m_wram != NULL) - state->m_wram[offset] = data; + if ((m_mmc_reg[3] & 0x40) && m_wram != NULL) + m_wram[offset] = data; else { - state->m_mmc_reg[state->m_mmc_count] = data; - state->m_mmc_count = (state->m_mmc_count + 1) & 0x03; + m_mmc_reg[m_mmc_count] = data; + m_mmc_count = (m_mmc_count + 1) & 0x03; - if (!state->m_mmc_count) + if (!m_mmc_count) { - LOG_MMC(("bmc_hik8_m_w, command completed %02x %02x %02x %02x\n", state->m_mmc_reg[3], - state->m_mmc_reg[2], state->m_mmc_reg[1], state->m_mmc_reg[0])); + LOG_MMC(("bmc_hik8_m_w, command completed %02x %02x %02x %02x\n", m_mmc_reg[3], + m_mmc_reg[2], m_mmc_reg[1], m_mmc_reg[0])); - state->m_mmc_prg_base = state->m_mmc_reg[1]; - state->m_mmc_prg_mask = 0x3f ^ (state->m_mmc_reg[3] & 0x3f); - state->m_mmc_chr_base = ((state->m_mmc_reg[2] & 0xf0) << 4) | state->m_mmc_reg[0]; - if (BIT(state->m_mmc_reg[2], 3)) - state->m_mmc_chr_mask = (1 << ((state->m_mmc_reg[2] & 7) + 1)) - 1; - else if (state->m_mmc_reg[2]) - state->m_mmc_chr_mask = 0; + m_mmc_prg_base = m_mmc_reg[1]; + m_mmc_prg_mask = 0x3f ^ (m_mmc_reg[3] & 0x3f); + m_mmc_chr_base = ((m_mmc_reg[2] & 0xf0) << 4) | m_mmc_reg[0]; + if (BIT(m_mmc_reg[2], 3)) + m_mmc_chr_mask = (1 << ((m_mmc_reg[2] & 7) + 1)) - 1; + else if (m_mmc_reg[2]) + m_mmc_chr_mask = 0; else - state->m_mmc_chr_mask = 0xff; // i.e. we use the vrom_bank with no masking + m_mmc_chr_mask = 0xff; // i.e. we use the vrom_bank with no masking - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); } } } @@ -10750,28 +10604,27 @@ static WRITE8_HANDLER( bmc_hik8_m_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_hik4in1_m_w ) +WRITE8_MEMBER(nes_state::bmc_hik4in1_m_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("bmc_hik4in1_m_w, offset: %04x, data: %02x\n", offset, data)); /* mid writes only work when WRAM is enabled. not sure if I should - change the condition to state->m_mmc_latch2==0x80 (i.e. what is the effect of + change the condition to m_mmc_latch2==0x80 (i.e. what is the effect of the read-only bit?) */ - if (state->m_mmc3_wram_protect & 0x80) + if (m_mmc3_wram_protect & 0x80) { if (data & 0x01) /* if this is 0, then we have 32k PRG blocks */ { - state->m_mmc_prg_base = (data & 0xc0) >> 2; - state->m_mmc_prg_mask = 0x0f; - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + m_mmc_prg_base = (data & 0xc0) >> 2; + m_mmc_prg_mask = 0x0f; + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); } else - prg32(space.machine(), (data & 0x30) >> 4); + prg32(machine(), (data & 0x30) >> 4); - state->m_mmc_chr_base = (data & 0xc0) << 1; - state->m_mmc_chr_mask = 0x7f; - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_chr_base = (data & 0xc0) << 1; + m_mmc_chr_mask = 0x7f; + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); } } @@ -10804,31 +10657,29 @@ static void bmc_ball11_set_banks( running_machine &machine ) } } -static WRITE8_HANDLER( bmc_ball11_m_w ) +WRITE8_MEMBER(nes_state::bmc_ball11_m_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("bmc_ball11_m_w, offset: %04x, data: %02x\n", offset, data)); - state->m_mmc_reg[0] = ((data >> 1) & 0x01) | ((data >> 3) & 0x02); - bmc_ball11_set_banks(space.machine()); + m_mmc_reg[0] = ((data >> 1) & 0x01) | ((data >> 3) & 0x02); + bmc_ball11_set_banks(machine()); } -static WRITE8_HANDLER( bmc_ball11_w ) +WRITE8_MEMBER(nes_state::bmc_ball11_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("bmc_ball11_w, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x6000) { case 0x4000: // here we also update reg[0] upper bit - state->m_mmc_reg[0] = (state->m_mmc_reg[0] & 0x01) | ((data >> 3) & 0x02); + m_mmc_reg[0] = (m_mmc_reg[0] & 0x01) | ((data >> 3) & 0x02); case 0x0000: case 0x2000: case 0x6000: - state->m_mmc_reg[1] = data & 0x0f; - bmc_ball11_set_banks(space.machine()); + m_mmc_reg[1] = data & 0x0f; + bmc_ball11_set_banks(machine()); break; } } @@ -10848,31 +10699,30 @@ static WRITE8_HANDLER( bmc_ball11_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_mario7in1_m_w ) +WRITE8_MEMBER(nes_state::bmc_mario7in1_m_w) { - nes_state *state = space.machine().driver_data(); UINT8 map52_helper1, map52_helper2; LOG_MMC(("bmc_mario7in1_m_w, offset: %04x, data: %02x\n", offset, data)); /* mid writes only work when WRAM is enabled. not sure if I should - change the condition to state->m_map52_reg_written == 0x80 (i.e. what is the effect of + change the condition to m_map52_reg_written == 0x80 (i.e. what is the effect of the read-only bit?) and it only can happen once! */ - if ((state->m_mmc3_wram_protect & 0x80) && !state->m_map52_reg_written) + if ((m_mmc3_wram_protect & 0x80) && !m_map52_reg_written) { map52_helper1 = (data & 0x08); map52_helper2 = (data & 0x40); - state->m_mmc_prg_base = map52_helper1 ? ((data & 0x07) << 4) : ((data & 0x06) << 4); - state->m_mmc_prg_mask = map52_helper1 ? 0x0f : 0x1f; - state->m_mmc_chr_base = ((data & 0x20) << 4) | ((data & 0x04) << 6) | (map52_helper2 ? ((data & 0x10) << 3) : 0); - state->m_mmc_chr_mask = map52_helper2 ? 0x7f : 0xff; - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_prg_base = map52_helper1 ? ((data & 0x07) << 4) : ((data & 0x06) << 4); + m_mmc_prg_mask = map52_helper1 ? 0x0f : 0x1f; + m_mmc_chr_base = ((data & 0x20) << 4) | ((data & 0x04) << 6) | (map52_helper2 ? ((data & 0x10) << 3) : 0); + m_mmc_chr_mask = map52_helper2 ? 0x7f : 0xff; + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); - state->m_map52_reg_written = 1; + m_map52_reg_written = 1; } else - state->m_wram[offset] = data; + m_wram[offset] = data; } /************************************************************* @@ -10891,28 +10741,27 @@ static WRITE8_HANDLER( bmc_mario7in1_m_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_gold7in1_m_w ) +WRITE8_MEMBER(nes_state::bmc_gold7in1_m_w) { - nes_state *state = space.machine().driver_data(); UINT8 map52_helper1, map52_helper2; LOG_MMC(("bmc_gold7in1_m_w, offset: %04x, data: %02x\n", offset, data)); - if ((state->m_mmc3_wram_protect & 0x80) && !state->m_map52_reg_written) + if ((m_mmc3_wram_protect & 0x80) && !m_map52_reg_written) { map52_helper1 = (data & 0x08); map52_helper2 = (data & 0x40); - state->m_mmc_prg_base = map52_helper1 ? ((data & 0x07) << 4) : ((data & 0x06) << 4); - state->m_mmc_prg_mask = map52_helper1 ? 0x0f : 0x1f; - state->m_mmc_chr_base = ((data & 0x20) << 3) | ((data & 0x04) << 7) | (map52_helper2 ? ((data & 0x10) << 3) : 0); - state->m_mmc_chr_mask = map52_helper2 ? 0x7f : 0xff; - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_prg_base = map52_helper1 ? ((data & 0x07) << 4) : ((data & 0x06) << 4); + m_mmc_prg_mask = map52_helper1 ? 0x0f : 0x1f; + m_mmc_chr_base = ((data & 0x20) << 3) | ((data & 0x04) << 7) | (map52_helper2 ? ((data & 0x10) << 3) : 0); + m_mmc_chr_mask = map52_helper2 ? 0x7f : 0xff; + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); - state->m_map52_reg_written = BIT(data, 7); // mc_2hikg & mc_s3nt3 write here multiple time + m_map52_reg_written = BIT(data, 7); // mc_2hikg & mc_s3nt3 write here multiple time } else - state->m_wram[offset] = data; + m_wram[offset] = data; } /************************************************************* @@ -10961,73 +10810,71 @@ static void bmc_gc6in1_set_chr( running_machine &machine, UINT8 chr ) chr1_x(machine, chr_page ^ 7, chr_base | (state->m_mmc_vrom_bank[5] & chr_mask), chr); } -static WRITE8_HANDLER( bmc_gc6in1_l_w ) +WRITE8_MEMBER(nes_state::bmc_gc6in1_l_w) { - nes_state *state = space.machine().driver_data(); UINT8 bank; LOG_MMC(("bmc_gc6in1_l_w, offset: %04x, data: %02x\n", offset, data)); offset += 0x100; if (offset == 0x1000) { - state->m_mmc_reg[0] = data; + m_mmc_reg[0] = data; if (data & 0x80) { - bank = (data & 0x0f) | ((state->m_mmc_reg[1] & 0x03) << 4); - prg16_89ab(space.machine(), bank); - prg16_cdef(space.machine(), bank); + bank = (data & 0x0f) | ((m_mmc_reg[1] & 0x03) << 4); + prg16_89ab(machine(), bank); + prg16_cdef(machine(), bank); } else - bmc_gc6in1_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + bmc_gc6in1_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); } else if (offset == 0x1001) { - state->m_mmc_reg[1] = data; - bmc_gc6in1_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + m_mmc_reg[1] = data; + bmc_gc6in1_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); } else if (offset == 0x1007) { - state->m_mmc_reg[2] = data; + m_mmc_reg[2] = data; } } -static WRITE8_HANDLER( bmc_gc6in1_w ) +WRITE8_MEMBER(nes_state::bmc_gc6in1_w) { - nes_state *state = space.machine().driver_data(); UINT8 mmc_helper, cmd; static const UINT8 conv_table[8] = {0, 6, 3, 7, 5, 2, 4, 1}; LOG_MMC(("bmc_gc6in1_w, offset: %04x, data: %02x\n", offset, data)); - if (!state->m_mmc_reg[2]) // in this case we act like MMC3, only with alt prg/chr handlers + if (!m_mmc_reg[2]) // in this case we act like MMC3, only with alt prg/chr handlers { switch (offset & 0x6001) { case 0x0000: - mmc_helper = state->m_mmc3_latch ^ data; - state->m_mmc3_latch = data; + mmc_helper = m_mmc3_latch ^ data; + m_mmc3_latch = data; /* Has PRG Mode changed? */ if (mmc_helper & 0x40) - bmc_gc6in1_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + bmc_gc6in1_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); /* Has CHR Mode changed? */ if (mmc_helper & 0x80) - bmc_gc6in1_set_chr(space.machine(), state->m_mmc_chr_source); + bmc_gc6in1_set_chr(machine(), m_mmc_chr_source); break; case 0x0001: - cmd = state->m_mmc3_latch & 0x07; + cmd = m_mmc3_latch & 0x07; switch (cmd) { case 0: case 1: // these do not need to be separated: we take care of them in set_chr! case 2: case 3: case 4: case 5: - state->m_mmc_vrom_bank[cmd] = data; - bmc_gc6in1_set_chr(space.machine(), state->m_mmc_chr_source); + m_mmc_vrom_bank[cmd] = data; + bmc_gc6in1_set_chr(machine(), m_mmc_chr_source); break; case 6: case 7: - state->m_mmc_prg_bank[cmd - 6] = data; - bmc_gc6in1_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + m_mmc_prg_bank[cmd - 6] = data; + bmc_gc6in1_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); break; } break; @@ -11047,36 +10894,36 @@ static WRITE8_HANDLER( bmc_gc6in1_w ) case 0x0001: data = (data & 0xc0) | conv_table[data & 0x07]; - mmc_helper = state->m_mmc3_latch ^ data; - state->m_mmc3_latch = data; + mmc_helper = m_mmc3_latch ^ data; + m_mmc3_latch = data; /* Has PRG Mode changed? */ if (mmc_helper & 0x40) - bmc_gc6in1_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + bmc_gc6in1_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); /* Has CHR Mode changed? */ if (mmc_helper & 0x80) - bmc_gc6in1_set_chr(space.machine(), state->m_mmc_chr_source); + bmc_gc6in1_set_chr(machine(), m_mmc_chr_source); - state->m_mmc_reg[3] = 1; + m_mmc_reg[3] = 1; break; case 0x2000: - cmd = state->m_mmc3_latch & 0x07; - if (state->m_mmc_reg[3]) + cmd = m_mmc3_latch & 0x07; + if (m_mmc_reg[3]) { - state->m_mmc_reg[3] = 0; + m_mmc_reg[3] = 0; switch (cmd) { case 0: case 1: // these do not need to be separated: we take care of them in set_chr! case 2: case 3: case 4: case 5: - state->m_mmc_vrom_bank[cmd] = data; - bmc_gc6in1_set_chr(space.machine(), state->m_mmc_chr_source); + m_mmc_vrom_bank[cmd] = data; + bmc_gc6in1_set_chr(machine(), m_mmc_chr_source); break; case 6: case 7: - state->m_mmc_prg_bank[cmd - 6] = data; - bmc_gc6in1_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + m_mmc_prg_bank[cmd - 6] = data; + bmc_gc6in1_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); break; } } @@ -11084,7 +10931,7 @@ static WRITE8_HANDLER( bmc_gc6in1_w ) case 0x2001: - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; default: @@ -11109,19 +10956,18 @@ static WRITE8_HANDLER( bmc_gc6in1_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_family4646_m_w ) +WRITE8_MEMBER(nes_state::bmc_family4646_m_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("bmc_family4646_m_w, offset: %04x, data: %02x\n", offset, data)); if (offset == 0x01) { - state->m_mmc_prg_base = (data & 0x02) << 4; - state->m_mmc_prg_mask = 0x1f; - state->m_mmc_chr_base = (data & 0x20) << 3; - state->m_mmc_chr_mask = 0xff; - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_prg_base = (data & 0x02) << 4; + m_mmc_prg_mask = 0x1f; + m_mmc_chr_base = (data & 0x20) << 3; + m_mmc_chr_mask = 0xff; + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); } } @@ -11131,36 +10977,34 @@ static WRITE8_HANDLER( bmc_family4646_m_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_vt5201_w ) +WRITE8_MEMBER(nes_state::bmc_vt5201_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("bmc_vt5201_w, offset: %04x, data: %02x\n", offset, data)); - state->m_mmc_latch1 = BIT(offset, 8); + m_mmc_latch1 = BIT(offset, 8); // not sure about this mirroring bit!! // without it TN 95 in 1 has glitches in Lunar Ball; with it TN 95 in 1 has glitches in Galaxian! - set_nt_mirroring(space.machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); if (BIT(offset, 7)) { - prg16_89ab(space.machine(), (offset >> 4) & 0x07); - prg16_cdef(space.machine(), (offset >> 4) & 0x07); + prg16_89ab(machine(), (offset >> 4) & 0x07); + prg16_cdef(machine(), (offset >> 4) & 0x07); } else - prg32(space.machine(), (offset >> 5) & 0x03); - chr8(space.machine(), offset, CHRROM); + prg32(machine(), (offset >> 5) & 0x03); + chr8(machine(), offset, CHRROM); } -static READ8_HANDLER( bmc_vt5201_r ) +READ8_MEMBER(nes_state::bmc_vt5201_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("bmc_vt5201_r, offset: %04x\n", offset)); - // state->m_mmc_dipsetting = state->ioport("CARTDIPS")->read(); + // m_mmc_dipsetting = ioport("CARTDIPS")->read(); - if (state->m_mmc_latch1) - return state->m_mmc_dipsetting; // cart mode, depending on the Dip Switches (always zero atm, given we have no way to add cart-based DIPs) + if (m_mmc_latch1) + return m_mmc_dipsetting; // cart mode, depending on the Dip Switches (always zero atm, given we have no way to add cart-based DIPs) else - return mmc_hi_access_rom(space.machine(), offset); + return mmc_hi_access_rom(machine(), offset); } /************************************************************* @@ -11185,24 +11029,23 @@ static void bmc_bs5_update_banks( running_machine &machine ) chr2_6(machine, state->m_mmc_vrom_bank[3], CHRROM); } -static WRITE8_HANDLER( bmc_bs5_w ) +WRITE8_MEMBER(nes_state::bmc_bs5_w) { - nes_state *state = space.machine().driver_data(); UINT8 bs5_helper = (offset & 0xc00) >> 10; LOG_MMC(("bmc_bs5_w, offset: %04x, data: %02x\n", offset, data)); -// state->m_mmc_dipsetting = state->ioport("CARTDIPS")->read(); +// m_mmc_dipsetting = ioport("CARTDIPS")->read(); switch (offset & 0x7000) { case 0x0000: - state->m_mmc_vrom_bank[bs5_helper] = offset & 0x1f; + m_mmc_vrom_bank[bs5_helper] = offset & 0x1f; break; case 0x2000: - if (BIT(offset, state->m_mmc_dipsetting + 4)) // mmc_dipsetting is always zero atm, given we have no way to add cart-based DIPs - state->m_mmc_prg_bank[bs5_helper] = offset & 0x0f; + if (BIT(offset, m_mmc_dipsetting + 4)) // mmc_dipsetting is always zero atm, given we have no way to add cart-based DIPs + m_mmc_prg_bank[bs5_helper] = offset & 0x0f; break; } - bmc_bs5_update_banks(space.machine()); + bmc_bs5_update_banks(machine()); } /************************************************************* @@ -11213,22 +11056,22 @@ static WRITE8_HANDLER( bmc_bs5_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_810544_w ) +WRITE8_MEMBER(nes_state::bmc_810544_w) { UINT8 bank = (offset >> 7); LOG_MMC(("bmc_810544_w, offset: %04x, data: %02x\n", offset, data)); if (!BIT(offset, 6)) { - prg16_89ab(space.machine(), (bank << 1) | BIT(offset, 5)); - prg16_cdef(space.machine(), (bank << 1) | BIT(offset, 5)); + prg16_89ab(machine(), (bank << 1) | BIT(offset, 5)); + prg16_cdef(machine(), (bank << 1) | BIT(offset, 5)); } else - prg32(space.machine(), bank); + prg32(machine(), bank); - set_nt_mirroring(space.machine(), BIT(offset, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(offset, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); - chr8(space.machine(), offset & 0x0f, CHRROM); + chr8(machine(), offset & 0x0f, CHRROM); } /************************************************************* @@ -11237,7 +11080,7 @@ static WRITE8_HANDLER( bmc_810544_w ) *************************************************************/ -static WRITE8_HANDLER( bmc_ntd03_w ) +WRITE8_MEMBER(nes_state::bmc_ntd03_w) { UINT8 pbank, cbank; LOG_MMC(("bmc_ntd03_w, offset: %04x, data: %02x\n", offset, data)); @@ -11247,15 +11090,15 @@ static WRITE8_HANDLER( bmc_ntd03_w ) if (BIT(offset, 7)) { - prg16_89ab(space.machine(), pbank | BIT(offset, 6)); - prg16_cdef(space.machine(), pbank | BIT(offset, 6)); + prg16_89ab(machine(), pbank | BIT(offset, 6)); + prg16_cdef(machine(), pbank | BIT(offset, 6)); } else - prg32(space.machine(), pbank >> 1); + prg32(machine(), pbank >> 1); - set_nt_mirroring(space.machine(), BIT(offset, 10) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(offset, 10) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); - chr8(space.machine(), cbank, CHRROM); + chr8(machine(), cbank, CHRROM); } /************************************************************* @@ -11286,26 +11129,24 @@ static void bmc_gb63_update( running_machine &machine ) // chr8(machine, 0, CHRROM); } -static WRITE8_HANDLER( bmc_gb63_w ) +WRITE8_MEMBER(nes_state::bmc_gb63_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("bmc_gb63_w, offset: %04x, data: %02x\n", offset, data)); - state->m_mmc_reg[offset & 1] = data; - state->m_mmc_latch1 = BIT(state->m_mmc_reg[0], 7) | (BIT(state->m_mmc_reg[1], 0) << 1); + m_mmc_reg[offset & 1] = data; + m_mmc_latch1 = BIT(m_mmc_reg[0], 7) | (BIT(m_mmc_reg[1], 0) << 1); } -static READ8_HANDLER( bmc_gb63_r ) +READ8_MEMBER(nes_state::bmc_gb63_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("bmc_gb63_r, offset: %04x\n", offset)); - // state->m_mmc_dipsetting = state->ioport("CARTDIPS")->read(); + // m_mmc_dipsetting = ioport("CARTDIPS")->read(); - if (state->m_mmc_latch1 == 1) + if (m_mmc_latch1 == 1) return 0xff; // open bus else - return mmc_hi_access_rom(space.machine(), offset); + return mmc_hi_access_rom(machine(), offset); } /************************************************************* @@ -11314,12 +11155,12 @@ static READ8_HANDLER( bmc_gb63_r ) *************************************************************/ -static WRITE8_HANDLER( edu2k_w ) +WRITE8_MEMBER(nes_state::edu2k_w) { LOG_MMC(("edu2k_w, offset: %04x, data: %02x\n", offset, data)); - prg32(space.machine(), data & 0x1f); - wram_bank(space.machine(), (data & 0xc0) >> 6, NES_WRAM); + prg32(machine(), data & 0x1f); + wram_bank(machine(), (data & 0xc0) >> 6, NES_WRAM); } /************************************************************* @@ -11336,28 +11177,27 @@ static void h2288_prg_cb( running_machine &machine, int start, int bank ) prg8_x(machine, start, bank); } -static WRITE8_HANDLER( h2288_l_w ) +WRITE8_MEMBER(nes_state::h2288_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("h2288_l_w offset: %04x, data: %02x\n", offset, data)); offset += 0x100; if (offset >= 0x1800) { - state->m_mmc_reg[offset & 1] = data; - if (state->m_mmc_reg[0] & 0x40) + m_mmc_reg[offset & 1] = data; + if (m_mmc_reg[0] & 0x40) { - UINT8 helper1 = (state->m_mmc_reg[0] & 0x05) | ((state->m_mmc_reg[0] >> 2) & 0x0a); - UINT8 helper2 = BIT(state->m_mmc_reg[0], 1); - prg16_89ab(space.machine(), helper1 & ~helper2); - prg16_cdef(space.machine(), helper1 | helper2); + UINT8 helper1 = (m_mmc_reg[0] & 0x05) | ((m_mmc_reg[0] >> 2) & 0x0a); + UINT8 helper2 = BIT(m_mmc_reg[0], 1); + prg16_89ab(machine(), helper1 & ~helper2); + prg16_cdef(machine(), helper1 | helper2); } else - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); } } -static READ8_HANDLER( h2288_l_r ) +READ8_MEMBER(nes_state::h2288_l_r) { LOG_MMC(("h2288_l_r offset: %04x\n", offset)); offset += 0x100; @@ -11374,7 +11214,7 @@ static READ8_HANDLER( h2288_l_r ) return 0; } -static WRITE8_HANDLER( h2288_w ) +WRITE8_MEMBER(nes_state::h2288_w) { static const UINT8 conv_table[8] = {0, 3, 1, 5, 6, 7, 2, 4}; LOG_MMC(("h2288_w, offset: %04x, data: %02x\n", offset, data)); @@ -11442,9 +11282,8 @@ static void shjy3_update( running_machine &machine ) } } -static WRITE8_HANDLER( shjy3_w ) +WRITE8_MEMBER(nes_state::shjy3_w) { - nes_state *state = space.machine().driver_data(); UINT8 mmc_helper, shift; LOG_MMC(("shjy3_w, offset: %04x, data: %02x\n", offset, data)); @@ -11455,43 +11294,43 @@ static WRITE8_HANDLER( shjy3_w ) mmc_helper &= 7; shift = offset & 4; - state->m_mmc_vrom_bank[mmc_helper] = (state->m_mmc_vrom_bank[mmc_helper] & (0xf0 >> shift)) | ((data & 0x0f) << shift); + m_mmc_vrom_bank[mmc_helper] = (m_mmc_vrom_bank[mmc_helper] & (0xf0 >> shift)) | ((data & 0x0f) << shift); if (shift) - state->m_mmc_extra_bank[mmc_helper] = data >> 4; + m_mmc_extra_bank[mmc_helper] = data >> 4; } else { switch (offset) { case 0x0010: - state->m_mmc_prg_bank[0] = data; + m_mmc_prg_bank[0] = data; break; case 0x2010: - state->m_mmc_prg_bank[1] = data; + m_mmc_prg_bank[1] = data; break; case 0x1400: switch (data & 0x03) { - case 0: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break; - case 1: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break; - case 2: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break; - case 3: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break; + case 0: set_nt_mirroring(machine(), PPU_MIRROR_VERT); break; + case 1: set_nt_mirroring(machine(), PPU_MIRROR_HORZ); break; + case 2: set_nt_mirroring(machine(), PPU_MIRROR_LOW); break; + case 3: set_nt_mirroring(machine(), PPU_MIRROR_HIGH); break; } break; case 0x7000: - state->m_IRQ_count_latch = (state->m_IRQ_count_latch & 0xf0) | (data & 0x0f); + m_IRQ_count_latch = (m_IRQ_count_latch & 0xf0) | (data & 0x0f); break; case 0x7004: - state->m_IRQ_count_latch = (state->m_IRQ_count_latch & 0x0f) | ((data & 0x0f) << 4); + m_IRQ_count_latch = (m_IRQ_count_latch & 0x0f) | ((data & 0x0f) << 4); break; case 0x7008: - state->m_IRQ_enable = data & 0x03; - if (state->m_IRQ_enable & 0x02) - state->m_IRQ_count = state->m_IRQ_count_latch; + m_IRQ_enable = data & 0x03; + if (m_IRQ_enable & 0x02) + m_IRQ_count = m_IRQ_count_latch; break; } } - shjy3_update(space.machine()); + shjy3_update(machine()); } /************************************************************* @@ -11504,20 +11343,18 @@ static WRITE8_HANDLER( shjy3_w ) *************************************************************/ -WRITE8_HANDLER( unl_6035052_extra_w ) +WRITE8_MEMBER(nes_state::unl_6035052_extra_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("unl_6035052_extra_w, offset: %04x, data: %02x\n", offset, data)); - state->m_mmc_latch1 = data & 0x03; - if (state->m_mmc_latch1 == 1) - state->m_mmc_latch1 = 2; + m_mmc_latch1 = data & 0x03; + if (m_mmc_latch1 == 1) + m_mmc_latch1 = 2; } -READ8_HANDLER( unl_6035052_extra_r ) +READ8_MEMBER(nes_state::unl_6035052_extra_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("unl_6035052_extra_r, offset: %04x\n", offset)); - return state->m_mmc_latch1; + return m_mmc_latch1; } @@ -11570,26 +11407,25 @@ INLINE void pjoy84_set_base_mask( running_machine &machine ) state->m_mmc_chr_mask = BIT(state->m_mmc_reg[0], 7) ? 0x7f : 0xff; } -static WRITE8_HANDLER( pjoy84_m_w ) +WRITE8_MEMBER(nes_state::pjoy84_m_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("pjoy84_m_w offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x03) { case 0x00: case 0x03: - if (state->m_mmc_reg[3] & 0x80) + if (m_mmc_reg[3] & 0x80) return; // else we act as if offset & 3 = 1,2 case 0x01: case 0x02: - state->m_mmc_reg[offset & 0x03] = data; - pjoy84_set_base_mask(space.machine()); - if (state->m_mmc_reg[3] & 0x10) - chr8(space.machine(), (state->m_mmc_chr_base >> 3) | (state->m_mmc_reg[2] & 0x0f), state->m_mmc_chr_source); + m_mmc_reg[offset & 0x03] = data; + pjoy84_set_base_mask(machine()); + if (m_mmc_reg[3] & 0x10) + chr8(machine(), (m_mmc_chr_base >> 3) | (m_mmc_reg[2] & 0x0f), m_mmc_chr_source); else - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); break; } } @@ -11650,157 +11486,153 @@ static void someri_mmc1_set_chr( running_machine &machine ) chr8(machine, (state->m_mmc_reg[1] & 0x1f) >> 1, state->m_mmc_chr_source); } -static WRITE8_HANDLER( someri_mmc1_w ) +WRITE8_MEMBER(nes_state::someri_mmc1_w) { - nes_state *state = space.machine().driver_data(); - assert(state->m_mmc_cmd1 == 2); + assert(m_mmc_cmd1 == 2); if (data & 0x80) { - state->m_mmc1_count = 0; - state->m_mmc1_latch = 0; + m_mmc1_count = 0; + m_mmc1_latch = 0; - state->m_mmc_reg[0] |= 0x0c; - someri_mmc1_set_prg(space.machine()); + m_mmc_reg[0] |= 0x0c; + someri_mmc1_set_prg(machine()); return; } - if (state->m_mmc1_count < 5) + if (m_mmc1_count < 5) { - if (state->m_mmc1_count == 0) state->m_mmc1_latch = 0; - state->m_mmc1_latch >>= 1; - state->m_mmc1_latch |= (data & 0x01) ? 0x10 : 0x00; - state->m_mmc1_count++; + if (m_mmc1_count == 0) m_mmc1_latch = 0; + m_mmc1_latch >>= 1; + m_mmc1_latch |= (data & 0x01) ? 0x10 : 0x00; + m_mmc1_count++; } - if (state->m_mmc1_count == 5) + if (m_mmc1_count == 5) { switch (offset & 0x6000) { case 0x0000: - state->m_mmc_reg[0] = state->m_mmc1_latch; - switch (state->m_mmc_reg[0] & 0x03) + m_mmc_reg[0] = m_mmc1_latch; + switch (m_mmc_reg[0] & 0x03) { - case 0: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break; - case 1: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break; - case 2: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break; - case 3: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break; + case 0: set_nt_mirroring(machine(), PPU_MIRROR_LOW); break; + case 1: set_nt_mirroring(machine(), PPU_MIRROR_HIGH); break; + case 2: set_nt_mirroring(machine(), PPU_MIRROR_VERT); break; + case 3: set_nt_mirroring(machine(), PPU_MIRROR_HORZ); break; } - someri_mmc1_set_chr(space.machine()); - someri_mmc1_set_prg(space.machine()); + someri_mmc1_set_chr(machine()); + someri_mmc1_set_prg(machine()); break; case 0x2000: - state->m_mmc_reg[1] = state->m_mmc1_latch; - someri_mmc1_set_chr(space.machine()); - someri_mmc1_set_prg(space.machine()); + m_mmc_reg[1] = m_mmc1_latch; + someri_mmc1_set_chr(machine()); + someri_mmc1_set_prg(machine()); break; case 0x4000: - state->m_mmc_reg[2] = state->m_mmc1_latch; - someri_mmc1_set_chr(space.machine()); + m_mmc_reg[2] = m_mmc1_latch; + someri_mmc1_set_chr(machine()); break; case 0x6000: - state->m_mmc_reg[3] = state->m_mmc1_latch; - someri_mmc1_set_prg(space.machine()); + m_mmc_reg[3] = m_mmc1_latch; + someri_mmc1_set_prg(machine()); break; } - state->m_mmc1_count = 0; + m_mmc1_count = 0; } } // MMC3 Mode emulation -static WRITE8_HANDLER( someri_mmc3_w ) +WRITE8_MEMBER(nes_state::someri_mmc3_w) { - nes_state *state = space.machine().driver_data(); UINT8 mmc_helper, cmd; - assert(state->m_mmc_cmd1 == 1); + assert(m_mmc_cmd1 == 1); switch (offset & 0x6001) { case 0x0000: - mmc_helper = state->m_mmc3_latch ^ data; - state->m_mmc3_latch = data; + mmc_helper = m_mmc3_latch ^ data; + m_mmc3_latch = data; if (mmc_helper & 0x40) - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); if (mmc_helper & 0x80) - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); break; case 0x0001: - cmd = state->m_mmc3_latch & 0x07; + cmd = m_mmc3_latch & 0x07; switch (cmd) { case 0: case 1: case 2: case 3: case 4: case 5: - state->m_mmc_vrom_bank[cmd] = data; - mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); + m_mmc_vrom_bank[cmd] = data; + mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); break; case 6: case 7: - state->m_mmc_prg_bank[cmd - 6] = data; - mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask); + m_mmc_prg_bank[cmd - 6] = data; + mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); break; } break; case 0x2000: - set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); break; case 0x2001: break; - case 0x4000: state->m_IRQ_count_latch = data; break; - case 0x4001: state->m_IRQ_count = 0; break; - case 0x6000: state->m_IRQ_enable = 0; break; - case 0x6001: state->m_IRQ_enable = 1; break; + case 0x4000: m_IRQ_count_latch = data; break; + case 0x4001: m_IRQ_count = 0; break; + case 0x6000: m_IRQ_enable = 0; break; + case 0x6001: m_IRQ_enable = 1; break; } } // VRC2 Mode emulation -static WRITE8_HANDLER( someri_vrc2_w ) +WRITE8_MEMBER(nes_state::someri_vrc2_w) { - nes_state *state = space.machine().driver_data(); UINT8 bank, shift; - assert(state->m_mmc_cmd1 == 0); + assert(m_mmc_cmd1 == 0); if (offset < 0x1000) { - state->m_mmc_prg_bank[4] = data; - prg8_89(space.machine(), state->m_mmc_prg_bank[4]); + m_mmc_prg_bank[4] = data; + prg8_89(machine(), m_mmc_prg_bank[4]); } else if (offset < 0x2000) { switch (data & 0x03) { - case 0x00: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break; - case 0x01: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break; - case 0x02: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break; - case 0x03: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break; + case 0x00: set_nt_mirroring(machine(), PPU_MIRROR_VERT); break; + case 0x01: set_nt_mirroring(machine(), PPU_MIRROR_HORZ); break; + case 0x02: set_nt_mirroring(machine(), PPU_MIRROR_LOW); break; + case 0x03: set_nt_mirroring(machine(), PPU_MIRROR_HIGH); break; } } else if (offset < 0x3000) { - state->m_mmc_prg_bank[5] = data; - prg8_ab(space.machine(), state->m_mmc_prg_bank[5]); + m_mmc_prg_bank[5] = data; + prg8_ab(machine(), m_mmc_prg_bank[5]); } else if (offset < 0x7000) { bank = ((offset & 0x7000) - 0x3000) / 0x0800 + BIT(offset, 1); shift = BIT(offset, 2) * 4; data = (data & 0x0f) << shift; - state->m_mmc_vrom_bank[6 + bank] = data | state->m_mmc_chr_base; - chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[6 + bank], CHRROM); + m_mmc_vrom_bank[6 + bank] = data | m_mmc_chr_base; + chr1_x(machine(), bank, m_mmc_vrom_bank[6 + bank], CHRROM); } } -static WRITE8_HANDLER( someri_w ) +WRITE8_MEMBER(nes_state::someri_w) { - nes_state *state = space.machine().driver_data(); - LOG_MMC(("someri_w mode %d, offset: %04x, data: %02x\n", state->m_mmc_cmd1, offset, data)); + LOG_MMC(("someri_w mode %d, offset: %04x, data: %02x\n", m_mmc_cmd1, offset, data)); - switch (state->m_mmc_cmd1) + switch (m_mmc_cmd1) { case 0x00: someri_vrc2_w(space, offset, data, mem_mask); break; case 0x01: someri_mmc3_w(space, offset, data, mem_mask); break; @@ -11832,19 +11664,18 @@ static void someri_mode_update( running_machine &machine ) } } -static WRITE8_HANDLER( someri_l_w ) +WRITE8_MEMBER(nes_state::someri_l_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("someri_l_w, offset: %04x, data: %02x\n", offset, data)); offset += 0x100; if (offset & 0x100) { - state->m_mmc_cmd1 = data & 0x03; - state->m_mmc_chr_base = ((state->m_mmc_cmd1 & 0x04) << 6); - if (state->m_mmc_cmd1 != 1) - state->m_IRQ_enable = 0; - someri_mode_update(space.machine()); + m_mmc_cmd1 = data & 0x03; + m_mmc_chr_base = ((m_mmc_cmd1 & 0x04) << 6); + if (m_mmc_cmd1 != 1) + m_IRQ_enable = 0; + someri_mode_update(machine()); } } @@ -11857,24 +11688,22 @@ static WRITE8_HANDLER( someri_l_w ) *************************************************************/ -static WRITE8_HANDLER( fujiya_m_w ) +WRITE8_MEMBER(nes_state::fujiya_m_w) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("fujiya_m_w, offset: %04x, data: %02x\n", offset, data)); offset += 0x6000; if (offset == 0x6502 || offset == 0x7000) - state->m_mmc_latch1 = (data & 0x40) << 1; + m_mmc_latch1 = (data & 0x40) << 1; } -static READ8_HANDLER( fujiya_m_r ) +READ8_MEMBER(nes_state::fujiya_m_r) { - nes_state *state = space.machine().driver_data(); LOG_MMC(("fujiya_m_r, offset: %04x\n", offset)); offset += 0x6000; if (offset == 0x7001 || offset == 0x7777) - return state->m_mmc_latch1 | ((offset >> 8) & 0x7f); + return m_mmc_latch1 | ((offset >> 8) & 0x7f); return 0; } @@ -11887,10 +11716,8 @@ typedef void (*nes_ppu_latch)(device_t *device, offs_t offset); struct nes_memory_accessor { - write8_space_func write; - const char *write_name; - read8_space_func read; - const char *read_name; + write8_delegate write; + read8_delegate read; }; struct nes_pcb_intf @@ -11904,43 +11731,44 @@ struct nes_pcb_intf ppu2c0x_hblank_cb mmc_hblank; }; + #define NES_NOACCESS \ -{FUNC_NULL, FUNC_NULL} +{write8_delegate(), read8_delegate()} #define NES_READONLY(a) \ -{FUNC_NULL, FUNC(a)} +{write8_delegate(), read8_delegate(FUNC(a),(nes_state *)0)} #define NES_WRITEONLY(a) \ -{FUNC(a), FUNC_NULL} +{write8_delegate(FUNC(a),(nes_state *)0), read8_delegate()} -static WRITE8_HANDLER( dummy_l_w ) +WRITE8_MEMBER(nes_state::dummy_l_w) { logerror("write access, offset: %04x, data: %02x\n", offset + 0x4100, data); } -static WRITE8_HANDLER( dummy_m_w ) +WRITE8_MEMBER(nes_state::dummy_m_w) { logerror("write access, offset: %04x, data: %02x\n", offset + 0x6000, data); } -static WRITE8_HANDLER( dummy_w ) +WRITE8_MEMBER(nes_state::dummy_w) { logerror("write access, offset: %04x, data: %02x\n", offset + 0x8000, data); } -static READ8_HANDLER( dummy_l_r ) +READ8_MEMBER(nes_state::dummy_l_r) { logerror("read access, offset: %04x\n", offset + 0x4100); return 0x00; } -static READ8_HANDLER( dummy_m_r ) +READ8_MEMBER(nes_state::dummy_m_r) { logerror("read access, offset: %04x\n", offset + 0x6000); return 0x00; } -static READ8_HANDLER( dummy_r ) +READ8_MEMBER(nes_state::dummy_r) { logerror("read access, offset: %04x\n", offset + 0x8000); return 0x00; @@ -11951,250 +11779,250 @@ static const nes_pcb_intf nes_intf_list[] = { STD_NROM, NES_NOACCESS, NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, { HVC_FAMBASIC, NES_NOACCESS, NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, { GG_NROM, NES_NOACCESS, NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, - { STD_UXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(uxrom_w), NULL, NULL, NULL }, - { STD_UN1ROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(un1rom_w), NULL, NULL, NULL }, - { STD_CPROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(cprom_w), NULL, NULL, NULL }, - { STD_CNROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(cnrom_w), NULL, NULL, NULL }, - { BANDAI_PT554, NES_NOACCESS, NES_WRITEONLY(bandai_pt554_m_w), NES_WRITEONLY(cnrom_w), NULL, NULL, NULL }, - { STD_AXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(axrom_w), NULL, NULL, NULL }, - { STD_PXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(pxrom_w), mmc2_latch, NULL, NULL }, - { STD_FXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(fxrom_w), mmc2_latch, NULL, NULL }, - { STD_BXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bxrom_w), NULL, NULL, NULL }, - { STD_GXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(gxrom_w), NULL, NULL, NULL }, - { STD_MXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(gxrom_w), NULL, NULL, NULL }, - { STD_NXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(ntbrom_w), NULL, NULL, NULL }, - { SUNSOFT_DCS, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(ntbrom_w), NULL, NULL, NULL }, - { STD_JXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(jxrom_w), NULL, NULL, jxrom_irq }, - { STD_SXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(sxrom_w), NULL, NULL, NULL }, - { STD_SOROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(sxrom_w), NULL, NULL, NULL }, - { STD_SXROM_A, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(sxrom_w), NULL, NULL, NULL }, - { STD_SOROM_A, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(sxrom_w), NULL, NULL, NULL }, - { STD_TXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, - { STD_TVROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, - { STD_TKROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, - { STD_HKROM, NES_NOACCESS, {FUNC(hkrom_m_w), FUNC(hkrom_m_r)}, NES_WRITEONLY(hkrom_w), NULL, NULL, mmc3_irq }, - { STD_TQROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(tqrom_w), NULL, NULL, mmc3_irq }, - { STD_TXSROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(txsrom_w), NULL, NULL, mmc3_irq }, - { STD_DXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(dxrom_w), NULL, NULL, NULL }, - { STD_DRROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(dxrom_w), NULL, NULL, NULL }, - { NAMCOT_34X3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(dxrom_w), NULL, NULL, NULL }, - { NAMCOT_3425, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(namcot3425_w), NULL, NULL, NULL }, - { NAMCOT_3446, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(namcot3446_w), NULL, NULL, NULL }, - { NAMCOT_3453, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(namcot3453_w), NULL, NULL, NULL }, - { STD_EXROM, {FUNC(exrom_l_w), FUNC(exrom_l_r)}, NES_NOACCESS, NES_NOACCESS, NULL, NULL, mmc5_irq }, - { NES_QJ, NES_NOACCESS, NES_WRITEONLY(qj_m_w), NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, - { PAL_ZZ, NES_NOACCESS, NES_WRITEONLY(zz_m_w), NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, - { UXROM_CC, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(uxrom_cc_w), NULL, NULL, NULL }, + { STD_UXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::uxrom_w), NULL, NULL, NULL }, + { STD_UN1ROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::un1rom_w), NULL, NULL, NULL }, + { STD_CPROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::cprom_w), NULL, NULL, NULL }, + { STD_CNROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::cnrom_w), NULL, NULL, NULL }, + { BANDAI_PT554, NES_NOACCESS, NES_WRITEONLY(nes_state::bandai_pt554_m_w), NES_WRITEONLY(nes_state::cnrom_w), NULL, NULL, NULL }, + { STD_AXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::axrom_w), NULL, NULL, NULL }, + { STD_PXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::pxrom_w), mmc2_latch, NULL, NULL }, + { STD_FXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::fxrom_w), mmc2_latch, NULL, NULL }, + { STD_BXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bxrom_w), NULL, NULL, NULL }, + { STD_GXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::gxrom_w), NULL, NULL, NULL }, + { STD_MXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::gxrom_w), NULL, NULL, NULL }, + { STD_NXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::ntbrom_w), NULL, NULL, NULL }, + { SUNSOFT_DCS, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::ntbrom_w), NULL, NULL, NULL }, + { STD_JXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::jxrom_w), NULL, NULL, jxrom_irq }, + { STD_SXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sxrom_w), NULL, NULL, NULL }, + { STD_SOROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sxrom_w), NULL, NULL, NULL }, + { STD_SXROM_A, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sxrom_w), NULL, NULL, NULL }, + { STD_SOROM_A, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sxrom_w), NULL, NULL, NULL }, + { STD_TXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, + { STD_TVROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, + { STD_TKROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, + { STD_HKROM, NES_NOACCESS, {write8_delegate(FUNC(nes_state::hkrom_m_w),(nes_state *)0), read8_delegate(FUNC(nes_state::hkrom_m_r),(nes_state *)0)}, NES_WRITEONLY(nes_state::hkrom_w), NULL, NULL, mmc3_irq }, + { STD_TQROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::tqrom_w), NULL, NULL, mmc3_irq }, + { STD_TXSROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::txsrom_w), NULL, NULL, mmc3_irq }, + { STD_DXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::dxrom_w), NULL, NULL, NULL }, + { STD_DRROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::dxrom_w), NULL, NULL, NULL }, + { NAMCOT_34X3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::dxrom_w), NULL, NULL, NULL }, + { NAMCOT_3425, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::namcot3425_w), NULL, NULL, NULL }, + { NAMCOT_3446, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::namcot3446_w), NULL, NULL, NULL }, + { NAMCOT_3453, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::namcot3453_w), NULL, NULL, NULL }, + { STD_EXROM, {write8_delegate(FUNC(nes_state::exrom_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::exrom_l_r),(nes_state *)0)}, NES_NOACCESS, NES_NOACCESS, NULL, NULL, mmc5_irq }, + { NES_QJ, NES_NOACCESS, NES_WRITEONLY(nes_state::qj_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, + { PAL_ZZ, NES_NOACCESS, NES_WRITEONLY(nes_state::zz_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, + { UXROM_CC, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::uxrom_cc_w), NULL, NULL, NULL }, // - { DIS_74X139X74, NES_NOACCESS, NES_WRITEONLY(dis_74x139x74_m_w), NES_NOACCESS, NULL, NULL, NULL }, - { DIS_74X377, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(dis_74x377_w), NULL, NULL, NULL }, - { DIS_74X161X161X32, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(dis_74x161x161x32_w), NULL, NULL, NULL }, - { DIS_74X161X138, NES_NOACCESS, NES_WRITEONLY(dis_74x161x138_m_w), NES_NOACCESS, NULL, NULL, NULL }, - { BANDAI_LZ93, NES_NOACCESS, NES_WRITEONLY(lz93d50_m_w), NES_WRITEONLY(lz93d50_w), NULL, NULL, bandai_lz_irq }, - { BANDAI_LZ93EX, NES_NOACCESS, NES_WRITEONLY(lz93d50_m_w), NES_WRITEONLY(lz93d50_w), NULL, NULL, bandai_lz_irq }, - { BANDAI_FCG, NES_NOACCESS, NES_WRITEONLY(lz93d50_m_w), NES_WRITEONLY(lz93d50_w), NULL, NULL, bandai_lz_irq }, - { BANDAI_DATACH, NES_NOACCESS, NES_WRITEONLY(lz93d50_m_w), NES_WRITEONLY(lz93d50_w), NULL, NULL, bandai_lz_irq }, - { BANDAI_JUMP2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(fjump2_w), NULL, NULL, bandai_lz_irq }, - { BANDAI_KARAOKE, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bandai_ks_w), NULL, NULL, NULL }, - { BANDAI_OEKAKIDS, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bandai_ok_w), NULL, NULL, NULL }, - { IREM_G101, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(g101_w), NULL, NULL, NULL }, - { IREM_LROG017, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(lrog017_w), NULL, NULL, NULL }, - { IREM_H3001, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(h3001_w), NULL, NULL, h3001_irq }, - { IREM_TAM_S1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(tam_s1_w), NULL, NULL, NULL }, - { IREM_HOLYDIV, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(irem_hd_w), NULL, NULL, NULL }, - { JALECO_SS88006, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(ss88006_w), NULL, NULL, ss88006_irq }, - { JALECO_JF11, NES_NOACCESS, NES_WRITEONLY(jf11_m_w), NES_NOACCESS, NULL, NULL, NULL }, - { JALECO_JF13, NES_NOACCESS, NES_WRITEONLY(jf13_m_w), NES_NOACCESS, NULL, NULL, NULL }, - { JALECO_JF16, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(jf16_w), NULL, NULL, NULL }, - { JALECO_JF17, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(jf17_w), NULL, NULL, NULL }, - { JALECO_JF19, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(jf19_w), NULL, NULL, NULL }, - { KONAMI_VRC1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(konami_vrc1_w), NULL, NULL, NULL }, - { KONAMI_VRC2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(konami_vrc2_w), NULL, NULL, NULL }, - { KONAMI_VRC3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(konami_vrc3_w), NULL, NULL, konami_irq }, - { KONAMI_VRC4, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(konami_vrc4_w), NULL, NULL, konami_irq }, - { KONAMI_VRC6, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(konami_vrc6_w), NULL, NULL, konami_irq }, - { KONAMI_VRC7, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(konami_vrc7_w), NULL, NULL, konami_irq }, - { NAMCOT_163, {FUNC(namcot163_l_w), FUNC(namcot163_l_r) }, NES_NOACCESS, NES_WRITEONLY(namcot163_w), NULL, NULL, namcot_irq }, - { SUNSOFT_1, NES_NOACCESS, NES_WRITEONLY(sunsoft1_m_w), NES_NOACCESS, NULL, NULL, NULL }, - { SUNSOFT_2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(sunsoft2_w), NULL, NULL, NULL }, - { SUNSOFT_3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(sunsoft3_w), NULL, NULL, sunsoft3_irq }, - { TAITO_TC0190FMC, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(tc0190fmc_w), NULL, NULL, NULL }, - { TAITO_TC0190FMCP, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(tc0190fmc_p16_w), NULL, NULL, mmc3_irq }, - { TAITO_X1_005, NES_NOACCESS, {FUNC(x1005_m_w), FUNC(x1005_m_r)}, NES_NOACCESS, NULL, NULL, NULL }, - { TAITO_X1_005_A, NES_NOACCESS, {FUNC(x1005a_m_w), FUNC(x1005_m_r)}, NES_NOACCESS, NULL, NULL, NULL }, - { TAITO_X1_017, NES_NOACCESS, {FUNC(x1017_m_w), FUNC(x1017_m_r)}, NES_NOACCESS, NULL, NULL, NULL }, + { DIS_74X139X74, NES_NOACCESS, NES_WRITEONLY(nes_state::dis_74x139x74_m_w), NES_NOACCESS, NULL, NULL, NULL }, + { DIS_74X377, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::dis_74x377_w), NULL, NULL, NULL }, + { DIS_74X161X161X32, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::dis_74x161x161x32_w), NULL, NULL, NULL }, + { DIS_74X161X138, NES_NOACCESS, NES_WRITEONLY(nes_state::dis_74x161x138_m_w), NES_NOACCESS, NULL, NULL, NULL }, + { BANDAI_LZ93, NES_NOACCESS, NES_WRITEONLY(nes_state::lz93d50_m_w), NES_WRITEONLY(nes_state::lz93d50_w), NULL, NULL, bandai_lz_irq }, + { BANDAI_LZ93EX, NES_NOACCESS, NES_WRITEONLY(nes_state::lz93d50_m_w), NES_WRITEONLY(nes_state::lz93d50_w), NULL, NULL, bandai_lz_irq }, + { BANDAI_FCG, NES_NOACCESS, NES_WRITEONLY(nes_state::lz93d50_m_w), NES_WRITEONLY(nes_state::lz93d50_w), NULL, NULL, bandai_lz_irq }, + { BANDAI_DATACH, NES_NOACCESS, NES_WRITEONLY(nes_state::lz93d50_m_w), NES_WRITEONLY(nes_state::lz93d50_w), NULL, NULL, bandai_lz_irq }, + { BANDAI_JUMP2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::fjump2_w), NULL, NULL, bandai_lz_irq }, + { BANDAI_KARAOKE, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bandai_ks_w), NULL, NULL, NULL }, + { BANDAI_OEKAKIDS, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bandai_ok_w), NULL, NULL, NULL }, + { IREM_G101, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::g101_w), NULL, NULL, NULL }, + { IREM_LROG017, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::lrog017_w), NULL, NULL, NULL }, + { IREM_H3001, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::h3001_w), NULL, NULL, h3001_irq }, + { IREM_TAM_S1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::tam_s1_w), NULL, NULL, NULL }, + { IREM_HOLYDIV, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::irem_hd_w), NULL, NULL, NULL }, + { JALECO_SS88006, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::ss88006_w), NULL, NULL, ss88006_irq }, + { JALECO_JF11, NES_NOACCESS, NES_WRITEONLY(nes_state::jf11_m_w), NES_NOACCESS, NULL, NULL, NULL }, + { JALECO_JF13, NES_NOACCESS, NES_WRITEONLY(nes_state::jf13_m_w), NES_NOACCESS, NULL, NULL, NULL }, + { JALECO_JF16, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::jf16_w), NULL, NULL, NULL }, + { JALECO_JF17, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::jf17_w), NULL, NULL, NULL }, + { JALECO_JF19, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::jf19_w), NULL, NULL, NULL }, + { KONAMI_VRC1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::konami_vrc1_w), NULL, NULL, NULL }, + { KONAMI_VRC2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::konami_vrc2_w), NULL, NULL, NULL }, + { KONAMI_VRC3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::konami_vrc3_w), NULL, NULL, konami_irq }, + { KONAMI_VRC4, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::konami_vrc4_w), NULL, NULL, konami_irq }, + { KONAMI_VRC6, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::konami_vrc6_w), NULL, NULL, konami_irq }, + { KONAMI_VRC7, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::konami_vrc7_w), NULL, NULL, konami_irq }, + { NAMCOT_163, {write8_delegate(FUNC(nes_state::namcot163_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::namcot163_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::namcot163_w), NULL, NULL, namcot_irq }, + { SUNSOFT_1, NES_NOACCESS, NES_WRITEONLY(nes_state::sunsoft1_m_w), NES_NOACCESS, NULL, NULL, NULL }, + { SUNSOFT_2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sunsoft2_w), NULL, NULL, NULL }, + { SUNSOFT_3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sunsoft3_w), NULL, NULL, sunsoft3_irq }, + { TAITO_TC0190FMC, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::tc0190fmc_w), NULL, NULL, NULL }, + { TAITO_TC0190FMCP, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::tc0190fmc_p16_w), NULL, NULL, mmc3_irq }, + { TAITO_X1_005, NES_NOACCESS, {write8_delegate(FUNC(nes_state::x1005_m_w),(nes_state *)0), read8_delegate(FUNC(nes_state::x1005_m_r),(nes_state *)0)}, NES_NOACCESS, NULL, NULL, NULL }, + { TAITO_X1_005_A, NES_NOACCESS, {write8_delegate(FUNC(nes_state::x1005a_m_w),(nes_state *)0), read8_delegate(FUNC(nes_state::x1005_m_r),(nes_state *)0)}, NES_NOACCESS, NULL, NULL, NULL }, + { TAITO_X1_017, NES_NOACCESS, {write8_delegate(FUNC(nes_state::x1017_m_w),(nes_state *)0), read8_delegate(FUNC(nes_state::x1017_m_r),(nes_state *)0)}, NES_NOACCESS, NULL, NULL, NULL }, // - { AGCI_50282, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(agci_50282_w), NULL, NULL, NULL }, - { ACTENT_ACT52, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(ae_act52_w), NULL, NULL, NULL }, - { AVE_NINA01, NES_NOACCESS, NES_WRITEONLY(nina01_m_w), NES_NOACCESS, NULL, NULL, NULL }, - { AVE_NINA06, NES_WRITEONLY(nina06_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, - { CNE_DECATHLON, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(cne_decathl_w), NULL, NULL, NULL }, - { CNE_FSB, NES_NOACCESS, NES_WRITEONLY(cne_fsb_m_w), NES_NOACCESS, NULL, NULL, NULL }, - { CNE_SHLZ, NES_WRITEONLY(cne_shlz_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, - { CALTRON_6IN1, NES_NOACCESS, NES_WRITEONLY(caltron6in1_m_w), NES_WRITEONLY(caltron6in1_w), NULL, NULL, NULL }, - { CAMERICA_BF9093, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bf9093_w), NULL, NULL, NULL }, - { CAMERICA_BF9097, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bf9093_w), NULL, NULL, NULL }, - { CAMERICA_BF9096, NES_NOACCESS, NES_WRITEONLY(bf9096_w), NES_WRITEONLY(bf9096_w), NULL, NULL, NULL }, - { CAMERICA_GOLDENFIVE, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(golden5_w), NULL, NULL, NULL }, - { CONY_BOARD, {FUNC(cony_l_w), FUNC(cony_l_r)}, NES_NOACCESS, NES_WRITEONLY(cony_w), NULL, NULL, sunsoft3_irq }, - { YOKO_BOARD, {FUNC(yoko_l_w), FUNC(yoko_l_r)}, NES_NOACCESS, NES_WRITEONLY(yoko_w), NULL, NULL, sunsoft3_irq }, - { DREAMTECH_BOARD, NES_WRITEONLY(dreamtech_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, - { FUTUREMEDIA_BOARD, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(futuremedia_w), NULL, NULL, futuremedia_irq }, - { FUKUTAKE_BOARD, {FUNC(fukutake_l_w), FUNC(fukutake_l_r)}, NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, - { GOUDER_37017, {FUNC(gouder_sf4_l_w), FUNC(gouder_sf4_l_r)}, NES_NOACCESS, NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, - { HENGEDIANZI_BOARD, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(henggedianzi_w), NULL, NULL, NULL }, - { HENGEDIANZI_XJZB, NES_WRITEONLY(heng_xjzb_l_w), NES_NOACCESS, NES_WRITEONLY(heng_xjzb_w), NULL, NULL, NULL }, - { HES6IN1_BOARD, NES_WRITEONLY(hes6in1_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, - { HES_BOARD, NES_WRITEONLY(hes_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, - { HOSENKAN_BOARD, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(hosenkan_w), NULL, NULL, mmc3_irq }, - { KAISER_KS7058, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(ks7058_w), NULL, NULL, NULL }, - { KAISER_KS7022, NES_NOACCESS, NES_NOACCESS, {FUNC(ks7022_w), FUNC(ks7022_r)}, NULL, NULL, NULL }, - { KAISER_KS7032, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(ks7032_w), NULL, NULL, ks7032_irq }, - { KAISER_KS202, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(ks202_w), NULL, NULL, ks7032_irq }, - { KAISER_KS7017, NES_WRITEONLY(ks7017_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, mmc_fds_irq }, - { KAY_PANDAPRINCE, {FUNC(kay_pp_l_w), FUNC(kay_pp_l_r)}, NES_NOACCESS, NES_WRITEONLY(kay_pp_w), NULL, NULL, mmc3_irq }, - { KASING_BOARD, NES_NOACCESS, NES_WRITEONLY(kasing_m_w), NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, - { SACHEN_74LS374, {FUNC(sachen_74x374_l_w), FUNC(sachen_74x374_l_r)}, NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, - { SACHEN_74LS374_A, NES_WRITEONLY(sachen_74x374a_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, - { SACHEN_8259A, NES_WRITEONLY(s8259_l_w), NES_WRITEONLY(s8259_m_w), NES_NOACCESS, NULL, NULL, NULL }, - { SACHEN_8259B, NES_WRITEONLY(s8259_l_w), NES_WRITEONLY(s8259_m_w), NES_NOACCESS, NULL, NULL, NULL }, - { SACHEN_8259C, NES_WRITEONLY(s8259_l_w), NES_WRITEONLY(s8259_m_w), NES_NOACCESS, NULL, NULL, NULL }, - { SACHEN_8259D, NES_WRITEONLY(s8259_l_w), NES_WRITEONLY(s8259_m_w), NES_NOACCESS, NULL, NULL, NULL }, - { SACHEN_SA009, NES_WRITEONLY(sa009_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, - { SACHEN_SA0036, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(sa0036_w), NULL, NULL, NULL }, - { SACHEN_SA0037, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(sa0037_w), NULL, NULL, NULL }, - { SACHEN_SA72007, NES_WRITEONLY(sa72007_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, - { SACHEN_SA72008, NES_WRITEONLY(sa72008_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, - { SACHEN_TCA01, NES_READONLY(tca01_l_r), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, - { SACHEN_TCU01, NES_WRITEONLY(tcu01_l_w), NES_WRITEONLY(tcu01_m_w), NES_WRITEONLY(tcu01_w), NULL, NULL, NULL }, - { SACHEN_TCU02, {FUNC(tcu02_l_w), FUNC(tcu02_l_r)}, NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, - { SUBOR_TYPE0, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(subor0_w), NULL, NULL, NULL }, - { SUBOR_TYPE1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(subor1_w), NULL, NULL, NULL }, - { MAGICSERIES_MD, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(magics_md_w), NULL, NULL, NULL }, - { NANJING_BOARD, {FUNC(nanjing_l_w), FUNC(nanjing_l_r)}, NES_NOACCESS, NES_NOACCESS, NULL, NULL, nanjing_irq }, - { NITRA_TDA, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nitra_w), NULL, NULL, mmc3_irq }, - { NTDEC_ASDER, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(ntdec_asder_w), NULL, NULL, NULL }, - { NTDEC_FIGHTINGHERO, NES_NOACCESS, NES_WRITEONLY(ntdec_fh_m_w), NES_NOACCESS, NULL, NULL, NULL }, - { OPENCORP_DAOU306, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(daou306_w), NULL, NULL, NULL }, - { RCM_GS2015, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(gs2015_w), NULL, NULL, NULL }, - { RCM_TETRISFAMILY, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(rcm_tf_w), NULL, NULL, NULL }, - { REXSOFT_DBZ5, {FUNC(rex_dbz_l_w), FUNC(rex_dbz_l_r)}, NES_READONLY(rex_dbz_l_r), NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, - { REXSOFT_SL1632, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(rex_sl1632_w), NULL, NULL, mmc3_irq }, - { RUMBLESTATION_BOARD, NES_NOACCESS, NES_WRITEONLY(rumblestation_m_w), NES_WRITEONLY(rumblestation_w), NULL, NULL, NULL }, - { SOMERI_SL12, NES_WRITEONLY(someri_l_w), NES_NOACCESS, NES_WRITEONLY(someri_w), NULL, NULL, mmc3_irq }, - { SUPERGAME_BOOGERMAN, NES_WRITEONLY(sgame_boog_l_w), NES_WRITEONLY(sgame_boog_m_w), NES_WRITEONLY(sgame_boog_w), NULL, NULL, mmc3_irq }, - { SUPERGAME_LIONKING, NES_NOACCESS, NES_WRITEONLY(sgame_lion_m_w), NES_WRITEONLY(sgame_lion_w), NULL, NULL, mmc3_irq }, - { TENGEN_800008, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(tengen_800008_w), NULL, NULL, NULL }, - { TENGEN_800032, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(tengen_800032_w), NULL, NULL, tengen_800032_irq }, - { TENGEN_800037, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(tengen_800037_w), NULL, NULL, tengen_800032_irq }, - { TXC_22211A, {FUNC(txc_22211_l_w), FUNC(txc_22211_l_r)}, NES_NOACCESS, NES_WRITEONLY(txc_22211_w), NULL, NULL, NULL }, - { TXC_22211B, {FUNC(txc_22211_l_w), FUNC(txc_22211_l_r)}, NES_NOACCESS, NES_WRITEONLY(txc_22211b_w), NULL, NULL, NULL }, - { TXC_22211C, {FUNC(txc_22211_l_w), FUNC(txc_22211c_l_r)}, NES_NOACCESS, NES_WRITEONLY(txc_22211_w), NULL, NULL, NULL }, - { TXC_TW, NES_WRITEONLY(txc_tw_l_w), NES_WRITEONLY(txc_tw_m_w), NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, - { TXC_STRIKEWOLF, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(txc_strikewolf_w), NULL, NULL, NULL }, - { TXC_MXMDHTWO, NES_READONLY(txc_mxmdhtwo_l_r), NES_NOACCESS, NES_WRITEONLY(txc_mxmdhtwo_w), NULL, NULL, NULL }, - { WAIXING_TYPE_A, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(waixing_a_w), NULL, NULL, mmc3_irq }, - { WAIXING_TYPE_A_1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(waixing_a_w), NULL, NULL, mmc3_irq }, - { WAIXING_TYPE_B, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(waixing_a_w), NULL, NULL, mmc3_irq }, - { WAIXING_TYPE_C, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(waixing_a_w), NULL, NULL, mmc3_irq }, - { WAIXING_TYPE_D, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(waixing_a_w), NULL, NULL, mmc3_irq }, - { WAIXING_TYPE_E, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(waixing_a_w), NULL, NULL, mmc3_irq }, - { WAIXING_TYPE_F, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(waixing_f_w), NULL, NULL, mmc3_irq }, - { WAIXING_TYPE_G, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(waixing_g_w), NULL, NULL, mmc3_irq }, - { WAIXING_TYPE_H, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(waixing_h_w), NULL, NULL, mmc3_irq }, - { WAIXING_TYPE_I, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, // this is MMC3 + possibly additional WRAM added in 0x5000-0x5fff - { WAIXING_TYPE_J, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, // this is MMC3 + possibly additional WRAM added in 0x5000-0x5fff - { WAIXING_SGZ, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(waixing_sgz_w), NULL, NULL, konami_irq }, - { WAIXING_SGZLZ, NES_WRITEONLY(waixing_sgzlz_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, - { WAIXING_FFV, NES_WRITEONLY(waixing_ffv_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, - { WAIXING_ZS, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(waixing_zs_w), NULL, NULL, NULL }, - { WAIXING_DQ8, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(waixing_dq8_w), NULL, NULL, NULL }, - { WAIXING_SECURITY, NES_WRITEONLY(waixing_sec_l_w), NES_NOACCESS, NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, - { WAIXING_SH2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, // this is MMC3 + possibly additional WRAM added in 0x5000-0x5fff - { WAIXING_PS2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(waixing_ps2_w), NULL, NULL, NULL }, - { UNL_8237, NES_WRITEONLY(unl_8237_l_w), NES_NOACCESS, NES_WRITEONLY(unl_8237_w), NULL, NULL, mmc3_irq }, - { UNL_AX5705, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(unl_ax5705_w), NULL, NULL, NULL }, - { UNL_CC21, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(unl_cc21_w), NULL, NULL, NULL }, - { UNL_KOF97, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(unl_kof97_w), NULL, NULL, mmc3_irq }, - { UNL_KS7057, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(ks7057_w), NULL, NULL, mmc3_irq }, - { UNL_T230, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(unl_t230_w), NULL, NULL, konami_irq }, - { UNL_KOF96, {FUNC(kof96_l_w), FUNC(kof96_l_r)}, NES_NOACCESS, NES_WRITEONLY(kof96_w), NULL, NULL, mmc3_irq }, - { UNL_MK2, NES_NOACCESS, NES_WRITEONLY(mk2_m_w), NES_NOACCESS, NULL, NULL, mmc3_irq }, - { UNL_N625092, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(n625092_w), NULL, NULL, NULL }, - { UNL_SC127, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(sc127_w), NULL, NULL, sc127_irq }, - { UNL_SMB2J, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(smb2j_w), NULL, NULL, NULL }, - { UNL_SUPERFIGHTER3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(unl_sf3_w), NULL, NULL, mmc3_irq }, - { UNL_XZY, NES_WRITEONLY(unl_xzy_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, - { UNL_RACERMATE, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(unl_racmate_w), NULL, NULL, NULL }, - { UNL_STUDYNGAME, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(sng32_w), NULL, NULL, NULL }, - { UNL_603_5052, {FUNC(unl_6035052_extra_w), FUNC(unl_6035052_extra_r)}, {FUNC(unl_6035052_extra_w), FUNC(unl_6035052_extra_r)}, NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, - { UNL_EDU2K, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(edu2k_w), NULL, NULL, NULL }, - { UNL_SHJY3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(shjy3_w), NULL, NULL, shjy3_irq }, - { UNL_H2288, {FUNC(h2288_l_w), FUNC(h2288_l_r)}, NES_NOACCESS, NES_WRITEONLY(h2288_w), NULL, NULL, mmc3_irq }, - { UNL_FS304, NES_WRITEONLY(unl_fs304_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, + { AGCI_50282, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::agci_50282_w), NULL, NULL, NULL }, + { ACTENT_ACT52, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::ae_act52_w), NULL, NULL, NULL }, + { AVE_NINA01, NES_NOACCESS, NES_WRITEONLY(nes_state::nina01_m_w), NES_NOACCESS, NULL, NULL, NULL }, + { AVE_NINA06, NES_WRITEONLY(nes_state::nina06_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, + { CNE_DECATHLON, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::cne_decathl_w), NULL, NULL, NULL }, + { CNE_FSB, NES_NOACCESS, NES_WRITEONLY(nes_state::cne_fsb_m_w), NES_NOACCESS, NULL, NULL, NULL }, + { CNE_SHLZ, NES_WRITEONLY(nes_state::cne_shlz_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, + { CALTRON_6IN1, NES_NOACCESS, NES_WRITEONLY(nes_state::caltron6in1_m_w), NES_WRITEONLY(nes_state::caltron6in1_w), NULL, NULL, NULL }, + { CAMERICA_BF9093, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bf9093_w), NULL, NULL, NULL }, + { CAMERICA_BF9097, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bf9093_w), NULL, NULL, NULL }, + { CAMERICA_BF9096, NES_NOACCESS, NES_WRITEONLY(nes_state::bf9096_w), NES_WRITEONLY(nes_state::bf9096_w), NULL, NULL, NULL }, + { CAMERICA_GOLDENFIVE, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::golden5_w), NULL, NULL, NULL }, + { CONY_BOARD, {write8_delegate(FUNC(nes_state::cony_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::cony_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::cony_w), NULL, NULL, sunsoft3_irq }, + { YOKO_BOARD, {write8_delegate(FUNC(nes_state::yoko_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::yoko_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::yoko_w), NULL, NULL, sunsoft3_irq }, + { DREAMTECH_BOARD, NES_WRITEONLY(nes_state::dreamtech_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, + { FUTUREMEDIA_BOARD, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::futuremedia_w), NULL, NULL, futuremedia_irq }, + { FUKUTAKE_BOARD, {write8_delegate(FUNC(nes_state::fukutake_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::fukutake_l_r),(nes_state *)0)}, NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, + { GOUDER_37017, {write8_delegate(FUNC(nes_state::gouder_sf4_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::gouder_sf4_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, + { HENGEDIANZI_BOARD, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::henggedianzi_w), NULL, NULL, NULL }, + { HENGEDIANZI_XJZB, NES_WRITEONLY(nes_state::heng_xjzb_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::heng_xjzb_w), NULL, NULL, NULL }, + { HES6IN1_BOARD, NES_WRITEONLY(nes_state::hes6in1_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, + { HES_BOARD, NES_WRITEONLY(nes_state::hes_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, + { HOSENKAN_BOARD, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::hosenkan_w), NULL, NULL, mmc3_irq }, + { KAISER_KS7058, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::ks7058_w), NULL, NULL, NULL }, + { KAISER_KS7022, NES_NOACCESS, NES_NOACCESS, {write8_delegate(FUNC(nes_state::ks7022_w),(nes_state *)0), read8_delegate(FUNC(nes_state::ks7022_r),(nes_state *)0)}, NULL, NULL, NULL }, + { KAISER_KS7032, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::ks7032_w), NULL, NULL, ks7032_irq }, + { KAISER_KS202, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::ks202_w), NULL, NULL, ks7032_irq }, + { KAISER_KS7017, NES_WRITEONLY(nes_state::ks7017_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, mmc_fds_irq }, + { KAY_PANDAPRINCE, {write8_delegate(FUNC(nes_state::kay_pp_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::kay_pp_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::kay_pp_w), NULL, NULL, mmc3_irq }, + { KASING_BOARD, NES_NOACCESS, NES_WRITEONLY(nes_state::kasing_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, + { SACHEN_74LS374, {write8_delegate(FUNC(nes_state::sachen_74x374_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::sachen_74x374_l_r),(nes_state *)0)}, NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, + { SACHEN_74LS374_A, NES_WRITEONLY(nes_state::sachen_74x374a_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, + { SACHEN_8259A, NES_WRITEONLY(nes_state::s8259_l_w), NES_WRITEONLY(nes_state::s8259_m_w), NES_NOACCESS, NULL, NULL, NULL }, + { SACHEN_8259B, NES_WRITEONLY(nes_state::s8259_l_w), NES_WRITEONLY(nes_state::s8259_m_w), NES_NOACCESS, NULL, NULL, NULL }, + { SACHEN_8259C, NES_WRITEONLY(nes_state::s8259_l_w), NES_WRITEONLY(nes_state::s8259_m_w), NES_NOACCESS, NULL, NULL, NULL }, + { SACHEN_8259D, NES_WRITEONLY(nes_state::s8259_l_w), NES_WRITEONLY(nes_state::s8259_m_w), NES_NOACCESS, NULL, NULL, NULL }, + { SACHEN_SA009, NES_WRITEONLY(nes_state::sa009_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, + { SACHEN_SA0036, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sa0036_w), NULL, NULL, NULL }, + { SACHEN_SA0037, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sa0037_w), NULL, NULL, NULL }, + { SACHEN_SA72007, NES_WRITEONLY(nes_state::sa72007_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, + { SACHEN_SA72008, NES_WRITEONLY(nes_state::sa72008_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, + { SACHEN_TCA01, NES_READONLY(nes_state::tca01_l_r), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, + { SACHEN_TCU01, NES_WRITEONLY(nes_state::tcu01_l_w), NES_WRITEONLY(nes_state::tcu01_m_w), NES_WRITEONLY(nes_state::tcu01_w), NULL, NULL, NULL }, + { SACHEN_TCU02, {write8_delegate(FUNC(nes_state::tcu02_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::tcu02_l_r),(nes_state *)0)}, NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, + { SUBOR_TYPE0, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::subor0_w), NULL, NULL, NULL }, + { SUBOR_TYPE1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::subor1_w), NULL, NULL, NULL }, + { MAGICSERIES_MD, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::magics_md_w), NULL, NULL, NULL }, + { NANJING_BOARD, {write8_delegate(FUNC(nes_state::nanjing_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::nanjing_l_r),(nes_state *)0)}, NES_NOACCESS, NES_NOACCESS, NULL, NULL, nanjing_irq }, + { NITRA_TDA, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::nitra_w), NULL, NULL, mmc3_irq }, + { NTDEC_ASDER, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::ntdec_asder_w), NULL, NULL, NULL }, + { NTDEC_FIGHTINGHERO, NES_NOACCESS, NES_WRITEONLY(nes_state::ntdec_fh_m_w), NES_NOACCESS, NULL, NULL, NULL }, + { OPENCORP_DAOU306, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::daou306_w), NULL, NULL, NULL }, + { RCM_GS2015, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::gs2015_w), NULL, NULL, NULL }, + { RCM_TETRISFAMILY, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::rcm_tf_w), NULL, NULL, NULL }, + { REXSOFT_DBZ5, {write8_delegate(FUNC(nes_state::rex_dbz_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::rex_dbz_l_r),(nes_state *)0)}, NES_READONLY(nes_state::rex_dbz_l_r), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, + { REXSOFT_SL1632, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::rex_sl1632_w), NULL, NULL, mmc3_irq }, + { RUMBLESTATION_BOARD, NES_NOACCESS, NES_WRITEONLY(nes_state::rumblestation_m_w), NES_WRITEONLY(nes_state::rumblestation_w), NULL, NULL, NULL }, + { SOMERI_SL12, NES_WRITEONLY(nes_state::someri_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::someri_w), NULL, NULL, mmc3_irq }, + { SUPERGAME_BOOGERMAN, NES_WRITEONLY(nes_state::sgame_boog_l_w), NES_WRITEONLY(nes_state::sgame_boog_m_w), NES_WRITEONLY(nes_state::sgame_boog_w), NULL, NULL, mmc3_irq }, + { SUPERGAME_LIONKING, NES_NOACCESS, NES_WRITEONLY(nes_state::sgame_lion_m_w), NES_WRITEONLY(nes_state::sgame_lion_w), NULL, NULL, mmc3_irq }, + { TENGEN_800008, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::tengen_800008_w), NULL, NULL, NULL }, + { TENGEN_800032, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::tengen_800032_w), NULL, NULL, tengen_800032_irq }, + { TENGEN_800037, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::tengen_800037_w), NULL, NULL, tengen_800032_irq }, + { TXC_22211A, {write8_delegate(FUNC(nes_state::txc_22211_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::txc_22211_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::txc_22211_w), NULL, NULL, NULL }, + { TXC_22211B, {write8_delegate(FUNC(nes_state::txc_22211_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::txc_22211_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::txc_22211b_w), NULL, NULL, NULL }, + { TXC_22211C, {write8_delegate(FUNC(nes_state::txc_22211_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::txc_22211c_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::txc_22211_w), NULL, NULL, NULL }, + { TXC_TW, NES_WRITEONLY(nes_state::txc_tw_l_w), NES_WRITEONLY(nes_state::txc_tw_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, + { TXC_STRIKEWOLF, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::txc_strikewolf_w), NULL, NULL, NULL }, + { TXC_MXMDHTWO, NES_READONLY(nes_state::txc_mxmdhtwo_l_r), NES_NOACCESS, NES_WRITEONLY(nes_state::txc_mxmdhtwo_w), NULL, NULL, NULL }, + { WAIXING_TYPE_A, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_a_w), NULL, NULL, mmc3_irq }, + { WAIXING_TYPE_A_1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_a_w), NULL, NULL, mmc3_irq }, + { WAIXING_TYPE_B, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_a_w), NULL, NULL, mmc3_irq }, + { WAIXING_TYPE_C, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_a_w), NULL, NULL, mmc3_irq }, + { WAIXING_TYPE_D, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_a_w), NULL, NULL, mmc3_irq }, + { WAIXING_TYPE_E, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_a_w), NULL, NULL, mmc3_irq }, + { WAIXING_TYPE_F, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_f_w), NULL, NULL, mmc3_irq }, + { WAIXING_TYPE_G, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_g_w), NULL, NULL, mmc3_irq }, + { WAIXING_TYPE_H, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_h_w), NULL, NULL, mmc3_irq }, + { WAIXING_TYPE_I, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, // this is MMC3 + possibly additional WRAM added in 0x5000-0x5fff + { WAIXING_TYPE_J, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, // this is MMC3 + possibly additional WRAM added in 0x5000-0x5fff + { WAIXING_SGZ, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_sgz_w), NULL, NULL, konami_irq }, + { WAIXING_SGZLZ, NES_WRITEONLY(nes_state::waixing_sgzlz_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, + { WAIXING_FFV, NES_WRITEONLY(nes_state::waixing_ffv_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, + { WAIXING_ZS, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_zs_w), NULL, NULL, NULL }, + { WAIXING_DQ8, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_dq8_w), NULL, NULL, NULL }, + { WAIXING_SECURITY, NES_WRITEONLY(nes_state::waixing_sec_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, + { WAIXING_SH2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, // this is MMC3 + possibly additional WRAM added in 0x5000-0x5fff + { WAIXING_PS2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_ps2_w), NULL, NULL, NULL }, + { UNL_8237, NES_WRITEONLY(nes_state::unl_8237_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::unl_8237_w), NULL, NULL, mmc3_irq }, + { UNL_AX5705, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::unl_ax5705_w), NULL, NULL, NULL }, + { UNL_CC21, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::unl_cc21_w), NULL, NULL, NULL }, + { UNL_KOF97, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::unl_kof97_w), NULL, NULL, mmc3_irq }, + { UNL_KS7057, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::ks7057_w), NULL, NULL, mmc3_irq }, + { UNL_T230, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::unl_t230_w), NULL, NULL, konami_irq }, + { UNL_KOF96, {write8_delegate(FUNC(nes_state::kof96_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::kof96_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::kof96_w), NULL, NULL, mmc3_irq }, + { UNL_MK2, NES_NOACCESS, NES_WRITEONLY(nes_state::mk2_m_w), NES_NOACCESS, NULL, NULL, mmc3_irq }, + { UNL_N625092, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::n625092_w), NULL, NULL, NULL }, + { UNL_SC127, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sc127_w), NULL, NULL, sc127_irq }, + { UNL_SMB2J, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::smb2j_w), NULL, NULL, NULL }, + { UNL_SUPERFIGHTER3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::unl_sf3_w), NULL, NULL, mmc3_irq }, + { UNL_XZY, NES_WRITEONLY(nes_state::unl_xzy_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, + { UNL_RACERMATE, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::unl_racmate_w), NULL, NULL, NULL }, + { UNL_STUDYNGAME, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sng32_w), NULL, NULL, NULL }, + { UNL_603_5052, {write8_delegate(FUNC(nes_state::unl_6035052_extra_w),(nes_state *)0), read8_delegate(FUNC(nes_state::unl_6035052_extra_r),(nes_state *)0)}, {write8_delegate(FUNC(nes_state::unl_6035052_extra_w),(nes_state *)0), read8_delegate(FUNC(nes_state::unl_6035052_extra_r),(nes_state *)0)}, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, + { UNL_EDU2K, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::edu2k_w), NULL, NULL, NULL }, + { UNL_SHJY3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::shjy3_w), NULL, NULL, shjy3_irq }, + { UNL_H2288, {write8_delegate(FUNC(nes_state::h2288_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::h2288_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::h2288_w), NULL, NULL, mmc3_irq }, + { UNL_FS304, NES_WRITEONLY(nes_state::unl_fs304_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, // - { BTL_AISENSHINICOL, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(btl_mariobaby_w), NULL, NULL, NULL }, - { BTL_DRAGONNINJA, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(btl_dn_w), NULL, NULL, btl_dn_irq }, - { BTL_MARIOBABY, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(btl_mariobaby_w), NULL, NULL, NULL }, - { BTL_SMB2A, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(btl_smb2a_w), NULL, NULL, btl_smb2a_irq }, - { BTL_SMB2B, NES_WRITEONLY(smb2jb_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, smb2jb_irq }, - { BTL_SMB3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(btl_smb3_w), NULL, NULL, btl_smb3_irq }, - { BTL_SUPERBROS11, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(btl_smb11_w), NULL, NULL, mmc3_irq }, - { BTL_TOBIDASE, NES_WRITEONLY(btl_tobi_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, - { BTL_PIKACHUY2K, NES_NOACCESS, {FUNC(btl_pika_y2k_m_w), FUNC(btl_pika_y2k_m_r)}, NES_WRITEONLY(btl_pika_y2k_w), NULL, NULL, mmc3_irq }, - { WHIRLWIND_2706, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(whirl2706_w), NULL, NULL, NULL }, + { BTL_AISENSHINICOL, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::btl_mariobaby_w), NULL, NULL, NULL }, + { BTL_DRAGONNINJA, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::btl_dn_w), NULL, NULL, btl_dn_irq }, + { BTL_MARIOBABY, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::btl_mariobaby_w), NULL, NULL, NULL }, + { BTL_SMB2A, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::btl_smb2a_w), NULL, NULL, btl_smb2a_irq }, + { BTL_SMB2B, NES_WRITEONLY(nes_state::smb2jb_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, smb2jb_irq }, + { BTL_SMB3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::btl_smb3_w), NULL, NULL, btl_smb3_irq }, + { BTL_SUPERBROS11, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::btl_smb11_w), NULL, NULL, mmc3_irq }, + { BTL_TOBIDASE, NES_WRITEONLY(nes_state::btl_tobi_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, + { BTL_PIKACHUY2K, NES_NOACCESS, {write8_delegate(FUNC(nes_state::btl_pika_y2k_m_w),(nes_state *)0), read8_delegate(FUNC(nes_state::btl_pika_y2k_m_r),(nes_state *)0)}, NES_WRITEONLY(nes_state::btl_pika_y2k_w), NULL, NULL, mmc3_irq }, + { WHIRLWIND_2706, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::whirl2706_w), NULL, NULL, NULL }, // - { BMC_190IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_190in1_w), NULL, NULL, NULL }, - { BMC_A65AS, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_a65as_w), NULL, NULL, NULL }, - { BMC_GS2004, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_gs2004_w), NULL, NULL, NULL }, - { BMC_GS2013, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_gs2013_w), NULL, NULL, NULL }, - { BMC_NOVELDIAMOND, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(novel1_w), NULL, NULL, NULL }, - { BMC_9999999IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(novel2_w), NULL, NULL, NULL }, - { BMC_T262, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_t262_w), NULL, NULL, NULL }, - { BMC_WS, NES_NOACCESS, NES_WRITEONLY(bmc_ws_m_w), NES_NOACCESS, NULL, NULL, NULL }, - { BMC_GKA, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_gka_w), NULL, NULL, NULL }, - { BMC_GKB, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_gkb_w), NULL, NULL, NULL }, - { BMC_SUPER_700IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_super700in1_w), NULL, NULL, NULL }, - { BMC_36IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_36in1_w), NULL, NULL, NULL }, - { BMC_21IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_21in1_w), NULL, NULL, NULL }, - { BMC_150IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_150in1_w), NULL, NULL, NULL }, - { BMC_35IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_35in1_w), NULL, NULL, NULL }, - { BMC_64IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_64in1_w), NULL, NULL, NULL }, - { BMC_SUPERHIK_300IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_hik300_w), NULL, NULL, NULL }, - { BMC_SUPERGUN_20IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(supergun20in1_w), NULL, NULL, NULL }, - { BMC_72IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_72in1_w), NULL, NULL, NULL }, - { BMC_76IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_76in1_w), NULL, NULL, NULL }, - { BMC_SUPER_42IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_76in1_w), NULL, NULL, NULL }, - { BMC_1200IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_1200in1_w), NULL, NULL, NULL }, - { BMC_31IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_31in1_w), NULL, NULL, NULL }, - { BMC_22GAMES, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_22g_w), NULL, NULL, NULL }, - { BMC_20IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_20in1_w), NULL, NULL, NULL }, - { BMC_110IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_110in1_w), NULL, NULL, NULL }, - { BMC_64IN1NR, NES_WRITEONLY(bmc_64in1nr_l_w), NES_NOACCESS, NES_WRITEONLY(bmc_64in1nr_w), NULL, NULL, NULL }, - { BMC_S24IN1SC03, NES_WRITEONLY(bmc_s24in1sc03_l_w), NES_NOACCESS, NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, - { BMC_HIK8IN1, NES_NOACCESS, NES_WRITEONLY(bmc_hik8_m_w), NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, - { BMC_SUPERHIK_4IN1, NES_NOACCESS, NES_WRITEONLY(bmc_hik4in1_m_w), NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, - { BMC_SUPERBIG_7IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_sbig7_w), NULL, NULL, mmc3_irq }, - { BMC_MARIOPARTY_7IN1, NES_NOACCESS, NES_WRITEONLY(bmc_mario7in1_m_w), NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, - { BMC_GOLD_7IN1, NES_NOACCESS, NES_WRITEONLY(bmc_gold7in1_m_w), NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, - { BMC_FAMILY_4646B, NES_NOACCESS, NES_WRITEONLY(bmc_family4646_m_w), NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, - { BMC_15IN1, NES_NOACCESS, NES_WRITEONLY(bmc_15in1_m_w), NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, - { BMC_BALLGAMES_11IN1, NES_NOACCESS, NES_WRITEONLY(bmc_ball11_m_w), NES_WRITEONLY(bmc_ball11_w), NULL, NULL, NULL }, - { BMC_GOLDENCARD_6IN1, NES_WRITEONLY(bmc_gc6in1_l_w), NES_NOACCESS, NES_WRITEONLY(bmc_gc6in1_w), NULL, NULL, mmc3_irq }, - { BMC_VT5201, NES_NOACCESS, NES_NOACCESS, {FUNC(bmc_vt5201_w), FUNC(bmc_vt5201_r)}, NULL, NULL, NULL }, - { BMC_BENSHENG_BS5, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_bs5_w), NULL, NULL, NULL }, - { BMC_810544, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_810544_w), NULL, NULL, NULL }, - { BMC_NTD_03, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(bmc_ntd03_w), NULL, NULL, NULL }, - { BMC_G63IN1, NES_NOACCESS, NES_NOACCESS, {FUNC(bmc_gb63_w), FUNC(bmc_gb63_r)}, NULL, NULL, NULL }, - { BMC_FK23C, NES_WRITEONLY(fk23c_l_w), NES_NOACCESS, NES_WRITEONLY(fk23c_w), NULL, NULL, mmc3_irq }, - { BMC_FK23CA, NES_WRITEONLY(fk23c_l_w), NES_NOACCESS, NES_WRITEONLY(fk23c_w), NULL, NULL, mmc3_irq }, - { BMC_PJOY84, NES_NOACCESS, NES_WRITEONLY(pjoy84_m_w), NES_WRITEONLY(txrom_w), NULL, NULL, mmc3_irq }, + { BMC_190IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_190in1_w), NULL, NULL, NULL }, + { BMC_A65AS, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_a65as_w), NULL, NULL, NULL }, + { BMC_GS2004, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_gs2004_w), NULL, NULL, NULL }, + { BMC_GS2013, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_gs2013_w), NULL, NULL, NULL }, + { BMC_NOVELDIAMOND, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::novel1_w), NULL, NULL, NULL }, + { BMC_9999999IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::novel2_w), NULL, NULL, NULL }, + { BMC_T262, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_t262_w), NULL, NULL, NULL }, + { BMC_WS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_ws_m_w), NES_NOACCESS, NULL, NULL, NULL }, + { BMC_GKA, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_gka_w), NULL, NULL, NULL }, + { BMC_GKB, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_gkb_w), NULL, NULL, NULL }, + { BMC_SUPER_700IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_super700in1_w), NULL, NULL, NULL }, + { BMC_36IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_36in1_w), NULL, NULL, NULL }, + { BMC_21IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_21in1_w), NULL, NULL, NULL }, + { BMC_150IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_150in1_w), NULL, NULL, NULL }, + { BMC_35IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_35in1_w), NULL, NULL, NULL }, + { BMC_64IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_64in1_w), NULL, NULL, NULL }, + { BMC_SUPERHIK_300IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_hik300_w), NULL, NULL, NULL }, + { BMC_SUPERGUN_20IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::supergun20in1_w), NULL, NULL, NULL }, + { BMC_72IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_72in1_w), NULL, NULL, NULL }, + { BMC_76IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_76in1_w), NULL, NULL, NULL }, + { BMC_SUPER_42IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_76in1_w), NULL, NULL, NULL }, + { BMC_1200IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_1200in1_w), NULL, NULL, NULL }, + { BMC_31IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_31in1_w), NULL, NULL, NULL }, + { BMC_22GAMES, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_22g_w), NULL, NULL, NULL }, + { BMC_20IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_20in1_w), NULL, NULL, NULL }, + { BMC_110IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_110in1_w), NULL, NULL, NULL }, + { BMC_64IN1NR, NES_WRITEONLY(nes_state::bmc_64in1nr_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_64in1nr_w), NULL, NULL, NULL }, + { BMC_S24IN1SC03, NES_WRITEONLY(nes_state::bmc_s24in1sc03_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, + { BMC_HIK8IN1, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_hik8_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, + { BMC_SUPERHIK_4IN1, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_hik4in1_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, + { BMC_SUPERBIG_7IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_sbig7_w), NULL, NULL, mmc3_irq }, + { BMC_MARIOPARTY_7IN1, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_mario7in1_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, + { BMC_GOLD_7IN1, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_gold7in1_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, + { BMC_FAMILY_4646B, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_family4646_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, + { BMC_15IN1, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_15in1_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, + { BMC_BALLGAMES_11IN1, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_ball11_m_w), NES_WRITEONLY(nes_state::bmc_ball11_w), NULL, NULL, NULL }, + { BMC_GOLDENCARD_6IN1, NES_WRITEONLY(nes_state::bmc_gc6in1_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_gc6in1_w), NULL, NULL, mmc3_irq }, + { BMC_VT5201, NES_NOACCESS, NES_NOACCESS, {write8_delegate(FUNC(nes_state::bmc_vt5201_w),(nes_state *)0), read8_delegate(FUNC(nes_state::bmc_vt5201_r),(nes_state *)0)}, NULL, NULL, NULL }, + { BMC_BENSHENG_BS5, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_bs5_w), NULL, NULL, NULL }, + { BMC_810544, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_810544_w), NULL, NULL, NULL }, + { BMC_NTD_03, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_ntd03_w), NULL, NULL, NULL }, + { BMC_G63IN1, NES_NOACCESS, NES_NOACCESS, {write8_delegate(FUNC(nes_state::bmc_gb63_w),(nes_state *)0), read8_delegate(FUNC(nes_state::bmc_gb63_r),(nes_state *)0)}, NULL, NULL, NULL }, + { BMC_FK23C, NES_WRITEONLY(nes_state::fk23c_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::fk23c_w), NULL, NULL, mmc3_irq }, + { BMC_FK23CA, NES_WRITEONLY(nes_state::fk23c_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::fk23c_w), NULL, NULL, mmc3_irq }, + { BMC_PJOY84, NES_NOACCESS, NES_WRITEONLY(nes_state::pjoy84_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, // - { FFE_MAPPER6, NES_WRITEONLY(mapper6_l_w), NES_NOACCESS, NES_WRITEONLY(mapper6_w), NULL, NULL, ffe_irq }, - { FFE_MAPPER8, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(mapper8_w), NULL, NULL, NULL }, - { FFE_MAPPER17, NES_WRITEONLY(mapper17_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, ffe_irq }, + { FFE_MAPPER6, NES_WRITEONLY(nes_state::mapper6_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::mapper6_w), NULL, NULL, ffe_irq }, + { FFE_MAPPER8, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::mapper8_w), NULL, NULL, NULL }, + { FFE_MAPPER17, NES_WRITEONLY(nes_state::mapper17_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, ffe_irq }, // for debug and development - { UNKNOWN_BOARD, {FUNC(dummy_l_w), FUNC(dummy_l_r)}, {FUNC(dummy_m_w), FUNC(dummy_m_r)}, {FUNC(dummy_w), FUNC(dummy_r)}, NULL, NULL, NULL }, + { UNKNOWN_BOARD, {write8_delegate(FUNC(nes_state::dummy_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::dummy_l_r),(nes_state *)0)}, {write8_delegate(FUNC(nes_state::dummy_m_w),(nes_state *)0), read8_delegate(FUNC(nes_state::dummy_m_r),(nes_state *)0)}, {write8_delegate(FUNC(nes_state::dummy_w),(nes_state *)0), read8_delegate(FUNC(nes_state::dummy_r),(nes_state *)0)}, NULL, NULL, NULL }, // { UNSUPPORTED_BOARD, NES_NOACCESS, NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, // @@ -12220,30 +12048,30 @@ void pcb_handlers_setup( running_machine &machine ) fatalerror("Missing PCB interface\n"); if (intf) - { + { state->m_mmc_write_low = intf->mmc_l.write; - state->m_mmc_write_low_name = intf->mmc_l.write_name; + if (!state->m_mmc_write_low.isnull()) state->m_mmc_write_low.late_bind(*state); state->m_mmc_write_mid = intf->mmc_m.write; - state->m_mmc_write_mid_name = intf->mmc_m.write_name; + if (!state->m_mmc_write_mid.isnull()) state->m_mmc_write_mid.late_bind(*state); state->m_mmc_write = intf->mmc_h.write; - state->m_mmc_write_name = intf->mmc_h.write_name; + if (!state->m_mmc_write.isnull()) state->m_mmc_write.late_bind(*state); state->m_mmc_read_low = intf->mmc_l.read; - state->m_mmc_read_low_name = intf->mmc_l.read_name; + if (!state->m_mmc_read_low.isnull()) state->m_mmc_read_low.late_bind(*state); state->m_mmc_read_mid = intf->mmc_m.read; // in progress - state->m_mmc_read_mid_name = intf->mmc_m.read_name; + if (!state->m_mmc_read_mid.isnull()) state->m_mmc_read_mid.late_bind(*state); state->m_mmc_read = intf->mmc_h.read; // in progress - state->m_mmc_read_name = intf->mmc_h.read_name; + if (!state->m_mmc_read.isnull()) state->m_mmc_read.late_bind(*state); state->m_ppu->set_latch(intf->mmc_ppu_latch); } else { logerror("PCB %d is not yet supported, defaulting to no mapper.\n", state->m_pcb_id); - state->m_mmc_write_low = NULL; - state->m_mmc_write_mid = NULL; - state->m_mmc_write = NULL; - state->m_mmc_read_low = NULL; - state->m_mmc_read_mid = NULL; // in progress - state->m_mmc_read = NULL; // in progress + state->m_mmc_write_low = write8_delegate(); + state->m_mmc_write_mid = write8_delegate(); + state->m_mmc_write = write8_delegate(); + state->m_mmc_read_low = read8_delegate(); + state->m_mmc_read_mid = read8_delegate(); // in progress + state->m_mmc_read = read8_delegate(); // in progress state->m_ppu->set_latch(NULL); }