diff --git a/src/devices/bus/lpci/i82439tx.cpp b/src/devices/bus/lpci/i82439tx.cpp index b4bebc8e233..39750f7cd7f 100644 --- a/src/devices/bus/lpci/i82439tx.cpp +++ b/src/devices/bus/lpci/i82439tx.cpp @@ -88,6 +88,10 @@ uint32_t i82439tx_device::pci_read(pci_bus_device *pcibus, int function, int off case 0x44: /* reserved */ case 0x48: /* reserved */ case 0x4C: /* reserved */ + logerror("i82439tx_pci_read(): Unemulated PCI read 0x%02X, returning 0\n", offset); + result = 0; + break; + case 0x50: case 0x54: case 0x58: @@ -167,12 +171,47 @@ void i82439tx_device::pci_write(pci_bus_device *pcibus, int function, int offset /* read only */ break; + case 0x58: + if ((mem_mask & 0x0000f000)) + i82439tx_configure_memory(data >> 12, 0xf0000, 0xfffff); + if ((mem_mask & 0x000f0000)) + i82439tx_configure_memory(data >> 16, 0xc0000, 0xc3fff); + if ((mem_mask & 0x00f00000)) + i82439tx_configure_memory(data >> 20, 0xc4000, 0xc7fff); + if ((mem_mask & 0x0f000000)) + i82439tx_configure_memory(data >> 24, 0xc8000, 0xccfff); + if ((mem_mask & 0xf0000000)) + i82439tx_configure_memory(data >> 28, 0xcc000, 0xcffff); + COMBINE_DATA(&m_regs[(offset - 0x50) / 4]); + break; + + case 0x5C: + if ((mem_mask & 0x0000000f)) + i82439tx_configure_memory(data >> 0, 0xd0000, 0xd3fff); + if ((mem_mask & 0x000000f0)) + i82439tx_configure_memory(data >> 4, 0xd4000, 0xd7fff); + if ((mem_mask & 0x00000f00)) + i82439tx_configure_memory(data >> 8, 0xd8000, 0xdbfff); + if ((mem_mask & 0x0000f000)) + i82439tx_configure_memory(data >> 12, 0xdc000, 0xdffff); + if ((mem_mask & 0x000f0000)) + i82439tx_configure_memory(data >> 16, 0xe0000, 0xe3fff); + if ((mem_mask & 0x00f00000)) + i82439tx_configure_memory(data >> 20, 0xe4000, 0xe7fff); + if ((mem_mask & 0x0f000000)) + i82439tx_configure_memory(data >> 24, 0xe8000, 0xecfff); + if ((mem_mask & 0xf0000000)) + i82439tx_configure_memory(data >> 28, 0xec000, 0xeffff); + COMBINE_DATA(&m_regs[(offset - 0x50) / 4]); + break; + case 0x04: /* PCI command register */ case 0x0C: + logerror("i82439tx_pci_write(): Unemulated PCI write 0x%02X = 0x%04X\n", offset, data); + break; + case 0x50: case 0x54: - case 0x58: - case 0x5C: case 0x60: case 0x64: case 0x68: @@ -213,41 +252,6 @@ void i82439tx_device::pci_write(pci_bus_device *pcibus, int function, int offset case 0xF4: case 0xF8: case 0xFC: - switch(offset) - { - case 0x58: - if ((mem_mask & 0x0000f000)) - i82439tx_configure_memory(data >> 12, 0xf0000, 0xfffff); - if ((mem_mask & 0x000f0000)) - i82439tx_configure_memory(data >> 16, 0xc0000, 0xc3fff); - if ((mem_mask & 0x00f00000)) - i82439tx_configure_memory(data >> 20, 0xc4000, 0xc7fff); - if ((mem_mask & 0x0f000000)) - i82439tx_configure_memory(data >> 24, 0xc8000, 0xccfff); - if ((mem_mask & 0xf0000000)) - i82439tx_configure_memory(data >> 28, 0xcc000, 0xcffff); - break; - - case 0x5C: - if ((mem_mask & 0x0000000f)) - i82439tx_configure_memory(data >> 0, 0xd0000, 0xd3fff); - if ((mem_mask & 0x000000f0)) - i82439tx_configure_memory(data >> 4, 0xd4000, 0xd7fff); - if ((mem_mask & 0x00000f00)) - i82439tx_configure_memory(data >> 8, 0xd8000, 0xdbfff); - if ((mem_mask & 0x0000f000)) - i82439tx_configure_memory(data >> 12, 0xdc000, 0xdffff); - if ((mem_mask & 0x000f0000)) - i82439tx_configure_memory(data >> 16, 0xe0000, 0xe3fff); - if ((mem_mask & 0x00f00000)) - i82439tx_configure_memory(data >> 20, 0xe4000, 0xe7fff); - if ((mem_mask & 0x0f000000)) - i82439tx_configure_memory(data >> 24, 0xe8000, 0xecfff); - if ((mem_mask & 0xf0000000)) - i82439tx_configure_memory(data >> 28, 0xec000, 0xeffff); - break; - } - assert(((offset - 0x50) / 4) >= 0 && ((offset - 0x50) / 4) < ARRAY_LENGTH(m_regs)); COMBINE_DATA(&m_regs[(offset - 0x50) / 4]); break;