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More opcodes tripped by Funky Ball ... (and no, it doesn't stop here)
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@ -170,6 +170,16 @@ static void I386OP(fpu_group_d9)(i386_state *cpustate) // Opcode 0xd9
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break;
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break;
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}
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}
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// FXCH
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case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
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{
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X87_REG t = ST(0);
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ST(0) = ST(modrm & 7);
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ST(modrm & 7) = t;
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CYCLES(cpustate,4);
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break;
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}
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case 0x20: // FCHS
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case 0x20: // FCHS
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{
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{
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ST(0).i ^= FPU_SIGN_BIT_DOUBLE;
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ST(0).i ^= FPU_SIGN_BIT_DOUBLE;
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@ -177,6 +187,17 @@ static void I386OP(fpu_group_d9)(i386_state *cpustate) // Opcode 0xd9
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break;
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break;
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}
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}
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case 0x24: // FTST
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{
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cpustate->fpu_status_word &= ~(FPU_C3 | FPU_C2 | FPU_C0);
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if(ST(0).f == 0.0)
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cpustate->fpu_status_word |= FPU_C3;
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if(ST(0).f < 0.0)
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cpustate->fpu_status_word |= FPU_C0;
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CYCLES(cpustate,4);
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break;
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}
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case 0x28: // FLD1
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case 0x28: // FLD1
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{
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{
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X87_REG t;
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X87_REG t;
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@ -194,6 +215,9 @@ static void I386OP(fpu_group_d9)(i386_state *cpustate) // Opcode 0xd9
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CYCLES(cpustate,1); // TODO
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CYCLES(cpustate,1); // TODO
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break;
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break;
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}
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}
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default:
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default:
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fatalerror("I386: FPU Op D9 %02X at %08X", modrm, cpustate->pc-2);
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fatalerror("I386: FPU Op D9 %02X at %08X", modrm, cpustate->pc-2);
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}
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}
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@ -273,12 +297,23 @@ static void I386OP(fpu_group_dc)(i386_state *cpustate) // Opcode 0xdc
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if (modrm < 0xc0)
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if (modrm < 0xc0)
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{
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{
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//UINT32 ea = GetEA(cpustate,modrm);
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UINT32 ea = GetEA(cpustate,modrm);
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switch ((modrm >> 3) & 0x7)
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switch ((modrm >> 3) & 0x7)
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{
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{
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case 6: /* FDIV double */
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X87_REG t;
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t.i = READ64(cpustate,ea);
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if(t.f)
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ST(0).f /= t.f;
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else
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fatalerror("FPU Op DC 6 Divide by zero unhandled exception");
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CYCLES(cpustate,73);
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break;
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default:
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default:
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fatalerror("I386: FPU Op DC %02X at %08X", modrm, cpustate->pc-2);
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printf("I386: FPU Op DC %02X at %08X", (modrm >> 3) & 0x7, cpustate->pc-2);
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}
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}
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}
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}
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else
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else
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@ -339,6 +374,17 @@ static void I386OP(fpu_group_dd)(i386_state *cpustate) // Opcode 0xdd
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break;
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break;
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}
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}
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case 3: // FSTP
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{
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X87_REG t;
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t.f = ST(0).f;
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WRITE64(cpustate,ea, t.i);
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FPU_POP(cpustate);
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CYCLES(cpustate,8);
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break;
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}
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case 7: // FSTSW
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case 7: // FSTSW
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{
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{
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WRITE16(cpustate,ea, (cpustate->fpu_status_word & ~FPU_STACK_TOP_MASK) | (cpustate->fpu_top << 10));
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WRITE16(cpustate,ea, (cpustate->fpu_status_word & ~FPU_STACK_TOP_MASK) | (cpustate->fpu_top << 10));
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@ -436,10 +482,20 @@ static void I386OP(fpu_group_df)(i386_state *cpustate) // Opcode 0xdf
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if (modrm < 0xc0)
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if (modrm < 0xc0)
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{
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{
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// UINT32 ea = GetEA(cpustate,modrm);
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UINT32 ea = GetEA(cpustate,modrm);
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switch ((modrm >> 3) & 0x7)
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switch ((modrm >> 3) & 0x7)
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{
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{
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case 5: // FILD
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{
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X87_REG t;
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t.f=(INT64)READ64(cpustate,ea);
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FPU_PUSH(cpustate,t);
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CYCLES(cpustate,10);
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break;
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}
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default:
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default:
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fatalerror("I386: FPU Op DF %02X at %08X", modrm, cpustate->pc-2);
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fatalerror("I386: FPU Op DF %02X at %08X", modrm, cpustate->pc-2);
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}
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}
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@ -8,7 +8,10 @@ Notes:
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It does: mov [ebx],ecx in there, where ebx is 0xfffxxxxx, but only lower
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It does: mov [ebx],ecx in there, where ebx is 0xfffxxxxx, but only lower
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16 bits are used so it ends up in reading at conventional work RAM.
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16 bits are used so it ends up in reading at conventional work RAM.
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CPU core bug?
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CPU core bug?
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- Trips 00019652: fld dword ptr [esp+4Ch] after it
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bp 0x182a8,ax = 1
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bp 0x18390,ax = 1
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bp 0x183a2,ax = 1
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bp 0x1b578,ax = 1
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Funky Ball
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Funky Ball
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dgPIX, 1998
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dgPIX, 1998
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@ -161,7 +164,7 @@ static UINT32 voodoo_0_pci_r(device_t *busdevice, device_t *device, int function
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funkball_state* state = device->machine().driver_data<funkball_state>();
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funkball_state* state = device->machine().driver_data<funkball_state>();
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UINT32 val = 0;
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UINT32 val = 0;
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printf("Voodoo[0] PCI R: %x\n", reg);
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printf("Voodoo PCI R: %x\n", reg);
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switch (reg)
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switch (reg)
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{
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{
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