diff --git a/.gitattributes b/.gitattributes index 7ed4e69da26..b868569894b 100644 --- a/.gitattributes +++ b/.gitattributes @@ -136,10 +136,6 @@ src/emu/cpu/i386/i386ops.h svneol=native#text/plain src/emu/cpu/i386/i486ops.c svneol=native#text/plain src/emu/cpu/i386/pentops.c svneol=native#text/plain src/emu/cpu/i386/x87ops.c svneol=native#text/plain -src/emu/cpu/i8051/8051dasm.c svneol=native#text/plain -src/emu/cpu/i8051/i8051.c svneol=native#text/plain -src/emu/cpu/i8051/i8051.h svneol=native#text/plain -src/emu/cpu/i8051/i8051ops.c svneol=native#text/plain src/emu/cpu/i8085/8085dasm.c svneol=native#text/plain src/emu/cpu/i8085/i8085.c svneol=native#text/plain src/emu/cpu/i8085/i8085.h svneol=native#text/plain @@ -276,6 +272,10 @@ src/emu/cpu/mc68hc11/mc68hc11.h svneol=native#text/plain src/emu/cpu/mcs48/mcs48.c svneol=native#text/plain src/emu/cpu/mcs48/mcs48.h svneol=native#text/plain src/emu/cpu/mcs48/mcs48dsm.c svneol=native#text/plain +src/emu/cpu/mcs51/mcs51.c svneol=native#text/plain +src/emu/cpu/mcs51/mcs51.h svneol=native#text/plain +src/emu/cpu/mcs51/mcs51dasm.c svneol=native#text/plain +src/emu/cpu/mcs51/mcs51ops.c svneol=native#text/plain src/emu/cpu/minx/minx.c svneol=native#text/plain src/emu/cpu/minx/minx.h svneol=native#text/plain src/emu/cpu/minx/minxd.c svneol=native#text/plain diff --git a/src/emu/cpu/cpu.mak b/src/emu/cpu/cpu.mak index 7e9ca57fb3f..dadc29d4134 100644 --- a/src/emu/cpu/cpu.mak +++ b/src/emu/cpu/cpu.mak @@ -665,14 +665,14 @@ CPUDEFS += -DHAS_I87C52=$(if $(filter I87C52,$(CPUS)),1,0) CPUDEFS += -DHAS_AT89C4051=$(if $(filter AT89C4051,$(CPUS)),1,0) ifneq ($(filter I8031 I8032 I8051 I8052 I8751 I8752 I80C31 I80C32 I80C51 I80C52 I87C51 I87C52 AT89C4051,$(CPUS)),) -OBJDIRS += $(CPUOBJ)/i8051 -CPUOBJS += $(CPUOBJ)/i8051/i8051.o -DBGOBJS += $(CPUOBJ)/i8051/8051dasm.o +OBJDIRS += $(CPUOBJ)/mcs51 +CPUOBJS += $(CPUOBJ)/mcs51/mcs51.o +DBGOBJS += $(CPUOBJ)/mcs51/mcs51dasm.o endif -$(CPUOBJ)/i8051/i8051.o: $(CPUSRC)/i8051/i8051.c \ - $(CPUSRC)/i8051/i8051.h \ - $(CPUSRC)/i8051/i8051ops.c +$(CPUOBJ)/mcs51/mcs51.o: $(CPUSRC)/mcs51/mcs51.c \ + $(CPUSRC)/mcs51/mcs51.h \ + $(CPUSRC)/mcs51/mcs51ops.c diff --git a/src/emu/cpu/i8051/i8051.c b/src/emu/cpu/mcs51/mcs51.c similarity index 94% rename from src/emu/cpu/i8051/i8051.c rename to src/emu/cpu/mcs51/mcs51.c index 04572db2594..0be098299d2 100644 --- a/src/emu/cpu/i8051/i8051.c +++ b/src/emu/cpu/mcs51/mcs51.c @@ -102,7 +102,7 @@ #include "debugger.h" #include "deprecat.h" -#include "i8051.h" +#include "mcs51.h" #define VERBOSE 1 @@ -1116,7 +1116,7 @@ void i8051_set_serial_rx_callback(int (*callback)(void)) OPCODES ***************************************************************************/ -#include "i8051ops.c" +#include "mcs51ops.c" static void execute_op(UINT8 op) @@ -1618,12 +1618,12 @@ static void mcs51_set_irq_line(int irqline, int state) switch( irqline ) { //External Interrupt 0 - case I8051_INT0_LINE: + case MCS51_INT0_LINE: //Line Asserted? if (state != CLEAR_LINE) { //Need cleared->active line transition? (Logical 1-0 Pulse on the line) - CLEAR->ASSERT Transition since INT0 active lo! if (GET_IT0) { - if (GET_BIT(tr_state, I8051_INT0_LINE)) + if (GET_BIT(tr_state, MCS51_INT0_LINE)) SET_IE0(1); } else @@ -1638,13 +1638,13 @@ static void mcs51_set_irq_line(int irqline, int state) break; //External Interrupt 1 - case I8051_INT1_LINE: + case MCS51_INT1_LINE: //Line Asserted? if (state != CLEAR_LINE) { //Need cleared->active line transition? (Logical 1-0 Pulse on the line) - CLEAR->ASSERT Transition since INT1 active lo! if(GET_IT1){ - if (GET_BIT(tr_state, I8051_INT1_LINE)) + if (GET_BIT(tr_state, MCS51_INT1_LINE)) SET_IE1(1); } else @@ -1690,7 +1690,7 @@ static void mcs51_set_irq_line(int irqline, int state) fatalerror("mcs51: Trying to set T2EX_LINE on a non I8052 type cpu.\n"); break; //Serial Port Receive - case I8051_RX_LINE: + case MCS51_RX_LINE: //Is the enable flags for this interrupt set? if (state != CLEAR_LINE) { @@ -2104,29 +2104,29 @@ static void mcs51_set_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_PC: PC = info->i; break; case CPUINFO_INT_SP: SP = info->i; break; - case CPUINFO_INT_INPUT_STATE + I8051_INT0_LINE: mcs51_set_irq_line(I8051_INT0_LINE, info->i); break; - case CPUINFO_INT_INPUT_STATE + I8051_INT1_LINE: mcs51_set_irq_line(I8051_INT1_LINE, info->i); break; + case CPUINFO_INT_INPUT_STATE + MCS51_INT0_LINE: mcs51_set_irq_line(MCS51_INT0_LINE, info->i); break; + case CPUINFO_INT_INPUT_STATE + MCS51_INT1_LINE: mcs51_set_irq_line(MCS51_INT1_LINE, info->i); break; case CPUINFO_INT_INPUT_STATE + MCS51_T0_LINE: mcs51_set_irq_line(MCS51_T0_LINE, info->i); break; case CPUINFO_INT_INPUT_STATE + MCS51_T1_LINE: mcs51_set_irq_line(MCS51_T1_LINE, info->i); break; - case CPUINFO_INT_INPUT_STATE + I8051_RX_LINE: mcs51_set_irq_line(I8051_RX_LINE, info->i); break; + case CPUINFO_INT_INPUT_STATE + MCS51_RX_LINE: mcs51_set_irq_line(MCS51_RX_LINE, info->i); break; - case CPUINFO_INT_REGISTER + I8051_PC: PC = info->i; break; - case CPUINFO_INT_REGISTER + I8051_SP: SP = info->i; break; - case CPUINFO_INT_REGISTER + I8051_PSW: SET_PSW(info->i); break; - case CPUINFO_INT_REGISTER + I8051_ACC: SET_ACC(info->i); break; - case CPUINFO_INT_REGISTER + I8051_B: B = info->i; break; - case CPUINFO_INT_REGISTER + I8051_DPH: DPH = info->i; break; - case CPUINFO_INT_REGISTER + I8051_DPL: DPL = info->i; break; - case CPUINFO_INT_REGISTER + I8051_IE: IE = info->i; break; - case CPUINFO_INT_REGISTER + I8051_R0: SET_REG(0, info->i); break; - case CPUINFO_INT_REGISTER + I8051_R1: SET_REG(1, info->i); break; - case CPUINFO_INT_REGISTER + I8051_R2: SET_REG(2, info->i); break; - case CPUINFO_INT_REGISTER + I8051_R3: SET_REG(3, info->i); break; - case CPUINFO_INT_REGISTER + I8051_R4: SET_REG(4, info->i); break; - case CPUINFO_INT_REGISTER + I8051_R5: SET_REG(5, info->i); break; - case CPUINFO_INT_REGISTER + I8051_R6: SET_REG(6, info->i); break; - case CPUINFO_INT_REGISTER + I8051_R7: SET_REG(7, info->i); break; - case CPUINFO_INT_REGISTER + I8051_RB: SET_RS(info->i); break; + case CPUINFO_INT_REGISTER + MCS51_PC: PC = info->i; break; + case CPUINFO_INT_REGISTER + MCS51_SP: SP = info->i; break; + case CPUINFO_INT_REGISTER + MCS51_PSW: SET_PSW(info->i); break; + case CPUINFO_INT_REGISTER + MCS51_ACC: SET_ACC(info->i); break; + case CPUINFO_INT_REGISTER + MCS51_B: B = info->i; break; + case CPUINFO_INT_REGISTER + MCS51_DPH: DPH = info->i; break; + case CPUINFO_INT_REGISTER + MCS51_DPL: DPL = info->i; break; + case CPUINFO_INT_REGISTER + MCS51_IE: IE = info->i; break; + case CPUINFO_INT_REGISTER + MCS51_R0: SET_REG(0, info->i); break; + case CPUINFO_INT_REGISTER + MCS51_R1: SET_REG(1, info->i); break; + case CPUINFO_INT_REGISTER + MCS51_R2: SET_REG(2, info->i); break; + case CPUINFO_INT_REGISTER + MCS51_R3: SET_REG(3, info->i); break; + case CPUINFO_INT_REGISTER + MCS51_R4: SET_REG(4, info->i); break; + case CPUINFO_INT_REGISTER + MCS51_R5: SET_REG(5, info->i); break; + case CPUINFO_INT_REGISTER + MCS51_R6: SET_REG(6, info->i); break; + case CPUINFO_INT_REGISTER + MCS51_R7: SET_REG(7, info->i); break; + case CPUINFO_INT_REGISTER + MCS51_RB: SET_RS(info->i); break; } } @@ -2168,23 +2168,23 @@ static void mcs51_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_PC: info->i = PC; break; case CPUINFO_INT_SP: info->i = SP; break; - case CPUINFO_INT_REGISTER + I8051_PC: info->i = PC; break; - case CPUINFO_INT_REGISTER + I8051_SP: info->i = SP; break; - case CPUINFO_INT_REGISTER + I8051_PSW: info->i = PSW; break; - case CPUINFO_INT_REGISTER + I8051_ACC: info->i = ACC; break; - case CPUINFO_INT_REGISTER + I8051_B: info->i = B; break; - case CPUINFO_INT_REGISTER + I8051_DPH: info->i = DPH; break; - case CPUINFO_INT_REGISTER + I8051_DPL: info->i = DPL; break; - case CPUINFO_INT_REGISTER + I8051_IE: info->i = IE; break; - case CPUINFO_INT_REGISTER + I8051_R0: info->i = R_REG(0); break; - case CPUINFO_INT_REGISTER + I8051_R1: info->i = R_REG(1); break; - case CPUINFO_INT_REGISTER + I8051_R2: info->i = R_REG(2); break; - case CPUINFO_INT_REGISTER + I8051_R3: info->i = R_REG(3); break; - case CPUINFO_INT_REGISTER + I8051_R4: info->i = R_REG(4); break; - case CPUINFO_INT_REGISTER + I8051_R5: info->i = R_REG(5); break; - case CPUINFO_INT_REGISTER + I8051_R6: info->i = R_REG(6); break; - case CPUINFO_INT_REGISTER + I8051_R7: info->i = R_REG(7); break; - case CPUINFO_INT_REGISTER + I8051_RB: info->i = R_REG(8); break; + case CPUINFO_INT_REGISTER + MCS51_PC: info->i = PC; break; + case CPUINFO_INT_REGISTER + MCS51_SP: info->i = SP; break; + case CPUINFO_INT_REGISTER + MCS51_PSW: info->i = PSW; break; + case CPUINFO_INT_REGISTER + MCS51_ACC: info->i = ACC; break; + case CPUINFO_INT_REGISTER + MCS51_B: info->i = B; break; + case CPUINFO_INT_REGISTER + MCS51_DPH: info->i = DPH; break; + case CPUINFO_INT_REGISTER + MCS51_DPL: info->i = DPL; break; + case CPUINFO_INT_REGISTER + MCS51_IE: info->i = IE; break; + case CPUINFO_INT_REGISTER + MCS51_R0: info->i = R_REG(0); break; + case CPUINFO_INT_REGISTER + MCS51_R1: info->i = R_REG(1); break; + case CPUINFO_INT_REGISTER + MCS51_R2: info->i = R_REG(2); break; + case CPUINFO_INT_REGISTER + MCS51_R3: info->i = R_REG(3); break; + case CPUINFO_INT_REGISTER + MCS51_R4: info->i = R_REG(4); break; + case CPUINFO_INT_REGISTER + MCS51_R5: info->i = R_REG(5); break; + case CPUINFO_INT_REGISTER + MCS51_R6: info->i = R_REG(6); break; + case CPUINFO_INT_REGISTER + MCS51_R7: info->i = R_REG(7); break; + case CPUINFO_INT_REGISTER + MCS51_RB: info->i = R_REG(8); break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = mcs51_set_info; break; @@ -2220,23 +2220,23 @@ static void mcs51_get_info(UINT32 state, cpuinfo *info) PSW & 0x01 ? 'P':'.'); break; - case CPUINFO_STR_REGISTER + I8051_PC: sprintf(info->s, "PC:%04X", r->pc); break; - case CPUINFO_STR_REGISTER + I8051_SP: sprintf(info->s, "SP:%02X", SP); break; - case CPUINFO_STR_REGISTER + I8051_PSW: sprintf(info->s, "PSW:%02X", PSW); break; - case CPUINFO_STR_REGISTER + I8051_ACC: sprintf(info->s, "A:%02X", ACC); break; - case CPUINFO_STR_REGISTER + I8051_B: sprintf(info->s, "B:%02X", B); break; - case CPUINFO_STR_REGISTER + I8051_DPH: sprintf(info->s, "DPH:%02X", DPH); break; - case CPUINFO_STR_REGISTER + I8051_DPL: sprintf(info->s, "DPL:%02X", DPL); break; - case CPUINFO_STR_REGISTER + I8051_IE: sprintf(info->s, "IE:%02X", IE); break; - case CPUINFO_STR_REGISTER + I8051_R0: sprintf(info->s, "R0:%02X", R_REG(0)); break; - case CPUINFO_STR_REGISTER + I8051_R1: sprintf(info->s, "R1:%02X", R_REG(1)); break; - case CPUINFO_STR_REGISTER + I8051_R2: sprintf(info->s, "R2:%02X", R_REG(2)); break; - case CPUINFO_STR_REGISTER + I8051_R3: sprintf(info->s, "R3:%02X", R_REG(3)); break; - case CPUINFO_STR_REGISTER + I8051_R4: sprintf(info->s, "R4:%02X", R_REG(4)); break; - case CPUINFO_STR_REGISTER + I8051_R5: sprintf(info->s, "R5:%02X", R_REG(5)); break; - case CPUINFO_STR_REGISTER + I8051_R6: sprintf(info->s, "R6:%02X", R_REG(6)); break; - case CPUINFO_STR_REGISTER + I8051_R7: sprintf(info->s, "R7:%02X", R_REG(7)); break; - case CPUINFO_STR_REGISTER + I8051_RB: sprintf(info->s, "RB:%02X", ((PSW & 0x18)>>3)); break; + case CPUINFO_STR_REGISTER + MCS51_PC: sprintf(info->s, "PC:%04X", r->pc); break; + case CPUINFO_STR_REGISTER + MCS51_SP: sprintf(info->s, "SP:%02X", SP); break; + case CPUINFO_STR_REGISTER + MCS51_PSW: sprintf(info->s, "PSW:%02X", PSW); break; + case CPUINFO_STR_REGISTER + MCS51_ACC: sprintf(info->s, "A:%02X", ACC); break; + case CPUINFO_STR_REGISTER + MCS51_B: sprintf(info->s, "B:%02X", B); break; + case CPUINFO_STR_REGISTER + MCS51_DPH: sprintf(info->s, "DPH:%02X", DPH); break; + case CPUINFO_STR_REGISTER + MCS51_DPL: sprintf(info->s, "DPL:%02X", DPL); break; + case CPUINFO_STR_REGISTER + MCS51_IE: sprintf(info->s, "IE:%02X", IE); break; + case CPUINFO_STR_REGISTER + MCS51_R0: sprintf(info->s, "R0:%02X", R_REG(0)); break; + case CPUINFO_STR_REGISTER + MCS51_R1: sprintf(info->s, "R1:%02X", R_REG(1)); break; + case CPUINFO_STR_REGISTER + MCS51_R2: sprintf(info->s, "R2:%02X", R_REG(2)); break; + case CPUINFO_STR_REGISTER + MCS51_R3: sprintf(info->s, "R3:%02X", R_REG(3)); break; + case CPUINFO_STR_REGISTER + MCS51_R4: sprintf(info->s, "R4:%02X", R_REG(4)); break; + case CPUINFO_STR_REGISTER + MCS51_R5: sprintf(info->s, "R5:%02X", R_REG(5)); break; + case CPUINFO_STR_REGISTER + MCS51_R6: sprintf(info->s, "R6:%02X", R_REG(6)); break; + case CPUINFO_STR_REGISTER + MCS51_R7: sprintf(info->s, "R7:%02X", R_REG(7)); break; + case CPUINFO_STR_REGISTER + MCS51_RB: sprintf(info->s, "RB:%02X", ((PSW & 0x18)>>3)); break; } } diff --git a/src/emu/cpu/i8051/i8051.h b/src/emu/cpu/mcs51/mcs51.h similarity index 84% rename from src/emu/cpu/i8051/i8051.h rename to src/emu/cpu/mcs51/mcs51.h index 0ebf74612d8..5b26997318e 100644 --- a/src/emu/cpu/i8051/i8051.h +++ b/src/emu/cpu/mcs51/mcs51.h @@ -1,6 +1,6 @@ /***************************************************************************** * - * i8051.h + * mcs51.h * Portable MCS-51 Family Emulator * * Chips in the family: @@ -28,26 +28,32 @@ * #2) 8051 simulator by Travis Marlatte * #3) Portable UPI-41/8041/8741/8042/8742 emulator V0.1 by Juergen Buchmueller (MAME CORE) * + * 2008, October, Couriersud + * - Rewrite of timer, interrupt and serial code + * - addition of CMOS features + * - internal memory maps + * - addition of new processor types + * - full emulation of 8xCx2 processors *****************************************************************************/ #pragma once -#ifndef __I8051_H__ -#define __I8051_H__ +#ifndef __MCS51_H__ +#define __MCS51_H__ #include "cpuintrf.h" enum { - I8051_PC=1, I8051_SP, I8051_PSW, I8051_ACC, I8051_B, I8051_DPH, I8051_DPL, I8051_IE, - I8051_R0, I8051_R1, I8051_R2, I8051_R3, I8051_R4, I8051_R5, I8051_R6, I8051_R7, I8051_RB + MCS51_PC=1, MCS51_SP, MCS51_PSW, MCS51_ACC, MCS51_B, MCS51_DPH, MCS51_DPL, MCS51_IE, + MCS51_R0, MCS51_R1, MCS51_R2, MCS51_R3, MCS51_R4, MCS51_R5, MCS51_R6, MCS51_R7, MCS51_RB }; enum { - I8051_INT0_LINE = 0, /* P3.2: External Interrupt 0 */ - I8051_INT1_LINE, /* P3.3: External Interrupt 1 */ - I8051_RX_LINE, /* P3.0: Serial Port Receive Line */ + MCS51_INT0_LINE = 0, /* P3.2: External Interrupt 0 */ + MCS51_INT1_LINE, /* P3.3: External Interrupt 1 */ + MCS51_RX_LINE, /* P3.0: Serial Port Receive Line */ MCS51_T0_LINE, /* P3,4: Timer 0 External Input */ MCS51_T1_LINE, /* P3.5: Timer 1 External Input */ MCS51_T2_LINE, /* P1.0: Timer 2 External Input */ @@ -105,4 +111,4 @@ void at89c4051_get_info(UINT32 state, cpuinfo *info); offs_t i8051_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram); -#endif /* __I8051_H__ */ +#endif /* __MCS51_H__ */ diff --git a/src/emu/cpu/i8051/8051dasm.c b/src/emu/cpu/mcs51/mcs51dasm.c similarity index 99% rename from src/emu/cpu/i8051/8051dasm.c rename to src/emu/cpu/mcs51/mcs51dasm.c index 11cb5e2e1d6..c8b08676d0a 100644 --- a/src/emu/cpu/i8051/8051dasm.c +++ b/src/emu/cpu/mcs51/mcs51dasm.c @@ -34,7 +34,7 @@ *****************************************************************************/ #include "debugger.h" -#include "i8051.h" +#include "mcs51.h" #define SHOW_MEMORY_NAMES 1 diff --git a/src/emu/cpu/i8051/i8051ops.c b/src/emu/cpu/mcs51/mcs51ops.c similarity index 100% rename from src/emu/cpu/i8051/i8051ops.c rename to src/emu/cpu/mcs51/mcs51ops.c diff --git a/src/mame/drivers/cardline.c b/src/mame/drivers/cardline.c index 2398178a6de..86860de5fa3 100644 --- a/src/mame/drivers/cardline.c +++ b/src/mame/drivers/cardline.c @@ -17,7 +17,7 @@ #include "driver.h" -#include "cpu/i8051/i8051.h" +#include "cpu/mcs51/mcs51.h" #include "sound/okim6295.h" #include "cardline.lh" diff --git a/src/mame/drivers/limenko.c b/src/mame/drivers/limenko.c index 6b48a7695f0..96040ddfe22 100644 --- a/src/mame/drivers/limenko.c +++ b/src/mame/drivers/limenko.c @@ -26,7 +26,7 @@ #include "driver.h" #include "machine/eeprom.h" #include "sound/okim6295.h" -#include "cpu/i8051/i8051.h" +#include "cpu/mcs51/mcs51.h" static tilemap *bg_tilemap, *md_tilemap, *fg_tilemap; static UINT32 *bg_videoram, *md_videoram, *fg_videoram, *limenko_videoreg; diff --git a/src/mame/drivers/micro3d.c b/src/mame/drivers/micro3d.c index 631687faedb..8a33f7cb852 100644 --- a/src/mame/drivers/micro3d.c +++ b/src/mame/drivers/micro3d.c @@ -25,7 +25,7 @@ #include "deprecat.h" #include "cpu/tms34010/tms34010.h" #include "cpu/tms34010/34010ops.h" -#include "cpu/i8051/i8051.h" +#include "cpu/mcs51/mcs51.h" #include "sound/2151intf.h" #include "sound/upd7759.h" #include "sound/dac.h" @@ -549,11 +549,11 @@ switch(offset) { cpunum_set_input_line_and_vector(machine, 0,3, HOLD_LINE, M68681.IVR); // Generate an interrupt, if allowed. } - cpunum_set_input_line(machine, 2, I8051_RX_LINE, ASSERT_LINE); // Generate 8031 interrupt + cpunum_set_input_line(machine, 2, MCS51_RX_LINE, ASSERT_LINE); // Generate 8031 interrupt mame_printf_debug("Sound board TX: %4X at PC=%4X\n",value,activecpu_get_pc()); #endif M68681.SRB &=~0x0400; // Data has been sent - TX ready for more. - cpunum_set_input_line(machine, 2, I8051_RX_LINE, ASSERT_LINE); // Generate 8031 interrupt + cpunum_set_input_line(machine, 2, MCS51_RX_LINE, ASSERT_LINE); // Generate 8031 interrupt mame_printf_debug("Sound board TX: %4X at PC=%4X\n",value,activecpu_get_pc()); break; diff --git a/src/mame/drivers/peplus.c b/src/mame/drivers/peplus.c index 0a3469629f0..3c80d77ae1a 100644 --- a/src/mame/drivers/peplus.c +++ b/src/mame/drivers/peplus.c @@ -159,7 +159,7 @@ Stephh's log (2007.11.28) : #include "driver.h" #include "sound/ay8910.h" -#include "cpu/i8051/i8051.h" +#include "cpu/mcs51/mcs51.h" #include "machine/i2cmem.h" #include "peplus.lh" diff --git a/src/mame/drivers/re900.c b/src/mame/drivers/re900.c index ae383963302..1cd7f698d92 100644 --- a/src/mame/drivers/re900.c +++ b/src/mame/drivers/re900.c @@ -27,7 +27,7 @@ #define TMS_CLOCK VDP_CLOCK / 24 #include "driver.h" -#include "cpu/i8051/i8051.h" +#include "cpu/mcs51/mcs51.h" #include "video/tms9928a.h" #include "sound/ay8910.h" //#include "re900.lh" diff --git a/src/mame/drivers/sliver.c b/src/mame/drivers/sliver.c index 32a13c1b73f..460129013e7 100644 --- a/src/mame/drivers/sliver.c +++ b/src/mame/drivers/sliver.c @@ -67,7 +67,7 @@ Notes: #include "driver.h" #include "deprecat.h" #include "sound/okim6295.h" -#include "cpu/i8051/i8051.h" +#include "cpu/mcs51/mcs51.h" #define FIFO_SIZE 1024 #define IO_SIZE 0x100 @@ -391,7 +391,7 @@ static WRITE16_HANDLER(io_data_w) static WRITE16_HANDLER(sound_w) { soundlatch_w(machine,0,data & 0xff); - cpunum_set_input_line(machine, 1, I8051_INT0_LINE, HOLD_LINE); + cpunum_set_input_line(machine, 1, MCS51_INT0_LINE, HOLD_LINE); } static ADDRESS_MAP_START( sliver_map, ADDRESS_SPACE_PROGRAM, 16 ) diff --git a/src/mame/drivers/sslam.c b/src/mame/drivers/sslam.c index 1a1d9c7feee..357d08b124c 100644 --- a/src/mame/drivers/sslam.c +++ b/src/mame/drivers/sslam.c @@ -81,7 +81,7 @@ Notes: #include "driver.h" -#include "cpu/i8051/i8051.h" +#include "cpu/mcs51/mcs51.h" #include "sound/okim6295.h" @@ -395,7 +395,7 @@ static WRITE16_HANDLER( sslam_snd_w ) static WRITE16_HANDLER( powerbls_sound_w ) { soundlatch_w(machine,0,data & 0xff); - cpunum_set_input_line(machine, 1,I8051_INT1_LINE,HOLD_LINE); + cpunum_set_input_line(machine, 1,MCS51_INT1_LINE,HOLD_LINE); } /* Memory Maps */ diff --git a/src/mame/drivers/superqix.c b/src/mame/drivers/superqix.c index a8fb44c813f..13741f2f4b8 100644 --- a/src/mame/drivers/superqix.c +++ b/src/mame/drivers/superqix.c @@ -109,7 +109,7 @@ DSW2 stored @ $f237 #include "driver.h" #include "deprecat.h" #include "cpu/m6805/m6805.h" -#include "cpu/i8051/i8051.h" +#include "cpu/mcs51/mcs51.h" #include "sound/ay8910.h" #include "sound/samples.h" diff --git a/src/mame/drivers/videopkr.c b/src/mame/drivers/videopkr.c index caac5f76cc0..ecc5a4809e3 100644 --- a/src/mame/drivers/videopkr.c +++ b/src/mame/drivers/videopkr.c @@ -258,7 +258,7 @@ #include "driver.h" #include "cpu/mcs48/mcs48.h" -#include "cpu/i8051/i8051.h" +#include "cpu/mcs51/mcs51.h" #include "sound/ay8910.h" #include "sound/dac.h" #include "videopkr.lh" diff --git a/src/mame/video/m72.c b/src/mame/video/m72.c index 20e3d6616f7..967d50361be 100644 --- a/src/mame/video/m72.c +++ b/src/mame/video/m72.c @@ -128,11 +128,12 @@ VIDEO_START( m72 ) tilemap_set_transmask(fg_tilemap,0,0xffff,0x0001); tilemap_set_transmask(fg_tilemap,1,0x00ff,0xff01); - tilemap_set_transmask(fg_tilemap,2,0xffff,0x0001); + tilemap_set_transmask(fg_tilemap,2,0x0001,0xffff); tilemap_set_transmask(bg_tilemap,0,0xffff,0x0000); tilemap_set_transmask(bg_tilemap,1,0x00ff,0xff00); - tilemap_set_transmask(bg_tilemap,2,0xfffe,0x0001); + //tilemap_set_transmask(bg_tilemap,2,0x0001,0xfffe); + tilemap_set_transmask(bg_tilemap,2,0x0007,0xfff8); memset(m72_spriteram,0,spriteram_size);