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https://github.com/holub/mame
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trkfldch / my1stddr - don't just blow up at least (nw) (#5102)
* trkfldch / my1stddr - don't just blow up at least (nw) * unimportant rubbish (nw) * nonsense (nw) * basically nothing (nw) * possible irq reg (nw) * outside irq (nw) * looking at register use (nw)
This commit is contained in:
David Haywood
R. Belmont
parent
7da9eaffd0
commit
7ddee052fa
@ -15,21 +15,10 @@ TV0002 R1.0 Track & Field
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DDR & TF PCBs look identical, all the parts are in the same place, the traces are the same, and the silkscreened part # for resistors and caps are the same.
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currently dies after call at
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Some of m_unkregs must retain value (or return certain things) or RAM containing vectors gets blanked and game crashes.
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The G65816 code on these is VERY ugly and difficult to follow, many redundant statements, excessive mode switching, accessing things via pointers to pointers etc.
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00:AE85: LDA $0b
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00:AE87: TAX
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00:AE88: LDA $0d
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00:AE8A: JSL $00a044
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00:A044: SEP #$20
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00:A046: PHA
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00:A047: REP #$20
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00:A049: DEX
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00:A04A: PHX
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00:A04B: RTL
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which pushes some values onto the stack, then RTLs to them (but the values at $0b and $0d at both 00, so it jumps to 0 and dies)
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One of the vectors points to 0x6000, there is nothing mapped there, could it be a small internal ROM or some debug trap for development?
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*/
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@ -40,6 +29,8 @@ which pushes some values onto the stack, then RTLs to them (but the values at $0
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#include "emupal.h"
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#include "screen.h"
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#include "speaker.h"
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#include "machine/timer.h"
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class trkfldch_state : public driver_device
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{
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@ -52,6 +43,7 @@ public:
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{ }
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void trkfldch(machine_config &config);
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void vectors_map(address_map &map);
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protected:
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virtual void machine_start() override;
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@ -67,8 +59,17 @@ private:
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uint32_t screen_update_trkfldch(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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void trkfldch_map(address_map &map);
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DECLARE_READ8_MEMBER(unk_7804_read);
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DECLARE_READ8_MEMBER(unk_7805_read);
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DECLARE_READ8_MEMBER(read_vector);
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TIMER_DEVICE_CALLBACK_MEMBER(scanline);
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uint8_t m_which_vector;
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DECLARE_READ8_MEMBER(unkregs_r);
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DECLARE_WRITE8_MEMBER(unkregs_w);
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uint8_t m_unkregs[0x100];
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};
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void trkfldch_state::video_start()
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@ -81,15 +82,7 @@ uint32_t trkfldch_state::screen_update_trkfldch(screen_device &screen, bitmap_in
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}
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READ8_MEMBER(trkfldch_state::unk_7804_read)
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{
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return 0xff;
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}
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READ8_MEMBER(trkfldch_state::unk_7805_read)
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{
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return 0xff;
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}
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void trkfldch_state::trkfldch_map(address_map &map)
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{
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@ -100,12 +93,84 @@ void trkfldch_state::trkfldch_map(address_map &map)
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map(0x007000, 0x0072ff).ram();
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// 7800 - 78xx look like registers?
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map(0x007804, 0x007804).r(FUNC(trkfldch_state::unk_7804_read));
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map(0x007805, 0x007805).r(FUNC(trkfldch_state::unk_7805_read));
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map(0x007800, 0x0078ff).rw(FUNC(trkfldch_state::unkregs_r), FUNC(trkfldch_state::unkregs_w));
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map(0x008000, 0x3fffff).rom().region("maincpu", 0x000000); // good for code mapped at 008000 and 050000 at least
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}
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void trkfldch_state::vectors_map(address_map &map)
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{
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map(0x00, 0x1f).r(FUNC(trkfldch_state::read_vector));
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}
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READ8_MEMBER(trkfldch_state::read_vector)
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{
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uint8_t *rom = memregion("maincpu")->base();
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/* what appears to be a table of vectors apepars at the START of ROM, maybe this gets copied to RAM, maybe used directly?
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00 : (invalid)
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02 : (invalid)
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04 : 0xA2C6 (dummy)
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06 : 0xA334 (real function - vbl?)
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08 : 0xA300 (dummy)
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0a : 0xA2E0 (dummy)
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0c : 0xA2B9 (dummy)
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0e : 0xA2ED (dummy)
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10 : 0xA2D3 (dummy)
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12 : 0xA327 (dummy)
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14 : 0xA30D (real function)
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16 : 0x6000 (points at ram? or some internal ROM? we have nothing mapped here, not cleared as RAM either)
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18 : 0xA31A (dummy)
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1a : 0xA2AC (dummy)
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1c : 0xA341 (boot vector)
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1e : (invalid)
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*/
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logerror("reading vector offset %02x\n", offset);
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if (offset == 0x0b)
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{ // NMI
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return rom[m_which_vector+1];
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}
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else if (offset == 0x0a)
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{ // NMI
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return rom[m_which_vector];
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}
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// boot vector
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return rom[offset];
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}
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TIMER_DEVICE_CALLBACK_MEMBER(trkfldch_state::scanline)
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{
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int scanline = param;
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if (scanline == 200)
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{
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m_which_vector = 0x06;
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m_maincpu->set_input_line(G65816_LINE_NMI, ASSERT_LINE);
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}
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else if (scanline == 201)
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{
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m_which_vector = 0x06;
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m_maincpu->set_input_line(G65816_LINE_NMI, CLEAR_LINE);
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}
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if (scanline == 20)
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{
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m_which_vector = 0x14;
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m_maincpu->set_input_line(G65816_LINE_NMI, ASSERT_LINE);
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}
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else if (scanline == 21)
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{
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m_which_vector = 0x14;
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m_maincpu->set_input_line(G65816_LINE_NMI, CLEAR_LINE);
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}
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}
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static INPUT_PORTS_START( trkfldch )
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INPUT_PORTS_END
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@ -125,46 +190,425 @@ static GFXDECODE_START( gfx_trkfldch )
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GFXDECODE_ENTRY( "maincpu", 0, tiles8x8_layout, 0, 1 )
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GFXDECODE_END
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/*
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7800 / 7801 seem to be IRQ related
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7800 : 0001 - ? (there is no irq 0x00)
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0002 - ? (there is no irq 0x02)
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0004 used in irq 0x04
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0008 used in irq 0x06
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0010 used in irq 0x08
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0020 used in irq 0x0a
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0x40 used in irq 0x0c
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0x80 used in irq 0x0e (and by code accessing other ports in the main execution?!)
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7801 : 0001 used in irq 0x10
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: 0002 used in irq 0x12
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: 0004 used in irq 0x14
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: 0008 - ? (there is no irq 0x016, it points to unknown area? and we have no code touching this bit)
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: 0010 used in irq 0x18
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: 0020 used in irq 0x1a and 0x06?! (used with OR instead of EOR in 0x06, force IRQ?)
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: 0x40 - ? (there is no irq 0x1c - it's the boot vector)
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: 0x80 - ? (there is no irq 0x1e)
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*/
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READ8_MEMBER(trkfldch_state::unkregs_r)
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{
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uint8_t ret = m_unkregs[offset];
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switch (offset)
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{
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case 0x00: // IRQ status?, see above
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ret = machine().rand();
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//logerror("%s: unkregs_r (IRQ state?) %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x01: // IRQ status?, see above
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ret = machine().rand();
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//logerror("%s: unkregs_r (IRQ state?) %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x04:
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ret = 0xff;
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x05: // only read as a side effect of reading port 0x4 in 16-bit mode?
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ret = 0xff;
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x70: // read in irq (inputs?)
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ret = machine().rand();
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//logerror("%s: unkregs_r (IRQ state?) %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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default:
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logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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}
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return ret;
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}
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WRITE8_MEMBER(trkfldch_state::unkregs_w)
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{
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switch (offset)
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{
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case 0x00: // IRQ ack/force?, see above
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// logerror("%s: unkregs_w (IRQ ack/force?) %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x01: // IRQ maybe status, see above
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// logerror("%s: unkregs_w (IRQ ack/force?) %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x02: // startup
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x03: // startup
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x04: // startup
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x05: // startup
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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// is it significant that 0x10 goes up to 0x1a, 0x20 to 0x2b, 0x30 to 0x3b could be 3 sets of similar things?
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case 0x10:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x11:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x12: // startup
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x13:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x14: // startup
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x15:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x16:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x17:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x18:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x19:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x1a:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x20: // rarely
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x21: // rarely
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x22: // rarely
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x23: // after a long time
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x24: // rarely
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x25: // rarely
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x26:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x27:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x28:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x29:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x2a:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x2b:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x30:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x31:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x32: // rarely
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x33: // rarely
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x34: // rarely
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x36: // rarely
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x37: // rarely
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x3a:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x3b:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x42:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x43:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x54: // startup
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x55: // startup
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x56: // startup
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x60:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x61:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x62:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x63:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x64:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x65:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x66:
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0x67: // after a long time
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
case 0x68: // rarely (my1stddr)
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
case 0x69: // after a long time
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
case 0x6b: // after a long time
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
case 0x6c: // rarely (my1stddr)
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
case 0x6d: // after a long time
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
|
||||
|
||||
// 7x = I/O area?
|
||||
|
||||
|
||||
case 0x71: // startup
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
case 0x72: // startup
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
case 0x73: // some kind of serial device?
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
case 0x74: // startup
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
case 0x75: // some kind of serial device? (used with 73?)
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
case 0x76: // startup
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
case 0x77: // every second or so
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
case 0x78: // startup
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
case 0x79: // startup
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
case 0x7a: // startup
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
case 0x7f: // startup
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
|
||||
case 0x81: // startup (my1stddr)
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
case 0x82: // startup (my1stddr)
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
case 0x83:
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
case 0x84:
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
|
||||
case 0xb5: // startup
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
case 0xb6: // significant data transfer shortly after boot
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
|
||||
|
||||
case 0xca: // startup
|
||||
//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
|
||||
break;
|
||||
|
||||
|
||||
default:
|
||||
//printf("%s: unkregs_w %04x %02x\n", machine().describe_context().c_str(), offset, data);
|
||||
break;
|
||||
}
|
||||
|
||||
m_unkregs[offset] = data;
|
||||
}
|
||||
|
||||
void trkfldch_state::machine_start()
|
||||
{
|
||||
}
|
||||
|
||||
void trkfldch_state::machine_reset()
|
||||
{
|
||||
uint8_t *rom = memregion("maincpu")->base();
|
||||
m_which_vector = 0x06;
|
||||
|
||||
int vector = 0xe;
|
||||
|
||||
/* what appears to be a table of vectors apepars at the START of ROM, maybe this gets copied to RAM, maybe used directly?
|
||||
0: (invalid)
|
||||
1: (invalid)
|
||||
2: 0xA2C6
|
||||
3: 0xA334
|
||||
4: 0xA300
|
||||
5: 0xA2E0
|
||||
6: 0xA2B9
|
||||
7: 0xA2ED // possible irq vector pointer, THIS IS NOT THE BOOT CODE!
|
||||
8: 0xA2D3
|
||||
9: 0xA327
|
||||
a: 0xA30D
|
||||
b: 0x6000
|
||||
c: 0xA31A
|
||||
d: 0xA2AC
|
||||
e: 0xA341
|
||||
f: (invalid)
|
||||
*/
|
||||
|
||||
uint16_t addr = (rom[vector * 2 + 1] << 8) | (rom[vector * 2]);
|
||||
|
||||
m_maincpu->set_state_int(1, addr);
|
||||
for (int i = 0; i < 0x100; i++)
|
||||
m_unkregs[i] = 0x00;
|
||||
}
|
||||
|
||||
void trkfldch_state::trkfldch(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
G65816(config, m_maincpu, 20000000);
|
||||
//m_maincpu->set_addrmap(AS_DATA, &tv965_state::mem_map);
|
||||
//m_maincpu->set_addrmap(AS_DATA, &trkfldch_state::mem_map);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &trkfldch_state::trkfldch_map);
|
||||
m_maincpu->set_addrmap(g65816_device::AS_VECTORS, &trkfldch_state::vectors_map);
|
||||
|
||||
TIMER(config, "scantimer").configure_scanline(FUNC(trkfldch_state::scanline), "screen", 0, 1);
|
||||
|
||||
/* video hardware */
|
||||
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user