From 7df031fb4f301ee55a3ca1ad4459a5588bcfd0fa Mon Sep 17 00:00:00 2001 From: Couriersud Date: Sun, 2 Mar 2008 00:35:58 +0000 Subject: [PATCH] Rewrote some potentially compiler specific code: * added ATTR_FORCE_INLINE to osdcomm.h * added ATTR_NONNULL * moved U64 S64 fram mamecore.h to osdcomm.h * define SETJMP_GNUC_PROTECT() in osdcomm.h for use in ppc602, ppc603 --- src/emu/cpu/powerpc/ppc602.c | 4 +--- src/emu/cpu/powerpc/ppc603.c | 4 +--- src/emu/eigccppc.h | 26 ++++++++++---------- src/emu/eigccx86.h | 46 ++++++++++++++++++------------------ src/emu/mamecore.h | 9 ------- src/lib/util/options.c | 9 ++++++- src/osd/osdcomm.h | 16 +++++++++++++ 7 files changed, 62 insertions(+), 52 deletions(-) diff --git a/src/emu/cpu/powerpc/ppc602.c b/src/emu/cpu/powerpc/ppc602.c index 444161668af..ff4fa4d8a34 100644 --- a/src/emu/cpu/powerpc/ppc602.c +++ b/src/emu/cpu/powerpc/ppc602.c @@ -239,10 +239,8 @@ static int ppc602_execute(int cycles) change_pc(ppc.npc); -#ifdef __GNUC__ // MinGW's optimizer kills setjmp()/longjmp() - (void)__builtin_return_address(1); -#endif + SETJMP_GNUC_PROTECT(); exception_type = setjmp(ppc.exception_jmpbuf); if (exception_type) diff --git a/src/emu/cpu/powerpc/ppc603.c b/src/emu/cpu/powerpc/ppc603.c index ae2482820b0..ab97be5112c 100644 --- a/src/emu/cpu/powerpc/ppc603.c +++ b/src/emu/cpu/powerpc/ppc603.c @@ -247,10 +247,8 @@ static int ppc603_execute(int cycles) change_pc(ppc.npc); -#ifdef __GNUC__ // MinGW's optimizer kills setjmp()/longjmp() - (void)__builtin_return_address(1); -#endif + SETJMP_GNUC_PROTECT(); exception_type = setjmp(ppc.exception_jmpbuf); if (exception_type) diff --git a/src/emu/eigccppc.h b/src/emu/eigccppc.h index e43c1e97422..4290a6af7a3 100644 --- a/src/emu/eigccppc.h +++ b/src/emu/eigccppc.h @@ -42,7 +42,7 @@ -------------------------------------------------*/ #define mul_32x32_hi _mul_32x32_hi -INLINE INT32 __attribute__((const, always_inline)) +INLINE INT32 ATTR_CONST ATTR_FORCE_INLINE _mul_32x32_hi(INT32 val1, INT32 val2) { register INT32 result; @@ -65,7 +65,7 @@ _mul_32x32_hi(INT32 val1, INT32 val2) -------------------------------------------------*/ #define mulu_32x32_hi _mulu_32x32_hi -INLINE UINT32 __attribute__((const, always_inline)) +INLINE UINT32 ATTR_CONST ATTR_FORCE_INLINE _mulu_32x32_hi(UINT32 val1, UINT32 val2) { register UINT32 result; @@ -90,7 +90,7 @@ _mulu_32x32_hi(UINT32 val1, UINT32 val2) #if !defined(__ppc64__) && !defined(__PPC64__) && !defined(_ARCH_PPC64) #define mul_32x32_shift _mul_32x32_shift -INLINE INT32 __attribute__((const, always_inline)) +INLINE INT32 ATTR_CONST ATTR_FORCE_INLINE _mul_32x32_shift(INT32 val1, INT32 val2, UINT8 shift) { register INT32 result; @@ -124,7 +124,7 @@ _mul_32x32_shift(INT32 val1, INT32 val2, UINT8 shift) #if !defined(__ppc64__) && !defined(__PPC64__) && !defined(_ARCH_PPC64) #define mulu_32x32_shift _mulu_32x32_shift -INLINE UINT32 __attribute__((const, always_inline)) +INLINE UINT32 ATTR_CONST ATTR_FORCE_INLINE _mulu_32x32_shift(UINT32 val1, UINT32 val2, UINT8 shift) { register UINT32 result; @@ -223,7 +223,7 @@ _mulu_32x32_shift(UINT32 val1, UINT32 val2, UINT8 shift) -------------------------------------------------*/ #define recip_approx _recip_approx -INLINE float __attribute__((const, always_inline)) +INLINE float ATTR_CONST ATTR_FORCE_INLINE _recip_approx(float value) { register float result; @@ -249,7 +249,7 @@ _recip_approx(float value) -------------------------------------------------*/ #define count_leading_zeros _count_leading_zeros -INLINE UINT8 __attribute__((const, always_inline)) +INLINE UINT8 ATTR_CONST ATTR_FORCE_INLINE _count_leading_zeros(UINT32 value) { register UINT32 result; @@ -270,7 +270,7 @@ _count_leading_zeros(UINT32 value) -------------------------------------------------*/ #define count_leading_ones _count_leading_ones -INLINE UINT8 __attribute__((const, always_inline)) +INLINE UINT8 ATTR_CONST ATTR_FORCE_INLINE _count_leading_ones(UINT32 value) { register UINT32 result; @@ -299,7 +299,7 @@ _count_leading_ones(UINT32 value) -------------------------------------------------*/ #define compare_exchange32 _compare_exchange32 -INLINE INT32 __attribute__((nonnull(1), always_inline)) +INLINE INT32 ATTR_NONNULL ATTR_FORCE_INLINE _compare_exchange32(INT32 volatile *ptr, INT32 compare, INT32 exchange) { register INT32 result; @@ -333,7 +333,7 @@ _compare_exchange32(INT32 volatile *ptr, INT32 compare, INT32 exchange) #if defined(__ppc64__) || defined(__PPC64__) #define compare_exchange64 _compare_exchange64 -INLINE INT64 __attribute__((nonnull(1), always_inline)) +INLINE INT64 ATTR_NONNULL ATTR_FORCE_INLINE _compare_exchange64(INT64 volatile *ptr, INT64 compare, INT64 exchange) { register INT64 result; @@ -365,7 +365,7 @@ _compare_exchange64(INT64 volatile *ptr, INT64 compare, INT64 exchange) -------------------------------------------------*/ #define atomic_exchange32 _atomic_exchange32 -INLINE INT32 __attribute__((nonnull(1), always_inline)) +INLINE INT32 ATTR_NONNULL ATTR_FORCE_INLINE _atomic_exchange32(INT32 volatile *ptr, INT32 exchange) { register INT32 result; @@ -393,7 +393,7 @@ _atomic_exchange32(INT32 volatile *ptr, INT32 exchange) -------------------------------------------------*/ #define atomic_add32 _atomic_add32 -INLINE INT32 __attribute__((nonnull(1), always_inline)) +INLINE INT32 ATTR_NONNULL ATTR_FORCE_INLINE _atomic_add32(INT32 volatile *ptr, INT32 delta) { register INT32 result; @@ -422,7 +422,7 @@ _atomic_add32(INT32 volatile *ptr, INT32 delta) -------------------------------------------------*/ #define atomic_increment32 _atomic_increment32 -INLINE INT32 __attribute__((nonnull(1), always_inline)) +INLINE INT32 ATTR_NONNULL ATTR_FORCE_INLINE _atomic_increment32(INT32 volatile *ptr) { register INT32 result; @@ -450,7 +450,7 @@ _atomic_increment32(INT32 volatile *ptr) -------------------------------------------------*/ #define atomic_decrement32 _atomic_decrement32 -INLINE INT32 __attribute__((nonnull(1), always_inline)) +INLINE INT32 ATTR_NONNULL ATTR_FORCE_INLINE _atomic_decrement32(INT32 volatile *ptr) { register INT32 result; diff --git a/src/emu/eigccx86.h b/src/emu/eigccx86.h index 777174fd15d..a84a16f2202 100644 --- a/src/emu/eigccx86.h +++ b/src/emu/eigccx86.h @@ -33,7 +33,7 @@ #ifndef __x86_64__ #define mul_32x32 _mul_32x32 -INLINE INT64 __attribute__((const, always_inline)) +INLINE INT64 ATTR_CONST ATTR_FORCE_INLINE _mul_32x32(INT32 a, INT32 b) { register INT64 result; @@ -59,7 +59,7 @@ _mul_32x32(INT32 a, INT32 b) #ifndef __x86_64__ #define mulu_32x32 _mulu_32x32 -INLINE UINT64 __attribute__((const, always_inline)) +INLINE UINT64 ATTR_CONST ATTR_FORCE_INLINE _mulu_32x32(UINT32 a, UINT32 b) { register UINT64 result; @@ -84,7 +84,7 @@ _mulu_32x32(UINT32 a, UINT32 b) -------------------------------------------------*/ #define mul_32x32_hi _mul_32x32_hi -INLINE INT32 __attribute__((const, always_inline)) +INLINE INT32 ATTR_CONST ATTR_FORCE_INLINE _mul_32x32_hi(INT32 a, INT32 b) { register INT32 result, temp; @@ -109,7 +109,7 @@ _mul_32x32_hi(INT32 a, INT32 b) -------------------------------------------------*/ #define mulu_32x32_hi _mulu_32x32_hi -INLINE UINT32 __attribute__((const, always_inline)) +INLINE UINT32 ATTR_CONST ATTR_FORCE_INLINE _mulu_32x32_hi(UINT32 a, UINT32 b) { register UINT32 result, temp; @@ -136,7 +136,7 @@ _mulu_32x32_hi(UINT32 a, UINT32 b) #ifndef __x86_64__ #define mul_32x32_shift _mul_32x32_shift -INLINE INT32 __attribute__((const, always_inline)) +INLINE INT32 ATTR_CONST ATTR_FORCE_INLINE _mul_32x32_shift(INT32 a, INT32 b, UINT8 shift) { register INT32 result; @@ -166,7 +166,7 @@ _mul_32x32_shift(INT32 a, INT32 b, UINT8 shift) #ifndef __x86_64__ #define mulu_32x32_shift _mulu_32x32_shift -INLINE UINT32 __attribute__((const, always_inline)) +INLINE UINT32 ATTR_CONST ATTR_FORCE_INLINE _mulu_32x32_shift(UINT32 a, UINT32 b, UINT8 shift) { register UINT32 result; @@ -194,7 +194,7 @@ _mulu_32x32_shift(UINT32 a, UINT32 b, UINT8 shift) #ifndef __x86_64__ #define div_64x32 _div_64x32 -INLINE INT32 __attribute__((const, always_inline)) +INLINE INT32 ATTR_CONST ATTR_FORCE_INLINE _div_64x32(INT64 a, INT32 b) { register INT32 result, temp; @@ -221,7 +221,7 @@ _div_64x32(INT64 a, INT32 b) #ifndef __x86_64__ #define divu_64x32 _divu_64x32 -INLINE UINT32 __attribute__((const, always_inline)) +INLINE UINT32 ATTR_CONST ATTR_FORCE_INLINE _divu_64x32(UINT64 a, UINT32 b) { register UINT32 result, temp; @@ -249,7 +249,7 @@ _divu_64x32(UINT64 a, UINT32 b) #ifndef __x86_64__ #define div_64x32_rem _div_64x32_rem -INLINE INT32 __attribute__((always_inline)) +INLINE INT32 ATTR_FORCE_INLINE _div_64x32_rem(INT64 dividend, INT32 divisor, INT32 *remainder) { register INT32 quotient; @@ -277,7 +277,7 @@ _div_64x32_rem(INT64 dividend, INT32 divisor, INT32 *remainder) #ifndef __x86_64__ #define divu_64x32_rem _divu_64x32_rem -INLINE UINT32 __attribute__((always_inline)) +INLINE UINT32 ATTR_FORCE_INLINE _divu_64x32_rem(UINT64 dividend, UINT32 divisor, UINT32 *remainder) { register UINT32 quotient; @@ -305,7 +305,7 @@ _divu_64x32_rem(UINT64 dividend, UINT32 divisor, UINT32 *remainder) #ifndef __x86_64__ #define div_32x32_shift _div_32x32_shift -INLINE INT32 __attribute__((const, always_inline)) +INLINE INT32 ATTR_CONST ATTR_FORCE_INLINE _div_32x32_shift(INT32 a, INT32 b, UINT8 shift) { register INT32 result; @@ -337,7 +337,7 @@ _div_32x32_shift(INT32 a, INT32 b, UINT8 shift) #ifndef __x86_64__ #define divu_32x32_shift _divu_32x32_shift -INLINE UINT32 __attribute__((const, always_inline)) +INLINE UINT32 ATTR_CONST ATTR_FORCE_INLINE _divu_32x32_shift(UINT32 a, UINT32 b, UINT8 shift) { register INT32 result; @@ -368,7 +368,7 @@ _divu_32x32_shift(UINT32 a, UINT32 b, UINT8 shift) #ifndef __x86_64__ #define mod_64x32 _mod_64x32 -INLINE INT32 __attribute__((const, always_inline)) +INLINE INT32 ATTR_CONST ATTR_FORCE_INLINE _mod_64x32(INT64 a, INT32 b) { register INT32 result, temp; @@ -395,7 +395,7 @@ _mod_64x32(INT64 a, INT32 b) #ifndef __x86_64__ #define modu_64x32 _modu_64x32 -INLINE UINT32 __attribute__((const, always_inline)) +INLINE UINT32 ATTR_CONST ATTR_FORCE_INLINE _modu_64x32(UINT64 a, UINT32 b) { register UINT32 result, temp; @@ -422,7 +422,7 @@ _modu_64x32(UINT64 a, UINT32 b) #ifdef __SSE2__ #define recip_approx _recip_approx -INLINE float __attribute__((const)) +INLINE float ATTR_CONST _recip_approx(float value) { __m128 value_xmm = _mm_set_ss(value); @@ -445,7 +445,7 @@ _recip_approx(float value) -------------------------------------------------*/ #define count_leading_zeros _count_leading_zeros -INLINE UINT8 __attribute__((const, always_inline)) +INLINE UINT8 ATTR_CONST ATTR_FORCE_INLINE _count_leading_zeros(UINT32 value) { register UINT32 result; @@ -470,7 +470,7 @@ _count_leading_zeros(UINT32 value) -------------------------------------------------*/ #define count_leading_ones _count_leading_ones -INLINE UINT8 __attribute__((const, always_inline)) +INLINE UINT8 ATTR_CONST ATTR_FORCE_INLINE _count_leading_ones(UINT32 value) { register UINT32 result; @@ -504,7 +504,7 @@ _count_leading_ones(UINT32 value) -------------------------------------------------*/ #define compare_exchange32 _compare_exchange32 -INLINE INT32 __attribute__((nonnull(1), always_inline)) +INLINE INT32 ATTR_NONNULL ATTR_FORCE_INLINE _compare_exchange32(INT32 volatile *ptr, INT32 compare, INT32 exchange) { register INT32 result; @@ -531,7 +531,7 @@ _compare_exchange32(INT32 volatile *ptr, INT32 compare, INT32 exchange) #ifdef __x86_64__ #define compare_exchange64 _compare_exchange64 -INLINE INT64 __attribute__((nonnull(1), always_inline)) +INLINE INT64 ATTR_NONNULL ATTR_FORCE_INLINE _compare_exchange64(INT64 volatile *ptr, INT64 compare, INT64 exchange) { register INT64 result; @@ -557,7 +557,7 @@ _compare_exchange64(INT64 volatile *ptr, INT64 compare, INT64 exchange) -------------------------------------------------*/ #define atomic_exchange32 _atomic_exchange32 -INLINE INT32 __attribute__((nonnull(1), always_inline)) +INLINE INT32 ATTR_NONNULL ATTR_FORCE_INLINE _atomic_exchange32(INT32 volatile *ptr, INT32 exchange) { register INT32 result; @@ -580,7 +580,7 @@ _atomic_exchange32(INT32 volatile *ptr, INT32 exchange) -------------------------------------------------*/ #define atomic_add32 _atomic_add32 -INLINE INT32 __attribute__((nonnull(1), always_inline)) +INLINE INT32 ATTR_NONNULL ATTR_FORCE_INLINE _atomic_add32(INT32 volatile *ptr, INT32 delta) { register INT32 result = delta; @@ -604,7 +604,7 @@ _atomic_add32(INT32 volatile *ptr, INT32 delta) -------------------------------------------------*/ #define atomic_increment32 _atomic_increment32 -INLINE INT32 __attribute__((nonnull(1), always_inline)) +INLINE INT32 ATTR_NONNULL ATTR_FORCE_INLINE _atomic_increment32(INT32 volatile *ptr) { register INT32 result = 1; @@ -628,7 +628,7 @@ _atomic_increment32(INT32 volatile *ptr) -------------------------------------------------*/ #define atomic_decrement32 _atomic_decrement32 -INLINE INT32 __attribute__((nonnull(1), always_inline)) +INLINE INT32 ATTR_NONNULL ATTR_FORCE_INLINE _atomic_decrement32(INT32 volatile *ptr) { register INT32 result = -1; diff --git a/src/emu/mamecore.h b/src/emu/mamecore.h index 304bb2e8f96..ebee1a49d16 100644 --- a/src/emu/mamecore.h +++ b/src/emu/mamecore.h @@ -180,15 +180,6 @@ typedef union #define DEGREE_TO_RADIAN(x) ((M_PI / 180.0) * (x)) -/* U64 and S64 are used to wrap long integer constants. */ -#ifdef __GNUC__ -#define U64(val) val##ULL -#define S64(val) val##LL -#else -#define U64(val) val -#define S64(val) val -#endif - /* Useful macros to deal with bit shuffling encryptions */ #define BIT(x,n) (((x)>>(n))&1) diff --git a/src/lib/util/options.c b/src/lib/util/options.c index bb4f9132c89..c5b6e9cf1e7 100644 --- a/src/lib/util/options.c +++ b/src/lib/util/options.c @@ -647,7 +647,14 @@ void options_output_help(core_options *opts, void (*output)(const char *)) /* otherwise, output entries for all non-deprecated items */ else if ((data->flags & (OPTION_DEPRECATED | OPTION_INTERNAL)) == 0 && data->description != NULL) - output_printf(output, "-%-20s%s\n", astring_c(data->links[0].name), data->description); + { + if (data->flags & OPTION_BOOLEAN) + output_printf(output, "-[no]%-16s%s\n", astring_c(data->links[0].name), data->description); + else if (data->flags & OPTION_COMMAND) + output_printf(output, "-%-20s%s\n", astring_c(data->links[0].name), data->description); + else + output_printf(output, "-%s %s\n%21s%s\n", astring_c(data->links[0].name), astring_c(data->links[0].name), "",data->description); + } } } diff --git a/src/osd/osdcomm.h b/src/osd/osdcomm.h index 25d93e20958..e4f7d7baea1 100644 --- a/src/osd/osdcomm.h +++ b/src/osd/osdcomm.h @@ -39,9 +39,12 @@ #define ATTR_MALLOC __attribute__((malloc)) #define ATTR_PURE __attribute__((pure)) #define ATTR_CONST __attribute__((const)) +#define ATTR_FORCE_INLINE __attribute__((always_inline)) +#define ATTR_NONNULL __attribute__((nonnull(1))) #define UNEXPECTED(exp) __builtin_expect((exp), 0) #define TYPES_COMPATIBLE(a,b) __builtin_types_compatible_p(a, b) #define RESTRICT __restrict__ +#define SETJMP_GNUC_PROTECT() (void)__builtin_return_address(1) #else #define ATTR_UNUSED #define ATTR_NORETURN @@ -49,9 +52,12 @@ #define ATTR_MALLOC #define ATTR_PURE #define ATTR_CONST +#define ATTR_FORCE_INLINE +#define ATTR_NONNULL #define UNEXPECTED(exp) (exp) #define TYPES_COMPATIBLE(a,b) 1 #define RESTRICT +#define SETJMP_GNUC_PROTECT() do {} while (0) #endif @@ -130,6 +136,16 @@ __extension__ typedef signed long long INT64; #endif +/* U64 and S64 are used to wrap long integer constants. */ +#ifdef __GNUC__ +#define U64(val) val##ULL +#define S64(val) val##LL +#else +#define U64(val) val +#define S64(val) val +#endif + + /* Highly useful macro for compile-time knowledge of an array size */ #define ARRAY_LENGTH(x) (sizeof(x) / sizeof(x[0]))