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Fixed vector modification

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This commit is contained in:
Joakim Larsson Edstrom 2016-10-17 23:24:13 +02:00
parent 8676fc0d8d
commit 7e288746a5
2 changed files with 24 additions and 15 deletions
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10
src/devices/machine/z80scc.cpp
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@ -251,6 +251,7 @@ void z80scc_device::device_start()
// state saving // state saving
save_item(NAME(m_int_state)); save_item(NAME(m_int_state));
save_item(NAME(m_int_source));
save_item(NAME(m_wr9)); save_item(NAME(m_wr9));
save_item(NAME(m_wr0_ptrbits)); save_item(NAME(m_wr0_ptrbits));
LOG((" - SCC variant %02x\n", m_variant)); LOG((" - SCC variant %02x\n", m_variant));
@ -437,16 +438,20 @@ UINT8 z80scc_device::modify_vector(UINT8 vec, int i, UINT8 src)
1 1 0 Ch A Receive Char. Available 1 1 0 Ch A Receive Char. Available
1 1 1 Ch A Special Receive Condition 1 1 1 Ch A Special Receive Condition
*/ */
// Add channel offset according to table above // Add channel offset according to table above
src &= 3;
src |= (i == CHANNEL_A ? 0x04 : 0x00 ); src |= (i == CHANNEL_A ? 0x04 : 0x00 );
// Modify vector according to Hi/lo bit of WR9 // Modify vector according to Hi/lo bit of WR9
if (m_wr9 & z80scc_channel::WR9_BIT_SHSL) // Affect V4-V6 if (m_wr9 & z80scc_channel::WR9_BIT_SHSL) // Affect V4-V6
{ {
vec &= 0x8f;
vec |= src << 4; vec |= src << 4;
} }
else // Affect V1-V3 else // Affect V1-V3
{ {
vec &= 0xf1;
vec |= src << 1; vec |= src << 1;
} }
return vec; return vec;
@ -544,6 +549,9 @@ void z80scc_device::trigger_interrupt(int index, int state)
// trigger interrupt // trigger interrupt
m_int_state[priority] |= Z80_DAISY_INT; m_int_state[priority] |= Z80_DAISY_INT;
// remember the source
m_int_source[priority] = source;
// Based on the fact that prio levels are aligned with the bitorder of rr3 we can do this... // Based on the fact that prio levels are aligned with the bitorder of rr3 we can do this...
m_chanA->m_rr3 &= ~( 0x07 << (index == CHANNEL_A ? 3 : 0 )); m_chanA->m_rr3 &= ~( 0x07 << (index == CHANNEL_A ? 3 : 0 ));
m_chanA->m_rr3 |= (prio_level << (index == CHANNEL_A ? 3 : 0 )); m_chanA->m_rr3 |= (prio_level << (index == CHANNEL_A ? 3 : 0 ));
@ -1281,7 +1289,7 @@ UINT8 z80scc_channel::do_sccreg_rr2()
// find the first channel with an interrupt requested // find the first channel with an interrupt requested
if (m_uart->m_int_state[i] & Z80_DAISY_INT) if (m_uart->m_int_state[i] & Z80_DAISY_INT)
{ {
m_rr2 = m_uart->modify_vector(m_rr2, i < 3 ? z80scc_device::CHANNEL_A : z80scc_device::CHANNEL_B, i & 3); m_rr2 = m_uart->modify_vector(m_rr2, i < 3 ? z80scc_device::CHANNEL_A : z80scc_device::CHANNEL_B, m_uart->m_int_source[i] & 3);
break; break;
} }
} }

1
src/devices/machine/z80scc.h
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@ -750,6 +750,7 @@ protected:
devcb_write_line m_out_txdrqb_cb; devcb_write_line m_out_txdrqb_cb;
int m_int_state[6]; // interrupt state int m_int_state[6]; // interrupt state
int m_int_source[6]; // interrupt source
int m_variant; int m_variant;
UINT8 m_wr0_ptrbits; UINT8 m_wr0_ptrbits;