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hitachi/b16.cpp: hookup PIT and PICs
This commit is contained in:
angelosa
parent
882c8bca03
commit
7eabbf19fd
@ -6,8 +6,12 @@
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Hitachi B(asic Master?) 16000 series?
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TODO:
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- Barely anything is known about the HW
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- b16ex2: "error message 1101"
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- Barely anything is known about the HW;
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- Requires a system disk to make it go further;
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- b16ex2: "error message 1101", bypassed between ports $80 and $48
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- b16ex2: prints gibberish before the "insert disk" screen, uses $b4000 for the upper tile bank
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in an unidentified kanji format (so bit 7 high for lr, then low)
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\- 0x2517 - 0x2519 - 0x2526 - 0x2d00 - 0x254f - 0x26b0 - 0x23e6
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===================================================================================================
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@ -36,6 +40,11 @@ Several connectors scattered across the board
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Centronics port CN9, Serial port CN8
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2 empty sockets for CN10 / CN11 (DE-9 options?)
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===================================================================================================
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Error codes (TODO: RE them all)
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0301 PIT failure
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1101 b16ex2 bus config error?
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**************************************************************************************************/
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@ -43,6 +52,8 @@ Centronics port CN9, Serial port CN8
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#include "cpu/i86/i86.h"
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#include "cpu/i86/i286.h"
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#include "machine/am9517a.h"
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#include "machine/pic8259.h"
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#include "machine/pit8253.h"
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#include "video/mc6845.h"
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#include "emupal.h"
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#include "screen.h"
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@ -56,9 +67,12 @@ public:
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b16_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag)
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, m_maincpu(*this, "maincpu")
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, m_pit(*this, "pit")
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, m_intm(*this, "intm")
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, m_ints(*this, "ints")
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, m_vram(*this, "vram")
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, m_mc6845(*this, "crtc")
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, m_dma8237(*this, "8237dma")
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, m_crtc(*this, "crtc")
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, m_dma(*this, "8237dma")
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, m_gfxdecode(*this, "gfxdecode")
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, m_palette(*this, "palette")
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, m_char_rom(*this, "pcg")
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@ -77,19 +91,19 @@ private:
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uint8_t m_crtc_vreg[0x100]{}, m_crtc_index = 0;
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required_device<cpu_device> m_maincpu;
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required_device<pit8253_device> m_pit;
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required_device<pic8259_device> m_intm;
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required_device<pic8259_device> m_ints;
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required_shared_ptr<uint16_t> m_vram;
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required_device<mc6845_device> m_mc6845;
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required_device<am9517a_device> m_dma8237;
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required_device<mc6845_device> m_crtc;
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required_device<am9517a_device> m_dma;
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required_device<gfxdecode_device> m_gfxdecode;
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required_device<palette_device> m_palette;
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required_region_ptr<uint8_t> m_char_rom;
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uint16_t vblank_r();
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void b16_pcg_w(offs_t offset, uint8_t data);
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void b16_6845_address_w(uint8_t data);
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void b16_6845_data_w(uint8_t data);
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uint8_t unk_dev_r(offs_t offset);
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void unk_dev_w(offs_t offset, uint8_t data);
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void pcg_w(offs_t offset, uint8_t data);
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void crtc_address_w(uint8_t data);
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void crtc_data_w(uint8_t data);
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uint8_t memory_read_byte(offs_t offset);
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void memory_write_byte(offs_t offset, uint8_t data);
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@ -146,7 +160,7 @@ uint32_t b16_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, c
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return 0;
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}
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void b16_state::b16_pcg_w(offs_t offset, uint8_t data)
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void b16_state::pcg_w(offs_t offset, uint8_t data)
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{
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m_char_rom[offset] = data;
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@ -158,116 +172,50 @@ void b16_state::b16_map(address_map &map)
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map.unmap_value_high();
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map(0x00000, 0x9ffff).ram(); // probably not all of it.
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map(0xa0000, 0xaffff).ram(); // bitmap?
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map(0xb0000, 0xb7fff).ram().share("vram"); // tvram
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map(0xb8000, 0xbbfff).w(FUNC(b16_state::b16_pcg_w)).umask16(0x00ff); // pcg
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map(0xb0000, 0xb7fff).ram().share("vram");
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map(0xb8000, 0xbbfff).w(FUNC(b16_state::pcg_w)).umask16(0x00ff); // pcg
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map(0xfc000, 0xfffff).rom().region("ipl", 0);
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}
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void b16_state::b16ex2_map(address_map &map)
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{
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b16_state::b16_map(map);
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// map(0x0e****) bus slot ROM?
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map(0x0f8000, 0x0fffff).rom().region("ipl", 0);
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map(0xff8000, 0xffffff).rom().region("ipl", 0);
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}
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uint16_t b16_state::vblank_r()
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{
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return ioport("SYSTEM")->read();
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}
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void b16_state::b16_6845_address_w(uint8_t data)
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void b16_state::crtc_address_w(uint8_t data)
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{
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m_crtc_index = data;
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m_mc6845->address_w(data);
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m_crtc->address_w(data);
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}
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void b16_state::b16_6845_data_w(uint8_t data)
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void b16_state::crtc_data_w(uint8_t data)
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{
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m_crtc_vreg[m_crtc_index] = data;
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m_mc6845->register_w(data);
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}
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/*
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Pretty weird protocol, dunno what it is ...
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8a (06) W
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(04) R
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ff (04) W
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(04) R
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ff (04) W
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36 (0e) W
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ff (08) W
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ff (08) W
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06 (0e) W
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(08) R
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(08) R
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36 (0e) W
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40 (08) W
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9c (08) W
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76 (0e) W
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ff (0a) W
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ff (0a) W
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46 (0e) W
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(0a) R
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(0a) R
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76 (0e) W
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1a (0a) W
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00 (0a) W
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b6 (0e) W
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ff (0c) W
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ff (0c) W
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86 (0e) W
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(0c) R
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(0c) R
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b6 (0e) W
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34 (0c) W
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00 (0c) W
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36 (0e) W
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b6 (0e) W
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40 (08) W
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9c (08) W
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34 (0c) W
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00 (0c) W
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8a (06) W
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06 (06) W
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05 (06) W
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*/
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uint8_t b16_state::unk_dev_r(offs_t offset)
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{
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static int test;
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printf("(%02x) R\n",offset << 1);
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if(offset == 0x8/2 || offset == 0x0a/2 || offset == 0x0c/2) // quick hack
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{
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test^=1;
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return test ? 0x9f : 0x92;
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}
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return 0xff;
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}
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void b16_state::unk_dev_w(offs_t offset, uint8_t data)
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{
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printf("%02x (%02x) W\n",data,offset << 1);
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m_crtc->register_w(data);
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}
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void b16_state::b16_io(address_map &map)
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{
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map.unmap_value_high();
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map(0x00, 0x0f).rw(FUNC(b16_state::unk_dev_r), FUNC(b16_state::unk_dev_w)).umask16(0x00ff); // DMA device?
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map(0x20, 0x20).w(FUNC(b16_state::b16_6845_address_w));
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map(0x22, 0x22).w(FUNC(b16_state::b16_6845_data_w));
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// map(0x00, 0x07).umask16(0x00ff); // DMA device? PIT mirror?
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map(0x08, 0x0f).rw(m_pit, FUNC(pit8253_device::read), FUNC(pit8253_device::write)).umask16(0x00ff);
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map(0x10, 0x13).rw(m_intm, FUNC(pic8259_device::read), FUNC(pic8259_device::write)).umask16(0x00ff);
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map(0x18, 0x1b).rw(m_ints, FUNC(pic8259_device::read), FUNC(pic8259_device::write)).umask16(0x00ff);
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map(0x20, 0x20).w(FUNC(b16_state::crtc_address_w));
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map(0x22, 0x22).w(FUNC(b16_state::crtc_data_w));
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// b16ex2: jumps to $e0000 if bit 7 high
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map(0x48, 0x48).lr8(NAME([] () { return 0; }));
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//0x79 bit 0 DSW?
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map(0x80, 0x81).r(FUNC(b16_state::vblank_r)); // TODO
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map(0x80, 0x81).portr("SYSTEM");
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}
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/* Input ports */
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static INPUT_PORTS_START( b16 )
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PORT_START("SYSTEM")
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PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
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PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
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INPUT_PORTS_END
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@ -308,8 +256,27 @@ void b16_state::b16(machine_config &config)
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I8086(config, m_maincpu, XTAL(14'318'181)/2); // unknown xtal, should be 8088 for base machine?
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m_maincpu->set_addrmap(AS_PROGRAM, &b16_state::b16_map);
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m_maincpu->set_addrmap(AS_IO, &b16_state::b16_io);
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m_maincpu->set_irq_acknowledge_callback(m_intm, FUNC(pic8259_device::inta_cb));
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PIT8253(config, m_pit);
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// TODO: unconfirmed, just enough to make it surpass POST checks
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m_pit->set_clk<0>(XTAL(14'318'181) / 8);
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// m_pit->out_handler<0>()
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m_pit->set_clk<1>(XTAL(14'318'181) / 4);
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// m_pit->out_handler<1>()
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m_pit->set_clk<2>(XTAL(14'318'181) / 4);
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// m_pit->out_handler<2>()
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// TODO: wrong type
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AM9517A(config, m_dma, XTAL(14'318'181)/2);
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m_dma->in_memr_callback().set(FUNC(b16_state::memory_read_byte));
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m_dma->out_memw_callback().set(FUNC(b16_state::memory_write_byte));
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MC6845(config, m_crtc, XTAL(14'318'181)/5); /* unknown variant, unknown clock, hand tuned to get ~60 fps */
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m_crtc->set_screen("screen");
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m_crtc->set_show_border_area(false);
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m_crtc->set_char_width(8);
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/* video hardware */
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screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
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screen.set_refresh_hz(60);
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screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */
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@ -318,18 +285,18 @@ void b16_state::b16(machine_config &config)
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screen.set_visarea_full();
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screen.set_palette(m_palette);
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MC6845(config, m_mc6845, XTAL(14'318'181)/5); /* unknown variant, unknown clock, hand tuned to get ~60 fps */
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m_mc6845->set_screen("screen");
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m_mc6845->set_show_border_area(false);
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m_mc6845->set_char_width(8);
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PIC8259(config, m_intm);
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m_intm->out_int_callback().set_inputline(m_maincpu, 0);
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m_intm->in_sp_callback().set_constant(1);
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// m_intm->read_slave_ack_callback()
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AM9517A(config, m_dma8237, XTAL(14'318'181)/2);
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m_dma8237->in_memr_callback().set(FUNC(b16_state::memory_read_byte));
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m_dma8237->out_memw_callback().set(FUNC(b16_state::memory_write_byte));
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PIC8259(config, m_ints, 0);
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// m_ints->out_int_callback().set(m_intm, FUNC(pic8259_device::ir?_w));
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m_ints->in_sp_callback().set_constant(0);
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GFXDECODE(config, m_gfxdecode, m_palette, gfx_b16);
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PALETTE(config, m_palette).set_entries(8);
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// MCFG_PALETTE_INIT_STANDARD(black_and_white) // TODO
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// TODO: palette format is a guess
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PALETTE(config, m_palette, palette_device::BRG_3BIT).set_entries(8);
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}
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void b16_state::b16ex2(machine_config &config)
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@ -338,6 +305,14 @@ void b16_state::b16ex2(machine_config &config)
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I80286(config.replace(), m_maincpu, XTAL(16'000'000) / 2); // A80286-8 / S
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m_maincpu->set_addrmap(AS_PROGRAM, &b16_state::b16ex2_map);
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m_maincpu->set_addrmap(AS_IO, &b16_state::b16_io);
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// TODO: as above
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m_pit->set_clk<0>(XTAL(16'000'000) / 4);
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// m_pit->out_handler<0>()
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m_pit->set_clk<1>(XTAL(16'000'000) / 4);
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// m_pit->out_handler<1>()
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m_pit->set_clk<2>(XTAL(16'000'000) / 2);
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// m_pit->out_handler<2>()
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}
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