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TMS99xx users (arcade machines) adapted to use devcb2. (nw)

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This commit is contained in:
Michael Zapf 2014-03-21 13:25:04 +00:00
parent 28ccff182e
commit 7ed3ce03c9
12 changed files with 75 additions and 217 deletions
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11
src/mame/drivers/cosmic.c
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@ -1072,19 +1072,10 @@ static MACHINE_CONFIG_DERIVED( cosmica, cosmic )
MACHINE_CONFIG_END
static TMS9980A_CONFIG( cpuconf )
{
DEVCB_NULL, // External operation
DEVCB_NULL, // Instruction acquisition
DEVCB_NULL, // Clock out
DEVCB_NULL, // Hold acknowledge
DEVCB_NULL // DBIN
};
static MACHINE_CONFIG_START( cosmicg, cosmic_state )
/* basic machine hardware */
MCFG_TMS99xx_ADD("maincpu", TMS9980A, COSMICG_MASTER_CLOCK/8, cosmicg_map, cosmicg_io_map, cpuconf)
MCFG_TMS99xx_ADD("maincpu", TMS9980A, COSMICG_MASTER_CLOCK/8, cosmicg_map, cosmicg_io_map)
/* 9.828 MHz Crystal */
/* R Nabet : huh ? This would imply the crystal frequency is somehow divided by 2 before being
fed to the tms9904 or tms9980. Also, I have never heard of a tms9900/9980 operating under

15
src/mame/drivers/jpmmps.c
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@ -203,17 +203,6 @@ MACHINE_START_MEMBER(jpmmps_state,jpmmps)
}
static TMS9995_CONFIG( cpuconf95 )
{
DEVCB_NULL, // external op
DEVCB_NULL, // Instruction acquisition
DEVCB_NULL, // clock out
DEVCB_NULL, // HOLDA
DEVCB_NULL, // DBIN
INTERNAL_RAM, // use internal RAM
NO_OVERFLOW_INT // The generally available versions of TMS9995 have a deactivated overflow interrupt
};
void jpmmps_state::machine_reset()
{
// Disable auto wait state generation by raising the READY line on reset
@ -222,8 +211,8 @@ void jpmmps_state::machine_reset()
static MACHINE_CONFIG_START( jpmmps, jpmmps_state )
/* basic machine hardware */
MCFG_TMS99xx_ADD("maincpu", TMS9995, MAIN_CLOCK, jpmmps_map, jpmmps_io_map, cpuconf95)
// CPU TMS9995, standard variant; no line connections
MCFG_TMS99xx_ADD("maincpu", TMS9995, MAIN_CLOCK, jpmmps_map, jpmmps_io_map)
MCFG_I8255_ADD( "ppi8255_ic26", ppi8255_intf_ic26 )
MCFG_I8255_ADD( "ppi8255_ic21", ppi8255_intf_ic21 )

15
src/mame/drivers/jpms80.c
View File

@ -95,20 +95,9 @@ void jpms80_state::machine_reset()
static_cast<tms9995_device*>(machine().device("maincpu"))->set_ready(ASSERT_LINE);
}
static TMS9995_CONFIG( cpuconf95 )
{
DEVCB_NULL, // external op
DEVCB_NULL, // Instruction acquisition
DEVCB_NULL, // clock out
DEVCB_NULL, // HOLDA
DEVCB_NULL, // DBIN
INTERNAL_RAM, // use internal RAM
NO_OVERFLOW_INT // The generally available versions of TMS9995 have a deactivated overflow interrupt
};
static MACHINE_CONFIG_START( jpms80, jpms80_state )
/* basic machine hardware */
MCFG_TMS99xx_ADD("maincpu", TMS9995, MAIN_CLOCK, jpms80_map, jpms80_io_map, cpuconf95)
// CPU TMS9995, standard variant; no line connections
MCFG_TMS99xx_ADD("maincpu", TMS9995, MAIN_CLOCK, jpms80_map, jpms80_io_map)
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_TMS9902_ADD("tms9902duart", tms9902_config, DUART_CLOCK)

13
src/mame/drivers/jpmsru.c
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@ -61,21 +61,12 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( jpmsru )
INPUT_PORTS_END
static TMS9980A_CONFIG( cpuconf )
{
DEVCB_NULL, // External operation
DEVCB_NULL, // Instruction acquisition
DEVCB_NULL, // Clock out
DEVCB_NULL, // Hold acknowledge
DEVCB_NULL // DBIN
};
static MACHINE_CONFIG_START( jpmsru, jpmsru_state )
MCFG_TMS99xx_ADD("maincpu", TMS9980A, MAIN_CLOCK, jpmsru_map, jpmsru_io, cpuconf)
MCFG_TMS99xx_ADD("maincpu", TMS9980A, MAIN_CLOCK, jpmsru_map, jpmsru_io)
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( jpmsru_4, jpmsru_state )
MCFG_TMS99xx_ADD("maincpu", TMS9980A, MAIN_CLOCK, jpmsru_4_map, jpmsru_io, cpuconf)
MCFG_TMS99xx_ADD("maincpu", TMS9980A, MAIN_CLOCK, jpmsru_4_map, jpmsru_io)
MACHINE_CONFIG_END
DRIVER_INIT_MEMBER(jpmsru_state,jpmsru)

109
src/mame/drivers/jubilee.c
View File

@ -34,7 +34,7 @@
1x 2114 (1024 words x 4 bits RAM).
3x 2732 labelled 1, 2 and 3.
3x 2764 labelled Red, Blue and Green (the last one also has '22-3-85').
3x 2764 labelled Red, Blue and Green (the last one also has '22-3-85').
1x 6.0 MHz crystal.
1x Panasonic BR-2/3A lithium battery (3V, 1200 mAh).
@ -158,7 +158,7 @@
- Adjusted the screen pos 8 pixels, to get a bit centered.
- Fixed palette to 8 colors.
- Added technical notes.
[2014-02-17]
- Corrected the crystal value and derivate clocks via #DEFINE.
@ -213,7 +213,7 @@ public:
UINT8 mux_sel;
UINT8 muxlamps;
required_shared_ptr<UINT8> m_videoram;
required_shared_ptr<UINT8> m_colorram;
tilemap_t *m_bg_tilemap;
@ -258,7 +258,7 @@ TILE_GET_INFO_MEMBER(jubilee_state::get_bg_tile_info)
int attr = m_colorram[tile_index];
int code = m_videoram[tile_index];
int bank = (attr & 0x03);
int color = 0; /* fixed colors: one rom for each R, G and B. */
int color = 0; /* fixed colors: one rom for each R, G and B. */
SET_TILE_INFO_MEMBER(bank, code, color, 0);
}
@ -294,15 +294,15 @@ INTERRUPT_GEN_MEMBER(jubilee_state::jubileep_interrupt)
static ADDRESS_MAP_START( jubileep_map, AS_PROGRAM, 8, jubilee_state )
ADDRESS_MAP_GLOBAL_MASK(0x3fff)
AM_RANGE(0x0000, 0x2fff) AM_ROM
/* Video RAM = 3000-33FF
Working RAM = 3400-37FF
Color RAM = 3800-3BFF (lower 4-bits)
*/
AM_RANGE(0x3000, 0x37ff) AM_RAM AM_WRITE(jubileep_videoram_w) AM_SHARE("videoworkram") /* TC5517AP battery backed RAM */
AM_RANGE(0x3000, 0x37ff) AM_RAM AM_WRITE(jubileep_videoram_w) AM_SHARE("videoworkram") /* TC5517AP battery backed RAM */
AM_RANGE(0x3800, 0x3bff) AM_RAM AM_WRITE(jubileep_colorram_w) AM_SHARE("colorram") /* Whole 2114 RAM */
/* CRTC *is* mapped here. Read 00-01 and then write on them.
/* CRTC *is* mapped here. Read 00-01 and then write on them.
Then does the same for 02-03. Initialization seems incomplete since
set till register 0x0D. Maybe the last registers are unused.
*/
@ -358,7 +358,7 @@ WRITE8_MEMBER(jubilee_state::unk_w)
0CD0 = HOLD3 lamp.
0CD2 = HOLD2 lamp.
0CD4 = HOLD1 lamp.
Can't find more. Could be a kind of multiplexion.
The input selectors don't seems to be completely involved,
but 0CC6 is set to 1 when hold 1-2-3 turn on, thing that
@ -367,7 +367,7 @@ WRITE8_MEMBER(jubilee_state::unk_w)
Writes to analize:
0CC0 (write too often... maybe input selector)
0CCC (write a bit less often...)
0CE6 = could be either a 'Insert Coin' lamp,
or coin lockout (inverted), since is active
low during the game. when the game is over,
@ -386,7 +386,7 @@ WRITE8_MEMBER(jubilee_state::unk_w)
Pressing reset ----> writes 1 to 0CF8
Pressing deal -----> writes 1 to 0D00
(See below, in sound writes...)
(See below, in sound writes...)
*/
if (((offset<<1)==0x0ccc)&&(data==1))
@ -399,7 +399,7 @@ WRITE8_MEMBER(jubilee_state::unk_w)
}
/* the following structure has 3 states, because I tested the inputs
selectors 0CC2-0CC4-0CC6 as lamps multiplexers unsuccessfuly.
selectors 0CC2-0CC4-0CC6 as lamps multiplexers unsuccessfuly.
*/
if (((offset<<1)==0x0cd0)&&(data==1))
{
@ -407,63 +407,63 @@ WRITE8_MEMBER(jubilee_state::unk_w)
{
output_set_lamp_value(0, (data & 1)); /* lamp */
logerror("CRU: LAAAAAAMP 0 write to address %04x: %d\n", offset<<1, data & 1);
// popmessage("LAMP 0");
// popmessage("LAMP 0");
}
if (muxlamps == 2)
{
output_set_lamp_value(3, (data & 1)); /* lamp */
logerror("CRU: LAAAAAAMP 3 write to address %04x: %d\n", offset<<1, data & 1);
// popmessage("LAMP 3");
// popmessage("LAMP 3");
}
if (muxlamps == 3)
{
output_set_lamp_value(6, (data & 1)); /* lamp */
logerror("CRU: LAAAAAAMP 6 write to address %04x: %d\n", offset<<1, data & 1);
// popmessage("LAMP 6");
// popmessage("LAMP 6");
}
}
if (((offset<<1)==0x0cd2)&&(data==1))
{
if (muxlamps == 1)
{
output_set_lamp_value(1, (data & 1)); /* lamp */
logerror("CRU: LAAAAAAMP 1 write to address %04x: %d\n", offset<<1, data & 1);
// popmessage("LAMP 1");
// popmessage("LAMP 1");
}
if (muxlamps == 2)
{
output_set_lamp_value(4, (data & 1)); /* lamp */
logerror("CRU: LAAAAAAMP 4 write to address %04x: %d\n", offset<<1, data & 1);
// popmessage("LAMP 4");
// popmessage("LAMP 4");
}
if (muxlamps == 3)
{
output_set_lamp_value(7, (data & 1)); /* lamp */
logerror("CRU: LAAAAAAMP 7 write to address %04x: %d\n", offset<<1, data & 1);
// popmessage("LAMP 7");
// popmessage("LAMP 7");
}
}
if (((offset<<1)==0x0cd4)&&(data==1))
{
if (muxlamps == 1)
{
output_set_lamp_value(2, (data & 1)); /* lamp */
logerror("CRU: LAAAAAAMP 2 write to address %04x: %d\n", offset<<1, data & 1);
// popmessage("LAMP 2");
// popmessage("LAMP 2");
}
if (muxlamps == 2)
{
output_set_lamp_value(5, (data & 1)); /* lamp */
logerror("CRU: LAAAAAAMP 5 write to address %04x: %d\n", offset<<1, data & 1);
// popmessage("LAMP 5");
// popmessage("LAMP 5");
}
if (muxlamps == 3)
{
output_set_lamp_value(8, (data & 1)); /* lamp */
logerror("CRU: LAAAAAAMP 8 write to address %04x: %d\n", offset<<1, data & 1);
// popmessage("LAMP 8");
// popmessage("LAMP 8");
}
}
@ -483,65 +483,65 @@ WRITE8_MEMBER(jubilee_state::unk_w)
Pressing reset ----> writes 1 to 0CF8
Pressing deal -----> writes 1 to 0D00
*/
if (((offset<<1)==0x0ce8)&&(data==1))
{
logerror("CRU: SOUND 'CANCEL' write to address %04x: %d\n", offset<<1, data & 1);
// popmessage("SOUND 'CANCEL': %04x", offset<<1);
// popmessage("SOUND 'CANCEL': %04x", offset<<1);
}
if (((offset<<1)==0x0cea)&&(data==1))
{
logerror("CRU: SOUND 'BET' write to address %04x: %d\n", offset<<1, data & 1);
// popmessage("SOUND 'BET': %04x", offset<<1);
// popmessage("SOUND 'BET': %04x", offset<<1);
}
if (((offset<<1)==0x0cec)&&(data==1))
{
logerror("CRU: SOUND 'HOLD4' write to address %04x: %d\n", offset<<1, data & 1);
// popmessage("SOUND 'HOLD 4': %04x", offset<<1);
// popmessage("SOUND 'HOLD 4': %04x", offset<<1);
}
if (((offset<<1)==0x0cee)&&(data==1))
{
logerror("CRU: SOUND 'HOLD5' write to address %04x: %d\n", offset<<1, data & 1);
// popmessage("SOUND 'HOLD 5': %04x", offset<<1);
// popmessage("SOUND 'HOLD 5': %04x", offset<<1);
}
if (((offset<<1)==0x0cf0)&&(data==1))
{
logerror("CRU: SOUND 'HAND PAY' write to address %04x: %d\n", offset<<1, data & 1);
// popmessage("SOUND 'HAND PAY': %04x", offset<<1);
// popmessage("SOUND 'HAND PAY': %04x", offset<<1);
}
if (((offset<<1)==0x0cf2)&&(data==1))
{
logerror("CRU: SOUND 'HOLD1' write to address %04x: %d\n", offset<<1, data & 1);
// popmessage("SOUND 'HOLD 1': %04x", offset<<1);
// popmessage("SOUND 'HOLD 1': %04x", offset<<1);
}
if (((offset<<1)==0x0cf4)&&(data==1))
{
logerror("CRU: SOUND 'HOLD2' write to address %04x: %d\n", offset<<1, data & 1);
// popmessage("SOUND 'HOLD 2': %04x", offset<<1);
// popmessage("SOUND 'HOLD 2': %04x", offset<<1);
}
if (((offset<<1)==0x0cf6)&&(data==1))
{
logerror("CRU: SOUND 'HOLD3' write to address %04x: %d\n", offset<<1, data & 1);
// popmessage("SOUND 'HOLD 3': %04x", offset<<1);
// popmessage("SOUND 'HOLD 3': %04x", offset<<1);
}
if (((offset<<1)==0x0cf8)&&(data==1))
{
logerror("CRU: SOUND 'RESET' write to address %04x: %d\n", offset<<1, data & 1);
// popmessage("SOUND 'RESET': %04x", offset<<1);
// popmessage("SOUND 'RESET': %04x", offset<<1);
}
if (((offset<<1)==0x0d00)&&(data==1))
{
logerror("CRU: SOUND 'DEAL' write to address %04x: %d\n", offset<<1, data & 1);
// popmessage("SOUND 'DEAL': %04x", offset<<1);
// popmessage("SOUND 'DEAL': %04x", offset<<1);
}
@ -555,7 +555,7 @@ READ8_MEMBER(jubilee_state::mux_port_r)
switch( mux_sel )
{
case 0x01: return ioport("IN0")->read();
case 0x02: return ioport("IN1")->read(); /* muxed credits input is here! */
case 0x02: return ioport("IN1")->read(); /* muxed credits input is here! */
case 0x03: return ioport("IN2")->read();
}
@ -564,7 +564,7 @@ READ8_MEMBER(jubilee_state::mux_port_r)
static ADDRESS_MAP_START( jubileep_cru_map, AS_IO, 8, jubilee_state )
AM_RANGE(0x00c8, 0x00c8) AM_READ(mux_port_r) /* multiplexed input port */
AM_RANGE(0x00c8, 0x00c8) AM_READ(mux_port_r) /* multiplexed input port */
AM_RANGE(0x0000, 0x0fff) AM_WRITE(unk_w)
ADDRESS_MAP_END
@ -590,18 +590,18 @@ static INPUT_PORTS_START( jubileep )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_GAMBLE_BET ) PORT_NAME("Bet / Gamble")
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_POKER_HOLD4 ) PORT_NAME("Hold 4 / Half Gamble")
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_POKER_HOLD5 ) PORT_NAME("Hold 5 / Red")
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("Hand Pay") PORT_CODE(KEYCODE_8)
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("Hand Pay") PORT_CODE(KEYCODE_8)
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_POKER_HOLD1 ) PORT_NAME("Hold 1 / Black")
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_POKER_HOLD2 ) PORT_NAME("Hold 2")
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_POKER_HOLD3 ) PORT_NAME("Hold 3")
PORT_START("IN1")
/* Don't know if this needs a custom port. Bits 0 and 1 together are the credits input.
Bit 1 alone could be "Attendant Paid Status (reset)" that does a reset and update the
paid status, or just is for edge coin-in timeouts... Impossible to say without a PCB.
Bit 1 alone could be "Attendant Paid Status (reset)" that does a reset and update the
paid status, or just is for edge coin-in timeouts... Impossible to say without a PCB.
*/
PORT_BIT( 0x03, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE (2)
// PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("Attendant Paid Status (reset)") PORT_CODE(KEYCODE_7)
// PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("Attendant Paid Status (reset)") PORT_CODE(KEYCODE_7)
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNKNOWN )
@ -642,7 +642,7 @@ static const gfx_layout tilelayout =
* Graphics Decode Information *
******************************/
static GFXDECODE_START( jubileep ) /* 4 different graphics banks */
static GFXDECODE_START( jubileep ) /* 4 different graphics banks */
GFXDECODE_ENTRY( "gfx1", 0, tilelayout, 0, 1 )
GFXDECODE_ENTRY( "gfx1", 0x0800, tilelayout, 0, 1 )
GFXDECODE_ENTRY( "gfx1", 0x1000, tilelayout, 0, 1 )
@ -669,23 +669,14 @@ static MC6845_INTERFACE( mc6845_intf )
NULL /* update address callback */
};
static TMS9980A_CONFIG( cpuconf )
{
DEVCB_NULL,
DEVCB_NULL, /* Instruction acquisition */
DEVCB_NULL, /* Clock out */
DEVCB_NULL, /* Hold acknowledge */
DEVCB_NULL /* DBIN */
};
/*************************
* Machine Drivers *
*************************/
static MACHINE_CONFIG_START( jubileep, jubilee_state )
/* basic machine hardware */
MCFG_TMS99xx_ADD("maincpu", TMS9980A, CPU_CLOCK, jubileep_map, jubileep_cru_map, cpuconf)
// Main CPU TMS9980A, no line connections.
MCFG_TMS99xx_ADD("maincpu", TMS9980A, CPU_CLOCK, jubileep_map, jubileep_cru_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", jubilee_state, jubileep_interrupt)
MCFG_NVRAM_ADD_0FILL("videoworkram")

17
src/mame/drivers/jvh.c
View File

@ -100,29 +100,20 @@ void jvh_state::machine_reset()
{
}
static TMS9980A_CONFIG( cpuconf )
{
DEVCB_NULL, // External operation
DEVCB_NULL, // Instruction acquisition
DEVCB_NULL, // Clock out
DEVCB_NULL, // Hold acknowledge
DEVCB_NULL // DBIN
};
DRIVER_INIT_MEMBER(jvh_state,jvh)
{
}
static MACHINE_CONFIG_START( jvh, jvh_state )
/* basic machine hardware */
MCFG_TMS99xx_ADD("maincpu", TMS9980A, 1000000, jvh_map, escape_io, cpuconf)
// CPU TMS9980A; no line connections
MCFG_TMS99xx_ADD("maincpu", TMS9980A, 1000000, jvh_map, escape_io)
MCFG_CPU_ADD("cpu2", M6800, 1000000)
MCFG_CPU_PROGRAM_MAP(jvh_sub_map)
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( jvh2, jvh_state )
/* basic machine hardware */
MCFG_TMS99xx_ADD("maincpu", TMS9980A, 1000000, jvh_map, movmastr_io, cpuconf)
// CPU TMS9980At; no line connections
MCFG_TMS99xx_ADD("maincpu", TMS9980A, 1000000, jvh_map, movmastr_io)
MCFG_CPU_ADD("cpu2", M6800, 1000000)
MCFG_CPU_PROGRAM_MAP(jvh_sub_map)
MACHINE_CONFIG_END

33
src/mame/drivers/looping.c
View File

@ -634,32 +634,6 @@ static const ay8910_interface ay8910_config =
DEVCB_NULL
};
/*************************************
*
* CPU configs
*
*************************************/
static TMS9980A_CONFIG( cpuconf80 )
{
DEVCB_NULL,
DEVCB_NULL, // Instruction acquisition
DEVCB_NULL, // Clock out
DEVCB_NULL, // Hold acknowledge
DEVCB_NULL // DBIN
};
static TMS9995_CONFIG( cpuconf95 )
{
DEVCB_NULL, // external op
DEVCB_NULL, // Instruction acquisition
DEVCB_NULL, // clock out
DEVCB_NULL, // HOLDA
DEVCB_NULL, // DBIN
INTERNAL_RAM, // use internal RAM
NO_OVERFLOW_INT // The generally available versions of TMS9995 have a deactivated overflow interrupt
};
/*************************************
*
* Machine drivers
@ -668,11 +642,12 @@ static TMS9995_CONFIG( cpuconf95 )
static MACHINE_CONFIG_START( looping, looping_state )
/* basic machine hardware */
MCFG_TMS99xx_ADD("maincpu", TMS9995, MAIN_CPU_CLOCK, looping_map, looping_io_map, cpuconf95)
// CPU TMS9995, standard variant; no line connections
MCFG_TMS99xx_ADD("maincpu", TMS9995, MAIN_CPU_CLOCK, looping_map, looping_io_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", looping_state, looping_interrupt)
MCFG_TMS99xx_ADD("audiocpu", TMS9980A, SOUND_CLOCK/4, looping_sound_map, looping_sound_io_map, cpuconf80)
// CPU TMS9980A for audio subsystem; no line connections
MCFG_TMS99xx_ADD("audiocpu", TMS9980A, SOUND_CLOCK/4, looping_sound_map, looping_sound_io_map)
MCFG_CPU_ADD("mcu", COP420, COP_CLOCK)
MCFG_CPU_PROGRAM_MAP(looping_cop_map)

15
src/mame/drivers/nsm.c
View File

@ -108,17 +108,6 @@ WRITE8_MEMBER( nsm_state::cru_w )
}
}
static TMS9995_CONFIG( cpuconf95 )
{
DEVCB_NULL, // external op
DEVCB_NULL, // Instruction acquisition
DEVCB_NULL, // clock out
DEVCB_NULL, // HOLDA
DEVCB_NULL, // DBIN
INTERNAL_RAM, // use internal RAM
NO_OVERFLOW_INT // The generally available versions of TMS9995 have a deactivated overflow interrupt
};
void nsm_state::machine_reset()
{
// Disable auto wait state generation by raising the READY line on reset
@ -126,8 +115,8 @@ void nsm_state::machine_reset()
}
static MACHINE_CONFIG_START( nsm, nsm_state )
/* basic machine hardware */
MCFG_TMS99xx_ADD("maincpu", TMS9995, 11052000, nsm_map, nsm_io_map, cpuconf95)
// CPU TMS9995, standard variant; no line connection
MCFG_TMS99xx_ADD("maincpu", TMS9995, 11052000, nsm_map, nsm_io_map)
/* Video */
MCFG_DEFAULT_LAYOUT(layout_nsm)

15
src/mame/drivers/nsmpoker.c
View File

@ -395,17 +395,6 @@ static GFXDECODE_START( nsmpoker )
GFXDECODE_END
static TMS9995_CONFIG( cpuconf95 )
{
DEVCB_NULL, // external op
DEVCB_NULL, // Instruction acquisition
DEVCB_NULL, // clock out
DEVCB_NULL, // HOLDA
DEVCB_NULL, // DBIN
INTERNAL_RAM, // use internal RAM
NO_OVERFLOW_INT // The generally available versions of TMS9995 have a deactivated overflow interrupt
};
void nsmpoker_state::machine_reset()
{
// Disable auto wait state generation by raising the READY line on reset
@ -418,8 +407,8 @@ void nsmpoker_state::machine_reset()
static MACHINE_CONFIG_START( nsmpoker, nsmpoker_state )
/* basic machine hardware */
MCFG_TMS99xx_ADD("maincpu", TMS9995, MASTER_CLOCK/2, nsmpoker_map, nsmpoker_portmap, cpuconf95)
// CPU TMS9995, standard variant; no line connections
MCFG_TMS99xx_ADD("maincpu", TMS9995, MASTER_CLOCK/2, nsmpoker_map, nsmpoker_portmap)
MCFG_CPU_VBLANK_INT_DRIVER("screen", nsmpoker_state, nsmpoker_interrupt)
/* video hardware */

15
src/mame/drivers/pachifev.c
View File

@ -348,21 +348,10 @@ void pachifev_state::machine_start()
save_item(NAME(m_cnt));
}
static TMS9995_CONFIG( cpuconf95 )
{
DEVCB_NULL, // external op
DEVCB_NULL, // Instruction acquisition
DEVCB_NULL, // clock out
DEVCB_NULL, // HOLDA
DEVCB_NULL, // DBIN
INTERNAL_RAM, // use internal RAM
NO_OVERFLOW_INT // The generally available versions of TMS9995 have a deactivated overflow interrupt
};
static MACHINE_CONFIG_START( pachifev, pachifev_state )
/* basic machine hardware */
MCFG_TMS99xx_ADD("maincpu", TMS9995, XTAL_12MHz, pachifev_map, pachifev_cru, cpuconf95)
// CPU TMS9995, standard variant; no line connections
MCFG_TMS99xx_ADD("maincpu", TMS9995, XTAL_12MHz, pachifev_map, pachifev_cru)
MCFG_CPU_VBLANK_INT_DRIVER("screen", pachifev_state, pachifev_vblank_irq)
/* video hardware */

18
src/mame/drivers/supertnk.c
View File

@ -415,19 +415,6 @@ static INPUT_PORTS_START( supertnk )
INPUT_PORTS_END
/************
CPU config
*************/
static TMS9980A_CONFIG( cpuconf )
{
DEVCB_NULL, // External operation
DEVCB_NULL, // Instruction acquisition
DEVCB_NULL, // Clock out
DEVCB_NULL, // Hold acknowledge
DEVCB_NULL // DBIN
};
/*************************************
*
* Machine driver
@ -436,11 +423,10 @@ static TMS9980A_CONFIG( cpuconf )
static MACHINE_CONFIG_START( supertnk, supertnk_state )
/* basic machine hardware */
MCFG_TMS99xx_ADD("maincpu", TMS9980A, 2598750, supertnk_map, supertnk_io_map, cpuconf)
// CPU TMS9980A; no line connections
MCFG_TMS99xx_ADD("maincpu", TMS9980A, 2598750, supertnk_map, supertnk_io_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", supertnk_state, supertnk_interrupt)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

16
src/mame/drivers/tmspoker.c
View File

@ -564,26 +564,14 @@ static MC6845_INTERFACE( mc6845_intf )
NULL /* update address callback */
};
/***********************
* CPU Interface *
************************/
static TMS9980A_CONFIG( cpuconf )
{
DEVCB_NULL, // External operation
DEVCB_NULL, // Instruction acquisition
DEVCB_NULL, // Clock out
DEVCB_NULL, // Hold acknowledge
DEVCB_NULL // DBIN
};
/*************************
* Machine Drivers *
*************************/
static MACHINE_CONFIG_START( tmspoker, tmspoker_state )
/* basic machine hardware */
MCFG_TMS99xx_ADD("maincpu", TMS9980A, MASTER_CLOCK/4, tmspoker_map, tmspoker_cru_map, cpuconf)
// CPU TMS9980A; no line connections
MCFG_TMS99xx_ADD("maincpu", TMS9980A, MASTER_CLOCK/4, tmspoker_map, tmspoker_cru_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", tmspoker_state, tmspoker_interrupt)
// MCFG_NVRAM_HANDLER(generic_0fill)