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https://github.com/holub/mame
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TMS99xx users (arcade machines) adapted to use devcb2. (nw)
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7ed3ce03c9
@ -1072,19 +1072,10 @@ static MACHINE_CONFIG_DERIVED( cosmica, cosmic )
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MACHINE_CONFIG_END
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MACHINE_CONFIG_END
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static TMS9980A_CONFIG( cpuconf )
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{
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DEVCB_NULL, // External operation
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DEVCB_NULL, // Instruction acquisition
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DEVCB_NULL, // Clock out
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DEVCB_NULL, // Hold acknowledge
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DEVCB_NULL // DBIN
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};
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static MACHINE_CONFIG_START( cosmicg, cosmic_state )
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static MACHINE_CONFIG_START( cosmicg, cosmic_state )
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/* basic machine hardware */
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/* basic machine hardware */
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MCFG_TMS99xx_ADD("maincpu", TMS9980A, COSMICG_MASTER_CLOCK/8, cosmicg_map, cosmicg_io_map, cpuconf)
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MCFG_TMS99xx_ADD("maincpu", TMS9980A, COSMICG_MASTER_CLOCK/8, cosmicg_map, cosmicg_io_map)
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/* 9.828 MHz Crystal */
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/* 9.828 MHz Crystal */
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/* R Nabet : huh ? This would imply the crystal frequency is somehow divided by 2 before being
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/* R Nabet : huh ? This would imply the crystal frequency is somehow divided by 2 before being
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fed to the tms9904 or tms9980. Also, I have never heard of a tms9900/9980 operating under
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fed to the tms9904 or tms9980. Also, I have never heard of a tms9900/9980 operating under
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@ -203,17 +203,6 @@ MACHINE_START_MEMBER(jpmmps_state,jpmmps)
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}
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}
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static TMS9995_CONFIG( cpuconf95 )
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{
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DEVCB_NULL, // external op
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DEVCB_NULL, // Instruction acquisition
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DEVCB_NULL, // clock out
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DEVCB_NULL, // HOLDA
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DEVCB_NULL, // DBIN
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INTERNAL_RAM, // use internal RAM
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NO_OVERFLOW_INT // The generally available versions of TMS9995 have a deactivated overflow interrupt
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};
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void jpmmps_state::machine_reset()
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void jpmmps_state::machine_reset()
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{
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{
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// Disable auto wait state generation by raising the READY line on reset
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// Disable auto wait state generation by raising the READY line on reset
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@ -222,8 +211,8 @@ void jpmmps_state::machine_reset()
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static MACHINE_CONFIG_START( jpmmps, jpmmps_state )
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static MACHINE_CONFIG_START( jpmmps, jpmmps_state )
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/* basic machine hardware */
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// CPU TMS9995, standard variant; no line connections
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MCFG_TMS99xx_ADD("maincpu", TMS9995, MAIN_CLOCK, jpmmps_map, jpmmps_io_map, cpuconf95)
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MCFG_TMS99xx_ADD("maincpu", TMS9995, MAIN_CLOCK, jpmmps_map, jpmmps_io_map)
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MCFG_I8255_ADD( "ppi8255_ic26", ppi8255_intf_ic26 )
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MCFG_I8255_ADD( "ppi8255_ic26", ppi8255_intf_ic26 )
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MCFG_I8255_ADD( "ppi8255_ic21", ppi8255_intf_ic21 )
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MCFG_I8255_ADD( "ppi8255_ic21", ppi8255_intf_ic21 )
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@ -95,20 +95,9 @@ void jpms80_state::machine_reset()
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static_cast<tms9995_device*>(machine().device("maincpu"))->set_ready(ASSERT_LINE);
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static_cast<tms9995_device*>(machine().device("maincpu"))->set_ready(ASSERT_LINE);
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}
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}
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static TMS9995_CONFIG( cpuconf95 )
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{
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DEVCB_NULL, // external op
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DEVCB_NULL, // Instruction acquisition
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DEVCB_NULL, // clock out
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DEVCB_NULL, // HOLDA
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DEVCB_NULL, // DBIN
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INTERNAL_RAM, // use internal RAM
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NO_OVERFLOW_INT // The generally available versions of TMS9995 have a deactivated overflow interrupt
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};
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static MACHINE_CONFIG_START( jpms80, jpms80_state )
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static MACHINE_CONFIG_START( jpms80, jpms80_state )
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/* basic machine hardware */
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// CPU TMS9995, standard variant; no line connections
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MCFG_TMS99xx_ADD("maincpu", TMS9995, MAIN_CLOCK, jpms80_map, jpms80_io_map, cpuconf95)
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MCFG_TMS99xx_ADD("maincpu", TMS9995, MAIN_CLOCK, jpms80_map, jpms80_io_map)
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MCFG_SPEAKER_STANDARD_MONO("mono")
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MCFG_SPEAKER_STANDARD_MONO("mono")
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MCFG_TMS9902_ADD("tms9902duart", tms9902_config, DUART_CLOCK)
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MCFG_TMS9902_ADD("tms9902duart", tms9902_config, DUART_CLOCK)
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@ -61,21 +61,12 @@ ADDRESS_MAP_END
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static INPUT_PORTS_START( jpmsru )
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static INPUT_PORTS_START( jpmsru )
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INPUT_PORTS_END
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INPUT_PORTS_END
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static TMS9980A_CONFIG( cpuconf )
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{
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DEVCB_NULL, // External operation
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DEVCB_NULL, // Instruction acquisition
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DEVCB_NULL, // Clock out
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DEVCB_NULL, // Hold acknowledge
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DEVCB_NULL // DBIN
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};
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static MACHINE_CONFIG_START( jpmsru, jpmsru_state )
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static MACHINE_CONFIG_START( jpmsru, jpmsru_state )
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MCFG_TMS99xx_ADD("maincpu", TMS9980A, MAIN_CLOCK, jpmsru_map, jpmsru_io, cpuconf)
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MCFG_TMS99xx_ADD("maincpu", TMS9980A, MAIN_CLOCK, jpmsru_map, jpmsru_io)
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MACHINE_CONFIG_END
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MACHINE_CONFIG_END
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static MACHINE_CONFIG_START( jpmsru_4, jpmsru_state )
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static MACHINE_CONFIG_START( jpmsru_4, jpmsru_state )
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MCFG_TMS99xx_ADD("maincpu", TMS9980A, MAIN_CLOCK, jpmsru_4_map, jpmsru_io, cpuconf)
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MCFG_TMS99xx_ADD("maincpu", TMS9980A, MAIN_CLOCK, jpmsru_4_map, jpmsru_io)
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MACHINE_CONFIG_END
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MACHINE_CONFIG_END
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DRIVER_INIT_MEMBER(jpmsru_state,jpmsru)
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DRIVER_INIT_MEMBER(jpmsru_state,jpmsru)
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@ -258,7 +258,7 @@ TILE_GET_INFO_MEMBER(jubilee_state::get_bg_tile_info)
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int attr = m_colorram[tile_index];
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int attr = m_colorram[tile_index];
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int code = m_videoram[tile_index];
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int code = m_videoram[tile_index];
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int bank = (attr & 0x03);
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int bank = (attr & 0x03);
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int color = 0; /* fixed colors: one rom for each R, G and B. */
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int color = 0; /* fixed colors: one rom for each R, G and B. */
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SET_TILE_INFO_MEMBER(bank, code, color, 0);
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SET_TILE_INFO_MEMBER(bank, code, color, 0);
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}
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}
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@ -299,10 +299,10 @@ static ADDRESS_MAP_START( jubileep_map, AS_PROGRAM, 8, jubilee_state )
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Working RAM = 3400-37FF
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Working RAM = 3400-37FF
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Color RAM = 3800-3BFF (lower 4-bits)
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Color RAM = 3800-3BFF (lower 4-bits)
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*/
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*/
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AM_RANGE(0x3000, 0x37ff) AM_RAM AM_WRITE(jubileep_videoram_w) AM_SHARE("videoworkram") /* TC5517AP battery backed RAM */
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AM_RANGE(0x3000, 0x37ff) AM_RAM AM_WRITE(jubileep_videoram_w) AM_SHARE("videoworkram") /* TC5517AP battery backed RAM */
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AM_RANGE(0x3800, 0x3bff) AM_RAM AM_WRITE(jubileep_colorram_w) AM_SHARE("colorram") /* Whole 2114 RAM */
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AM_RANGE(0x3800, 0x3bff) AM_RAM AM_WRITE(jubileep_colorram_w) AM_SHARE("colorram") /* Whole 2114 RAM */
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/* CRTC *is* mapped here. Read 00-01 and then write on them.
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/* CRTC *is* mapped here. Read 00-01 and then write on them.
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Then does the same for 02-03. Initialization seems incomplete since
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Then does the same for 02-03. Initialization seems incomplete since
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set till register 0x0D. Maybe the last registers are unused.
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set till register 0x0D. Maybe the last registers are unused.
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*/
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*/
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@ -386,7 +386,7 @@ WRITE8_MEMBER(jubilee_state::unk_w)
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Pressing reset ----> writes 1 to 0CF8
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Pressing reset ----> writes 1 to 0CF8
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Pressing deal -----> writes 1 to 0D00
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Pressing deal -----> writes 1 to 0D00
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(See below, in sound writes...)
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(See below, in sound writes...)
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*/
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*/
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if (((offset<<1)==0x0ccc)&&(data==1))
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if (((offset<<1)==0x0ccc)&&(data==1))
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@ -407,19 +407,19 @@ WRITE8_MEMBER(jubilee_state::unk_w)
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{
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{
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output_set_lamp_value(0, (data & 1)); /* lamp */
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output_set_lamp_value(0, (data & 1)); /* lamp */
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logerror("CRU: LAAAAAAMP 0 write to address %04x: %d\n", offset<<1, data & 1);
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logerror("CRU: LAAAAAAMP 0 write to address %04x: %d\n", offset<<1, data & 1);
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// popmessage("LAMP 0");
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// popmessage("LAMP 0");
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}
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}
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if (muxlamps == 2)
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if (muxlamps == 2)
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{
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{
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output_set_lamp_value(3, (data & 1)); /* lamp */
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output_set_lamp_value(3, (data & 1)); /* lamp */
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logerror("CRU: LAAAAAAMP 3 write to address %04x: %d\n", offset<<1, data & 1);
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logerror("CRU: LAAAAAAMP 3 write to address %04x: %d\n", offset<<1, data & 1);
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// popmessage("LAMP 3");
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// popmessage("LAMP 3");
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}
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}
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if (muxlamps == 3)
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if (muxlamps == 3)
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{
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{
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output_set_lamp_value(6, (data & 1)); /* lamp */
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output_set_lamp_value(6, (data & 1)); /* lamp */
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logerror("CRU: LAAAAAAMP 6 write to address %04x: %d\n", offset<<1, data & 1);
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logerror("CRU: LAAAAAAMP 6 write to address %04x: %d\n", offset<<1, data & 1);
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// popmessage("LAMP 6");
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// popmessage("LAMP 6");
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}
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}
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}
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}
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@ -429,19 +429,19 @@ WRITE8_MEMBER(jubilee_state::unk_w)
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{
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{
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output_set_lamp_value(1, (data & 1)); /* lamp */
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output_set_lamp_value(1, (data & 1)); /* lamp */
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logerror("CRU: LAAAAAAMP 1 write to address %04x: %d\n", offset<<1, data & 1);
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logerror("CRU: LAAAAAAMP 1 write to address %04x: %d\n", offset<<1, data & 1);
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// popmessage("LAMP 1");
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// popmessage("LAMP 1");
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}
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}
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if (muxlamps == 2)
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if (muxlamps == 2)
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{
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{
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output_set_lamp_value(4, (data & 1)); /* lamp */
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output_set_lamp_value(4, (data & 1)); /* lamp */
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logerror("CRU: LAAAAAAMP 4 write to address %04x: %d\n", offset<<1, data & 1);
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logerror("CRU: LAAAAAAMP 4 write to address %04x: %d\n", offset<<1, data & 1);
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// popmessage("LAMP 4");
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// popmessage("LAMP 4");
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}
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}
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if (muxlamps == 3)
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if (muxlamps == 3)
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{
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{
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output_set_lamp_value(7, (data & 1)); /* lamp */
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output_set_lamp_value(7, (data & 1)); /* lamp */
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logerror("CRU: LAAAAAAMP 7 write to address %04x: %d\n", offset<<1, data & 1);
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logerror("CRU: LAAAAAAMP 7 write to address %04x: %d\n", offset<<1, data & 1);
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// popmessage("LAMP 7");
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// popmessage("LAMP 7");
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}
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}
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}
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}
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@ -451,19 +451,19 @@ WRITE8_MEMBER(jubilee_state::unk_w)
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{
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{
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output_set_lamp_value(2, (data & 1)); /* lamp */
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output_set_lamp_value(2, (data & 1)); /* lamp */
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logerror("CRU: LAAAAAAMP 2 write to address %04x: %d\n", offset<<1, data & 1);
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logerror("CRU: LAAAAAAMP 2 write to address %04x: %d\n", offset<<1, data & 1);
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// popmessage("LAMP 2");
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// popmessage("LAMP 2");
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}
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}
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if (muxlamps == 2)
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if (muxlamps == 2)
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{
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{
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output_set_lamp_value(5, (data & 1)); /* lamp */
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output_set_lamp_value(5, (data & 1)); /* lamp */
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logerror("CRU: LAAAAAAMP 5 write to address %04x: %d\n", offset<<1, data & 1);
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logerror("CRU: LAAAAAAMP 5 write to address %04x: %d\n", offset<<1, data & 1);
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// popmessage("LAMP 5");
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// popmessage("LAMP 5");
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}
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}
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if (muxlamps == 3)
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if (muxlamps == 3)
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{
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{
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output_set_lamp_value(8, (data & 1)); /* lamp */
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output_set_lamp_value(8, (data & 1)); /* lamp */
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logerror("CRU: LAAAAAAMP 8 write to address %04x: %d\n", offset<<1, data & 1);
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logerror("CRU: LAAAAAAMP 8 write to address %04x: %d\n", offset<<1, data & 1);
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// popmessage("LAMP 8");
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// popmessage("LAMP 8");
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}
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}
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}
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}
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@ -487,61 +487,61 @@ WRITE8_MEMBER(jubilee_state::unk_w)
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if (((offset<<1)==0x0ce8)&&(data==1))
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if (((offset<<1)==0x0ce8)&&(data==1))
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{
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{
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logerror("CRU: SOUND 'CANCEL' write to address %04x: %d\n", offset<<1, data & 1);
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logerror("CRU: SOUND 'CANCEL' write to address %04x: %d\n", offset<<1, data & 1);
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// popmessage("SOUND 'CANCEL': %04x", offset<<1);
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// popmessage("SOUND 'CANCEL': %04x", offset<<1);
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}
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}
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if (((offset<<1)==0x0cea)&&(data==1))
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if (((offset<<1)==0x0cea)&&(data==1))
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{
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{
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logerror("CRU: SOUND 'BET' write to address %04x: %d\n", offset<<1, data & 1);
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logerror("CRU: SOUND 'BET' write to address %04x: %d\n", offset<<1, data & 1);
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// popmessage("SOUND 'BET': %04x", offset<<1);
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// popmessage("SOUND 'BET': %04x", offset<<1);
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}
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}
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if (((offset<<1)==0x0cec)&&(data==1))
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if (((offset<<1)==0x0cec)&&(data==1))
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{
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{
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logerror("CRU: SOUND 'HOLD4' write to address %04x: %d\n", offset<<1, data & 1);
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logerror("CRU: SOUND 'HOLD4' write to address %04x: %d\n", offset<<1, data & 1);
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// popmessage("SOUND 'HOLD 4': %04x", offset<<1);
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// popmessage("SOUND 'HOLD 4': %04x", offset<<1);
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}
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}
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if (((offset<<1)==0x0cee)&&(data==1))
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if (((offset<<1)==0x0cee)&&(data==1))
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{
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{
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logerror("CRU: SOUND 'HOLD5' write to address %04x: %d\n", offset<<1, data & 1);
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logerror("CRU: SOUND 'HOLD5' write to address %04x: %d\n", offset<<1, data & 1);
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// popmessage("SOUND 'HOLD 5': %04x", offset<<1);
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// popmessage("SOUND 'HOLD 5': %04x", offset<<1);
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}
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}
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if (((offset<<1)==0x0cf0)&&(data==1))
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if (((offset<<1)==0x0cf0)&&(data==1))
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{
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{
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logerror("CRU: SOUND 'HAND PAY' write to address %04x: %d\n", offset<<1, data & 1);
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logerror("CRU: SOUND 'HAND PAY' write to address %04x: %d\n", offset<<1, data & 1);
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// popmessage("SOUND 'HAND PAY': %04x", offset<<1);
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// popmessage("SOUND 'HAND PAY': %04x", offset<<1);
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}
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}
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if (((offset<<1)==0x0cf2)&&(data==1))
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if (((offset<<1)==0x0cf2)&&(data==1))
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{
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{
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logerror("CRU: SOUND 'HOLD1' write to address %04x: %d\n", offset<<1, data & 1);
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logerror("CRU: SOUND 'HOLD1' write to address %04x: %d\n", offset<<1, data & 1);
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// popmessage("SOUND 'HOLD 1': %04x", offset<<1);
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// popmessage("SOUND 'HOLD 1': %04x", offset<<1);
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}
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}
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if (((offset<<1)==0x0cf4)&&(data==1))
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if (((offset<<1)==0x0cf4)&&(data==1))
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{
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{
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logerror("CRU: SOUND 'HOLD2' write to address %04x: %d\n", offset<<1, data & 1);
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logerror("CRU: SOUND 'HOLD2' write to address %04x: %d\n", offset<<1, data & 1);
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// popmessage("SOUND 'HOLD 2': %04x", offset<<1);
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// popmessage("SOUND 'HOLD 2': %04x", offset<<1);
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}
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}
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if (((offset<<1)==0x0cf6)&&(data==1))
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if (((offset<<1)==0x0cf6)&&(data==1))
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{
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{
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logerror("CRU: SOUND 'HOLD3' write to address %04x: %d\n", offset<<1, data & 1);
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logerror("CRU: SOUND 'HOLD3' write to address %04x: %d\n", offset<<1, data & 1);
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// popmessage("SOUND 'HOLD 3': %04x", offset<<1);
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// popmessage("SOUND 'HOLD 3': %04x", offset<<1);
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}
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}
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if (((offset<<1)==0x0cf8)&&(data==1))
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if (((offset<<1)==0x0cf8)&&(data==1))
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{
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{
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logerror("CRU: SOUND 'RESET' write to address %04x: %d\n", offset<<1, data & 1);
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logerror("CRU: SOUND 'RESET' write to address %04x: %d\n", offset<<1, data & 1);
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||||||
// popmessage("SOUND 'RESET': %04x", offset<<1);
|
// popmessage("SOUND 'RESET': %04x", offset<<1);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (((offset<<1)==0x0d00)&&(data==1))
|
if (((offset<<1)==0x0d00)&&(data==1))
|
||||||
{
|
{
|
||||||
logerror("CRU: SOUND 'DEAL' write to address %04x: %d\n", offset<<1, data & 1);
|
logerror("CRU: SOUND 'DEAL' write to address %04x: %d\n", offset<<1, data & 1);
|
||||||
// popmessage("SOUND 'DEAL': %04x", offset<<1);
|
// popmessage("SOUND 'DEAL': %04x", offset<<1);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -555,7 +555,7 @@ READ8_MEMBER(jubilee_state::mux_port_r)
|
|||||||
switch( mux_sel )
|
switch( mux_sel )
|
||||||
{
|
{
|
||||||
case 0x01: return ioport("IN0")->read();
|
case 0x01: return ioport("IN0")->read();
|
||||||
case 0x02: return ioport("IN1")->read(); /* muxed credits input is here! */
|
case 0x02: return ioport("IN1")->read(); /* muxed credits input is here! */
|
||||||
case 0x03: return ioport("IN2")->read();
|
case 0x03: return ioport("IN2")->read();
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -564,7 +564,7 @@ READ8_MEMBER(jubilee_state::mux_port_r)
|
|||||||
|
|
||||||
|
|
||||||
static ADDRESS_MAP_START( jubileep_cru_map, AS_IO, 8, jubilee_state )
|
static ADDRESS_MAP_START( jubileep_cru_map, AS_IO, 8, jubilee_state )
|
||||||
AM_RANGE(0x00c8, 0x00c8) AM_READ(mux_port_r) /* multiplexed input port */
|
AM_RANGE(0x00c8, 0x00c8) AM_READ(mux_port_r) /* multiplexed input port */
|
||||||
AM_RANGE(0x0000, 0x0fff) AM_WRITE(unk_w)
|
AM_RANGE(0x0000, 0x0fff) AM_WRITE(unk_w)
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|
||||||
@ -597,11 +597,11 @@ static INPUT_PORTS_START( jubileep )
|
|||||||
|
|
||||||
PORT_START("IN1")
|
PORT_START("IN1")
|
||||||
/* Don't know if this needs a custom port. Bits 0 and 1 together are the credits input.
|
/* Don't know if this needs a custom port. Bits 0 and 1 together are the credits input.
|
||||||
Bit 1 alone could be "Attendant Paid Status (reset)" that does a reset and update the
|
Bit 1 alone could be "Attendant Paid Status (reset)" that does a reset and update the
|
||||||
paid status, or just is for edge coin-in timeouts... Impossible to say without a PCB.
|
paid status, or just is for edge coin-in timeouts... Impossible to say without a PCB.
|
||||||
*/
|
*/
|
||||||
PORT_BIT( 0x03, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE (2)
|
PORT_BIT( 0x03, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE (2)
|
||||||
// PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("Attendant Paid Status (reset)") PORT_CODE(KEYCODE_7)
|
// PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("Attendant Paid Status (reset)") PORT_CODE(KEYCODE_7)
|
||||||
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN )
|
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN )
|
||||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN )
|
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN )
|
||||||
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNKNOWN )
|
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNKNOWN )
|
||||||
@ -642,7 +642,7 @@ static const gfx_layout tilelayout =
|
|||||||
* Graphics Decode Information *
|
* Graphics Decode Information *
|
||||||
******************************/
|
******************************/
|
||||||
|
|
||||||
static GFXDECODE_START( jubileep ) /* 4 different graphics banks */
|
static GFXDECODE_START( jubileep ) /* 4 different graphics banks */
|
||||||
GFXDECODE_ENTRY( "gfx1", 0, tilelayout, 0, 1 )
|
GFXDECODE_ENTRY( "gfx1", 0, tilelayout, 0, 1 )
|
||||||
GFXDECODE_ENTRY( "gfx1", 0x0800, tilelayout, 0, 1 )
|
GFXDECODE_ENTRY( "gfx1", 0x0800, tilelayout, 0, 1 )
|
||||||
GFXDECODE_ENTRY( "gfx1", 0x1000, tilelayout, 0, 1 )
|
GFXDECODE_ENTRY( "gfx1", 0x1000, tilelayout, 0, 1 )
|
||||||
@ -669,23 +669,14 @@ static MC6845_INTERFACE( mc6845_intf )
|
|||||||
NULL /* update address callback */
|
NULL /* update address callback */
|
||||||
};
|
};
|
||||||
|
|
||||||
static TMS9980A_CONFIG( cpuconf )
|
|
||||||
{
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL, /* Instruction acquisition */
|
|
||||||
DEVCB_NULL, /* Clock out */
|
|
||||||
DEVCB_NULL, /* Hold acknowledge */
|
|
||||||
DEVCB_NULL /* DBIN */
|
|
||||||
};
|
|
||||||
|
|
||||||
/*************************
|
/*************************
|
||||||
* Machine Drivers *
|
* Machine Drivers *
|
||||||
*************************/
|
*************************/
|
||||||
|
|
||||||
static MACHINE_CONFIG_START( jubileep, jubilee_state )
|
static MACHINE_CONFIG_START( jubileep, jubilee_state )
|
||||||
|
|
||||||
/* basic machine hardware */
|
// Main CPU TMS9980A, no line connections.
|
||||||
MCFG_TMS99xx_ADD("maincpu", TMS9980A, CPU_CLOCK, jubileep_map, jubileep_cru_map, cpuconf)
|
MCFG_TMS99xx_ADD("maincpu", TMS9980A, CPU_CLOCK, jubileep_map, jubileep_cru_map)
|
||||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", jubilee_state, jubileep_interrupt)
|
MCFG_CPU_VBLANK_INT_DRIVER("screen", jubilee_state, jubileep_interrupt)
|
||||||
|
|
||||||
MCFG_NVRAM_ADD_0FILL("videoworkram")
|
MCFG_NVRAM_ADD_0FILL("videoworkram")
|
||||||
|
@ -100,29 +100,20 @@ void jvh_state::machine_reset()
|
|||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
static TMS9980A_CONFIG( cpuconf )
|
|
||||||
{
|
|
||||||
DEVCB_NULL, // External operation
|
|
||||||
DEVCB_NULL, // Instruction acquisition
|
|
||||||
DEVCB_NULL, // Clock out
|
|
||||||
DEVCB_NULL, // Hold acknowledge
|
|
||||||
DEVCB_NULL // DBIN
|
|
||||||
};
|
|
||||||
|
|
||||||
DRIVER_INIT_MEMBER(jvh_state,jvh)
|
DRIVER_INIT_MEMBER(jvh_state,jvh)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
static MACHINE_CONFIG_START( jvh, jvh_state )
|
static MACHINE_CONFIG_START( jvh, jvh_state )
|
||||||
/* basic machine hardware */
|
// CPU TMS9980A; no line connections
|
||||||
MCFG_TMS99xx_ADD("maincpu", TMS9980A, 1000000, jvh_map, escape_io, cpuconf)
|
MCFG_TMS99xx_ADD("maincpu", TMS9980A, 1000000, jvh_map, escape_io)
|
||||||
MCFG_CPU_ADD("cpu2", M6800, 1000000)
|
MCFG_CPU_ADD("cpu2", M6800, 1000000)
|
||||||
MCFG_CPU_PROGRAM_MAP(jvh_sub_map)
|
MCFG_CPU_PROGRAM_MAP(jvh_sub_map)
|
||||||
MACHINE_CONFIG_END
|
MACHINE_CONFIG_END
|
||||||
|
|
||||||
static MACHINE_CONFIG_START( jvh2, jvh_state )
|
static MACHINE_CONFIG_START( jvh2, jvh_state )
|
||||||
/* basic machine hardware */
|
// CPU TMS9980At; no line connections
|
||||||
MCFG_TMS99xx_ADD("maincpu", TMS9980A, 1000000, jvh_map, movmastr_io, cpuconf)
|
MCFG_TMS99xx_ADD("maincpu", TMS9980A, 1000000, jvh_map, movmastr_io)
|
||||||
MCFG_CPU_ADD("cpu2", M6800, 1000000)
|
MCFG_CPU_ADD("cpu2", M6800, 1000000)
|
||||||
MCFG_CPU_PROGRAM_MAP(jvh_sub_map)
|
MCFG_CPU_PROGRAM_MAP(jvh_sub_map)
|
||||||
MACHINE_CONFIG_END
|
MACHINE_CONFIG_END
|
||||||
|
@ -634,32 +634,6 @@ static const ay8910_interface ay8910_config =
|
|||||||
DEVCB_NULL
|
DEVCB_NULL
|
||||||
};
|
};
|
||||||
|
|
||||||
/*************************************
|
|
||||||
*
|
|
||||||
* CPU configs
|
|
||||||
*
|
|
||||||
*************************************/
|
|
||||||
|
|
||||||
static TMS9980A_CONFIG( cpuconf80 )
|
|
||||||
{
|
|
||||||
DEVCB_NULL,
|
|
||||||
DEVCB_NULL, // Instruction acquisition
|
|
||||||
DEVCB_NULL, // Clock out
|
|
||||||
DEVCB_NULL, // Hold acknowledge
|
|
||||||
DEVCB_NULL // DBIN
|
|
||||||
};
|
|
||||||
|
|
||||||
static TMS9995_CONFIG( cpuconf95 )
|
|
||||||
{
|
|
||||||
DEVCB_NULL, // external op
|
|
||||||
DEVCB_NULL, // Instruction acquisition
|
|
||||||
DEVCB_NULL, // clock out
|
|
||||||
DEVCB_NULL, // HOLDA
|
|
||||||
DEVCB_NULL, // DBIN
|
|
||||||
INTERNAL_RAM, // use internal RAM
|
|
||||||
NO_OVERFLOW_INT // The generally available versions of TMS9995 have a deactivated overflow interrupt
|
|
||||||
};
|
|
||||||
|
|
||||||
/*************************************
|
/*************************************
|
||||||
*
|
*
|
||||||
* Machine drivers
|
* Machine drivers
|
||||||
@ -668,11 +642,12 @@ static TMS9995_CONFIG( cpuconf95 )
|
|||||||
|
|
||||||
static MACHINE_CONFIG_START( looping, looping_state )
|
static MACHINE_CONFIG_START( looping, looping_state )
|
||||||
|
|
||||||
/* basic machine hardware */
|
// CPU TMS9995, standard variant; no line connections
|
||||||
MCFG_TMS99xx_ADD("maincpu", TMS9995, MAIN_CPU_CLOCK, looping_map, looping_io_map, cpuconf95)
|
MCFG_TMS99xx_ADD("maincpu", TMS9995, MAIN_CPU_CLOCK, looping_map, looping_io_map)
|
||||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", looping_state, looping_interrupt)
|
MCFG_CPU_VBLANK_INT_DRIVER("screen", looping_state, looping_interrupt)
|
||||||
|
|
||||||
MCFG_TMS99xx_ADD("audiocpu", TMS9980A, SOUND_CLOCK/4, looping_sound_map, looping_sound_io_map, cpuconf80)
|
// CPU TMS9980A for audio subsystem; no line connections
|
||||||
|
MCFG_TMS99xx_ADD("audiocpu", TMS9980A, SOUND_CLOCK/4, looping_sound_map, looping_sound_io_map)
|
||||||
|
|
||||||
MCFG_CPU_ADD("mcu", COP420, COP_CLOCK)
|
MCFG_CPU_ADD("mcu", COP420, COP_CLOCK)
|
||||||
MCFG_CPU_PROGRAM_MAP(looping_cop_map)
|
MCFG_CPU_PROGRAM_MAP(looping_cop_map)
|
||||||
|
@ -108,17 +108,6 @@ WRITE8_MEMBER( nsm_state::cru_w )
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static TMS9995_CONFIG( cpuconf95 )
|
|
||||||
{
|
|
||||||
DEVCB_NULL, // external op
|
|
||||||
DEVCB_NULL, // Instruction acquisition
|
|
||||||
DEVCB_NULL, // clock out
|
|
||||||
DEVCB_NULL, // HOLDA
|
|
||||||
DEVCB_NULL, // DBIN
|
|
||||||
INTERNAL_RAM, // use internal RAM
|
|
||||||
NO_OVERFLOW_INT // The generally available versions of TMS9995 have a deactivated overflow interrupt
|
|
||||||
};
|
|
||||||
|
|
||||||
void nsm_state::machine_reset()
|
void nsm_state::machine_reset()
|
||||||
{
|
{
|
||||||
// Disable auto wait state generation by raising the READY line on reset
|
// Disable auto wait state generation by raising the READY line on reset
|
||||||
@ -126,8 +115,8 @@ void nsm_state::machine_reset()
|
|||||||
}
|
}
|
||||||
|
|
||||||
static MACHINE_CONFIG_START( nsm, nsm_state )
|
static MACHINE_CONFIG_START( nsm, nsm_state )
|
||||||
/* basic machine hardware */
|
// CPU TMS9995, standard variant; no line connection
|
||||||
MCFG_TMS99xx_ADD("maincpu", TMS9995, 11052000, nsm_map, nsm_io_map, cpuconf95)
|
MCFG_TMS99xx_ADD("maincpu", TMS9995, 11052000, nsm_map, nsm_io_map)
|
||||||
|
|
||||||
/* Video */
|
/* Video */
|
||||||
MCFG_DEFAULT_LAYOUT(layout_nsm)
|
MCFG_DEFAULT_LAYOUT(layout_nsm)
|
||||||
|
@ -395,17 +395,6 @@ static GFXDECODE_START( nsmpoker )
|
|||||||
GFXDECODE_END
|
GFXDECODE_END
|
||||||
|
|
||||||
|
|
||||||
static TMS9995_CONFIG( cpuconf95 )
|
|
||||||
{
|
|
||||||
DEVCB_NULL, // external op
|
|
||||||
DEVCB_NULL, // Instruction acquisition
|
|
||||||
DEVCB_NULL, // clock out
|
|
||||||
DEVCB_NULL, // HOLDA
|
|
||||||
DEVCB_NULL, // DBIN
|
|
||||||
INTERNAL_RAM, // use internal RAM
|
|
||||||
NO_OVERFLOW_INT // The generally available versions of TMS9995 have a deactivated overflow interrupt
|
|
||||||
};
|
|
||||||
|
|
||||||
void nsmpoker_state::machine_reset()
|
void nsmpoker_state::machine_reset()
|
||||||
{
|
{
|
||||||
// Disable auto wait state generation by raising the READY line on reset
|
// Disable auto wait state generation by raising the READY line on reset
|
||||||
@ -418,8 +407,8 @@ void nsmpoker_state::machine_reset()
|
|||||||
|
|
||||||
static MACHINE_CONFIG_START( nsmpoker, nsmpoker_state )
|
static MACHINE_CONFIG_START( nsmpoker, nsmpoker_state )
|
||||||
|
|
||||||
/* basic machine hardware */
|
// CPU TMS9995, standard variant; no line connections
|
||||||
MCFG_TMS99xx_ADD("maincpu", TMS9995, MASTER_CLOCK/2, nsmpoker_map, nsmpoker_portmap, cpuconf95)
|
MCFG_TMS99xx_ADD("maincpu", TMS9995, MASTER_CLOCK/2, nsmpoker_map, nsmpoker_portmap)
|
||||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", nsmpoker_state, nsmpoker_interrupt)
|
MCFG_CPU_VBLANK_INT_DRIVER("screen", nsmpoker_state, nsmpoker_interrupt)
|
||||||
|
|
||||||
/* video hardware */
|
/* video hardware */
|
||||||
|
@ -348,21 +348,10 @@ void pachifev_state::machine_start()
|
|||||||
save_item(NAME(m_cnt));
|
save_item(NAME(m_cnt));
|
||||||
}
|
}
|
||||||
|
|
||||||
static TMS9995_CONFIG( cpuconf95 )
|
|
||||||
{
|
|
||||||
DEVCB_NULL, // external op
|
|
||||||
DEVCB_NULL, // Instruction acquisition
|
|
||||||
DEVCB_NULL, // clock out
|
|
||||||
DEVCB_NULL, // HOLDA
|
|
||||||
DEVCB_NULL, // DBIN
|
|
||||||
INTERNAL_RAM, // use internal RAM
|
|
||||||
NO_OVERFLOW_INT // The generally available versions of TMS9995 have a deactivated overflow interrupt
|
|
||||||
};
|
|
||||||
|
|
||||||
static MACHINE_CONFIG_START( pachifev, pachifev_state )
|
static MACHINE_CONFIG_START( pachifev, pachifev_state )
|
||||||
|
|
||||||
/* basic machine hardware */
|
// CPU TMS9995, standard variant; no line connections
|
||||||
MCFG_TMS99xx_ADD("maincpu", TMS9995, XTAL_12MHz, pachifev_map, pachifev_cru, cpuconf95)
|
MCFG_TMS99xx_ADD("maincpu", TMS9995, XTAL_12MHz, pachifev_map, pachifev_cru)
|
||||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", pachifev_state, pachifev_vblank_irq)
|
MCFG_CPU_VBLANK_INT_DRIVER("screen", pachifev_state, pachifev_vblank_irq)
|
||||||
|
|
||||||
/* video hardware */
|
/* video hardware */
|
||||||
|
@ -415,19 +415,6 @@ static INPUT_PORTS_START( supertnk )
|
|||||||
INPUT_PORTS_END
|
INPUT_PORTS_END
|
||||||
|
|
||||||
|
|
||||||
/************
|
|
||||||
CPU config
|
|
||||||
*************/
|
|
||||||
|
|
||||||
static TMS9980A_CONFIG( cpuconf )
|
|
||||||
{
|
|
||||||
DEVCB_NULL, // External operation
|
|
||||||
DEVCB_NULL, // Instruction acquisition
|
|
||||||
DEVCB_NULL, // Clock out
|
|
||||||
DEVCB_NULL, // Hold acknowledge
|
|
||||||
DEVCB_NULL // DBIN
|
|
||||||
};
|
|
||||||
|
|
||||||
/*************************************
|
/*************************************
|
||||||
*
|
*
|
||||||
* Machine driver
|
* Machine driver
|
||||||
@ -436,11 +423,10 @@ static TMS9980A_CONFIG( cpuconf )
|
|||||||
|
|
||||||
static MACHINE_CONFIG_START( supertnk, supertnk_state )
|
static MACHINE_CONFIG_START( supertnk, supertnk_state )
|
||||||
|
|
||||||
/* basic machine hardware */
|
// CPU TMS9980A; no line connections
|
||||||
MCFG_TMS99xx_ADD("maincpu", TMS9980A, 2598750, supertnk_map, supertnk_io_map, cpuconf)
|
MCFG_TMS99xx_ADD("maincpu", TMS9980A, 2598750, supertnk_map, supertnk_io_map)
|
||||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", supertnk_state, supertnk_interrupt)
|
MCFG_CPU_VBLANK_INT_DRIVER("screen", supertnk_state, supertnk_interrupt)
|
||||||
|
|
||||||
|
|
||||||
/* video hardware */
|
/* video hardware */
|
||||||
|
|
||||||
MCFG_SCREEN_ADD("screen", RASTER)
|
MCFG_SCREEN_ADD("screen", RASTER)
|
||||||
|
@ -564,26 +564,14 @@ static MC6845_INTERFACE( mc6845_intf )
|
|||||||
NULL /* update address callback */
|
NULL /* update address callback */
|
||||||
};
|
};
|
||||||
|
|
||||||
/***********************
|
|
||||||
* CPU Interface *
|
|
||||||
************************/
|
|
||||||
static TMS9980A_CONFIG( cpuconf )
|
|
||||||
{
|
|
||||||
DEVCB_NULL, // External operation
|
|
||||||
DEVCB_NULL, // Instruction acquisition
|
|
||||||
DEVCB_NULL, // Clock out
|
|
||||||
DEVCB_NULL, // Hold acknowledge
|
|
||||||
DEVCB_NULL // DBIN
|
|
||||||
};
|
|
||||||
|
|
||||||
/*************************
|
/*************************
|
||||||
* Machine Drivers *
|
* Machine Drivers *
|
||||||
*************************/
|
*************************/
|
||||||
|
|
||||||
static MACHINE_CONFIG_START( tmspoker, tmspoker_state )
|
static MACHINE_CONFIG_START( tmspoker, tmspoker_state )
|
||||||
|
|
||||||
/* basic machine hardware */
|
// CPU TMS9980A; no line connections
|
||||||
MCFG_TMS99xx_ADD("maincpu", TMS9980A, MASTER_CLOCK/4, tmspoker_map, tmspoker_cru_map, cpuconf)
|
MCFG_TMS99xx_ADD("maincpu", TMS9980A, MASTER_CLOCK/4, tmspoker_map, tmspoker_cru_map)
|
||||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", tmspoker_state, tmspoker_interrupt)
|
MCFG_CPU_VBLANK_INT_DRIVER("screen", tmspoker_state, tmspoker_interrupt)
|
||||||
|
|
||||||
// MCFG_NVRAM_HANDLER(generic_0fill)
|
// MCFG_NVRAM_HANDLER(generic_0fill)
|
||||||
|
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Reference in New Issue
Block a user