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Fully converted atarigx2, beathead and offtwall to use driver_data [Atari Ace]
--------- Forwarded message ---------- From: Atari Ace <atari_ace@verizon.net> Date: Sat, Jul 24, 2010 at 12:49 AM Subject: [patch] driver_data changes for drivers using atarigen To: submit@mamedev.org Cc: atariace@hotmail.com Hi mamedev, I noticed that atarigx2, beathead, and offtwall were only partially converted to use driver_data. This patch migrates additional static variables. ~aa
This commit is contained in:
Phil Bennett
parent
2843028b6b
commit
7ef270db28
@ -143,8 +143,6 @@ static WRITE32_HANDLER( mo_command_w )
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*
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*************************************/
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static UINT16 last_write;
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static UINT16 last_write_offset;
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static WRITE32_HANDLER( atarigx2_protection_w )
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{
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@ -164,13 +162,13 @@ static WRITE32_HANDLER( atarigx2_protection_w )
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if (ACCESSING_BITS_16_31)
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{
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last_write = state->protection_base[offset] >> 16;
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last_write_offset = offset*2;
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state->last_write = state->protection_base[offset] >> 16;
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state->last_write_offset = offset*2;
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}
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if (ACCESSING_BITS_0_15)
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{
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last_write = state->protection_base[offset] & 0xffff;
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last_write_offset = offset*2+1;
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state->last_write = state->protection_base[offset] & 0xffff;
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state->last_write_offset = offset*2+1;
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}
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}
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@ -1112,7 +1110,7 @@ static READ32_HANDLER( atarigx2_protection_r )
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result |= 0x80000000;
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if (offset == 0x3f0)
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{
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UINT32 tag = (last_write_offset << 17) | last_write;
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UINT32 tag = (state->last_write_offset << 17) | state->last_write;
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int i = 0;
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while (lookup_table[i][0] != 0xffffffff)
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@ -1127,7 +1125,7 @@ static READ32_HANDLER( atarigx2_protection_r )
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if (lookup_table[i][0] == 0xffffffff)
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{
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if (last_write_offset*2 >= 0x700 && last_write_offset*2 < 0x720)
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if (state->last_write_offset*2 >= 0x700 && state->last_write_offset*2 < 0x720)
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result = mame_rand(space->machine) << 16;
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else
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result = 0xffff << 16;
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@ -105,24 +105,6 @@
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/*************************************
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*
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* Statics
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*
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*************************************/
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static UINT32 * ram_base;
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static UINT32 * rom_base;
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static double hblank_offset;
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static UINT8 irq_line_state;
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static UINT8 irq_enable[3];
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static UINT8 irq_state[3];
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static UINT8 eeprom_enabled;
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#define MAX_SCANLINES 262
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@ -137,6 +119,7 @@ static void update_interrupts(running_machine *machine);
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static TIMER_DEVICE_CALLBACK( scanline_callback )
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{
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beathead_state *state = (beathead_state *)timer.machine->driver_data;
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int scanline = param;
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/* update the video */
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@ -152,11 +135,11 @@ static TIMER_DEVICE_CALLBACK( scanline_callback )
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scanline = 0;
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/* set the scanline IRQ */
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irq_state[2] = 1;
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state->irq_state[2] = 1;
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update_interrupts(timer.machine);
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/* set the timer for the next one */
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timer.adjust(double_to_attotime(attotime_to_double(timer.machine->primary_screen->time_until_pos(scanline)) - hblank_offset), scanline);
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timer.adjust(double_to_attotime(attotime_to_double(timer.machine->primary_screen->time_until_pos(scanline)) - state->hblank_offset), scanline);
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}
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@ -177,17 +160,17 @@ static MACHINE_RESET( beathead )
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/* the code is temporarily mapped at 0 at startup */
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/* just copying the first 0x40 bytes is sufficient */
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memcpy(ram_base, rom_base, 0x40);
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memcpy(state->ram_base, state->rom_base, 0x40);
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/* compute the timing of the HBLANK interrupt and set the first timer */
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hblank_offset = attotime_to_double(machine->primary_screen->scan_period()) * ((455. - 336. - 25.) / 455.);
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state->hblank_offset = attotime_to_double(machine->primary_screen->scan_period()) * ((455. - 336. - 25.) / 455.);
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timer_device *scanline_timer = machine->device<timer_device>("scan_timer");
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scanline_timer->adjust(double_to_attotime(attotime_to_double(machine->primary_screen->time_until_pos(0)) - hblank_offset));
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scanline_timer->adjust(double_to_attotime(attotime_to_double(machine->primary_screen->time_until_pos(0)) - state->hblank_offset));
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/* reset IRQs */
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irq_line_state = CLEAR_LINE;
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irq_state[0] = irq_state[1] = irq_state[2] = 0;
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irq_enable[0] = irq_enable[1] = irq_enable[2] = 0;
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state->irq_line_state = CLEAR_LINE;
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state->irq_state[0] = state->irq_state[1] = state->irq_state[2] = 0;
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state->irq_enable[0] = state->irq_enable[1] = state->irq_enable[2] = 0;
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}
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@ -200,38 +183,40 @@ static MACHINE_RESET( beathead )
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static void update_interrupts(running_machine *machine)
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{
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beathead_state *state = (beathead_state *)machine->driver_data;
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int gen_int;
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/* compute the combined interrupt signal */
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gen_int = irq_state[0] & irq_enable[0];
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gen_int |= irq_state[1] & irq_enable[1];
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gen_int |= irq_state[2] & irq_enable[2];
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gen_int = state->irq_state[0] & state->irq_enable[0];
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gen_int |= state->irq_state[1] & state->irq_enable[1];
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gen_int |= state->irq_state[2] & state->irq_enable[2];
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gen_int = gen_int ? ASSERT_LINE : CLEAR_LINE;
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/* if it's changed since the last time, call through */
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if (irq_line_state != gen_int)
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if (state->irq_line_state != gen_int)
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{
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irq_line_state = gen_int;
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// if (irq_line_state != CLEAR_LINE)
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cputag_set_input_line(machine, "maincpu", ASAP_IRQ0, irq_line_state);
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// else
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// asap_set_irq_line(ASAP_IRQ0, irq_line_state);
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state->irq_line_state = gen_int;
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//if (state->irq_line_state != CLEAR_LINE)
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cputag_set_input_line(machine, "maincpu", ASAP_IRQ0, state->irq_line_state);
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//else
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//asap_set_irq_line(ASAP_IRQ0, state->irq_line_state);
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}
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}
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static WRITE32_HANDLER( interrupt_control_w )
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{
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beathead_state *state = (beathead_state *)space->machine->driver_data;
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int irq = offset & 3;
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int control = (offset >> 2) & 1;
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/* offsets 1-3 seem to be the enable latches for the IRQs */
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if (irq != 0)
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irq_enable[irq - 1] = control;
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state->irq_enable[irq - 1] = control;
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/* offset 0 seems to be the interrupt ack */
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else
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irq_state[0] = irq_state[1] = irq_state[2] = 0;
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state->irq_state[0] = state->irq_state[1] = state->irq_state[2] = 0;
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/* update the current state */
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update_interrupts(space->machine);
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@ -240,8 +225,10 @@ static WRITE32_HANDLER( interrupt_control_w )
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static READ32_HANDLER( interrupt_control_r )
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{
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beathead_state *state = (beathead_state *)space->machine->driver_data;
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/* return the enables as a bitfield */
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return (irq_enable[0]) | (irq_enable[1] << 1) | (irq_enable[2] << 2);
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return (state->irq_enable[0]) | (state->irq_enable[1] << 1) | (state->irq_enable[2] << 2);
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}
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@ -254,18 +241,22 @@ static READ32_HANDLER( interrupt_control_r )
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static WRITE32_HANDLER( eeprom_data_w )
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{
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if (eeprom_enabled)
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beathead_state *state = (beathead_state *)space->machine->driver_data;
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if (state->eeprom_enabled)
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{
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mem_mask &= 0x000000ff;
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COMBINE_DATA(space->machine->generic.nvram.u32 + offset);
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eeprom_enabled = 0;
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state->eeprom_enabled = 0;
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}
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}
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static WRITE32_HANDLER( eeprom_enable_w )
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{
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eeprom_enabled = 1;
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beathead_state *state = (beathead_state *)space->machine->driver_data;
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state->eeprom_enabled = 1;
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}
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@ -334,8 +325,8 @@ static WRITE32_HANDLER( coin_count_w )
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*************************************/
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static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32 )
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AM_RANGE(0x00000000, 0x0001ffff) AM_RAM AM_BASE(&ram_base)
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AM_RANGE(0x01800000, 0x01bfffff) AM_ROM AM_REGION("user1", 0) AM_BASE(&rom_base)
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AM_RANGE(0x00000000, 0x0001ffff) AM_RAM AM_BASE_MEMBER(beathead_state, ram_base)
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AM_RANGE(0x01800000, 0x01bfffff) AM_ROM AM_REGION("user1", 0) AM_BASE_MEMBER(beathead_state, rom_base)
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AM_RANGE(0x40000000, 0x400007ff) AM_RAM_WRITE(eeprom_data_w) AM_BASE_SIZE_GENERIC(nvram)
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AM_RANGE(0x41000000, 0x41000003) AM_READWRITE(sound_data_r, sound_data_w)
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AM_RANGE(0x41000100, 0x41000103) AM_READ(interrupt_control_r)
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@ -146,23 +146,24 @@ static WRITE16_HANDLER( io_latch_w )
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-------------------------------------------------------------------------*/
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static UINT16 *bankswitch_base;
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static UINT16 *bankrom_base;
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static UINT32 bank_offset;
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static READ16_HANDLER( bankswitch_r )
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{
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/* this is the table lookup; the bank is determined by the address that was requested */
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bank_offset = (offset & 3) * 0x1000;
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logerror("Bankswitch index %d -> %04X\n", offset, bank_offset);
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offtwall_state *state = (offtwall_state *)space->machine->driver_data;
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return bankswitch_base[offset];
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/* this is the table lookup; the bank is determined by the address that was requested */
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state->bank_offset = (offset & 3) * 0x1000;
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logerror("Bankswitch index %d -> %04X\n", offset, state->bank_offset);
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return state->bankswitch_base[offset];
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}
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static READ16_HANDLER( bankrom_r )
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{
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offtwall_state *state = (offtwall_state *)space->machine->driver_data;
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/* this is the banked ROM read */
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logerror("%06X: %04X\n", cpu_get_previouspc(space->cpu), offset);
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@ -178,7 +179,7 @@ static READ16_HANDLER( bankrom_r )
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return us >> 16;
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}
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return bankrom_base[(bank_offset + offset) & 0x3fff];
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return state->bankrom_base[(state->bank_offset + offset) & 0x3fff];
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}
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@ -200,18 +201,17 @@ static READ16_HANDLER( bankrom_r )
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-------------------------------------------------------------------------*/
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static UINT16 *spritecache_count;
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static READ16_HANDLER( spritecache_count_r )
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{
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offtwall_state *state = (offtwall_state *)space->machine->driver_data;
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int prevpc = cpu_get_previouspc(space->cpu);
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/* if this read is coming from $99f8 or $9992, it's in the sprite copy loop */
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if (prevpc == 0x99f8 || prevpc == 0x9992)
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{
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UINT16 *data = &spritecache_count[-0x100];
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int oldword = spritecache_count[0];
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UINT16 *data = &state->spritecache_count[-0x100];
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int oldword = state->spritecache_count[0];
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int count = oldword >> 8;
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int i, width = 0;
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@ -232,12 +232,12 @@ static READ16_HANDLER( spritecache_count_r )
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}
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/* update the final count in memory */
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spritecache_count[0] = (count << 8) | (oldword & 0xff);
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state->spritecache_count[0] = (count << 8) | (oldword & 0xff);
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}
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}
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/* and then read the data */
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return spritecache_count[offset];
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return state->spritecache_count[offset];
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}
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@ -255,16 +255,16 @@ static READ16_HANDLER( spritecache_count_r )
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-------------------------------------------------------------------------*/
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static UINT16 *unknown_verify_base;
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static READ16_HANDLER( unknown_verify_r )
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{
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offtwall_state *state = (offtwall_state *)space->machine->driver_data;
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int prevpc = cpu_get_previouspc(space->cpu);
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if (prevpc < 0x5c5e || prevpc > 0xc432)
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return unknown_verify_base[offset];
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return state->unknown_verify_base[offset];
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else
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return unknown_verify_base[offset] | 0x100;
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return state->unknown_verify_base[offset] | 0x100;
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}
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@ -277,7 +277,7 @@ static READ16_HANDLER( unknown_verify_r )
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static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
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AM_RANGE(0x000000, 0x037fff) AM_ROM
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AM_RANGE(0x038000, 0x03ffff) AM_READ(bankrom_r) AM_REGION("maincpu", 0x38000) AM_BASE(&bankrom_base)
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AM_RANGE(0x038000, 0x03ffff) AM_READ(bankrom_r) AM_REGION("maincpu", 0x38000) AM_BASE_MEMBER(offtwall_state, bankrom_base)
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AM_RANGE(0x120000, 0x120fff) AM_READWRITE(atarigen_eeprom_r, atarigen_eeprom_w) AM_BASE_SIZE_MEMBER(offtwall_state, atarigen.eeprom, atarigen.eeprom_size)
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AM_RANGE(0x260000, 0x260001) AM_READ_PORT("260000")
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AM_RANGE(0x260002, 0x260003) AM_READ_PORT("260002")
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@ -357,15 +357,15 @@ static INPUT_PORTS_START( offtwall )
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PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
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PORT_START("260020")
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PORT_BIT( 0xff, 0, IPT_DIAL_V ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_PLAYER(1)
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PORT_BIT( 0xff, 0, IPT_DIAL_V ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_PLAYER(1)
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PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
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PORT_START("260022")
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PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_PLAYER(2)
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PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_PLAYER(2)
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PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
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PORT_START("260024")
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PORT_BIT( 0xff, 0, IPT_DIAL_V ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(3)
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PORT_BIT( 0xff, 0, IPT_DIAL_V ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(3)
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PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
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PORT_INCLUDE( atarijsa_iii ) /* audio board port */
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@ -508,9 +508,9 @@ static DRIVER_INIT( offtwall )
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atarijsa_init(machine, "260010", 0x0040);
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/* install son-of-slapstic workarounds */
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spritecache_count = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fde42, 0x3fde43, 0, 0, spritecache_count_r);
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bankswitch_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x037ec2, 0x037f39, 0, 0, bankswitch_r);
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unknown_verify_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fdf1e, 0x3fdf1f, 0, 0, unknown_verify_r);
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state->spritecache_count = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fde42, 0x3fde43, 0, 0, spritecache_count_r);
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state->bankswitch_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x037ec2, 0x037f39, 0, 0, bankswitch_r);
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state->unknown_verify_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fdf1e, 0x3fdf1f, 0, 0, unknown_verify_r);
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}
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@ -522,9 +522,9 @@ static DRIVER_INIT( offtwalc )
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atarijsa_init(machine, "260010", 0x0040);
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/* install son-of-slapstic workarounds */
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spritecache_count = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fde42, 0x3fde43, 0, 0, spritecache_count_r);
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bankswitch_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x037eca, 0x037f43, 0, 0, bankswitch_r);
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unknown_verify_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fdf24, 0x3fdf25, 0, 0, unknown_verify_r);
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state->spritecache_count = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fde42, 0x3fde43, 0, 0, spritecache_count_r);
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state->bankswitch_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x037eca, 0x037f43, 0, 0, bankswitch_r);
|
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state->unknown_verify_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fdf24, 0x3fdf25, 0, 0, unknown_verify_r);
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -26,6 +26,9 @@ public:
|
||||
UINT8 playfield_color_bank;
|
||||
UINT16 playfield_xscroll;
|
||||
UINT16 playfield_yscroll;
|
||||
|
||||
UINT16 last_write;
|
||||
UINT16 last_write_offset;
|
||||
};
|
||||
|
||||
|
||||
|
||||
@ -24,6 +24,17 @@ public:
|
||||
offs_t hsyncram_offset;
|
||||
offs_t hsyncram_start;
|
||||
UINT8 hsyncram[0x800];
|
||||
|
||||
UINT32 * ram_base;
|
||||
UINT32 * rom_base;
|
||||
|
||||
double hblank_offset;
|
||||
|
||||
UINT8 irq_line_state;
|
||||
UINT8 irq_enable[3];
|
||||
UINT8 irq_state[3];
|
||||
|
||||
UINT8 eeprom_enabled;
|
||||
};
|
||||
|
||||
|
||||
|
||||
@ -14,6 +14,13 @@ public:
|
||||
offtwall_state(running_machine &machine) { }
|
||||
|
||||
atarigen_state atarigen;
|
||||
|
||||
UINT16 *bankswitch_base;
|
||||
UINT16 *bankrom_base;
|
||||
UINT32 bank_offset;
|
||||
|
||||
UINT16 *spritecache_count;
|
||||
UINT16 *unknown_verify_base;
|
||||
};
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user