Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-05-23 14:19:01 +03:00
Code Issues Actions 3 Packages Projects Releases Wiki Activity

Fully converted atarigx2, beathead and offtwall to use driver_data [Atari Ace]

Browse Source 
--------- Forwarded message ----------
From: Atari Ace <atari_ace@verizon.net>
Date: Sat, Jul 24, 2010 at 12:49 AM
Subject: [patch] driver_data changes for drivers using atarigen
To: submit@mamedev.org
Cc: atariace@hotmail.com

Hi mamedev,

I noticed that atarigx2, beathead, and offtwall were only partially
converted to use driver_data.  This patch migrates additional static
variables.

~aa
This commit is contained in:
Phil Bennett 2010-07-26 12:01:08 +00:00
parent 2843028b6b
commit 7ef270db28
6 changed files with 88 additions and 78 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
src/mame/drivers/atarigx2.c
View File

@ -143,8 +143,6 @@ static WRITE32_HANDLER( mo_command_w )
* *
*************************************/ *************************************/
static UINT16 last_write;
static UINT16 last_write_offset;
static WRITE32_HANDLER( atarigx2_protection_w ) static WRITE32_HANDLER( atarigx2_protection_w )
{ {
@ -164,13 +162,13 @@ static WRITE32_HANDLER( atarigx2_protection_w )
if (ACCESSING_BITS_16_31) if (ACCESSING_BITS_16_31)
{ {
last_write = state->protection_base[offset] >> 16; state->last_write = state->protection_base[offset] >> 16;
last_write_offset = offset*2; state->last_write_offset = offset*2;
} }
if (ACCESSING_BITS_0_15) if (ACCESSING_BITS_0_15)
{ {
last_write = state->protection_base[offset] & 0xffff; state->last_write = state->protection_base[offset] & 0xffff;
last_write_offset = offset*2+1; state->last_write_offset = offset*2+1;
} }
} }
@ -1112,7 +1110,7 @@ static READ32_HANDLER( atarigx2_protection_r )
result |= 0x80000000; result |= 0x80000000;
if (offset == 0x3f0) if (offset == 0x3f0)
{ {
UINT32 tag = (last_write_offset << 17) | last_write; UINT32 tag = (state->last_write_offset << 17) | state->last_write;
int i = 0; int i = 0;
while (lookup_table[i][0] != 0xffffffff) while (lookup_table[i][0] != 0xffffffff)
@ -1127,7 +1125,7 @@ static READ32_HANDLER( atarigx2_protection_r )
if (lookup_table[i][0] == 0xffffffff) if (lookup_table[i][0] == 0xffffffff)
{ {
if (last_write_offset*2 >= 0x700 && last_write_offset*2 < 0x720) if (state->last_write_offset*2 >= 0x700 && state->last_write_offset*2 < 0x720)
result = mame_rand(space->machine) << 16; result = mame_rand(space->machine) << 16;
else else
result = 0xffff << 16; result = 0xffff << 16;

77
src/mame/drivers/beathead.c
View File

@ -105,24 +105,6 @@
/*************************************
*
* Statics
*
*************************************/
static UINT32 * ram_base;
static UINT32 * rom_base;
static double hblank_offset;
static UINT8 irq_line_state;
static UINT8 irq_enable[3];
static UINT8 irq_state[3];
static UINT8 eeprom_enabled;
#define MAX_SCANLINES 262 #define MAX_SCANLINES 262
@ -137,6 +119,7 @@ static void update_interrupts(running_machine *machine);
static TIMER_DEVICE_CALLBACK( scanline_callback ) static TIMER_DEVICE_CALLBACK( scanline_callback )
{ {
beathead_state *state = (beathead_state *)timer.machine->driver_data;
int scanline = param; int scanline = param;
/* update the video */ /* update the video */
@ -152,11 +135,11 @@ static TIMER_DEVICE_CALLBACK( scanline_callback )
scanline = 0; scanline = 0;
/* set the scanline IRQ */ /* set the scanline IRQ */
irq_state[2] = 1; state->irq_state[2] = 1;
update_interrupts(timer.machine); update_interrupts(timer.machine);
/* set the timer for the next one */ /* set the timer for the next one */
timer.adjust(double_to_attotime(attotime_to_double(timer.machine->primary_screen->time_until_pos(scanline)) - hblank_offset), scanline); timer.adjust(double_to_attotime(attotime_to_double(timer.machine->primary_screen->time_until_pos(scanline)) - state->hblank_offset), scanline);
} }
@ -177,17 +160,17 @@ static MACHINE_RESET( beathead )
/* the code is temporarily mapped at 0 at startup */ /* the code is temporarily mapped at 0 at startup */
/* just copying the first 0x40 bytes is sufficient */ /* just copying the first 0x40 bytes is sufficient */
memcpy(ram_base, rom_base, 0x40); memcpy(state->ram_base, state->rom_base, 0x40);
/* compute the timing of the HBLANK interrupt and set the first timer */ /* compute the timing of the HBLANK interrupt and set the first timer */
hblank_offset = attotime_to_double(machine->primary_screen->scan_period()) * ((455. - 336. - 25.) / 455.); state->hblank_offset = attotime_to_double(machine->primary_screen->scan_period()) * ((455. - 336. - 25.) / 455.);
timer_device *scanline_timer = machine->device<timer_device>("scan_timer"); timer_device *scanline_timer = machine->device<timer_device>("scan_timer");
scanline_timer->adjust(double_to_attotime(attotime_to_double(machine->primary_screen->time_until_pos(0)) - hblank_offset)); scanline_timer->adjust(double_to_attotime(attotime_to_double(machine->primary_screen->time_until_pos(0)) - state->hblank_offset));
/* reset IRQs */ /* reset IRQs */
irq_line_state = CLEAR_LINE; state->irq_line_state = CLEAR_LINE;
irq_state[0] = irq_state[1] = irq_state[2] = 0; state->irq_state[0] = state->irq_state[1] = state->irq_state[2] = 0;
irq_enable[0] = irq_enable[1] = irq_enable[2] = 0; state->irq_enable[0] = state->irq_enable[1] = state->irq_enable[2] = 0;
} }
@ -200,38 +183,40 @@ static MACHINE_RESET( beathead )
static void update_interrupts(running_machine *machine) static void update_interrupts(running_machine *machine)
{ {
beathead_state *state = (beathead_state *)machine->driver_data;
int gen_int; int gen_int;
/* compute the combined interrupt signal */ /* compute the combined interrupt signal */
gen_int = irq_state[0] & irq_enable[0]; gen_int = state->irq_state[0] & state->irq_enable[0];
gen_int |= irq_state[1] & irq_enable[1]; gen_int |= state->irq_state[1] & state->irq_enable[1];
gen_int |= irq_state[2] & irq_enable[2]; gen_int |= state->irq_state[2] & state->irq_enable[2];
gen_int = gen_int ? ASSERT_LINE : CLEAR_LINE; gen_int = gen_int ? ASSERT_LINE : CLEAR_LINE;
/* if it's changed since the last time, call through */ /* if it's changed since the last time, call through */
if (irq_line_state != gen_int) if (state->irq_line_state != gen_int)
{ {
irq_line_state = gen_int; state->irq_line_state = gen_int;
// if (irq_line_state != CLEAR_LINE) //if (state->irq_line_state != CLEAR_LINE)
cputag_set_input_line(machine, "maincpu", ASAP_IRQ0, irq_line_state); cputag_set_input_line(machine, "maincpu", ASAP_IRQ0, state->irq_line_state);
// else //else
// asap_set_irq_line(ASAP_IRQ0, irq_line_state); //asap_set_irq_line(ASAP_IRQ0, state->irq_line_state);
} }
} }
static WRITE32_HANDLER( interrupt_control_w ) static WRITE32_HANDLER( interrupt_control_w )
{ {
beathead_state *state = (beathead_state *)space->machine->driver_data;
int irq = offset & 3; int irq = offset & 3;
int control = (offset >> 2) & 1; int control = (offset >> 2) & 1;
/* offsets 1-3 seem to be the enable latches for the IRQs */ /* offsets 1-3 seem to be the enable latches for the IRQs */
if (irq != 0) if (irq != 0)
irq_enable[irq - 1] = control; state->irq_enable[irq - 1] = control;
/* offset 0 seems to be the interrupt ack */ /* offset 0 seems to be the interrupt ack */
else else
irq_state[0] = irq_state[1] = irq_state[2] = 0; state->irq_state[0] = state->irq_state[1] = state->irq_state[2] = 0;
/* update the current state */ /* update the current state */
update_interrupts(space->machine); update_interrupts(space->machine);
@ -240,8 +225,10 @@ static WRITE32_HANDLER( interrupt_control_w )
static READ32_HANDLER( interrupt_control_r ) static READ32_HANDLER( interrupt_control_r )
{ {
beathead_state *state = (beathead_state *)space->machine->driver_data;
/* return the enables as a bitfield */ /* return the enables as a bitfield */
return (irq_enable[0]) | (irq_enable[1] << 1) | (irq_enable[2] << 2); return (state->irq_enable[0]) | (state->irq_enable[1] << 1) | (state->irq_enable[2] << 2);
} }
@ -254,18 +241,22 @@ static READ32_HANDLER( interrupt_control_r )
static WRITE32_HANDLER( eeprom_data_w ) static WRITE32_HANDLER( eeprom_data_w )
{ {
if (eeprom_enabled) beathead_state *state = (beathead_state *)space->machine->driver_data;
if (state->eeprom_enabled)
{ {
mem_mask &= 0x000000ff; mem_mask &= 0x000000ff;
COMBINE_DATA(space->machine->generic.nvram.u32 + offset); COMBINE_DATA(space->machine->generic.nvram.u32 + offset);
eeprom_enabled = 0; state->eeprom_enabled = 0;
} }
} }
static WRITE32_HANDLER( eeprom_enable_w ) static WRITE32_HANDLER( eeprom_enable_w )
{ {
eeprom_enabled = 1; beathead_state *state = (beathead_state *)space->machine->driver_data;
state->eeprom_enabled = 1;
} }
@ -334,8 +325,8 @@ static WRITE32_HANDLER( coin_count_w )
*************************************/ *************************************/
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32 ) static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x00000000, 0x0001ffff) AM_RAM AM_BASE(&ram_base) AM_RANGE(0x00000000, 0x0001ffff) AM_RAM AM_BASE_MEMBER(beathead_state, ram_base)
AM_RANGE(0x01800000, 0x01bfffff) AM_ROM AM_REGION("user1", 0) AM_BASE(&rom_base) AM_RANGE(0x01800000, 0x01bfffff) AM_ROM AM_REGION("user1", 0) AM_BASE_MEMBER(beathead_state, rom_base)
AM_RANGE(0x40000000, 0x400007ff) AM_RAM_WRITE(eeprom_data_w) AM_BASE_SIZE_GENERIC(nvram) AM_RANGE(0x40000000, 0x400007ff) AM_RAM_WRITE(eeprom_data_w) AM_BASE_SIZE_GENERIC(nvram)
AM_RANGE(0x41000000, 0x41000003) AM_READWRITE(sound_data_r, sound_data_w) AM_RANGE(0x41000000, 0x41000003) AM_READWRITE(sound_data_r, sound_data_w)
AM_RANGE(0x41000100, 0x41000103) AM_READ(interrupt_control_r) AM_RANGE(0x41000100, 0x41000103) AM_READ(interrupt_control_r)

48
src/mame/drivers/offtwall.c
View File

@ -146,23 +146,24 @@ static WRITE16_HANDLER( io_latch_w )
-------------------------------------------------------------------------*/ -------------------------------------------------------------------------*/
static UINT16 *bankswitch_base;
static UINT16 *bankrom_base;
static UINT32 bank_offset;
static READ16_HANDLER( bankswitch_r ) static READ16_HANDLER( bankswitch_r )
{ {
/* this is the table lookup; the bank is determined by the address that was requested */ offtwall_state *state = (offtwall_state *)space->machine->driver_data;
bank_offset = (offset & 3) * 0x1000;
logerror("Bankswitch index %d -> %04X\n", offset, bank_offset);
return bankswitch_base[offset]; /* this is the table lookup; the bank is determined by the address that was requested */
state->bank_offset = (offset & 3) * 0x1000;
logerror("Bankswitch index %d -> %04X\n", offset, state->bank_offset);
return state->bankswitch_base[offset];
} }
static READ16_HANDLER( bankrom_r ) static READ16_HANDLER( bankrom_r )
{ {
offtwall_state *state = (offtwall_state *)space->machine->driver_data;
/* this is the banked ROM read */ /* this is the banked ROM read */
logerror("%06X: %04X\n", cpu_get_previouspc(space->cpu), offset); logerror("%06X: %04X\n", cpu_get_previouspc(space->cpu), offset);
@ -178,7 +179,7 @@ static READ16_HANDLER( bankrom_r )
return us >> 16; return us >> 16;
} }
return bankrom_base[(bank_offset + offset) & 0x3fff]; return state->bankrom_base[(state->bank_offset + offset) & 0x3fff];
} }
@ -200,18 +201,17 @@ static READ16_HANDLER( bankrom_r )
-------------------------------------------------------------------------*/ -------------------------------------------------------------------------*/
static UINT16 *spritecache_count;
static READ16_HANDLER( spritecache_count_r ) static READ16_HANDLER( spritecache_count_r )
{ {
offtwall_state *state = (offtwall_state *)space->machine->driver_data;
int prevpc = cpu_get_previouspc(space->cpu); int prevpc = cpu_get_previouspc(space->cpu);
/* if this read is coming from $99f8 or $9992, it's in the sprite copy loop */ /* if this read is coming from $99f8 or $9992, it's in the sprite copy loop */
if (prevpc == 0x99f8 || prevpc == 0x9992) if (prevpc == 0x99f8 || prevpc == 0x9992)
{ {
UINT16 *data = &spritecache_count[-0x100]; UINT16 *data = &state->spritecache_count[-0x100];
int oldword = spritecache_count[0]; int oldword = state->spritecache_count[0];
int count = oldword >> 8; int count = oldword >> 8;
int i, width = 0; int i, width = 0;
@ -232,12 +232,12 @@ static READ16_HANDLER( spritecache_count_r )
} }
/* update the final count in memory */ /* update the final count in memory */
spritecache_count[0] = (count << 8) | (oldword & 0xff); state->spritecache_count[0] = (count << 8) | (oldword & 0xff);
} }
} }
/* and then read the data */ /* and then read the data */
return spritecache_count[offset]; return state->spritecache_count[offset];
} }
@ -255,16 +255,16 @@ static READ16_HANDLER( spritecache_count_r )
-------------------------------------------------------------------------*/ -------------------------------------------------------------------------*/
static UINT16 *unknown_verify_base;
static READ16_HANDLER( unknown_verify_r ) static READ16_HANDLER( unknown_verify_r )
{ {
offtwall_state *state = (offtwall_state *)space->machine->driver_data;
int prevpc = cpu_get_previouspc(space->cpu); int prevpc = cpu_get_previouspc(space->cpu);
if (prevpc < 0x5c5e || prevpc > 0xc432) if (prevpc < 0x5c5e || prevpc > 0xc432)
return unknown_verify_base[offset]; return state->unknown_verify_base[offset];
else else
return unknown_verify_base[offset] | 0x100; return state->unknown_verify_base[offset] | 0x100;
} }
@ -277,7 +277,7 @@ static READ16_HANDLER( unknown_verify_r )
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 ) static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x037fff) AM_ROM AM_RANGE(0x000000, 0x037fff) AM_ROM
AM_RANGE(0x038000, 0x03ffff) AM_READ(bankrom_r) AM_REGION("maincpu", 0x38000) AM_BASE(&bankrom_base) AM_RANGE(0x038000, 0x03ffff) AM_READ(bankrom_r) AM_REGION("maincpu", 0x38000) AM_BASE_MEMBER(offtwall_state, bankrom_base)
AM_RANGE(0x120000, 0x120fff) AM_READWRITE(atarigen_eeprom_r, atarigen_eeprom_w) AM_BASE_SIZE_MEMBER(offtwall_state, atarigen.eeprom, atarigen.eeprom_size) AM_RANGE(0x120000, 0x120fff) AM_READWRITE(atarigen_eeprom_r, atarigen_eeprom_w) AM_BASE_SIZE_MEMBER(offtwall_state, atarigen.eeprom, atarigen.eeprom_size)
AM_RANGE(0x260000, 0x260001) AM_READ_PORT("260000") AM_RANGE(0x260000, 0x260001) AM_READ_PORT("260000")
AM_RANGE(0x260002, 0x260003) AM_READ_PORT("260002") AM_RANGE(0x260002, 0x260003) AM_READ_PORT("260002")
@ -508,9 +508,9 @@ static DRIVER_INIT( offtwall )
atarijsa_init(machine, "260010", 0x0040); atarijsa_init(machine, "260010", 0x0040);
/* install son-of-slapstic workarounds */ /* install son-of-slapstic workarounds */
spritecache_count = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fde42, 0x3fde43, 0, 0, spritecache_count_r); state->spritecache_count = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fde42, 0x3fde43, 0, 0, spritecache_count_r);
bankswitch_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x037ec2, 0x037f39, 0, 0, bankswitch_r); state->bankswitch_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x037ec2, 0x037f39, 0, 0, bankswitch_r);
unknown_verify_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fdf1e, 0x3fdf1f, 0, 0, unknown_verify_r); state->unknown_verify_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fdf1e, 0x3fdf1f, 0, 0, unknown_verify_r);
} }
@ -522,9 +522,9 @@ static DRIVER_INIT( offtwalc )
atarijsa_init(machine, "260010", 0x0040); atarijsa_init(machine, "260010", 0x0040);
/* install son-of-slapstic workarounds */ /* install son-of-slapstic workarounds */
spritecache_count = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fde42, 0x3fde43, 0, 0, spritecache_count_r); state->spritecache_count = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fde42, 0x3fde43, 0, 0, spritecache_count_r);
bankswitch_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x037eca, 0x037f43, 0, 0, bankswitch_r); state->bankswitch_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x037eca, 0x037f43, 0, 0, bankswitch_r);
unknown_verify_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fdf24, 0x3fdf25, 0, 0, unknown_verify_r); state->unknown_verify_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fdf24, 0x3fdf25, 0, 0, unknown_verify_r);
} }

3
src/mame/includes/atarigx2.h
View File

@ -26,6 +26,9 @@ public:
UINT8 playfield_color_bank; UINT8 playfield_color_bank;
UINT16 playfield_xscroll; UINT16 playfield_xscroll;
UINT16 playfield_yscroll; UINT16 playfield_yscroll;
UINT16 last_write;
UINT16 last_write_offset;
}; };

11
src/mame/includes/beathead.h
View File

@ -24,6 +24,17 @@ public:
offs_t hsyncram_offset; offs_t hsyncram_offset;
offs_t hsyncram_start; offs_t hsyncram_start;
UINT8 hsyncram[0x800]; UINT8 hsyncram[0x800];
UINT32 * ram_base;
UINT32 * rom_base;
double hblank_offset;
UINT8 irq_line_state;
UINT8 irq_enable[3];
UINT8 irq_state[3];
UINT8 eeprom_enabled;
}; };

7
src/mame/includes/offtwall.h
View File

@ -14,6 +14,13 @@ public:
offtwall_state(running_machine &machine) { } offtwall_state(running_machine &machine) { }
atarigen_state atarigen; atarigen_state atarigen;
UINT16 *bankswitch_base;
UINT16 *bankrom_base;
UINT32 bank_offset;
UINT16 *spritecache_count;
UINT16 *unknown_verify_base;
}; };