Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-04-24 01:11:11 +03:00
Code Issues Actions 1 Packages Projects Releases Wiki Activity

-AVR8 cpu changes [Felipe Sanches]

Browse Source 
- timers wip
 - Add TIMSK* reads - Refactor timer_tick calls
 - Remove all redundant register init statements. 
   We simply set all 0x200 registers to zero.
 - debugging timers
 - better syntax for disassembly of RJMP destination address
 - use register names in disasm of CBI, SBI, SBIC, SBIS instructions
 - use register bit names in disasm of instructions SBI,
    SBIS, SBIC, CBI 
 - wip on avr8 EEPROM read/write support
This commit is contained in:
Miodrag Milanovic 2014-01-02 09:54:29 +00:00
parent 3a46273b01
commit 7f04eebd50
4 changed files with 996 additions and 800 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1550
src/emu/cpu/avr8/avr8.c
View File

File diff suppressed because it is too large Load Diff

102
src/emu/cpu/avr8/avr8.h
View File

@ -162,25 +162,10 @@ protected:
UINT8 m_r[0x200];
// internal timers
UINT8 m_timer0_top;
INT32 m_timer0_increment;
UINT16 m_timer0_prescale;
UINT16 m_timer0_prescale_count;
UINT16 m_timer1_top;
INT32 m_timer1_increment;
UINT16 m_timer1_prescale;
UINT16 m_timer1_prescale_count;
UINT8 m_timer2_top;
INT32 m_timer2_increment;
UINT16 m_timer2_prescale;
UINT16 m_timer2_prescale_count;
UINT16 m_timer4_top;
INT32 m_timer4_increment;
UINT16 m_timer4_prescale;
UINT16 m_timer4_prescale_count;
UINT16 m_timer_top[6];
INT32 m_timer_increment[6];
UINT16 m_timer_prescale[6];
UINT16 m_timer_prescale_count[6];
// SPI
bool m_spi_active;
@ -226,13 +211,13 @@ protected:
// timers
void timer_tick(int cycles);
void update_timer_clock_source(UINT8 timer, UINT8 selection);
void update_timer_waveform_gen_mode(UINT8 timer, UINT8 mode);
// timer 0
void timer0_tick();
void changed_tccr0a(UINT8 data);
void changed_tccr0b(UINT8 data);
void update_timer0_waveform_gen_mode();
void update_timer0_clock_source();
void update_ocr0(UINT8 newval, UINT8 reg);
void timer0_force_output_compare(int reg);
@ -240,8 +225,6 @@ protected:
void timer1_tick();
void changed_tccr1a(UINT8 data);
void changed_tccr1b(UINT8 data);
void update_timer1_waveform_gen_mode();
void update_timer1_clock_source();
void update_timer1_input_noise_canceler();
void update_timer1_input_edge_select();
void update_ocr1(UINT16 newval, UINT8 reg);
@ -250,31 +233,32 @@ protected:
void timer2_tick();
void changed_tccr2a(UINT8 data);
void changed_tccr2b(UINT8 data);
void update_timer2_waveform_gen_mode();
void update_timer2_clock_source();
void update_ocr2(UINT8 newval, UINT8 reg);
void timer2_force_output_compare(int reg);
// timer 3
/*
void timer3_tick();
void changed_tccr3a(UINT8 data);
void changed_tccr3b(UINT8 data);
void update_timer3_waveform_gen_mode();
void update_timer3_clock_source();
void update_ocr3(UINT8 newval, UINT8 reg);
void timer3_force_output_compare(int reg);
*/
void changed_tccr3c(UINT8 data);
// void update_ocr3(UINT8 newval, UINT8 reg);
// void timer3_force_output_compare(int reg);
// timer 4
void timer4_tick();
void changed_tccr4a(UINT8 data);
void changed_tccr4b(UINT8 data);
void update_timer4_waveform_gen_mode();
void update_timer4_clock_source();
void changed_tccr4c(UINT8 data);
//void update_ocr4(UINT8 newval, UINT8 reg);
//void timer4_force_output_compare(int reg);
// timer 5
void timer5_tick();
void changed_tccr5a(UINT8 data);
void changed_tccr5b(UINT8 data);
// void update_ocr5(UINT8 newval, UINT8 reg);
// void timer5_force_output_compare(int reg);
// address spaces
address_space *m_program;
address_space *m_data;
@ -707,7 +691,55 @@ enum
AVR8_REGIDX_PORTK,
AVR8_REGIDX_PINL,
AVR8_REGIDX_DDRL,
AVR8_REGIDX_PORTL
AVR8_REGIDX_PORTL,
//0x10C: Reserved
//0x10D: Reserved
//0x10E: Reserved
//0x10F: Reserved
//0x110: Reserved
//0x111: Reserved
//0x112: Reserved
//0x113: Reserved
//0x114: Reserved
//0x115: Reserved
//0x116: Reserved
//0x117: Reserved
//0x118: Reserved
//0x119: Reserved
//0x11A: Reserved
//0x11B: Reserved
//0x11C: Reserved
//0x11D: Reserved
//0x11E: Reserved
//0x11F: Reserved
AVR8_REGIDX_TCCR5A,
AVR8_REGIDX_TCCR5B,
AVR8_REGIDX_TCCR5C,
//0x123: Reserved
AVR8_REGIDX_TCNT5L,
AVR8_REGIDX_TCNT5H,
AVR8_REGIDX_ICR5L,
AVR8_REGIDX_ICR5H,
AVR8_REGIDX_OCR5AL,
AVR8_REGIDX_OCR5AH,
AVR8_REGIDX_OCR5BL,
AVR8_REGIDX_OCR5BH,
AVR8_REGIDX_OCR5CL,
AVR8_REGIDX_OCR5CH,
//0x12E: Reserved
//0x12F: Reserved
AVR8_REGIDX_UCSR3A,
AVR8_REGIDX_UCSR3B,
AVR8_REGIDX_UCSR3C,
//0x133: Reserved
AVR8_REGIDX_UBRR3L,
AVR8_REGIDX_UBRR3H,
AVR8_REGIDX_UDR3,
//0x137: Reserved
// .
// . up to
// .
//0x1FF: Reserved
};
enum {
@ -820,8 +852,6 @@ enum
CKDIV8 = (1 << 7),
};
#define AVR8_EECR_EERE 0x01
#define AVR8_EEARH_MASK 0x01
#define AVR8_SPSR_SPIF_MASK 0x80

97
src/emu/cpu/avr8/avr8dasm.c
View File

@ -32,6 +32,72 @@ CPU_DISASSEMBLE( avr8 )
UINT32 addr = 0;
const char* register_names[0x40] = {"PINA", "DDRA", "PORTA", "PINB", "DDRB", "PORTB", "PINC", "DDRC", "PORTC", "PIND", "DDRD", "PORTD", "PINE", "DDRE", "PORTE", "PINF", "DDRF", "PORTF", "PING", "DDRG", "PORTG", "TIFR0", "TIFR1", "TIFR2","TIFR3", "TIFR4", "TIFR5", "PCIFR", "EIFR", "EIMSK", "GPIOR0", "EECR", "EEDR", "EEARL", "EEARH", "GTCCR", "TCCR0A", "TCCR0B", "TCNT0", "OCR0A", "OCR0B", "0x29", "GPIOR1", "GPIOR2", "SPCR", "SPSR", "SPDR", "0x2F", "ACSR", "OCDR", "0x32", "SMCR", "MCUSR", "MCUCR", "0x36", "SPMCSR", "0x38", "0x39", "0x3A", "RAMPZ", "EIND", "SPL", "SPH", "SREG"};
const char* register_bit_names[0x40][8] = {
/* PINA */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRA */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTA */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PINB */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRB */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTB */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PINC */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRC */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTC */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PIND */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRD */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTD */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PINE */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRE */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTE */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PINF */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRF */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTF */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PING */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* DDRG */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* PORTG */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* TIFR0 */ { "TOV0", "OCF0A", "OCF0B", "3", "4", "5", "6", "7"},
/* TIFR1 */ { "TOV1", "OCF1A", "OCF1B", "OCF1C", "4", "ICF1", "6", "7"},
/* TIFR2 */ { "TOV2", "OCF2A", "OCF2B", "3", "4", "5", "6", "7"},
/* TIFR3 */ { "TOV3", "OCF3A", "OCF3B", "OCF3C", "4", "ICF3", "6", "7"},
/* TIFR4 */ { "TOV4", "OCF4A", "OCF4B", "OCF4C", "4", "ICF4", "6", "7"},
/* TIFR5 */ { "TOV5", "OCF5A", "OCF5B", "OCF5C", "4", "ICF5", "6", "7"},
/* PCIFR */ {"PCIF0", "PCIF1", "PCIF2", "3", "4", "5", "6", "7"},
/* EIFR */ {"INTF0", "INTF1", "INTF2", "INTF3", "INTF4", "INTF5", "INTF6", "INTF7"},
/* EIMSK */ { "INT0", "INT1", "INT2", "INT3", "INT4", "INT5", "INT6", "INT7"},
/* GPIOR0 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* EECR */ { "EERE", "EEPE", "EEMPE", "EERIE", "EEPM0", "EEPM1", "6", "7"},
/* EEDR */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* EEARL */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* EEARH */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* GTCCR */ {"PSRSYNC", "PSRASY", "2", "3", "4", "5", "6", "TSM"},
/* TCCR0A */ {"WGM00", "WGM01", "2", "3","COM0B0","COM0B1","COM0A0","COM0A1"},
/* TCCR0B */ { "CS0", "CS1", "CS2", "WGM02", "4", "5", "FOC0B", "FOC0A"},
/* TCNT0 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* OCR0A */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* OCR0B */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* 0x29 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* GPIOR1 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* GPIOR2 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* SPCR */ { "SPR0", "SPR1", "CPHA", "CPOL", "MSTR", "DORD", "SPE", "SPIE"},
/* SPSR */ {"SPI2X", "1", "2", "3", "4", "5", "WCOL", "SPIF"},
/* SPDR */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* 0x2F */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* ACSR */ {"ACIS0", "ACIS1", "ACIC", "ACIE", "ACI", "ACO", "ACBG", "ACD"},
/* OCDR */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* 0x32 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* SMCR */ { "SE", "SM0", "SM1", "SM2", "4", "5", "6", "7"},
/* MCUSR */ { "PORF", "EXTRF", "BORF", "WDRF", "JTRF", "5", "6", "7"},
/* MCUCR */ { "IVCE", "IVSEL", "2", "3", "PUD", "5", "6", "JTD"},
/* 0x36 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* SPMCSR */ {"SPMEN", "PGERS", "PGWRT","BLBSET","RWWSRE", "SIGRD", "RWWSB", "SPMIE"},
/* 0x38 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* 0x39 */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* 0x3A */ { "0", "1", "2", "3", "4", "5", "6", "7"},
/* RAMPZ */ {"RAMPZ0","RAMPZ1", "2", "3", "4", "5", "6", "7"},
/* EIND */ {"EIND0", "1", "2", "3", "4", "5", "6", "7"},
/* SPL */ { "SP0", "SP1", "SP2", "SP3", "SP4", "SP5", "SP6", "SP7"},
/* SPH */ { "SP8", "SP9", "SP10", "SP11", "SP12", "SP13", "SP14", "SP15"},
/* SREG */ { "C", "Z", "N", "V", "S", "H", "T", "I"}};
switch(op & 0xf000)
{
case 0x0000:
@ -458,16 +524,28 @@ CPU_DISASSEMBLE( avr8 )
output += sprintf( output, "SBIW R%d:R%d, 0x%02x", 24+(RD2(op) << 1)+1, 24+(RD2(op) << 1), KCONST6(op) );
break;
case 0x0800:
output += sprintf( output, "CBI 0x%02x, %d", ACONST5(op), RR3(op) );
if (ACONST5(op) < 0x20)
output += sprintf( output, "CBI %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] );
else
output += sprintf( output, "CBI 0x%02x, %d", ACONST5(op), RR3(op) );
break;
case 0x0900:
output += sprintf( output, "SBIC 0x%02x, %d", ACONST5(op), RR3(op) );
if (ACONST5(op) < 0x20)
output += sprintf( output, "SBIC %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] );
else
output += sprintf( output, "SBIC 0x%02x, %d", ACONST5(op), RR3(op) );
break;
case 0x0a00:
output += sprintf( output, "SBI 0x%02x, %d", ACONST5(op), RR3(op) );
if (ACONST5(op) < 0x20)
output += sprintf( output, "SBI %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] );
else
output += sprintf( output, "SBI 0x%02x, %d", ACONST5(op), RR3(op) );
break;
case 0x0b00:
output += sprintf( output, "SBIS 0x%02x, %d", ACONST5(op), RR3(op) );
if (ACONST5(op) < 0x20)
output += sprintf( output, "SBIS %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] );
else
output += sprintf( output, "SBIS 0x%02x, %d", ACONST5(op), RR3(op) );
break;
case 0x0c00:
case 0x0d00:
@ -481,22 +559,23 @@ CPU_DISASSEMBLE( avr8 )
if(op & 0x0800)
{
if (ACONST6(op) < 0x40 ) {
output += sprintf( output, "OUT %s, R%d", register_names[ACONST6(op)], RD5(op) );
output += sprintf( output, "OUT %s, R%d", register_names[ACONST6(op)], RD5(op) );
} else {
output += sprintf( output, "OUT 0x%02x, R%d", ACONST6(op), RD5(op) );
output += sprintf( output, "OUT 0x%02x, R%d", ACONST6(op), RD5(op) );
}
}
else
{
if (ACONST6(op) < 0x40 ) {
output += sprintf( output, "IN R%d, %s", RD5(op), register_names[ACONST6(op)] );
output += sprintf( output, "IN R%d, %s", RD5(op), register_names[ACONST6(op)] );
} else {
output += sprintf( output, "IN R%d, 0x%02x", RD5(op), ACONST6(op) );
output += sprintf( output, "IN R%d, 0x%02x", RD5(op), ACONST6(op) );
}
}
break;
case 0xc000:
output += sprintf( output, "RJMP %08x", (((op & 0x0800) ? ((op & 0x0fff) | 0xfffff000) : (op & 0x0fff)) << 1) );
//I'm not sure if this is correct. why pc + ... : pc + 8 + ... ?
output += sprintf( output, "RJMP %08x", (((op & 0x0800) ? pc + ((op & 0x0fff) | 0xfffff000) : pc + 8 + (op & 0x0fff)) << 0) );
break;
case 0xd000:
output += sprintf( output, "RCALL %08x", (((op & 0x0800) ? ((op & 0x0fff) | 0xfffff000) : (op & 0x0fff)) << 1) );

47
src/mess/drivers/replicator.c
View File

@ -22,11 +22,20 @@ Changelog:
// TODO:
// * figure out what's wrong with the keypad inputs (interface seems to be blocked in the first screen)
// * fix avr8 timer/counter #4 so that we get the buzzer to work
// * fix avr8 timer/counter #0 (toggle OC0B) and #5 (overflow interrupt "Microsecond timer") so that we get the buzzer to work
// * figure-out correct size of internal EEPROM
// * emulate an SD Card
// * implement avr8 WDR (watchdog reset) opcode
#include "emu.h"
#include "cpu/avr8/avr8.h"
#include "video/hd44780.h"
#include "rendlay.h"
#include "debugger.h"
#include "sound/dac.h"
#define MASTER_CLOCK 16000000
#define LOG_PORTS 0
//Port A bits:
@ -139,15 +148,6 @@ Changelog:
#define Z_MIN (1 << 6)
#define Z_MAX (1 << 7)
#include "emu.h"
#include "cpu/avr8/avr8.h"
#include "video/hd44780.h"
#include "rendlay.h"
#include "debugger.h"
#define MASTER_CLOCK 16000000
/****************************************************\
* I/O devices *
\****************************************************/
@ -158,7 +158,8 @@ public:
replicator_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_lcdc(*this, "hd44780")
m_lcdc(*this, "hd44780"),
m_dac(*this, "dac")
{
}
@ -180,6 +181,7 @@ public:
required_device<avr8_device> m_maincpu;
required_device<hd44780_device> m_lcdc;
required_device<dac_device> m_dac;
DECLARE_READ8_MEMBER(port_r);
DECLARE_WRITE8_MEMBER(port_w);
@ -445,10 +447,10 @@ WRITE8_MEMBER(replicator_state::port_w)
{
if (data == m_port_g) break;
#if LOG_PORTS
UINT8 old_port_g = m_port_g;
UINT8 changed = data ^ old_port_g;
#if LOG_PORTS
printf("[%08X] ", m_maincpu->m_shifted_pc);
if(changed & EX4_1280) printf("[G] EX4_1280: %s\n", data & EX4_1280 ? "HIGH" : "LOW");
if(changed & EX3_1280) printf("[G] EX3_1280: %s\n", data & EX3_1280 ? "HIGH" : "LOW");
@ -457,6 +459,16 @@ WRITE8_MEMBER(replicator_state::port_w)
if(changed & BUZZ) printf("[G] BUZZ: %s\n", data & BUZZ ? "HIGH" : "LOW");
#endif
if(changed & BUZZ){
/* FIX-ME: What is the largest sample value allowed?
I'm using 0x3F based on what I see in src/mess/drivers/craft.c
But as the method is called "write_unsigned8", I guess we could have samples with values up to 0xFF, right?
Anyway... With the 0x3F value we'll get a sound that is not so loud, which may be less annoying... :-)
*/
UINT8 audio_sample = (data & BUZZ) ? 0x3F : 0;
m_dac->write_unsigned8(audio_sample << 1);
}
m_port_g = data;
break;
}
@ -662,10 +674,11 @@ static MACHINE_CONFIG_START( replicator, replicator_state )
MCFG_HD44780_ADD("hd44780")
MCFG_HD44780_LCD_SIZE(4, 20)
/*TODO:
Add sound config:
- A buzzer connected to the PG5 pin that is driven by Timer/Counter #4
*/
/* sound hardware */
/* A piezo is connected to the PORT G bit 5 (OC0B pin driven by Timer/Counter #4) */
MCFG_SPEAKER_STANDARD_MONO("buzzer")
MCFG_SOUND_ADD("dac", DAC, 0)
MCFG_SOUND_ROUTE(0, "buzzer", 1.00)
MACHINE_CONFIG_END
@ -679,4 +692,4 @@ ROM_START( replica1 )
ROM_END
/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME */
CONS(2012, replica1, 0, 0, replicator, replicator, replicator_state, replicator, "Makerbot", "Replicator 1 desktop 3d printer", GAME_NOT_WORKING|GAME_NO_SOUND)
CONS(2012, replica1, 0, 0, replicator, replicator, replicator_state, replicator, "Makerbot", "Replicator 1 desktop 3d printer", GAME_NOT_WORKING)