mirror of
https://github.com/holub/mame
synced 2025-04-20 15:32:45 +03:00
netlist: Document Congo Bongo progress and fix devices.
This commit is contained in:
couriersud
parent
84e3eb1deb
commit
7f419fa1b3
@ -20,24 +20,20 @@ namespace netlist
|
||||
, m_VDD(*this, "1")
|
||||
, m_VGG(*this, "2")
|
||||
, m_VSS(*this, "4")
|
||||
, m_FREQ(*this, "FREQ", 24000)
|
||||
, m_FREQ(*this, "FREQ", 24000 * 2)
|
||||
, m_R_LOW(*this, "R_LOW", 1000)
|
||||
, m_R_HIGH(*this, "R_HIGH", 1000)
|
||||
/* clock */
|
||||
, m_feedback(*this, "_FB")
|
||||
, m_Q(*this, "_Q")
|
||||
, m_inc(netlist_time::from_hz(24000))
|
||||
, m_inc(netlist_time::from_hz(24000 * 2))
|
||||
, m_shift(*this, "m_shift", 0)
|
||||
, m_is_timestep(false)
|
||||
{
|
||||
connect(m_feedback, m_Q);
|
||||
|
||||
/* output */
|
||||
//register_term("_RV1", m_RV.m_P);
|
||||
//register_term("_RV2", m_RV.m_N);
|
||||
|
||||
// output
|
||||
connect(m_RV.m_N, m_VDD);
|
||||
|
||||
/* device */
|
||||
register_subalias("3", m_RV.m_P);
|
||||
}
|
||||
|
||||
@ -74,7 +70,7 @@ namespace netlist
|
||||
nlconst::zero(),
|
||||
nlconst::zero());
|
||||
m_inc = netlist_time::from_fp(plib::reciprocal(m_FREQ()));
|
||||
if (m_FREQ() < nlconst::magic(24000) || m_FREQ() > nlconst::magic(56000))
|
||||
if (m_FREQ() < nlconst::magic(24000*2) || m_FREQ() > nlconst::magic(56000*2))
|
||||
log().warning(MW_FREQUENCY_OUTSIDE_OF_SPECS_1(m_FREQ()));
|
||||
|
||||
m_shift = 0x1ffff;
|
||||
@ -84,7 +80,7 @@ namespace netlist
|
||||
NETLIB_UPDATE_PARAM(MM5837_dip)
|
||||
{
|
||||
m_inc = netlist_time::from_fp(plib::reciprocal(m_FREQ()));
|
||||
if (m_FREQ() < nlconst::magic(24000) || m_FREQ() > nlconst::magic(56000))
|
||||
if (m_FREQ() < nlconst::magic(24000*2) || m_FREQ() > nlconst::magic(56000*2))
|
||||
log().warning(MW_FREQUENCY_OUTSIDE_OF_SPECS_1(m_FREQ()));
|
||||
}
|
||||
|
||||
|
||||
@ -1,6 +1,5 @@
|
||||
// license:GPL-2.0+
|
||||
// copyright-holders:Couriersud
|
||||
/* € */ // ABC
|
||||
// license:CC0
|
||||
// copyright-holders:Andrew Gardner,Couriersud
|
||||
|
||||
#include "netlist/devices/net_lib.h"
|
||||
|
||||
@ -19,13 +18,9 @@
|
||||
|
||||
#ifndef __PLIB_PREPROCESSOR__
|
||||
|
||||
#define LM358_DIP(_name) \
|
||||
NET_REGISTER_DEV_X(LM358_DIP, _name)
|
||||
|
||||
#define G501534_DIP(_name) \
|
||||
NET_REGISTER_DEV_X(G501534_DIP, _name)
|
||||
|
||||
|
||||
NETLIST_EXTERNAL(congob_lib)
|
||||
|
||||
#endif
|
||||
@ -43,23 +38,27 @@ NETLIST_START(dummy)
|
||||
// IGNORED O_AUDIO0: O_AUDIO0 64 0
|
||||
// .END
|
||||
|
||||
PARAM(Solver.ACCURACY, 1e-7)
|
||||
PARAM(Solver.NR_LOOPS, 90000)
|
||||
PARAM(Solver.RELTOL, 1e-3)
|
||||
PARAM(Solver.VNTOL, 1e-5)
|
||||
PARAM(Solver.NR_LOOPS, 30)
|
||||
PARAM(Solver.SOR_FACTOR, 1.0)
|
||||
PARAM(Solver.GS_LOOPS, 99)
|
||||
//PARAM(Solver.METHOD, "GMRES")
|
||||
PARAM(Solver.METHOD, "MAT_CR")
|
||||
|
||||
//PARAM(Solver.METHOD, "GMRES")
|
||||
PARAM(Solver.ACCURACY, 1e-5)
|
||||
//PARAM(Solver.METHOD, "SOR")
|
||||
|
||||
#if USE_OPTMIZATIONS
|
||||
#if USE_FRONTIERS
|
||||
SOLVER(Solver, 48000)
|
||||
SOLVER(Solver, 96000)
|
||||
#else
|
||||
SOLVER(Solver, 48000)
|
||||
#endif
|
||||
PARAM(Solver.DYNAMIC_TS, 0)
|
||||
PARAM(Solver.PARALLEL, 1)
|
||||
PARAM(Solver.PARALLEL, 4)
|
||||
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 2e-6)
|
||||
PARAM(Solver.DYNAMIC_LTE, 1e-4)
|
||||
#else
|
||||
SOLVER(Solver, 48000)
|
||||
PARAM(Solver.DYNAMIC_TS, 1)
|
||||
@ -78,8 +77,6 @@ NETLIST_START(dummy)
|
||||
TTL_INPUT(I_GORILLA0, 0)
|
||||
TTL_INPUT(I_RIM0, 0)
|
||||
|
||||
ALIAS(I_V0.Q, GND.Q)
|
||||
|
||||
ANALOG_INPUT(I_V12, 12)
|
||||
ANALOG_INPUT(I_V5, 5)
|
||||
ANALOG_INPUT(I_V6, 6)
|
||||
@ -90,7 +87,7 @@ NETLIST_START(dummy)
|
||||
|
||||
NET_C(R94.1, CO.1)
|
||||
NET_C(CO.2, RO.1)
|
||||
NET_C(RO.2, GND)
|
||||
NET_C(GND, RO.2)
|
||||
|
||||
// Found here: https://hamesspam.sakura.ne.jp/hes2016/160521.html
|
||||
NET_MODEL("1S2075 D(IS=1.387E-9 N=1.702 RS=1.53 CJO=1.92pf VJ=0.4996 M=0.0605 TT=5ns BV=75 IBV=100E-15)")
|
||||
@ -99,6 +96,9 @@ NETLIST_START(dummy)
|
||||
|
||||
INCLUDE(CongoBongo_schematics)
|
||||
|
||||
NET_C(I_V5, I_RIM0.VCC, I_CONGA_H0.VCC, I_CONGA_L0.VCC, I_GORILLA0.VCC, I_BASS_DRUM0.VCC)
|
||||
NET_C(GND, I_RIM0.GND, I_CONGA_H0.GND, I_CONGA_L0.GND, I_GORILLA0.GND, I_BASS_DRUM0.GND)
|
||||
|
||||
#if USE_OPTMIZATIONS
|
||||
/* provide resistance feedback loop. This helps convergence for
|
||||
* Newton-Raphson a lot. This puts a resistor of 1e100 Ohms in parallel
|
||||
@ -114,8 +114,11 @@ NETLIST_START(dummy)
|
||||
/* The opamp actually has an FPF of about 1000k. This doesn't work here and causes oscillations.
|
||||
* FPF here therefore about half the Solver clock.
|
||||
*/
|
||||
PARAM(XU16.B.MODEL, "MB3614(TYPE=3)")
|
||||
#if 1
|
||||
PARAM(XU16.B.MODEL, "MB3614(TYPE=3 UGF=22k)")
|
||||
//PARAM(XU17.A.MODEL, "MB3614(TYPE=3 UGF=22k)")
|
||||
PARAM(XU17.C.MODEL, "MB3614(TYPE=3 UGF=44k)")
|
||||
#endif
|
||||
#if 0
|
||||
PARAM(XU17.A.MODEL, "MB3614(TYPE=1)")
|
||||
PARAM(XU17.B.MODEL, "MB3614(TYPE=1)")
|
||||
@ -288,14 +291,14 @@ NETLIST_START(CongoBongo_schematics)
|
||||
NET_C(XU13.1, C37.2, C36.1, R48.1)
|
||||
NET_C(XU13.2, C35.2, R48.2)
|
||||
NET_C(XU13.3, R44.1, R46.2, R45.1)
|
||||
NET_C(XU13.4, R27.1, R21.1, R37.1, R31.1, R47.1, R41.1, R57.1, R51.1, C46.2, C45.2, XU17.4, R80.2, XU16.4, XU20.4, XU15.12, I_V12.Q)
|
||||
NET_C(I_V12.Q, XU13.4, R27.1, R21.1, R37.1, R31.1, R47.1, R41.1, R57.1, R51.1, C46.2, C45.2, XU17.4, R80.2, XU16.4, XU20.4, XU15.12)
|
||||
NET_C(XU13.5, R54.1, R56.2, R55.1)
|
||||
NET_C(XU13.6, C41.2, R58.2, R60.2)
|
||||
NET_C(XU13.7, C44.2, C42.1, R58.1, R61.1)
|
||||
NET_C(XU13.8, C29.2, C31.1, R38.1)
|
||||
NET_C(XU13.9, C30.2, R38.2)
|
||||
NET_C(XU13.10, R34.1, R36.2, R35.1)
|
||||
NET_C(XU13.11, C22.2, R29.2, R25.2, R23.2, R22.2, XU6.1, XU6.3, XU6.7, C28.2, R39.2, R35.2, R33.2, R32.2, C34.2, R49.2, R45.2, R43.2, R42.2, C40.2, R59.2, R55.2, R53.2, R52.2, C43.2, R69.1, R64.1, C49.2, C48.2, C47.2, C46.1, C45.1, XU17.11, XU19.1, XU19.4, XU19.8, XU19.12, XU19.15, R81.1, C56.2, C55.2, C53.2, C52.2, XU18.1, XU18.2, XU18.7, XU18.12, XU18.13, C54.2, XU16.11, R84.1, R88.1, Q2.E, C58.2, C60.2, XU20.1, XU20.2, XU15.4, I_V0.Q)
|
||||
NET_C(GND, XU13.11, C22.2, R29.2, R25.2, R23.2, R22.2, XU6.1, XU6.3, XU6.7, C28.2, R39.2, R35.2, R33.2, R32.2, C34.2, R49.2, R45.2, R43.2, R42.2, C40.2, R59.2, R55.2, R53.2, R52.2, C43.2, R69.1, R64.1, C49.2, C48.2, C47.2, C46.1, C45.1, XU17.11, XU19.1, XU19.4, XU19.8, XU19.12, XU19.15, R81.1, C56.2, C55.2, C53.2, C52.2, XU18.1, XU18.2, XU18.7, XU18.12, XU18.13, C54.2, XU16.11, R84.1, R88.1, Q2.E, C58.2, C60.2, XU20.1, XU20.2, XU15.4)
|
||||
NET_C(XU13.12, R24.1, R26.2, R25.1)
|
||||
NET_C(XU13.13, C23.2, R28.2)
|
||||
NET_C(XU13.14, C25.2, C24.1, R28.1)
|
||||
@ -377,6 +380,7 @@ NETLIST_START(CongoBongo_schematics)
|
||||
NET_C(C60.1, XU15.2)
|
||||
NET_C(XU15.3, C61.2)
|
||||
NET_C(C61.1, R94.2)
|
||||
|
||||
NETLIST_END()
|
||||
|
||||
|
||||
@ -385,7 +389,8 @@ NETLIST_START(G501534_DIP)
|
||||
//AFUNC(f, 2, "A0 A1 A1 A1 * * 0.01 * *")
|
||||
//AFUNC(f, 2, "A0")
|
||||
//AFUNC(f, 2, "A0 6 - A1 3 pow * 0.02 * 6 +")
|
||||
AFUNC(f, 2, "A0 * pow(A1,3.0) * 0.02")
|
||||
//AFUNC(f, 2, "A0 * pow(A1,3.0) * 0.02")
|
||||
AFUNC(f, 2, "A0 * A1 * 0.2")
|
||||
|
||||
/*
|
||||
* 12: VCC
|
||||
@ -396,15 +401,13 @@ NETLIST_START(G501534_DIP)
|
||||
* 2: RDL - connected via Capacitor to ground
|
||||
*/
|
||||
|
||||
DUMMY_INPUT(DU1)
|
||||
DUMMY_INPUT(DU2)
|
||||
DUMMY_INPUT(DU3)
|
||||
RES(DUMMY, RES_K(1))
|
||||
|
||||
RES(RO, 1000)
|
||||
|
||||
ALIAS(12, DU1.I)
|
||||
ALIAS(4, DU2.I)
|
||||
ALIAS(2, DU3.I)
|
||||
ALIAS(12, DUMMY.1) // VCC
|
||||
ALIAS(4, DUMMY.2) // GND
|
||||
ALIAS(2, DUMMY.2) // RDL
|
||||
ALIAS(1, f.A0)
|
||||
ALIAS(13, f.A1)
|
||||
NET_C(f.Q, RO.1)
|
||||
@ -1,6 +1,6 @@
|
||||
0.000,I_GORILLA0.IN,0
|
||||
0.100,I_GORILLA0.IN,1
|
||||
0.200,I_GORILLA0.IN,0
|
||||
0.300,I_GORILLA0.IN,0
|
||||
1.000,I_BASS_DRUM0.IN,1
|
||||
1.100,I_BASS_DRUM0.IN,0
|
||||
2.000,I_CONGA_H0.IN,1
|
||||
|
||||
|
@ -23,21 +23,21 @@
|
||||
*/
|
||||
|
||||
static NETLIST_START(CD4001_DIP)
|
||||
CD4001_NOR(s1)
|
||||
CD4001_NOR(s2)
|
||||
CD4001_NOR(s3)
|
||||
CD4001_NOR(s4)
|
||||
CD4001_GATE(s1)
|
||||
CD4001_GATE(s2)
|
||||
CD4001_GATE(s3)
|
||||
CD4001_GATE(s4)
|
||||
|
||||
NET_C(s1.VCC, s2.VCC, s3.VCC, s4.VCC)
|
||||
NET_C(s1.VDD, s2.VDD, s3.VDD, s4.VDD)
|
||||
NET_C(s1.GND, s2.GND, s3.GND, s4.GND)
|
||||
DIPPINS( /* +--------------+ */
|
||||
s1.A, /* A1 |1 ++ 14| VCC */ s1.VCC,
|
||||
s1.A, /* A1 |1 ++ 14| VDD */ s1.VCC,
|
||||
s1.B, /* B1 |2 13| A6 */ s4.B,
|
||||
s1.Q, /* A2 |3 12| Y6 */ s4.A,
|
||||
s2.Q, /* Y2 |4 4001 11| A5 */ s4.Q,
|
||||
s2.A, /* A3 |5 10| Y5 */ s3.Q,
|
||||
s2.B, /* Y3 |6 9| A4 */ s3.B,
|
||||
s1.VDD, /* GND |7 8| Y4 */ s3.A
|
||||
s1.GND, /* VSS |7 8| Y4 */ s3.A
|
||||
/* +--------------+ */
|
||||
)
|
||||
|
||||
@ -222,7 +222,7 @@ NETLIST_END()
|
||||
|
||||
NETLIST_START(CD4XXX_lib)
|
||||
|
||||
TRUTHTABLE_START(CD4001_NOR, 2, 1, "")
|
||||
TRUTHTABLE_START(CD4001_GATE, 2, 1, "")
|
||||
TT_HEAD("A , B | Q ")
|
||||
TT_LINE("0,0|1|85")
|
||||
TT_LINE("X,1|0|120")
|
||||
|
||||
@ -27,8 +27,8 @@
|
||||
|
||||
#ifndef NL_AUTO_DEVICES
|
||||
|
||||
#define CD4001_NOR(name) \
|
||||
NET_REGISTER_DEV(CD4001_NOR, name)
|
||||
#define CD4001_GATE(name) \
|
||||
NET_REGISTER_DEV(CD4001_GATE, name)
|
||||
|
||||
#define CD4001_DIP(name) \
|
||||
NET_REGISTER_DEV(CD4001_DIP, name)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user