Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-07-07 02:50:50 +03:00
Code Issues Actions Packages Projects Releases Wiki Activity

devices/cpu to device_add_mconfig (nw)

Browse Source
This commit is contained in:
Ivan Vangelista 2017-05-31 20:24:14 +02:00
parent f225f3efb9
commit 7f88e1ca5e
46 changed files with 520 additions and 650 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
src/devices/cpu/arm7/lpc210x.cpp
View File

@ -277,10 +277,5 @@ void lpc210x_device::write_timer(address_space &space, int timer, int offset, ui
static MACHINE_CONFIG_START( lpc210x )
MACHINE_CONFIG_MEMBER( lpc210x_device::device_add_mconfig )
MACHINE_CONFIG_END
machine_config_constructor lpc210x_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( lpc210x );
}

2
src/devices/cpu/arm7/lpc210x.h
View File

@ -73,7 +73,7 @@ public:
protected:
// device-level overrides
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
virtual void device_reset() override;

53
src/devices/cpu/h8/h83002.cpp
View File

@ -34,31 +34,6 @@ h83002_device::h83002_device(const machine_config &mconfig, const char *tag, dev
syscr = 0;
}
static MACHINE_CONFIG_START(h83002)
MCFG_H8H_INTC_ADD("intc")
MCFG_H8_ADC_3337_ADD("adc", "intc", 60)
MCFG_H8_DMA_ADD("dma")
// (H8/2002.pdf) Table 8-11 DMAC Activation Sources
MCFG_H8_DMA_CHANNEL_ADD("dma:0", "intc", 44, h8_dma_channel_device::NONE, 24, h8_dma_channel_device::DREQ_EDGE, h8_dma_channel_device::DREQ_LEVEL, 28, 32, 36, 54, 53, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE)
MCFG_H8_DMA_CHANNEL_ADD("dma:1", "intc", 46, h8_dma_channel_device::NONE, 24, h8_dma_channel_device::DREQ_EDGE, h8_dma_channel_device::DREQ_LEVEL, 28, 32, 36, 54, 53, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE)
MCFG_H8_PORT_ADD("port4", h8_device::PORT_4, 0x00, 0x00)
MCFG_H8_PORT_ADD("port6", h8_device::PORT_6, 0x80, 0x80)
MCFG_H8_PORT_ADD("port7", h8_device::PORT_7, 0x00, 0x00)
MCFG_H8_PORT_ADD("port8", h8_device::PORT_8, 0xf0, 0xe0)
MCFG_H8_PORT_ADD("port9", h8_device::PORT_9, 0x00, 0xc0)
MCFG_H8_PORT_ADD("porta", h8_device::PORT_A, 0x00, 0x00)
MCFG_H8_PORT_ADD("portb", h8_device::PORT_B, 0x00, 0x00)
MCFG_H8_TIMER16_ADD("timer16", 5, 0xe0)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:0", 2, 2, "intc", 24)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:1", 2, 2, "intc", 28)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:2", 2, 2, "intc", 32)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:3", 2, 2, "intc", 36)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:4", 2, 2, "intc", 40)
MCFG_H8_SCI_ADD("sci0", "intc", 52, 53, 54, 55)
MCFG_H8_SCI_ADD("sci1", "intc", 56, 57, 58, 59)
MCFG_H8_WATCHDOG_ADD("watchdog", "intc", 20, h8_watchdog_device::H)
MACHINE_CONFIG_END
DEVICE_ADDRESS_MAP_START(map, 16, h83002_device)
AM_RANGE(0xfffd10, 0xffff0f) AM_RAM
@ -161,10 +136,30 @@ DEVICE_ADDRESS_MAP_START(map, 16, h83002_device)
AM_RANGE(0xfffff8, 0xfffff9) AM_DEVREADWRITE8("intc", h8h_intc_device, icr_r, icr_w, 0xffff)
ADDRESS_MAP_END
machine_config_constructor h83002_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME(h83002);
}
MACHINE_CONFIG_MEMBER(h83002_device::device_add_mconfig)
MCFG_H8H_INTC_ADD("intc")
MCFG_H8_ADC_3337_ADD("adc", "intc", 60)
MCFG_H8_DMA_ADD("dma")
// (H8/2002.pdf) Table 8-11 DMAC Activation Sources
MCFG_H8_DMA_CHANNEL_ADD("dma:0", "intc", 44, h8_dma_channel_device::NONE, 24, h8_dma_channel_device::DREQ_EDGE, h8_dma_channel_device::DREQ_LEVEL, 28, 32, 36, 54, 53, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE)
MCFG_H8_DMA_CHANNEL_ADD("dma:1", "intc", 46, h8_dma_channel_device::NONE, 24, h8_dma_channel_device::DREQ_EDGE, h8_dma_channel_device::DREQ_LEVEL, 28, 32, 36, 54, 53, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE)
MCFG_H8_PORT_ADD("port4", h8_device::PORT_4, 0x00, 0x00)
MCFG_H8_PORT_ADD("port6", h8_device::PORT_6, 0x80, 0x80)
MCFG_H8_PORT_ADD("port7", h8_device::PORT_7, 0x00, 0x00)
MCFG_H8_PORT_ADD("port8", h8_device::PORT_8, 0xf0, 0xe0)
MCFG_H8_PORT_ADD("port9", h8_device::PORT_9, 0x00, 0xc0)
MCFG_H8_PORT_ADD("porta", h8_device::PORT_A, 0x00, 0x00)
MCFG_H8_PORT_ADD("portb", h8_device::PORT_B, 0x00, 0x00)
MCFG_H8_TIMER16_ADD("timer16", 5, 0xe0)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:0", 2, 2, "intc", 24)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:1", 2, 2, "intc", 28)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:2", 2, 2, "intc", 32)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:3", 2, 2, "intc", 36)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:4", 2, 2, "intc", 40)
MCFG_H8_SCI_ADD("sci0", "intc", 52, 53, 54, 55)
MCFG_H8_SCI_ADD("sci1", "intc", 56, 57, 58, 59)
MCFG_H8_WATCHDOG_ADD("watchdog", "intc", 20, h8_watchdog_device::H)
MACHINE_CONFIG_END
void h83002_device::execute_set_input(int inputnum, int state)
{

2
src/devices/cpu/h8/h83002.h
View File

@ -76,7 +76,7 @@ protected:
virtual int trapa_setup() override;
virtual void irq_setup() override;
virtual void internal_update(uint64_t current_time) override;
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
DECLARE_ADDRESS_MAP(map, 16);
virtual void device_start() override;

51
src/devices/cpu/h8/h83006.cpp
View File

@ -46,30 +46,6 @@ h83007_device::h83007_device(const machine_config &mconfig, const char *tag, dev
{
}
static MACHINE_CONFIG_START(h83006)
MCFG_H8H_INTC_ADD("intc")
MCFG_H8_ADC_3006_ADD("adc", "intc", 23)
MCFG_H8_PORT_ADD("port4", h8_device::PORT_4, 0x00, 0x00)
MCFG_H8_PORT_ADD("port6", h8_device::PORT_6, 0x80, 0x80)
MCFG_H8_PORT_ADD("port7", h8_device::PORT_7, 0x00, 0x00)
MCFG_H8_PORT_ADD("port8", h8_device::PORT_8, 0xf0, 0xe0)
MCFG_H8_PORT_ADD("port9", h8_device::PORT_9, 0xc0, 0xc0)
MCFG_H8_PORT_ADD("porta", h8_device::PORT_A, 0x80, 0x00)
MCFG_H8_PORT_ADD("portb", h8_device::PORT_B, 0x00, 0x00)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_0", "intc", 36, 38, 39, "timer8_1", h8_timer8_channel_device::CHAIN_OVERFLOW, true, false)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 37, 38, 39, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_2", "intc", 40, 42, 43, "timer8_3", h8_timer8_channel_device::CHAIN_OVERFLOW, false, true)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_3", "intc", 41, 42, 43, "timer8_2", h8_timer8_channel_device::CHAIN_A, false, true)
MCFG_H8_TIMER16_ADD("timer16", 3, 0xf8)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:0", 2, 2, "intc", 24)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:1", 2, 2, "intc", 28)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:2", 2, 2, "intc", 32)
MCFG_H8_SCI_ADD("sci0", "intc", 52, 53, 54, 55)
MCFG_H8_SCI_ADD("sci1", "intc", 56, 57, 58, 59)
MCFG_H8_SCI_ADD("sci2", "intc", 60, 61, 62, 63)
MCFG_H8_WATCHDOG_ADD("watchdog", "intc", 20, h8_watchdog_device::H)
MACHINE_CONFIG_END
DEVICE_ADDRESS_MAP_START(map, 16, h83006_device)
AM_RANGE(0xfee002, 0xfee003) AM_DEVWRITE8( "port4", h8_port_device, ddr_w, 0x00ff)
AM_RANGE(0xfee004, 0xfee005) AM_DEVWRITE8( "port6", h8_port_device, ddr_w, 0x00ff)
@ -159,10 +135,29 @@ DEVICE_ADDRESS_MAP_START(map, 16, h83006_device)
AM_RANGE(0xffffe8, 0xffffe9) AM_DEVREADWRITE8("adc", h8_adc_device, adcr_r, adcr_w, 0x00ff)
ADDRESS_MAP_END
machine_config_constructor h83006_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME(h83006);
}
MACHINE_CONFIG_MEMBER(h83006_device::device_add_mconfig)
MCFG_H8H_INTC_ADD("intc")
MCFG_H8_ADC_3006_ADD("adc", "intc", 23)
MCFG_H8_PORT_ADD("port4", h8_device::PORT_4, 0x00, 0x00)
MCFG_H8_PORT_ADD("port6", h8_device::PORT_6, 0x80, 0x80)
MCFG_H8_PORT_ADD("port7", h8_device::PORT_7, 0x00, 0x00)
MCFG_H8_PORT_ADD("port8", h8_device::PORT_8, 0xf0, 0xe0)
MCFG_H8_PORT_ADD("port9", h8_device::PORT_9, 0xc0, 0xc0)
MCFG_H8_PORT_ADD("porta", h8_device::PORT_A, 0x80, 0x00)
MCFG_H8_PORT_ADD("portb", h8_device::PORT_B, 0x00, 0x00)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_0", "intc", 36, 38, 39, "timer8_1", h8_timer8_channel_device::CHAIN_OVERFLOW, true, false)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 37, 38, 39, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_2", "intc", 40, 42, 43, "timer8_3", h8_timer8_channel_device::CHAIN_OVERFLOW, false, true)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_3", "intc", 41, 42, 43, "timer8_2", h8_timer8_channel_device::CHAIN_A, false, true)
MCFG_H8_TIMER16_ADD("timer16", 3, 0xf8)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:0", 2, 2, "intc", 24)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:1", 2, 2, "intc", 28)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:2", 2, 2, "intc", 32)
MCFG_H8_SCI_ADD("sci0", "intc", 52, 53, 54, 55)
MCFG_H8_SCI_ADD("sci1", "intc", 56, 57, 58, 59)
MCFG_H8_SCI_ADD("sci2", "intc", 60, 61, 62, 63)
MCFG_H8_WATCHDOG_ADD("watchdog", "intc", 20, h8_watchdog_device::H)
MACHINE_CONFIG_END
void h83006_device::execute_set_input(int inputnum, int state)
{

2
src/devices/cpu/h8/h83006.h
View File

@ -65,7 +65,7 @@ protected:
virtual int trapa_setup() override;
virtual void irq_setup() override;
virtual void internal_update(uint64_t current_time) override;
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
DECLARE_ADDRESS_MAP(map, 16);
virtual void device_start() override;

49
src/devices/cpu/h8/h83008.cpp
View File

@ -31,29 +31,6 @@ h83008_device::h83008_device(const machine_config &mconfig, const char *tag, dev
{
}
static MACHINE_CONFIG_START(h83008)
MCFG_H8H_INTC_ADD("intc")
MCFG_H8_ADC_3006_ADD("adc", "intc", 23)
MCFG_H8_PORT_ADD("port4", h8_device::PORT_4, 0x00, 0x00)
MCFG_H8_PORT_ADD("port6", h8_device::PORT_6, 0x80, 0x80)
MCFG_H8_PORT_ADD("port7", h8_device::PORT_7, 0xff, 0x00)
MCFG_H8_PORT_ADD("port8", h8_device::PORT_8, 0xf0, 0xe0)
MCFG_H8_PORT_ADD("port9", h8_device::PORT_9, 0xc0, 0xc0)
MCFG_H8_PORT_ADD("porta", h8_device::PORT_A, 0x80, 0x00)
MCFG_H8_PORT_ADD("portb", h8_device::PORT_B, 0x00, 0x00)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_0", "intc", 36, 38, 39, "timer8_1", h8_timer8_channel_device::CHAIN_OVERFLOW, true, false)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 37, 38, 39, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_2", "intc", 40, 42, 43, "timer8_3", h8_timer8_channel_device::CHAIN_OVERFLOW, false, true)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_3", "intc", 41, 42, 43, "timer8_2", h8_timer8_channel_device::CHAIN_A, false, true)
MCFG_H8_TIMER16_ADD("timer16", 3, 0xf8)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:0", 2, 2, "intc", 24)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:1", 2, 2, "intc", 28)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:2", 2, 2, "intc", 32)
MCFG_H8_SCI_ADD("sci0", "intc", 52, 53, 54, 55)
MCFG_H8_SCI_ADD("sci1", "intc", 56, 57, 58, 59)
MCFG_H8_WATCHDOG_ADD("watchdog", "intc", 20, h8_watchdog_device::H)
MACHINE_CONFIG_END
DEVICE_ADDRESS_MAP_START(map, 16, h83008_device)
AM_RANGE(0xfee002, 0xfee003) AM_DEVWRITE8( "port4", h8_port_device, ddr_w, 0x00ff)
AM_RANGE(0xfee004, 0xfee005) AM_DEVWRITE8( "port6", h8_port_device, ddr_w, 0x00ff)
@ -136,10 +113,28 @@ DEVICE_ADDRESS_MAP_START(map, 16, h83008_device)
AM_RANGE(0xffffe8, 0xffffe9) AM_DEVREADWRITE8("adc", h8_adc_device, adcr_r, adcr_w, 0x00ff)
ADDRESS_MAP_END
machine_config_constructor h83008_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME(h83008);
}
MACHINE_CONFIG_MEMBER(h83008_device::device_add_mconfig)
MCFG_H8H_INTC_ADD("intc")
MCFG_H8_ADC_3006_ADD("adc", "intc", 23)
MCFG_H8_PORT_ADD("port4", h8_device::PORT_4, 0x00, 0x00)
MCFG_H8_PORT_ADD("port6", h8_device::PORT_6, 0x80, 0x80)
MCFG_H8_PORT_ADD("port7", h8_device::PORT_7, 0xff, 0x00)
MCFG_H8_PORT_ADD("port8", h8_device::PORT_8, 0xf0, 0xe0)
MCFG_H8_PORT_ADD("port9", h8_device::PORT_9, 0xc0, 0xc0)
MCFG_H8_PORT_ADD("porta", h8_device::PORT_A, 0x80, 0x00)
MCFG_H8_PORT_ADD("portb", h8_device::PORT_B, 0x00, 0x00)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_0", "intc", 36, 38, 39, "timer8_1", h8_timer8_channel_device::CHAIN_OVERFLOW, true, false)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 37, 38, 39, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_2", "intc", 40, 42, 43, "timer8_3", h8_timer8_channel_device::CHAIN_OVERFLOW, false, true)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_3", "intc", 41, 42, 43, "timer8_2", h8_timer8_channel_device::CHAIN_A, false, true)
MCFG_H8_TIMER16_ADD("timer16", 3, 0xf8)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:0", 2, 2, "intc", 24)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:1", 2, 2, "intc", 28)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:2", 2, 2, "intc", 32)
MCFG_H8_SCI_ADD("sci0", "intc", 52, 53, 54, 55)
MCFG_H8_SCI_ADD("sci1", "intc", 56, 57, 58, 59)
MCFG_H8_WATCHDOG_ADD("watchdog", "intc", 20, h8_watchdog_device::H)
MACHINE_CONFIG_END
void h83008_device::execute_set_input(int inputnum, int state)
{

2
src/devices/cpu/h8/h83008.h
View File

@ -61,7 +61,7 @@ protected:
virtual int trapa_setup() override;
virtual void irq_setup() override;
virtual void internal_update(uint64_t current_time) override;
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
DECLARE_ADDRESS_MAP(map, 16);
virtual void device_start() override;

53
src/devices/cpu/h8/h83048.cpp
View File

@ -57,31 +57,6 @@ h83047_device::h83047_device(const machine_config &mconfig, const char *tag, dev
{
}
static MACHINE_CONFIG_START(h83048)
MCFG_H8H_INTC_ADD("intc")
MCFG_H8_ADC_3337_ADD("adc", "intc", 60)
MCFG_H8_PORT_ADD("port1", h8_device::PORT_1, 0x00, 0x00)
MCFG_H8_PORT_ADD("port2", h8_device::PORT_2, 0x00, 0x00)
MCFG_H8_PORT_ADD("port3", h8_device::PORT_3, 0x00, 0x00)
MCFG_H8_PORT_ADD("port4", h8_device::PORT_4, 0x00, 0x00)
MCFG_H8_PORT_ADD("port5", h8_device::PORT_5, 0xf0, 0xf0)
MCFG_H8_PORT_ADD("port6", h8_device::PORT_6, 0x80, 0x80)
MCFG_H8_PORT_ADD("port7", h8_device::PORT_7, 0x00, 0x00)
MCFG_H8_PORT_ADD("port8", h8_device::PORT_8, 0xe0, 0xe0)
MCFG_H8_PORT_ADD("port9", h8_device::PORT_9, 0xc0, 0xc0)
MCFG_H8_PORT_ADD("porta", h8_device::PORT_A, 0x00, 0x00)
MCFG_H8_PORT_ADD("portb", h8_device::PORT_B, 0x00, 0x00)
MCFG_H8_TIMER16_ADD("timer16", 5, 0xe0)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:0", 2, 2, "intc", 24)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:1", 2, 2, "intc", 28)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:2", 2, 2, "intc", 32)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:3", 2, 2, "intc", 36)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:4", 2, 2, "intc", 40)
MCFG_H8_SCI_ADD("sci0", "intc", 52, 53, 54, 55)
MCFG_H8_SCI_ADD("sci1", "intc", 56, 57, 58, 59)
MCFG_H8_WATCHDOG_ADD("watchdog", "intc", 20, h8_watchdog_device::H)
MACHINE_CONFIG_END
DEVICE_ADDRESS_MAP_START(map, 16, h83048_device)
AM_RANGE(ram_start, 0xffff0f) AM_RAM
@ -176,10 +151,30 @@ DEVICE_ADDRESS_MAP_START(map, 16, h83048_device)
AM_RANGE(0xfffff8, 0xfffff9) AM_DEVREADWRITE8("intc", h8h_intc_device, icr_r, icr_w, 0xffff)
ADDRESS_MAP_END
machine_config_constructor h83048_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME(h83048);
}
MACHINE_CONFIG_MEMBER(h83048_device::device_add_mconfig)
MCFG_H8H_INTC_ADD("intc")
MCFG_H8_ADC_3337_ADD("adc", "intc", 60)
MCFG_H8_PORT_ADD("port1", h8_device::PORT_1, 0x00, 0x00)
MCFG_H8_PORT_ADD("port2", h8_device::PORT_2, 0x00, 0x00)
MCFG_H8_PORT_ADD("port3", h8_device::PORT_3, 0x00, 0x00)
MCFG_H8_PORT_ADD("port4", h8_device::PORT_4, 0x00, 0x00)
MCFG_H8_PORT_ADD("port5", h8_device::PORT_5, 0xf0, 0xf0)
MCFG_H8_PORT_ADD("port6", h8_device::PORT_6, 0x80, 0x80)
MCFG_H8_PORT_ADD("port7", h8_device::PORT_7, 0x00, 0x00)
MCFG_H8_PORT_ADD("port8", h8_device::PORT_8, 0xe0, 0xe0)
MCFG_H8_PORT_ADD("port9", h8_device::PORT_9, 0xc0, 0xc0)
MCFG_H8_PORT_ADD("porta", h8_device::PORT_A, 0x00, 0x00)
MCFG_H8_PORT_ADD("portb", h8_device::PORT_B, 0x00, 0x00)
MCFG_H8_TIMER16_ADD("timer16", 5, 0xe0)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:0", 2, 2, "intc", 24)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:1", 2, 2, "intc", 28)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:2", 2, 2, "intc", 32)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:3", 2, 2, "intc", 36)
MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:4", 2, 2, "intc", 40)
MCFG_H8_SCI_ADD("sci0", "intc", 52, 53, 54, 55)
MCFG_H8_SCI_ADD("sci1", "intc", 56, 57, 58, 59)
MCFG_H8_WATCHDOG_ADD("watchdog", "intc", 20, h8_watchdog_device::H)
MACHINE_CONFIG_END
void h83048_device::execute_set_input(int inputnum, int state)
{

2
src/devices/cpu/h8/h83048.h
View File

@ -71,7 +71,7 @@ protected:
virtual int trapa_setup() override;
virtual void irq_setup() override;
virtual void internal_update(uint64_t current_time) override;
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
DECLARE_ADDRESS_MAP(map, 16);
virtual void device_start() override;

45
src/devices/cpu/h8/h83337.cpp
View File

@ -48,27 +48,6 @@ h83336_device::h83336_device(const machine_config &mconfig, const char *tag, dev
{
}
static MACHINE_CONFIG_START(h83337)
MCFG_H8_INTC_ADD("intc")
MCFG_H8_ADC_3337_ADD("adc", "intc", 35)
MCFG_H8_PORT_ADD("port1", h8_device::PORT_1, 0x00, 0x00)
MCFG_H8_PORT_ADD("port2", h8_device::PORT_2, 0x00, 0x00)
MCFG_H8_PORT_ADD("port3", h8_device::PORT_3, 0x00, 0x00)
MCFG_H8_PORT_ADD("port4", h8_device::PORT_4, 0x00, 0x00)
MCFG_H8_PORT_ADD("port5", h8_device::PORT_5, 0xf8, 0xf8)
MCFG_H8_PORT_ADD("port6", h8_device::PORT_6, 0x00, 0x00)
MCFG_H8_PORT_ADD("port7", h8_device::PORT_7, 0x00, 0x00)
MCFG_H8_PORT_ADD("port8", h8_device::PORT_8, 0x80, 0x80)
MCFG_H8_PORT_ADD("port9", h8_device::PORT_9, 0x00, 0x00)
MCFG_H8_TIMER8_CHANNEL_ADD("timer8_0", "intc", 19, 20, 21, 8, 2, 64, 32, 1024, 256)
MCFG_H8_TIMER8_CHANNEL_ADD("timer8_1", "intc", 22, 23, 24, 8, 2, 64, 128, 1024, 2048)
MCFG_H8_TIMER16_ADD("timer16", 1, 0xff)
MCFG_H8_TIMER16_CHANNEL_ADD("timer16:0", 4, 0, "intc", 32)
MCFG_H8_SCI_ADD("sci0", "intc", 27, 28, 29, 30)
MCFG_H8_SCI_ADD("sci1", "intc", 31, 32, 33, 34)
MCFG_H8_WATCHDOG_ADD("watchdog", "intc", 36, h8_watchdog_device::B)
MACHINE_CONFIG_END
DEVICE_ADDRESS_MAP_START(map, 16, h83337_device)
AM_RANGE(ram_start, 0xff7f) AM_RAM
@ -135,10 +114,26 @@ DEVICE_ADDRESS_MAP_START(map, 16, h83337_device)
AM_RANGE(0xfff2, 0xfff3) AM_DEVREADWRITE8("port6", h8_port_device, pcr_r, pcr_w, 0xff00)
ADDRESS_MAP_END
machine_config_constructor h83337_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME(h83337);
}
MACHINE_CONFIG_MEMBER(h83337_device::device_add_mconfig)
MCFG_H8_INTC_ADD("intc")
MCFG_H8_ADC_3337_ADD("adc", "intc", 35)
MCFG_H8_PORT_ADD("port1", h8_device::PORT_1, 0x00, 0x00)
MCFG_H8_PORT_ADD("port2", h8_device::PORT_2, 0x00, 0x00)
MCFG_H8_PORT_ADD("port3", h8_device::PORT_3, 0x00, 0x00)
MCFG_H8_PORT_ADD("port4", h8_device::PORT_4, 0x00, 0x00)
MCFG_H8_PORT_ADD("port5", h8_device::PORT_5, 0xf8, 0xf8)
MCFG_H8_PORT_ADD("port6", h8_device::PORT_6, 0x00, 0x00)
MCFG_H8_PORT_ADD("port7", h8_device::PORT_7, 0x00, 0x00)
MCFG_H8_PORT_ADD("port8", h8_device::PORT_8, 0x80, 0x80)
MCFG_H8_PORT_ADD("port9", h8_device::PORT_9, 0x00, 0x00)
MCFG_H8_TIMER8_CHANNEL_ADD("timer8_0", "intc", 19, 20, 21, 8, 2, 64, 32, 1024, 256)
MCFG_H8_TIMER8_CHANNEL_ADD("timer8_1", "intc", 22, 23, 24, 8, 2, 64, 128, 1024, 2048)
MCFG_H8_TIMER16_ADD("timer16", 1, 0xff)
MCFG_H8_TIMER16_CHANNEL_ADD("timer16:0", 4, 0, "intc", 32)
MCFG_H8_SCI_ADD("sci0", "intc", 27, 28, 29, 30)
MCFG_H8_SCI_ADD("sci1", "intc", 31, 32, 33, 34)
MCFG_H8_WATCHDOG_ADD("watchdog", "intc", 36, h8_watchdog_device::B)
MACHINE_CONFIG_END
void h83337_device::execute_set_input(int inputnum, int state)
{

2
src/devices/cpu/h8/h83337.h
View File

@ -74,7 +74,7 @@ protected:
virtual void interrupt_taken() override;
virtual void irq_setup() override;
virtual void internal_update(uint64_t current_time) override;
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
DECLARE_ADDRESS_MAP(map, 16);
virtual void device_start() override;

109
src/devices/cpu/h8/h8s2245.cpp
View File

@ -61,59 +61,6 @@ h8s2246_device::h8s2246_device(const machine_config &mconfig, const char *tag, d
{
}
static MACHINE_CONFIG_START(h8s2245)
MCFG_H8S_INTC_ADD("intc")
MCFG_H8_ADC_2245_ADD("adc", "intc", 28)
MCFG_H8_DTC_ADD("dtc", "intc", 24)
MCFG_H8_PORT_ADD("port1", h8_device::PORT_1, 0x00, 0x00)
MCFG_H8_PORT_ADD("port2", h8_device::PORT_2, 0x00, 0x00)
MCFG_H8_PORT_ADD("port3", h8_device::PORT_3, 0xc0, 0xc0)
MCFG_H8_PORT_ADD("port4", h8_device::PORT_4, 0xf0, 0xf0)
MCFG_H8_PORT_ADD("port5", h8_device::PORT_5, 0xf0, 0xf0)
MCFG_H8_PORT_ADD("porta", h8_device::PORT_A, 0xf0, 0xf0)
MCFG_H8_PORT_ADD("portb", h8_device::PORT_B, 0x00, 0x00)
MCFG_H8_PORT_ADD("portc", h8_device::PORT_C, 0x00, 0x00)
MCFG_H8_PORT_ADD("portd", h8_device::PORT_D, 0x00, 0x00)
MCFG_H8_PORT_ADD("porte", h8_device::PORT_E, 0x00, 0x00)
MCFG_H8_PORT_ADD("portf", h8_device::PORT_F, 0x00, 0x00)
MCFG_H8_PORT_ADD("portg", h8_device::PORT_G, 0xe0, 0x00)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_0", "intc", 64, 65, 66, "timer8_1", h8_timer8_channel_device::CHAIN_OVERFLOW, true, false)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false)
MCFG_H8_TIMER16_ADD("timer16", 3, 0x00)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::INPUT_D)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:1", 2, 0x4c, "intc", 40,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:2")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:2", 2, 0x4c, "intc", 44,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024)
MCFG_H8_SCI_ADD("sci0", "intc", 80, 81, 82, 83)
MCFG_H8_SCI_ADD("sci1", "intc", 84, 85, 86, 87)
MCFG_H8_SCI_ADD("sci2", "intc", 88, 89, 90, 91)
MCFG_H8_WATCHDOG_ADD("watchdog", "intc", 25, h8_watchdog_device::S)
MACHINE_CONFIG_END
DEVICE_ADDRESS_MAP_START(map, 16, h8s2245_device)
AM_RANGE(ram_start, 0xfffbff) AM_RAM
@ -228,10 +175,58 @@ DEVICE_ADDRESS_MAP_START(map, 16, h8s2245_device)
AM_RANGE(0xfffff8, 0xfffffb) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tgr_r, tgr_w )
ADDRESS_MAP_END
machine_config_constructor h8s2245_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME(h8s2245);
}
MACHINE_CONFIG_MEMBER(h8s2245_device::device_add_mconfig)
MCFG_H8S_INTC_ADD("intc")
MCFG_H8_ADC_2245_ADD("adc", "intc", 28)
MCFG_H8_DTC_ADD("dtc", "intc", 24)
MCFG_H8_PORT_ADD("port1", h8_device::PORT_1, 0x00, 0x00)
MCFG_H8_PORT_ADD("port2", h8_device::PORT_2, 0x00, 0x00)
MCFG_H8_PORT_ADD("port3", h8_device::PORT_3, 0xc0, 0xc0)
MCFG_H8_PORT_ADD("port4", h8_device::PORT_4, 0xf0, 0xf0)
MCFG_H8_PORT_ADD("port5", h8_device::PORT_5, 0xf0, 0xf0)
MCFG_H8_PORT_ADD("porta", h8_device::PORT_A, 0xf0, 0xf0)
MCFG_H8_PORT_ADD("portb", h8_device::PORT_B, 0x00, 0x00)
MCFG_H8_PORT_ADD("portc", h8_device::PORT_C, 0x00, 0x00)
MCFG_H8_PORT_ADD("portd", h8_device::PORT_D, 0x00, 0x00)
MCFG_H8_PORT_ADD("porte", h8_device::PORT_E, 0x00, 0x00)
MCFG_H8_PORT_ADD("portf", h8_device::PORT_F, 0x00, 0x00)
MCFG_H8_PORT_ADD("portg", h8_device::PORT_G, 0xe0, 0x00)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_0", "intc", 64, 65, 66, "timer8_1", h8_timer8_channel_device::CHAIN_OVERFLOW, true, false)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false)
MCFG_H8_TIMER16_ADD("timer16", 3, 0x00)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::INPUT_D)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:1", 2, 0x4c, "intc", 40,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:2")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:2", 2, 0x4c, "intc", 44,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024)
MCFG_H8_SCI_ADD("sci0", "intc", 80, 81, 82, 83)
MCFG_H8_SCI_ADD("sci1", "intc", 84, 85, 86, 87)
MCFG_H8_SCI_ADD("sci2", "intc", 88, 89, 90, 91)
MCFG_H8_WATCHDOG_ADD("watchdog", "intc", 25, h8_watchdog_device::S)
MACHINE_CONFIG_END
void h8s2245_device::execute_set_input(int inputnum, int state)
{

2
src/devices/cpu/h8/h8s2245.h
View File

@ -81,7 +81,7 @@ protected:
virtual int trapa_setup() override;
virtual void irq_setup() override;
virtual void internal_update(uint64_t current_time) override;
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
DECLARE_ADDRESS_MAP(map, 16);
virtual void device_start() override;

177
src/devices/cpu/h8/h8s2320.cpp
View File

@ -98,93 +98,6 @@ h8s2329_device::h8s2329_device(const machine_config &mconfig, const char *tag, d
{
}
// TODO: the 2321 doesn't have the dma subdevice
static MACHINE_CONFIG_START(h8s2320)
MCFG_H8S_INTC_ADD("intc")
MCFG_H8_ADC_2320_ADD("adc", "intc", 28)
MCFG_H8_DMA_ADD("dma")
MCFG_H8_DMA_CHANNEL_ADD("dma:0", "intc", 72, h8_dma_channel_device::NONE, 28, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, 82, 81, 86, 85, 32, 40, 44, 48, 56, 60, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE)
MCFG_H8_DMA_CHANNEL_ADD("dma:1", "intc", 74, h8_dma_channel_device::NONE, 28, h8_dma_channel_device::DREQ_EDGE, h8_dma_channel_device::DREQ_LEVEL, 82, 81, 86, 85, 32, 40, 44, 48, 56, 60, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE)
MCFG_H8_DTC_ADD("dtc", "intc", 24)
MCFG_H8_PORT_ADD("port1", h8_device::PORT_1, 0x00, 0x00)
MCFG_H8_PORT_ADD("port2", h8_device::PORT_2, 0x00, 0x00)
MCFG_H8_PORT_ADD("port3", h8_device::PORT_3, 0xc0, 0xc0)
MCFG_H8_PORT_ADD("port4", h8_device::PORT_4, 0x00, 0x00)
MCFG_H8_PORT_ADD("port5", h8_device::PORT_5, 0xf0, 0xf0)
MCFG_H8_PORT_ADD("port6", h8_device::PORT_6, 0x00, 0x00)
MCFG_H8_PORT_ADD("porta", h8_device::PORT_A, 0x00, 0x00)
MCFG_H8_PORT_ADD("portb", h8_device::PORT_B, 0x00, 0x00)
MCFG_H8_PORT_ADD("portc", h8_device::PORT_C, 0x00, 0x00)
MCFG_H8_PORT_ADD("portd", h8_device::PORT_D, 0x00, 0x00)
MCFG_H8_PORT_ADD("porte", h8_device::PORT_E, 0x00, 0x00)
MCFG_H8_PORT_ADD("portf", h8_device::PORT_F, 0x00, 0x00)
MCFG_H8_PORT_ADD("portg", h8_device::PORT_G, 0xe0, 0xe0)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_0", "intc", 64, 65, 66, "timer8_1", h8_timer8_channel_device::CHAIN_OVERFLOW, true, false)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false)
MCFG_H8_TIMER16_ADD("timer16", 6, 0x00)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::INPUT_D)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:1", 2, 0x4c, "intc", 40,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:2")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:2", 2, 0x4c, "intc", 44,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:3", 4, 0x60, "intc", 48,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::DIV_4096)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:4", 2, 0x4c, "intc", 56,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:5")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:5", 2, 0x4c, "intc", 60,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::INPUT_D)
MCFG_H8_SCI_ADD("sci0", "intc", 80, 81, 82, 83)
MCFG_H8_SCI_ADD("sci1", "intc", 84, 85, 86, 87)
MCFG_H8_SCI_ADD("sci2", "intc", 88, 89, 90, 91)
MCFG_H8_WATCHDOG_ADD("watchdog", "intc", 25, h8_watchdog_device::H)
MACHINE_CONFIG_END
DEVICE_ADDRESS_MAP_START(map, 16, h8s2320_device)
AM_RANGE(ram_start, 0xfffbff) AM_RAM
@ -348,10 +261,92 @@ DEVICE_ADDRESS_MAP_START(map, 16, h8s2320_device)
AM_RANGE(0xfffff8, 0xfffffb) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tgr_r, tgr_w )
ADDRESS_MAP_END
machine_config_constructor h8s2320_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME(h8s2320);
}
// TODO: the 2321 doesn't have the dma subdevice
MACHINE_CONFIG_MEMBER(h8s2320_device::device_add_mconfig)
MCFG_H8S_INTC_ADD("intc")
MCFG_H8_ADC_2320_ADD("adc", "intc", 28)
MCFG_H8_DMA_ADD("dma")
MCFG_H8_DMA_CHANNEL_ADD("dma:0", "intc", 72, h8_dma_channel_device::NONE, 28, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, 82, 81, 86, 85, 32, 40, 44, 48, 56, 60, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE)
MCFG_H8_DMA_CHANNEL_ADD("dma:1", "intc", 74, h8_dma_channel_device::NONE, 28, h8_dma_channel_device::DREQ_EDGE, h8_dma_channel_device::DREQ_LEVEL, 82, 81, 86, 85, 32, 40, 44, 48, 56, 60, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE)
MCFG_H8_DTC_ADD("dtc", "intc", 24)
MCFG_H8_PORT_ADD("port1", h8_device::PORT_1, 0x00, 0x00)
MCFG_H8_PORT_ADD("port2", h8_device::PORT_2, 0x00, 0x00)
MCFG_H8_PORT_ADD("port3", h8_device::PORT_3, 0xc0, 0xc0)
MCFG_H8_PORT_ADD("port4", h8_device::PORT_4, 0x00, 0x00)
MCFG_H8_PORT_ADD("port5", h8_device::PORT_5, 0xf0, 0xf0)
MCFG_H8_PORT_ADD("port6", h8_device::PORT_6, 0x00, 0x00)
MCFG_H8_PORT_ADD("porta", h8_device::PORT_A, 0x00, 0x00)
MCFG_H8_PORT_ADD("portb", h8_device::PORT_B, 0x00, 0x00)
MCFG_H8_PORT_ADD("portc", h8_device::PORT_C, 0x00, 0x00)
MCFG_H8_PORT_ADD("portd", h8_device::PORT_D, 0x00, 0x00)
MCFG_H8_PORT_ADD("porte", h8_device::PORT_E, 0x00, 0x00)
MCFG_H8_PORT_ADD("portf", h8_device::PORT_F, 0x00, 0x00)
MCFG_H8_PORT_ADD("portg", h8_device::PORT_G, 0xe0, 0xe0)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_0", "intc", 64, 65, 66, "timer8_1", h8_timer8_channel_device::CHAIN_OVERFLOW, true, false)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false)
MCFG_H8_TIMER16_ADD("timer16", 6, 0x00)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::INPUT_D)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:1", 2, 0x4c, "intc", 40,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:2")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:2", 2, 0x4c, "intc", 44,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:3", 4, 0x60, "intc", 48,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::DIV_4096)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:4", 2, 0x4c, "intc", 56,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:5")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:5", 2, 0x4c, "intc", 60,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::INPUT_D)
MCFG_H8_SCI_ADD("sci0", "intc", 80, 81, 82, 83)
MCFG_H8_SCI_ADD("sci1", "intc", 84, 85, 86, 87)
MCFG_H8_SCI_ADD("sci2", "intc", 88, 89, 90, 91)
MCFG_H8_WATCHDOG_ADD("watchdog", "intc", 25, h8_watchdog_device::H)
MACHINE_CONFIG_END
void h8s2320_device::execute_set_input(int inputnum, int state)
{

2
src/devices/cpu/h8/h8s2320.h
View File

@ -92,7 +92,7 @@ protected:
virtual int trapa_setup() override;
virtual void irq_setup() override;
virtual void internal_update(uint64_t current_time) override;
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
DECLARE_ADDRESS_MAP(map, 16);
virtual void device_start() override;

165
src/devices/cpu/h8/h8s2357.cpp
View File

@ -75,87 +75,6 @@ h8s2390_device::h8s2390_device(const machine_config &mconfig, const char *tag, d
{
}
static MACHINE_CONFIG_START(h8s2357)
MCFG_H8S_INTC_ADD("intc")
MCFG_H8_ADC_2357_ADD("adc", "intc", 28)
MCFG_H8_PORT_ADD("port1", h8_device::PORT_1, 0x00, 0x00)
MCFG_H8_PORT_ADD("port2", h8_device::PORT_2, 0x00, 0x00)
MCFG_H8_PORT_ADD("port3", h8_device::PORT_3, 0xc0, 0xc0)
MCFG_H8_PORT_ADD("port4", h8_device::PORT_4, 0x00, 0x00)
MCFG_H8_PORT_ADD("port5", h8_device::PORT_5, 0xf0, 0xf0)
MCFG_H8_PORT_ADD("port6", h8_device::PORT_6, 0x00, 0x00)
MCFG_H8_PORT_ADD("porta", h8_device::PORT_A, 0x00, 0x00)
MCFG_H8_PORT_ADD("portb", h8_device::PORT_B, 0x00, 0x00)
MCFG_H8_PORT_ADD("portc", h8_device::PORT_C, 0x00, 0x00)
MCFG_H8_PORT_ADD("portd", h8_device::PORT_D, 0x00, 0x00)
MCFG_H8_PORT_ADD("porte", h8_device::PORT_E, 0x00, 0x00)
MCFG_H8_PORT_ADD("portf", h8_device::PORT_F, 0x00, 0x00)
MCFG_H8_PORT_ADD("portg", h8_device::PORT_G, 0xe0, 0xe0)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_0", "intc", 64, 65, 66, "timer8_1", h8_timer8_channel_device::CHAIN_OVERFLOW, true, false)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false)
MCFG_H8_TIMER16_ADD("timer16", 6, 0x00)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::INPUT_D)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:1", 2, 0x4c, "intc", 40,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:2")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:2", 2, 0x4c, "intc", 44,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:3", 4, 0x60, "intc", 48,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::DIV_4096)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:4", 2, 0x4c, "intc", 56,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:5")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:5", 2, 0x4c, "intc", 60,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::INPUT_D)
MCFG_H8_SCI_ADD("sci0", "intc", 80, 81, 82, 83)
MCFG_H8_SCI_ADD("sci1", "intc", 84, 85, 86, 87)
MCFG_H8_SCI_ADD("sci2", "intc", 88, 89, 90, 91)
MCFG_H8_WATCHDOG_ADD("watchdog", "intc", 25, h8_watchdog_device::S)
MACHINE_CONFIG_END
DEVICE_ADDRESS_MAP_START(map, 16, h8s2357_device)
AM_RANGE(ram_start, 0xfffbff) AM_RAM
AM_RANGE(0xfffe80, 0xfffe81) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
@ -290,10 +209,86 @@ DEVICE_ADDRESS_MAP_START(map, 16, h8s2357_device)
AM_RANGE(0xfffff8, 0xfffffb) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tgr_r, tgr_w )
ADDRESS_MAP_END
machine_config_constructor h8s2357_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME(h8s2357);
}
MACHINE_CONFIG_MEMBER(h8s2357_device::device_add_mconfig)
MCFG_H8S_INTC_ADD("intc")
MCFG_H8_ADC_2357_ADD("adc", "intc", 28)
MCFG_H8_PORT_ADD("port1", h8_device::PORT_1, 0x00, 0x00)
MCFG_H8_PORT_ADD("port2", h8_device::PORT_2, 0x00, 0x00)
MCFG_H8_PORT_ADD("port3", h8_device::PORT_3, 0xc0, 0xc0)
MCFG_H8_PORT_ADD("port4", h8_device::PORT_4, 0x00, 0x00)
MCFG_H8_PORT_ADD("port5", h8_device::PORT_5, 0xf0, 0xf0)
MCFG_H8_PORT_ADD("port6", h8_device::PORT_6, 0x00, 0x00)
MCFG_H8_PORT_ADD("porta", h8_device::PORT_A, 0x00, 0x00)
MCFG_H8_PORT_ADD("portb", h8_device::PORT_B, 0x00, 0x00)
MCFG_H8_PORT_ADD("portc", h8_device::PORT_C, 0x00, 0x00)
MCFG_H8_PORT_ADD("portd", h8_device::PORT_D, 0x00, 0x00)
MCFG_H8_PORT_ADD("porte", h8_device::PORT_E, 0x00, 0x00)
MCFG_H8_PORT_ADD("portf", h8_device::PORT_F, 0x00, 0x00)
MCFG_H8_PORT_ADD("portg", h8_device::PORT_G, 0xe0, 0xe0)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_0", "intc", 64, 65, 66, "timer8_1", h8_timer8_channel_device::CHAIN_OVERFLOW, true, false)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false)
MCFG_H8_TIMER16_ADD("timer16", 6, 0x00)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::INPUT_D)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:1", 2, 0x4c, "intc", 40,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:2")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:2", 2, 0x4c, "intc", 44,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:3", 4, 0x60, "intc", 48,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::DIV_4096)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:4", 2, 0x4c, "intc", 56,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:5")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:5", 2, 0x4c, "intc", 60,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::INPUT_D)
MCFG_H8_SCI_ADD("sci0", "intc", 80, 81, 82, 83)
MCFG_H8_SCI_ADD("sci1", "intc", 84, 85, 86, 87)
MCFG_H8_SCI_ADD("sci2", "intc", 88, 89, 90, 91)
MCFG_H8_WATCHDOG_ADD("watchdog", "intc", 25, h8_watchdog_device::S)
MACHINE_CONFIG_END
void h8s2357_device::execute_set_input(int inputnum, int state)
{

2
src/devices/cpu/h8/h8s2357.h
View File

@ -83,7 +83,7 @@ protected:
virtual int trapa_setup() override;
virtual void irq_setup() override;
virtual void internal_update(uint64_t current_time) override;
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
DECLARE_ADDRESS_MAP(map, 16);
virtual void device_start() override;

165
src/devices/cpu/h8/h8s2655.cpp
View File

@ -52,87 +52,6 @@ h8s2653_device::h8s2653_device(const machine_config &mconfig, const char *tag, d
{
}
static MACHINE_CONFIG_START(h8s2655)
MCFG_H8S_INTC_ADD("intc")
MCFG_H8_ADC_2655_ADD("adc", "intc", 28)
MCFG_H8_PORT_ADD("port1", h8_device::PORT_1, 0x00, 0x00)
MCFG_H8_PORT_ADD("port2", h8_device::PORT_2, 0x00, 0x00)
MCFG_H8_PORT_ADD("port3", h8_device::PORT_3, 0xc0, 0xc0)
MCFG_H8_PORT_ADD("port4", h8_device::PORT_4, 0x00, 0x00)
MCFG_H8_PORT_ADD("port5", h8_device::PORT_5, 0xf0, 0xf0)
MCFG_H8_PORT_ADD("port6", h8_device::PORT_6, 0x00, 0x00)
MCFG_H8_PORT_ADD("porta", h8_device::PORT_A, 0x00, 0x00)
MCFG_H8_PORT_ADD("portb", h8_device::PORT_B, 0x00, 0x00)
MCFG_H8_PORT_ADD("portc", h8_device::PORT_C, 0x00, 0x00)
MCFG_H8_PORT_ADD("portd", h8_device::PORT_D, 0x00, 0x00)
MCFG_H8_PORT_ADD("porte", h8_device::PORT_E, 0x00, 0x00)
MCFG_H8_PORT_ADD("portf", h8_device::PORT_F, 0x00, 0x00)
MCFG_H8_PORT_ADD("portg", h8_device::PORT_G, 0xe0, 0xe0)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_0", "intc", 64, 65, 66, "timer8_1", h8_timer8_channel_device::CHAIN_OVERFLOW, true, false)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false)
MCFG_H8_TIMER16_ADD("timer16", 6, 0x00)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::INPUT_D)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:1", 2, 0x4c, "intc", 40,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:2")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:2", 2, 0x4c, "intc", 44,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:3", 4, 0x60, "intc", 48,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::DIV_4096)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:4", 2, 0x4c, "intc", 56,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:5")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:5", 2, 0x4c, "intc", 60,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::INPUT_D)
MCFG_H8_SCI_ADD("sci0", "intc", 80, 81, 82, 83)
MCFG_H8_SCI_ADD("sci1", "intc", 84, 85, 86, 87)
MCFG_H8_SCI_ADD("sci2", "intc", 88, 89, 90, 91)
MCFG_H8_WATCHDOG_ADD("watchdog", "intc", 25, h8_watchdog_device::S)
MACHINE_CONFIG_END
DEVICE_ADDRESS_MAP_START(map, 16, h8s2655_device)
AM_RANGE(0xffec00, 0xfffbff) AM_RAM
AM_RANGE(0xfffe80, 0xfffe81) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
@ -268,10 +187,86 @@ DEVICE_ADDRESS_MAP_START(map, 16, h8s2655_device)
AM_RANGE(0xfffff8, 0xfffffb) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tgr_r, tgr_w )
ADDRESS_MAP_END
machine_config_constructor h8s2655_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME(h8s2655);
}
MACHINE_CONFIG_MEMBER(h8s2655_device::device_add_mconfig)
MCFG_H8S_INTC_ADD("intc")
MCFG_H8_ADC_2655_ADD("adc", "intc", 28)
MCFG_H8_PORT_ADD("port1", h8_device::PORT_1, 0x00, 0x00)
MCFG_H8_PORT_ADD("port2", h8_device::PORT_2, 0x00, 0x00)
MCFG_H8_PORT_ADD("port3", h8_device::PORT_3, 0xc0, 0xc0)
MCFG_H8_PORT_ADD("port4", h8_device::PORT_4, 0x00, 0x00)
MCFG_H8_PORT_ADD("port5", h8_device::PORT_5, 0xf0, 0xf0)
MCFG_H8_PORT_ADD("port6", h8_device::PORT_6, 0x00, 0x00)
MCFG_H8_PORT_ADD("porta", h8_device::PORT_A, 0x00, 0x00)
MCFG_H8_PORT_ADD("portb", h8_device::PORT_B, 0x00, 0x00)
MCFG_H8_PORT_ADD("portc", h8_device::PORT_C, 0x00, 0x00)
MCFG_H8_PORT_ADD("portd", h8_device::PORT_D, 0x00, 0x00)
MCFG_H8_PORT_ADD("porte", h8_device::PORT_E, 0x00, 0x00)
MCFG_H8_PORT_ADD("portf", h8_device::PORT_F, 0x00, 0x00)
MCFG_H8_PORT_ADD("portg", h8_device::PORT_G, 0xe0, 0xe0)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_0", "intc", 64, 65, 66, "timer8_1", h8_timer8_channel_device::CHAIN_OVERFLOW, true, false)
MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false)
MCFG_H8_TIMER16_ADD("timer16", 6, 0x00)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::INPUT_D)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:1", 2, 0x4c, "intc", 40,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:2")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:2", 2, 0x4c, "intc", 44,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:3", 4, 0x60, "intc", 48,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::DIV_4096)
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:4", 2, 0x4c, "intc", 56,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024,
h8_timer16_channel_device::CHAIN)
MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:5")
MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:5", 2, 0x4c, "intc", 60,
h8_timer16_channel_device::DIV_1,
h8_timer16_channel_device::DIV_4,
h8_timer16_channel_device::DIV_16,
h8_timer16_channel_device::DIV_64,
h8_timer16_channel_device::INPUT_A,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::INPUT_D)
MCFG_H8_SCI_ADD("sci0", "intc", 80, 81, 82, 83)
MCFG_H8_SCI_ADD("sci1", "intc", 84, 85, 86, 87)
MCFG_H8_SCI_ADD("sci2", "intc", 88, 89, 90, 91)
MCFG_H8_WATCHDOG_ADD("watchdog", "intc", 25, h8_watchdog_device::S)
MACHINE_CONFIG_END
void h8s2655_device::execute_set_input(int inputnum, int state)
{

2
src/devices/cpu/h8/h8s2655.h
View File

@ -74,7 +74,7 @@ protected:
virtual int trapa_setup() override;
virtual void irq_setup() override;
virtual void internal_update(uint64_t current_time) override;
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
DECLARE_ADDRESS_MAP(map, 16);
virtual void device_start() override;

10
src/devices/cpu/i8089/i8089.cpp
View File

@ -207,22 +207,16 @@ void i8089_device::state_string_export(const device_state_entry &entry, std::str
}
//-------------------------------------------------
// machine_config_additions - device-specific
// machine configurations
// device_add_mconfig - add device configuration
//-------------------------------------------------
static MACHINE_CONFIG_START( i8089 )
MACHINE_CONFIG_MEMBER( i8089_device::device_add_mconfig )
MCFG_I8089_CHANNEL_ADD("1")
MCFG_I8089_CHANNEL_SINTR(WRITELINE(i8089_device, ch1_sintr_w))
MCFG_I8089_CHANNEL_ADD("2")
MCFG_I8089_CHANNEL_SINTR(WRITELINE(i8089_device, ch2_sintr_w))
MACHINE_CONFIG_END
machine_config_constructor i8089_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( i8089 );
}
//**************************************************************************
// IMPLEMENTATION

10
src/devices/cpu/i8089/i8089.h
View File

@ -64,10 +64,6 @@ public:
DECLARE_WRITE_LINE_MEMBER( ext1_w );
DECLARE_WRITE_LINE_MEMBER( ext2_w );
// internal communication
DECLARE_WRITE_LINE_MEMBER( ch1_sintr_w ) { m_write_sintr1(state); }
DECLARE_WRITE_LINE_MEMBER( ch2_sintr_w ) { m_write_sintr2(state); }
protected:
// device-level overrides
virtual void device_start() override;
@ -94,13 +90,17 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
private:
bool sysbus_width() const { return BIT(m_sysbus, 0); }
bool remotebus_width() const { return BIT(m_soc, 0); }
bool request_grant() const { return BIT(m_soc, 1); }
// internal communication
DECLARE_WRITE_LINE_MEMBER( ch1_sintr_w ) { m_write_sintr1(state); }
DECLARE_WRITE_LINE_MEMBER( ch2_sintr_w ) { m_write_sintr2(state); }
uint8_t read_byte(bool space, offs_t address);
uint16_t read_word(bool space, offs_t address);
void write_byte(bool space, offs_t address, uint8_t data);

9
src/devices/cpu/m6502/n2a03.cpp
View File

@ -2,7 +2,7 @@
// copyright-holders:Olivier Galibert
/***************************************************************************
m6502.c
n2a03.cpp
6502, NES variant
@ -141,7 +141,7 @@ READ8_MEMBER(n2a03_device::apu_read_mem)
return mintf->program->read_byte(offset);
}
static MACHINE_CONFIG_START( n2a03_device )
MACHINE_CONFIG_MEMBER( n2a03_device::device_add_mconfig )
MCFG_SOUND_ADD("nesapu", NES_APU, DERIVED_CLOCK(1,1) )
MCFG_NES_APU_IRQ_HANDLER(WRITELINE(n2a03_device, apu_irq))
MCFG_NES_APU_MEM_READ_CALLBACK(READ8(n2a03_device, apu_read_mem))
@ -150,10 +150,5 @@ static MACHINE_CONFIG_START( n2a03_device )
MACHINE_CONFIG_END
machine_config_constructor n2a03_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( n2a03_device );
}
#include "cpu/m6502/n2a03.hxx"

10
src/devices/cpu/m6502/n2a03.h
View File

@ -19,8 +19,6 @@ class n2a03_device : public m6502_device {
public:
n2a03_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
required_device<nesapu_device> m_apu;
static const disasm_entry disasm_entries[0x100];
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
@ -33,8 +31,7 @@ public:
WRITE8_MEMBER(psg1_4015_w);
WRITE8_MEMBER(psg1_4017_w);
DECLARE_WRITE_LINE_MEMBER(apu_irq);
DECLARE_READ8_MEMBER(apu_read_mem);
required_device<nesapu_device> m_apu; // public for vgmplay
protected:
class mi_2a03_normal : public memory_interface {
@ -68,12 +65,15 @@ protected:
#undef O
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
private:
address_space_config m_program_config;
DECLARE_WRITE_LINE_MEMBER(apu_irq);
DECLARE_READ8_MEMBER(apu_read_mem);
};
/* These are the official XTAL values and clock rates used by Nintendo for

9
src/devices/cpu/nec/v53.cpp
View File

@ -478,7 +478,7 @@ WRITE_LINE_MEMBER(v53_base_device::internal_irq_w)
}
static MACHINE_CONFIG_START( v53 )
MACHINE_CONFIG_MEMBER( v53_base_device::device_add_mconfig )
MCFG_DEVICE_ADD("pit", PIT8254, 0) // functionality identical to uPD71054
MCFG_PIT8253_CLK0(16000000) // manual implicitly claims that these runs at same speed as the CPU
@ -508,7 +508,7 @@ static MACHINE_CONFIG_START( v53 )
MCFG_AM9517A_OUT_DACK_3_CB(WRITELINE(v53_base_device, dma_dack3_trampoline_w))
MCFG_PIC8259_ADD( "upd71059pic", WRITELINE(v53_base_device, internal_irq_w), VCC, READ8(v53_base_device,get_pic_ack))
MCFG_PIC8259_ADD( "upd71059pic", WRITELINE(v53_base_device, internal_irq_w), VCC, READ8(v53_base_device, get_pic_ack))
@ -523,11 +523,6 @@ static MACHINE_CONFIG_START( v53 )
MACHINE_CONFIG_END
machine_config_constructor v53_base_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( v53 );
}
v53_base_device::v53_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, offs_t fetch_xor, uint8_t prefetch_size, uint8_t prefetch_cycles, uint32_t chip_type)
: nec_common_device(mconfig, type, tag, owner, clock, true, fetch_xor, prefetch_size, prefetch_cycles, chip_type),

43
src/devices/cpu/nec/v53.h
View File

@ -185,23 +185,6 @@ public:
template<class Object> static devcb_base &set_out_dack_1_callback(device_t &device, Object &&cb) { return downcast<v53_base_device &>(device).m_out_dack_1_cb.set_callback(std::forward<Object>(cb)); }
template<class Object> static devcb_base &set_out_dack_2_callback(device_t &device, Object &&cb) { return downcast<v53_base_device &>(device).m_out_dack_2_cb.set_callback(std::forward<Object>(cb)); }
template<class Object> static devcb_base &set_out_dack_3_callback(device_t &device, Object &&cb) { return downcast<v53_base_device &>(device).m_out_dack_3_cb.set_callback(std::forward<Object>(cb)); }
DECLARE_WRITE_LINE_MEMBER(hreq_trampoline_cb) { m_out_hreq_cb(state); }
DECLARE_WRITE_LINE_MEMBER(eop_trampoline_cb) { m_out_eop_cb(state); }
DECLARE_READ8_MEMBER(dma_memr_trampoline_r) { return m_in_memr_cb(space, offset); }
DECLARE_WRITE8_MEMBER(dma_memw_trampoline_w) { m_out_memw_cb(space, offset, data); }
DECLARE_READ8_MEMBER(dma_io_0_trampoline_r) { return m_in_ior_0_cb(space, offset); }
DECLARE_READ8_MEMBER(dma_io_1_trampoline_r) { return m_in_ior_1_cb(space, offset); }
DECLARE_READ8_MEMBER(dma_io_2_trampoline_r) { return m_in_ior_2_cb(space, offset); }
DECLARE_READ8_MEMBER(dma_io_3_trampoline_r) { return m_in_ior_3_cb(space, offset); }
DECLARE_WRITE8_MEMBER(dma_io_0_trampoline_w) { m_out_iow_0_cb(space, offset, data); }
DECLARE_WRITE8_MEMBER(dma_io_1_trampoline_w) { m_out_iow_1_cb(space, offset, data); }
DECLARE_WRITE8_MEMBER(dma_io_2_trampoline_w) { m_out_iow_2_cb(space, offset, data); }
DECLARE_WRITE8_MEMBER(dma_io_3_trampoline_w) { m_out_iow_3_cb(space, offset, data); }
DECLARE_WRITE_LINE_MEMBER(dma_dack0_trampoline_w) { m_out_dack_0_cb(state); }
DECLARE_WRITE_LINE_MEMBER(dma_dack1_trampoline_w) { m_out_dack_1_cb(state); }
DECLARE_WRITE_LINE_MEMBER(dma_dack2_trampoline_w) { m_out_dack_2_cb(state); }
DECLARE_WRITE_LINE_MEMBER(dma_dack3_trampoline_w) { m_out_dack_3_cb(state); }
DECLARE_WRITE_LINE_MEMBER(dreq0_w);
DECLARE_WRITE_LINE_MEMBER(dreq1_w);
@ -209,16 +192,11 @@ public:
DECLARE_WRITE_LINE_MEMBER(dreq3_w);
DECLARE_WRITE_LINE_MEMBER(hack_w);
DECLARE_READ8_MEMBER(get_pic_ack);
DECLARE_WRITE_LINE_MEMBER(internal_irq_w);
protected:
v53_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, offs_t fetch_xor, uint8_t prefetch_size, uint8_t prefetch_cycles, uint32_t chip_type);
// device-level overrides
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
virtual void device_reset() override;
virtual void execute_set_input(int inputnum, int state) override;
@ -288,6 +266,25 @@ protected:
devcb_write_line m_out_dack_1_cb;
devcb_write_line m_out_dack_2_cb;
devcb_write_line m_out_dack_3_cb;
DECLARE_WRITE_LINE_MEMBER(hreq_trampoline_cb) { m_out_hreq_cb(state); }
DECLARE_WRITE_LINE_MEMBER(eop_trampoline_cb) { m_out_eop_cb(state); }
DECLARE_READ8_MEMBER(dma_memr_trampoline_r) { return m_in_memr_cb(space, offset); }
DECLARE_WRITE8_MEMBER(dma_memw_trampoline_w) { m_out_memw_cb(space, offset, data); }
DECLARE_READ8_MEMBER(dma_io_0_trampoline_r) { return m_in_ior_0_cb(space, offset); }
DECLARE_READ8_MEMBER(dma_io_1_trampoline_r) { return m_in_ior_1_cb(space, offset); }
DECLARE_READ8_MEMBER(dma_io_2_trampoline_r) { return m_in_ior_2_cb(space, offset); }
DECLARE_READ8_MEMBER(dma_io_3_trampoline_r) { return m_in_ior_3_cb(space, offset); }
DECLARE_WRITE8_MEMBER(dma_io_0_trampoline_w) { m_out_iow_0_cb(space, offset, data); }
DECLARE_WRITE8_MEMBER(dma_io_1_trampoline_w) { m_out_iow_1_cb(space, offset, data); }
DECLARE_WRITE8_MEMBER(dma_io_2_trampoline_w) { m_out_iow_2_cb(space, offset, data); }
DECLARE_WRITE8_MEMBER(dma_io_3_trampoline_w) { m_out_iow_3_cb(space, offset, data); }
DECLARE_WRITE_LINE_MEMBER(dma_dack0_trampoline_w) { m_out_dack_0_cb(state); }
DECLARE_WRITE_LINE_MEMBER(dma_dack1_trampoline_w) { m_out_dack_1_cb(state); }
DECLARE_WRITE_LINE_MEMBER(dma_dack2_trampoline_w) { m_out_dack_2_cb(state); }
DECLARE_WRITE_LINE_MEMBER(dma_dack3_trampoline_w) { m_out_dack_3_cb(state); }
DECLARE_READ8_MEMBER(get_pic_ack);
DECLARE_WRITE_LINE_MEMBER(internal_irq_w);
};

17
src/devices/cpu/psx/psx.cpp
View File

@ -3385,7 +3385,12 @@ void psxcpu_device::set_disable_rom_berr(bool mode)
m_disable_rom_berr = mode;
}
static MACHINE_CONFIG_START( psx )
//-------------------------------------------------
// device_add_mconfig - add device configuration
//-------------------------------------------------
MACHINE_CONFIG_MEMBER( psxcpu_device::device_add_mconfig )
MCFG_DEVICE_ADD( "irq", PSX_IRQ, 0 )
MCFG_PSX_IRQ_HANDLER( INPUTLINE( DEVICE_SELF, PSXCPU_IRQ0 ) )
@ -3410,13 +3415,3 @@ static MACHINE_CONFIG_START( psx )
MCFG_RAM_ADD( "ram" )
MCFG_RAM_DEFAULT_VALUE( 0x00 )
MACHINE_CONFIG_END
//-------------------------------------------------
// machine_config_additions - return a pointer to
// the device's machine fragment
//-------------------------------------------------
machine_config_constructor psxcpu_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( psx );
}

2
src/devices/cpu/psx/psx.h
View File

@ -199,7 +199,7 @@ protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_post_load() override;
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const override { return 1; }

7
src/devices/cpu/tms1000/tms0270.cpp
View File

@ -43,7 +43,7 @@ tms0270_cpu_device::tms0270_cpu_device(const machine_config &mconfig, const char
// machine configs
static MACHINE_CONFIG_START(tms0270)
MACHINE_CONFIG_MEMBER(tms0270_cpu_device::device_add_mconfig)
// main opcodes PLA, microinstructions PLA, output PLA
MCFG_PLA_ADD("ipla", 9, 22, 24)
@ -54,11 +54,6 @@ static MACHINE_CONFIG_START(tms0270)
MCFG_PLA_FILEFORMAT(BERKELEY)
MACHINE_CONFIG_END
machine_config_constructor tms0270_cpu_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME(tms0270);
}
// device_start/reset
void tms0270_cpu_device::device_start()

2
src/devices/cpu/tms1000/tms0270.h
View File

@ -40,7 +40,7 @@ protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual void write_o_output(u8 index) override { tms1k_base_device::write_o_output(index); }
virtual u8 read_k_input() override;

14
src/devices/cpu/tms1000/tms0970.cpp
View File

@ -59,7 +59,7 @@ tms1990_cpu_device::tms1990_cpu_device(const machine_config &mconfig, const char
// machine configs
static MACHINE_CONFIG_START(tms0950)
MACHINE_CONFIG_MEMBER(tms0950_cpu_device::device_add_mconfig)
// microinstructions PLA, output PLA, segment PLA
MCFG_PLA_ADD("mpla", 8, 16, 30)
@ -70,12 +70,7 @@ static MACHINE_CONFIG_START(tms0950)
MCFG_PLA_FILEFORMAT(BERKELEY)
MACHINE_CONFIG_END
machine_config_constructor tms0950_cpu_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME(tms0950);
}
static MACHINE_CONFIG_START(tms0970)
MACHINE_CONFIG_MEMBER(tms0970_cpu_device::device_add_mconfig)
// main opcodes PLA, microinstructions PLA, output PLA, segment PLA
MCFG_PLA_ADD("ipla", 8, 15, 18)
@ -88,11 +83,6 @@ static MACHINE_CONFIG_START(tms0970)
MCFG_PLA_FILEFORMAT(BERKELEY)
MACHINE_CONFIG_END
machine_config_constructor tms0970_cpu_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME(tms0970);
}
// device_reset
void tms0970_cpu_device::device_reset()

4
src/devices/cpu/tms1000/tms0970.h
View File

@ -24,7 +24,7 @@ protected:
// overrides
virtual void device_reset() override;
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual void write_o_output(u8 index) override;
@ -40,7 +40,7 @@ public:
protected:
// overrides
virtual void device_reset() override { tms1000_cpu_device::device_reset(); }
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual void op_rstr() override { } // assume it has no RSTR or CLO
virtual void op_clo() override { } // "

14
src/devices/cpu/tms1000/tms0980.cpp
View File

@ -58,7 +58,7 @@ tms1980_cpu_device::tms1980_cpu_device(const machine_config &mconfig, const char
// machine configs
static MACHINE_CONFIG_START(tms0980)
MACHINE_CONFIG_MEMBER(tms0980_cpu_device::device_add_mconfig)
// main opcodes PLA, microinstructions PLA, output PLA, segment PLA
MCFG_PLA_ADD("ipla", 9, 22, 24)
@ -71,12 +71,7 @@ static MACHINE_CONFIG_START(tms0980)
MCFG_PLA_FILEFORMAT(BERKELEY)
MACHINE_CONFIG_END
machine_config_constructor tms0980_cpu_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME(tms0980);
}
static MACHINE_CONFIG_START(tms1980)
MACHINE_CONFIG_MEMBER(tms1980_cpu_device::device_add_mconfig)
// main opcodes PLA, microinstructions PLA, output PLA
MCFG_PLA_ADD("ipla", 9, 22, 24)
@ -87,11 +82,6 @@ static MACHINE_CONFIG_START(tms1980)
MCFG_PLA_FILEFORMAT(BERKELEY)
MACHINE_CONFIG_END
machine_config_constructor tms1980_cpu_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME(tms1980);
}
// disasm
offs_t tms0980_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options)

4
src/devices/cpu/tms1000/tms0980.h
View File

@ -27,7 +27,7 @@ protected:
virtual u32 decode_micro(u8 sel);
virtual void device_reset() override;
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual u32 disasm_min_opcode_bytes() const override { return 2; }
virtual u32 disasm_max_opcode_bytes() const override { return 2; }
@ -48,7 +48,7 @@ public:
protected:
// overrides
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual void write_o_output(u8 index) override { tms1k_base_device::write_o_output(index); }
virtual u8 read_k_input() override { return tms1k_base_device::read_k_input(); }

8
src/devices/cpu/tms1000/tms1000.cpp
View File

@ -102,7 +102,7 @@ mc141200_cpu_device::mc141200_cpu_device(const machine_config &mconfig, const ch
// machine configs
static MACHINE_CONFIG_START(tms1000)
MACHINE_CONFIG_MEMBER(tms1000_cpu_device::device_add_mconfig)
// microinstructions PLA, output PLA
MCFG_PLA_ADD("mpla", 8, 16, 30)
@ -111,12 +111,6 @@ static MACHINE_CONFIG_START(tms1000)
MCFG_PLA_FILEFORMAT(BERKELEY)
MACHINE_CONFIG_END
machine_config_constructor tms1000_cpu_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME(tms1000);
}
// disasm
offs_t tms1000_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options)
{

2
src/devices/cpu/tms1000/tms1000.h
View File

@ -24,7 +24,7 @@ protected:
// overrides
virtual void device_reset() override;
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options) override;

7
src/devices/cpu/tms1000/tms1400.cpp
View File

@ -70,7 +70,7 @@ tms1670_cpu_device::tms1670_cpu_device(const machine_config &mconfig, const char
// machine configs
static MACHINE_CONFIG_START(tms1400)
MACHINE_CONFIG_MEMBER(tms1400_cpu_device::device_add_mconfig)
// microinstructions PLA, output PLA
MCFG_PLA_ADD("mpla", 8, 16, 30)
@ -79,11 +79,6 @@ static MACHINE_CONFIG_START(tms1400)
MCFG_PLA_FILEFORMAT(BERKELEY)
MACHINE_CONFIG_END
machine_config_constructor tms1400_cpu_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME(tms1400);
}
// device_reset
void tms1400_cpu_device::device_reset()

2
src/devices/cpu/tms1000/tms1400.h
View File

@ -24,7 +24,7 @@ protected:
// overrides
virtual void device_reset() override;
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual void op_br() override;
virtual void op_call() override;

7
src/devices/cpu/tms1000/tp0320.cpp
View File

@ -44,7 +44,7 @@ tp0320_cpu_device::tp0320_cpu_device(const machine_config &mconfig, const char *
// machine configs
static MACHINE_CONFIG_START(tp0320)
MACHINE_CONFIG_MEMBER(tp0320_cpu_device::device_add_mconfig)
// main opcodes PLA(partial), microinstructions PLA
MCFG_PLA_ADD("ipla", 9, 6, 8)
@ -53,11 +53,6 @@ static MACHINE_CONFIG_START(tp0320)
MCFG_PLA_FILEFORMAT(BERKELEY)
MACHINE_CONFIG_END
machine_config_constructor tp0320_cpu_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME(tp0320);
}
// disasm
offs_t tp0320_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options)

2
src/devices/cpu/tms1000/tp0320.h
View File

@ -28,7 +28,7 @@ protected:
virtual void device_reset() override;
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options) override;
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
};

7
src/devices/cpu/z80/kl5c80a12.cpp
View File

@ -46,10 +46,5 @@ void kl5c80a12_device::device_reset()
/* CPU interface */
static MACHINE_CONFIG_START( kl5c80a12 )
MACHINE_CONFIG_MEMBER( kl5c80a12_device::device_add_mconfig )
MACHINE_CONFIG_END
machine_config_constructor kl5c80a12_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( kl5c80a12 );
}

2
src/devices/cpu/z80/kl5c80a12.h
View File

@ -40,7 +40,7 @@ public:
protected:
// device-level overrides
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
virtual void device_reset() override;
};

7
src/devices/cpu/z80/tmpz84c011.cpp
View File

@ -111,15 +111,10 @@ void tmpz84c011_device::device_reset()
/* CPU interface */
static MACHINE_CONFIG_START( tmpz84c011 )
MACHINE_CONFIG_MEMBER( tmpz84c011_device::device_add_mconfig )
MCFG_DEVICE_ADD("tmpz84c011_ctc", Z80CTC, DERIVED_CLOCK(1,1) )
MCFG_Z80CTC_INTR_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(tmpz84c011_device, zc0_cb_trampoline_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(tmpz84c011_device, zc1_cb_trampoline_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(tmpz84c011_device, zc2_cb_trampoline_w))
MACHINE_CONFIG_END
machine_config_constructor tmpz84c011_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( tmpz84c011 );
}

10
src/devices/cpu/z80/tmpz84c011.h
View File

@ -123,13 +123,9 @@ public:
DECLARE_WRITE8_MEMBER( tmpz84c011_dir_pd_w ) { m_pio_dir[3] = data; }
DECLARE_WRITE8_MEMBER( tmpz84c011_dir_pe_w ) { m_pio_dir[4] = data; }
DECLARE_WRITE_LINE_MEMBER( zc0_cb_trampoline_w ) { m_zc0_cb(state); }
DECLARE_WRITE_LINE_MEMBER( zc1_cb_trampoline_w ) { m_zc1_cb(state); }
DECLARE_WRITE_LINE_MEMBER( zc2_cb_trampoline_w ) { m_zc2_cb(state); }
protected:
// device-level overrides
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
virtual void device_reset() override;
@ -168,6 +164,10 @@ private:
devcb_write_line m_zc0_cb;
devcb_write_line m_zc1_cb;
devcb_write_line m_zc2_cb;
DECLARE_WRITE_LINE_MEMBER( zc0_cb_trampoline_w ) { m_zc0_cb(state); }
DECLARE_WRITE_LINE_MEMBER( zc1_cb_trampoline_w ) { m_zc1_cb(state); }
DECLARE_WRITE_LINE_MEMBER( zc2_cb_trampoline_w ) { m_zc2_cb(state); }
};

7
src/devices/cpu/z80/tmpz84c015.cpp
View File

@ -172,7 +172,7 @@ WRITE8_MEMBER(tmpz84c015_device::irq_priority_w)
}
}
static MACHINE_CONFIG_START( tmpz84c015 )
MACHINE_CONFIG_MEMBER( tmpz84c015_device::device_add_mconfig )
/* basic machine hardware */
MCFG_Z80SIO0_ADD("tmpz84c015_sio", DERIVED_CLOCK(1,1), 0, 0, 0, 0)
@ -213,8 +213,3 @@ static MACHINE_CONFIG_START( tmpz84c015 )
MCFG_Z80PIO_OUT_PB_CB(WRITE8(tmpz84c015_device, out_pb_cb_trampoline_w))
MCFG_Z80PIO_OUT_BRDY_CB(WRITELINE(tmpz84c015_device, out_brdy_cb_trampoline_w))
MACHINE_CONFIG_END
machine_config_constructor tmpz84c015_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( tmpz84c015 );
}

60
src/devices/cpu/z80/tmpz84c015.h
View File

@ -174,38 +174,9 @@ public:
DECLARE_WRITE8_MEMBER( irq_priority_w );
DECLARE_WRITE_LINE_MEMBER( out_txda_cb_trampoline_w ) { m_out_txda_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_dtra_cb_trampoline_w ) { m_out_dtra_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_rtsa_cb_trampoline_w ) { m_out_rtsa_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_wrdya_cb_trampoline_w ) { m_out_wrdya_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_synca_cb_trampoline_w ) { m_out_synca_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_txdb_cb_trampoline_w ) { m_out_txdb_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_dtrb_cb_trampoline_w ) { m_out_dtrb_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_rtsb_cb_trampoline_w ) { m_out_rtsb_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_wrdyb_cb_trampoline_w ) { m_out_wrdyb_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_syncb_cb_trampoline_w ) { m_out_syncb_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_rxdrqa_cb_trampoline_w ) { m_out_rxdrqa_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_txdrqa_cb_trampoline_w ) { m_out_txdrqa_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_rxdrqb_cb_trampoline_w ) { m_out_rxdrqb_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_txdrqb_cb_trampoline_w ) { m_out_txdrqb_cb(state); }
DECLARE_WRITE_LINE_MEMBER( zc0_cb_trampoline_w ) { m_zc0_cb(state); }
DECLARE_WRITE_LINE_MEMBER( zc1_cb_trampoline_w ) { m_zc1_cb(state); }
DECLARE_WRITE_LINE_MEMBER( zc2_cb_trampoline_w ) { m_zc2_cb(state); }
DECLARE_READ8_MEMBER( in_pa_cb_trampoline_r ) { return m_in_pa_cb(); }
DECLARE_WRITE8_MEMBER( out_pa_cb_trampoline_w ) { m_out_pa_cb(data); }
DECLARE_WRITE_LINE_MEMBER( out_ardy_cb_trampoline_w ) { m_out_ardy_cb(state); }
DECLARE_READ8_MEMBER( in_pb_cb_trampoline_r ) { return m_in_pb_cb(); }
DECLARE_WRITE8_MEMBER( out_pb_cb_trampoline_w ) { m_out_pb_cb(data); }
DECLARE_WRITE_LINE_MEMBER( out_brdy_cb_trampoline_w ) { m_out_brdy_cb(state); }
protected:
// device-level overrides
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_post_load() override;
@ -259,6 +230,35 @@ private:
devcb_read8 m_in_pb_cb;
devcb_write8 m_out_pb_cb;
devcb_write_line m_out_brdy_cb;
DECLARE_WRITE_LINE_MEMBER( out_txda_cb_trampoline_w ) { m_out_txda_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_dtra_cb_trampoline_w ) { m_out_dtra_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_rtsa_cb_trampoline_w ) { m_out_rtsa_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_wrdya_cb_trampoline_w ) { m_out_wrdya_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_synca_cb_trampoline_w ) { m_out_synca_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_txdb_cb_trampoline_w ) { m_out_txdb_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_dtrb_cb_trampoline_w ) { m_out_dtrb_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_rtsb_cb_trampoline_w ) { m_out_rtsb_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_wrdyb_cb_trampoline_w ) { m_out_wrdyb_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_syncb_cb_trampoline_w ) { m_out_syncb_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_rxdrqa_cb_trampoline_w ) { m_out_rxdrqa_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_txdrqa_cb_trampoline_w ) { m_out_txdrqa_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_rxdrqb_cb_trampoline_w ) { m_out_rxdrqb_cb(state); }
DECLARE_WRITE_LINE_MEMBER( out_txdrqb_cb_trampoline_w ) { m_out_txdrqb_cb(state); }
DECLARE_WRITE_LINE_MEMBER( zc0_cb_trampoline_w ) { m_zc0_cb(state); }
DECLARE_WRITE_LINE_MEMBER( zc1_cb_trampoline_w ) { m_zc1_cb(state); }
DECLARE_WRITE_LINE_MEMBER( zc2_cb_trampoline_w ) { m_zc2_cb(state); }
DECLARE_READ8_MEMBER( in_pa_cb_trampoline_r ) { return m_in_pa_cb(); }
DECLARE_WRITE8_MEMBER( out_pa_cb_trampoline_w ) { m_out_pa_cb(data); }
DECLARE_WRITE_LINE_MEMBER( out_ardy_cb_trampoline_w ) { m_out_ardy_cb(state); }
DECLARE_READ8_MEMBER( in_pb_cb_trampoline_r ) { return m_in_pb_cb(); }
DECLARE_WRITE8_MEMBER( out_pb_cb_trampoline_w ) { m_out_pb_cb(data); }
DECLARE_WRITE_LINE_MEMBER( out_brdy_cb_trampoline_w ) { m_out_brdy_cb(state); }
};