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f3853: add notes (nw)
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7fa6825e45
@ -2,37 +2,45 @@
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// copyright-holders:Wilbert Pol, hap
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/**********************************************************************
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Fairchild F3853 SRAM interface with integrated interrupt
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controller and timer (SMI)
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Fairchild F3853 SMI, F3851 PSU, F3856 PSU, F38T56 PSU
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This chip is a timer shift register, basically the same as in the
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F3851.
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This device only emulates the I/O, interrupt, timer functions. Not the
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low-level ROMC signals.
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Based on a datasheet obtained from www.freetradezone.com
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F3853: Static memory interface with integrated interrupt controller and timer.
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8-bit shift register:
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The timer is a shift register:
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Feedback in0 = !((out3 ^ out4) ^ (out5 ^ out7))
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Interrupts are at 0xfe
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0xff stops the register (0xfe is never reached)
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F3851: Program Storage Unit, same timer and interrupt controller as F3853,
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but has 2 I/O ports instead of a programmable interrupt vector.
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F3856/F38T56 Program Storage Unit: similar interrupt controller, timer
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is more versatile, a simple downcounter instead of shift register.
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TODO:
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- emulate at lower level and place this stuff into devices/cpu/f8 folder
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- interrupt priority pin
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- 3856/38T56 timer pulse counter mode, event counter mode
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**********************************************************************/
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#include "emu.h"
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#include "f3853.h"
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//**************************************************************************
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// LIVE DEVICE
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//**************************************************************************
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// device type definition
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DEFINE_DEVICE_TYPE(F3853, f3853_device, "f3853_device", "F3853 SMI")
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DEFINE_DEVICE_TYPE(F3851, f3851_device, "f3851_device", "F3851 PSU")
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DEFINE_DEVICE_TYPE(F3856, f3856_device, "f3856_device", "F3856 PSU")
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DEFINE_DEVICE_TYPE(F38T56, f38t56_device, "f38t56_device", "F38T56 PSU")
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DEFINE_DEVICE_TYPE(F3853, f3853_device, "f3853_smi", "Fairchild F3853 SMI")
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DEFINE_DEVICE_TYPE(F3851, f3851_device, "f3851_psu", "Fairchild F3851 PSU")
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DEFINE_DEVICE_TYPE(F3856, f3856_device, "f3856_psu", "Fairchild F3856 PSU")
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DEFINE_DEVICE_TYPE(F38T56, f38t56_device, "f38t56_psu", "Fairchild F38T56 PSU")
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//-------------------------------------------------
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// f3853_device - constructor
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// constructor
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//-------------------------------------------------
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f3853_device::f3853_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
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@ -72,6 +80,11 @@ f38t56_device::f38t56_device(const machine_config &mconfig, const char *tag, dev
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{ }
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//-------------------------------------------------
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// initialisation
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//-------------------------------------------------
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void f3853_device::device_resolve_objects()
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{
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m_int_req_callback.resolve_safe();
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@ -90,11 +103,6 @@ void f3851_device::device_resolve_objects()
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cb.resolve_safe();
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}
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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void f3853_device::device_start()
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{
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// lookup table for 3851/3853 lfsr timer
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@ -108,15 +116,15 @@ void f3853_device::device_start()
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m_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(f3853_device::timer_callback),this));
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// zerofill (what's not in constructor)
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m_external_enable = false;
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m_timer_enable = false;
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m_external_int_enable = false;
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m_timer_int_enable = false;
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m_request_flipflop = false;
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// register for savestates
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save_item(NAME(m_int_vector));
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save_item(NAME(m_prescaler));
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save_item(NAME(m_external_enable));
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save_item(NAME(m_timer_enable));
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save_item(NAME(m_external_int_enable));
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save_item(NAME(m_timer_int_enable));
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save_item(NAME(m_request_flipflop));
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save_item(NAME(m_priority_line));
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save_item(NAME(m_external_interrupt_line));
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@ -135,33 +143,34 @@ void f3856_device::device_start()
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save_item(NAME(m_timer_start));
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}
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//-------------------------------------------------
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// device_reset - device-specific reset
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//-------------------------------------------------
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void f3853_device::device_reset()
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{
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// clear ports
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// note that standalone peripherals don't have a reset pin, but 3870 does
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// clear ports at power-on
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for (int i = 0; i < 4; i++)
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write(machine().dummy_space(), i, 0);
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}
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//-------------------------------------------------
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// implementation
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//-------------------------------------------------
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void f3853_device::set_interrupt_request_line()
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{
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m_int_req_callback(m_request_flipflop && !m_priority_line ? ASSERT_LINE : CLEAR_LINE);
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}
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IRQ_CALLBACK_MEMBER(f3853_device::int_acknowledge)
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{
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if (m_external_enable && !m_priority_line && m_request_flipflop)
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if (m_external_int_enable && !m_priority_line && m_request_flipflop)
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{
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m_request_flipflop = false;
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set_interrupt_request_line();
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return external_interrupt_vector();
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}
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else if (m_timer_enable && !m_priority_line && m_request_flipflop)
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else if (m_timer_int_enable && !m_priority_line && m_request_flipflop)
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{
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m_request_flipflop = false;
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set_interrupt_request_line();
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@ -187,7 +196,7 @@ void f3853_device::timer_start(uint8_t value)
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TIMER_CALLBACK_MEMBER(f3853_device::timer_callback)
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{
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if(m_timer_enable)
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if(m_timer_int_enable)
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{
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m_request_flipflop = true;
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set_interrupt_request_line();
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@ -195,9 +204,10 @@ TIMER_CALLBACK_MEMBER(f3853_device::timer_callback)
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timer_start(0xfe);
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}
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WRITE_LINE_MEMBER(f3853_device::ext_int_w)
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{
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if(m_external_interrupt_line && !state && m_external_enable)
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if(m_external_interrupt_line && !state && m_external_int_enable)
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{
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m_request_flipflop = true;
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}
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@ -242,8 +252,8 @@ WRITE8_MEMBER(f3853_device::write)
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// interrupt control
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case 2:
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m_external_enable = (data & 3) == 1;
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m_timer_enable = (data & 3) == 3;
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m_external_int_enable = (data & 3) == 1;
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m_timer_int_enable = (data & 3) == 3;
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set_interrupt_request_line();
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break;
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@ -257,6 +267,10 @@ WRITE8_MEMBER(f3853_device::write)
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}
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//-------------------------------------------------
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// f3851_device-specific handlers
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//-------------------------------------------------
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READ8_MEMBER(f3851_device::read)
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{
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switch (offset & 3)
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@ -288,6 +302,10 @@ WRITE8_MEMBER(f3851_device::write)
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}
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//-------------------------------------------------
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// f3856_device-specific handlers
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//-------------------------------------------------
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void f3856_device::timer_start(uint8_t value)
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{
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m_timer_count = value;
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@ -301,7 +319,7 @@ TIMER_CALLBACK_MEMBER(f3856_device::timer_callback)
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if (--m_timer_count == 0)
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{
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m_timer_count = m_timer_modulo;
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if (m_timer_enable)
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if (m_timer_int_enable)
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{
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m_request_flipflop = true;
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set_interrupt_request_line();
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@ -334,7 +352,7 @@ WRITE8_MEMBER(f3856_device::write)
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f3851_device::write(space, offset, data);
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break;
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// interrupt control
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// interrupt/timer control
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case 2:
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{
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// timer prescaler
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@ -348,8 +366,8 @@ WRITE8_MEMBER(f3856_device::write)
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timer_start(m_timer_count);
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// enable interrupts
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m_external_enable = (data & 3) == 1 || (data & 3) == 2;
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m_timer_enable = bool(data & 2);
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m_external_int_enable = (data & 3) == 1 || (data & 3) == 2;
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m_timer_int_enable = bool(data & 2);
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set_interrupt_request_line();
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break;
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}
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@ -362,16 +380,20 @@ WRITE8_MEMBER(f3856_device::write)
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}
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//-------------------------------------------------
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// f38t56_device-specific handlers
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//-------------------------------------------------
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WRITE8_MEMBER(f38t56_device::write)
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{
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switch (offset & 3)
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{
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// I/O ports: same as 3851
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default:
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case 0: case 1:
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f3851_device::write(space, offset, data);
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break;
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// interrupt control
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// interrupt/timer control
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case 2:
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{
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// timer prescaler
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@ -387,8 +409,8 @@ WRITE8_MEMBER(f38t56_device::write)
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timer_start(m_timer_count);
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// enable interrupts
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m_external_enable = bool(data & 1);
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m_timer_enable = bool(data & 2);
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m_external_int_enable = bool(data & 1);
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m_timer_int_enable = bool(data & 2);
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set_interrupt_request_line();
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break;
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}
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@ -1,49 +1,67 @@
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// license:BSD-3-Clause
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// copyright-holders:Wilbert Pol, hap
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/***************************************************************************
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/*
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Fairchild F3853 SRAM interface with integrated interrupt
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controller and timer
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Fairchild F3853 SMI, F3851 PSU, F3856 PSU, F38T56 PSU
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This chip is a timer shift register, basically the same as in the
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F3851.
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****************************************************************************
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_____ _____
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Vgg 1 |* \_/ | 40 Vdd
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PHI 2 | | 39 ROMC4
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WRITE 3 | | 38 ROMC3
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_INT REQ 4 | | 37 ROMC2
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_PRI IN 5 | | 36 ROMC1
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_RAM WRITE 6 | | 35 ROMC0
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_EXT INT 7 | | 34 CPU READ
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ADDR7 8 | | 33 REG DR
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ADDR6 9 | | 32 ADDR15
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ADDR5 10 | F3853 | 31 ADDR14
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ADDR4 11 | | 30 ADDR13
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ADDR3 12 | | 29 ADDR12
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ADDR2 13 | | 28 ADDR11
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ADDR1 14 | | 27 ADDR10
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ADDR0 15 | | 26 ADDR9
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DB0 16 | | 25 ADDR8
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DB1 17 | | 24 DB7
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DB2 18 | | 23 DB6
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DB3 19 | | 22 DB5
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Vss 20 |_____________| 21 DB4
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***************************************************************************/
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*/
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#ifndef MAME_MACHINE_F3853_H
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#define MAME_MACHINE_F3853_H
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#pragma once
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// pinout reference
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/***************************************************************************
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TYPE DEFINITIONS
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***************************************************************************/
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/*
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_____ _____
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Vgg 1 |* \_/ | 40 Vdd
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PHI 2 | | 39 ROMC4
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WRITE 3 | | 38 ROMC3
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_INT REQ 4 | | 37 ROMC2
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_PRI IN 5 | | 36 ROMC1
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_RAM WRITE 6 | | 35 ROMC0
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_EXT INT 7 | | 34 CPU READ
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ADDR7 8 | | 33 REG DR
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ADDR6 9 | | 32 ADDR15
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ADDR5 10 | F3853 | 31 ADDR14
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ADDR4 11 | | 30 ADDR13
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ADDR3 12 | | 29 ADDR12
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ADDR2 13 | | 28 ADDR11
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ADDR1 14 | | 27 ADDR10
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ADDR0 15 | | 26 ADDR9
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DB0 16 | | 25 ADDR8
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DB1 17 | | 24 DB7
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DB2 18 | | 23 DB6
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DB3 19 | | 22 DB5
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Vss 20 |_____________| 21 DB4
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_____ _____
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_I/O B7 1 |* \_/ | 40 DB7
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_I/O A7 2 | | 39 DB6
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Vgg 3 | | 38 _I/O B6
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Vdd 4 | | 37 _I/O A6
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_EXT INT 5 | | 36 _I/O A5
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_PRI OUT 6 | | 35 _I/O B5
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WRITE 7 | | 34 DB5
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PHI 8 | | 33 DB4
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_INT REQ 9 | F3851 | 32 _I/O B4
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_PRI IN 10 | F3856 | 31 _I/O A4
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_DBDR 11 | F38T56 | 30 _I/O A3
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STROBE 12 | | 29 _I/O B3
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ROMC4 13 | | 28 DB3
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ROMC3 14 | | 27 DB2
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ROMC2 15 | | 26 _I/O B2
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ROMC1 16 | | 25 _I/O A2
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ROMC0 17 | | 24 _I/O A1
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Vss 18 | | 23 _I/O B1
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_I/O A0 19 | | 22 DB1
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_I/O B0 20 |_____________| 21 DB0
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F38T56 is internal in F3870
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note: STROBE is N/C on F3851
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*/
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// ======================> f3853_device
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class f3853_device : public device_t
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{
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@ -85,8 +103,8 @@ protected:
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uint16_t m_int_vector; // Bit 7 is set to 0 for timer interrupts, 1 for external interrupts
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u8 m_prescaler;
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bool m_external_enable;
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bool m_timer_enable;
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bool m_external_int_enable;
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bool m_timer_int_enable;
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bool m_request_flipflop;
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@ -28,6 +28,9 @@ hardware notes:
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TODO:
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- discrete sound, currently it's emulated crudely, just enough to make it beep when supposed to
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- MCU frequency was measured approx 2.1MHz on its XTL2 pin, but considering that
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the MK3870 has an internal /2 divider, this is way too slow when compared to
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video references of the game
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******************************************************************************/
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@ -265,11 +268,11 @@ INPUT_PORTS_END
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void tgm_state::tgm(machine_config &config)
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{
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/* basic machine hardware */
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F8(config, m_maincpu, 2000000); // MK3870, measured around 2.1MHz
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F8(config, m_maincpu, 4000000/2); // MK3870, frequency is approximate
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m_maincpu->set_addrmap(AS_PROGRAM, &tgm_state::main_map);
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m_maincpu->set_addrmap(AS_IO, &tgm_state::main_io);
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f38t56_device &psu(F38T56(config, "psu", 2000000));
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f38t56_device &psu(F38T56(config, "psu", 4000000/2));
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psu.write_a().set(FUNC(tgm_state::sound_w));
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psu.write_b().set(FUNC(tgm_state::digit_w));
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