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https://github.com/holub/mame
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sharc: Minor optimizations
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7fde376357
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@ -66,6 +66,13 @@ typedef struct
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UINT32 ext_count;
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} DMA_REGS;
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typedef struct
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{
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UINT32 addr;
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UINT32 code;
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UINT32 loop_type;
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} LADDR;
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typedef struct _SHARC_REGS SHARC_REGS;
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struct _SHARC_REGS
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{
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@ -84,7 +91,7 @@ struct _SHARC_REGS
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UINT32 daddr;
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UINT32 pcstk;
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UINT32 pcstkp;
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UINT32 laddr;
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LADDR laddr;
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UINT32 curlcntr;
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UINT32 lcntr;
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@ -131,8 +138,6 @@ struct _SHARC_REGS
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void (*opcode_handler)(SHARC_REGS *cpustate);
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int icount;
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UINT64 opcode;
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UINT64 fetch_opcode;
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UINT64 decode_opcode;
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UINT32 nfaddr;
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@ -197,11 +202,6 @@ INLINE void CHANGE_PC(SHARC_REGS *cpustate, UINT32 newpc)
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cpustate->daddr = newpc;
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cpustate->faddr = newpc+1;
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cpustate->nfaddr = newpc+2;
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// next instruction to be executed
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cpustate->decode_opcode = ROPCODE(cpustate->daddr);
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// next instruction to be decoded
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cpustate->fetch_opcode = ROPCODE(cpustate->faddr);
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}
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INLINE void CHANGE_PC_DELAYED(SHARC_REGS *cpustate, UINT32 newpc)
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@ -449,7 +449,9 @@ static CPU_INIT( sharc )
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device->save_item(NAME(cpustate->daddr));
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device->save_item(NAME(cpustate->pcstk));
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device->save_item(NAME(cpustate->pcstkp));
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device->save_item(NAME(cpustate->laddr));
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device->save_item(NAME(cpustate->laddr.addr));
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device->save_item(NAME(cpustate->laddr.code));
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device->save_item(NAME(cpustate->laddr.loop_type));
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device->save_item(NAME(cpustate->curlcntr));
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device->save_item(NAME(cpustate->lcntr));
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@ -510,8 +512,6 @@ static CPU_INIT( sharc )
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device->save_pointer(NAME(cpustate->internal_ram), 2 * 0x10000);
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device->save_item(NAME(cpustate->opcode));
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device->save_item(NAME(cpustate->fetch_opcode));
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device->save_item(NAME(cpustate->decode_opcode));
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device->save_item(NAME(cpustate->nfaddr));
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@ -600,10 +600,14 @@ static CPU_EXIT( sharc )
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static void sharc_set_irq_line(SHARC_REGS *cpustate, int irqline, int state)
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{
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if (state)
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if (state == ASSERT_LINE)
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{
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cpustate->irq_active |= 1 << (8-irqline);
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}
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else
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{
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cpustate->irq_active &= ~(1 << (8-irqline));
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}
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}
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void sharc_set_flag_input(device_t *device, int flag_num, int state)
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@ -696,15 +700,6 @@ static CPU_EXECUTE( sharc )
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cpustate->idle = 0;
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}
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// fill the initial pipeline
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// next executed instruction
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cpustate->opcode = ROPCODE(cpustate->daddr);
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cpustate->opcode_handler = sharc_op[(cpustate->opcode >> 39) & 0x1ff];
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// next decoded instruction
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cpustate->fetch_opcode = ROPCODE(cpustate->faddr);
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while (cpustate->icount > 0 && !cpustate->idle)
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{
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cpustate->pc = cpustate->daddr;
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@ -716,21 +711,18 @@ static CPU_EXECUTE( sharc )
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cpustate->astat_old_old = cpustate->astat_old;
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cpustate->astat_old = cpustate->astat;
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cpustate->decode_opcode = cpustate->fetch_opcode;
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// fetch next instruction
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cpustate->fetch_opcode = ROPCODE(cpustate->faddr);
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cpustate->opcode = ROPCODE(cpustate->pc);
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debugger_instruction_hook(device, cpustate->pc);
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// handle looping
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if (cpustate->pc == (cpustate->laddr & 0xffffff))
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if (cpustate->pc == cpustate->laddr.addr)
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{
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switch (cpustate->laddr >> 30)
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switch (cpustate->laddr.loop_type)
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{
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case 0: // arithmetic condition-based
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{
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int condition = (cpustate->laddr >> 24) & 0x1f;
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int condition = cpustate->laddr.code;
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{
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UINT32 looptop = TOP_PC(cpustate);
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@ -779,13 +771,8 @@ static CPU_EXECUTE( sharc )
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}
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}
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}
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// execute current instruction
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cpustate->opcode_handler(cpustate);
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// decode next instruction
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cpustate->opcode = cpustate->decode_opcode;
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cpustate->opcode_handler = sharc_op[(cpustate->opcode >> 39) & 0x1ff];
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sharc_op[(cpustate->opcode >> 39) & 0x1ff](cpustate);
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@ -1106,7 +1106,7 @@ INLINE UINT32 TOP_PC(SHARC_REGS *cpustate)
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return cpustate->pcstack[cpustate->pcstkp];
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}
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INLINE void PUSH_LOOP(SHARC_REGS *cpustate, UINT32 pc, UINT32 count)
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INLINE void PUSH_LOOP(SHARC_REGS *cpustate, UINT32 addr, UINT32 code, UINT32 type, UINT32 count)
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{
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cpustate->lstkp++;
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if(cpustate->lstkp >= 6)
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@ -1124,9 +1124,12 @@ INLINE void PUSH_LOOP(SHARC_REGS *cpustate, UINT32 pc, UINT32 count)
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}
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cpustate->lcstack[cpustate->lstkp] = count;
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cpustate->lastack[cpustate->lstkp] = pc;
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cpustate->lastack[cpustate->lstkp] = (type << 30) | (code << 24) | addr;
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cpustate->curlcntr = count;
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cpustate->laddr = pc;
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cpustate->laddr.addr = addr;
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cpustate->laddr.code = code;
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cpustate->laddr.loop_type = type;
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}
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INLINE void POP_LOOP(SHARC_REGS *cpustate)
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@ -1148,7 +1151,10 @@ INLINE void POP_LOOP(SHARC_REGS *cpustate)
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}
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cpustate->curlcntr = cpustate->lcstack[cpustate->lstkp];
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cpustate->laddr = cpustate->lastack[cpustate->lstkp];
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cpustate->laddr.addr = cpustate->lastack[cpustate->lstkp] & 0xffffff;
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cpustate->laddr.code = (cpustate->lastack[cpustate->lstkp] >> 24) & 0x1f;
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cpustate->laddr.loop_type = (cpustate->lastack[cpustate->lstkp] >> 30) & 0x3;
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}
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INLINE void PUSH_STATUS_STACK(SHARC_REGS *cpustate)
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@ -2391,7 +2397,7 @@ static void sharcop_do_until_counter_imm(SHARC_REGS *cpustate)
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if (cpustate->lcntr > 0)
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{
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PUSH_PC(cpustate, cpustate->pc+1);
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PUSH_LOOP(cpustate, address | (type << 30) | (cond << 24), cpustate->lcntr);
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PUSH_LOOP(cpustate, address, cond, type, cpustate->lcntr);
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}
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}
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@ -2425,7 +2431,7 @@ static void sharcop_do_until_counter_ureg(SHARC_REGS *cpustate)
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if (cpustate->lcntr > 0)
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{
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PUSH_PC(cpustate, cpustate->pc+1);
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PUSH_LOOP(cpustate, address | (type << 30) | (cond << 24), cpustate->lcntr);
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PUSH_LOOP(cpustate, address, cond, type, cpustate->lcntr);
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}
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}
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@ -2440,7 +2446,7 @@ static void sharcop_do_until(SHARC_REGS *cpustate)
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UINT32 address = (cpustate->pc + offset);
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PUSH_PC(cpustate, cpustate->pc+1);
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PUSH_LOOP(cpustate, address | (cond << 24), 0);
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PUSH_LOOP(cpustate, address, cond, 0, 0);
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}
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/*****************************************************************************/
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@ -2737,9 +2743,6 @@ static void sharcop_idle(SHARC_REGS *cpustate)
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cpustate->faddr = cpustate->pc+1;
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cpustate->nfaddr = cpustate->pc+2;
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cpustate->decode_opcode = ROPCODE(cpustate->daddr);
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cpustate->fetch_opcode = ROPCODE(cpustate->faddr);
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cpustate->idle = 1;
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}
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