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(MESS) imi5000h: Added CTC/PIO handlers. (nw)
This commit is contained in:
parent
6ccbdb50b3
commit
8054c2396f
@ -106,12 +106,29 @@ static const z80_daisy_config z80_daisy_chain[] =
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// Z80CTC_INTERFACE( ctc_intf )
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//-------------------------------------------------
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WRITE_LINE_MEMBER( imi5000h_device::ctc_z0_w )
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{
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m_ctc->trg1(state);
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}
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WRITE_LINE_MEMBER( imi5000h_device::ctc_z1_w )
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{
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m_ctc->trg2(state);
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m_ctc->trg3(state);
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}
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WRITE_LINE_MEMBER( imi5000h_device::ctc_z2_w )
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{
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//m_memory_enable = state;
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m_maincpu->set_input_line(INPUT_LINE_NMI, state);
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}
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static Z80CTC_INTERFACE( ctc_intf )
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{
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DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL
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DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, ctc_z0_w),
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DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, ctc_z1_w),
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DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, ctc_z2_w)
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};
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@ -119,15 +136,91 @@ static Z80CTC_INTERFACE( ctc_intf )
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// Z80PIO_INTERFACE( pio0_intf )
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//-------------------------------------------------
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READ8_MEMBER( imi5000h_device::pio0_pa_r )
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{
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/*
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bit description
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0 -SEEK COMPLETE
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1 -SECTOR SIZE 2 (UB4:4)
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2 -SECTOR SIZE 1 (UB4:1)
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3 -SECTOR SEL
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4 CRC ERROR
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5 WRITE FAULT
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6 -INDEX SEL
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7
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*/
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return 0;
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}
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WRITE8_MEMBER( imi5000h_device::pio0_pa_w )
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{
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/*
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bit description
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0
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1
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2
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3
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4
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5
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6
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7 ACTIVITY LED
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*/
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}
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READ8_MEMBER( imi5000h_device::pio0_pb_r )
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{
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/*
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bit description
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0 -READY
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1
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2
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3
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4
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5
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6
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7
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*/
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return 0;
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}
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WRITE8_MEMBER( imi5000h_device::pio0_pb_w )
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{
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/*
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bit description
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0
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1 DIRECTION IN
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2 -HSXSTB
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3 STEP
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4 HEAD SEL 2^0
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5 HEAD SEL 2^1
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6 HEAD SEL 2^2
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7 REDUCE WR CURRENT
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*/
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}
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static Z80PIO_INTERFACE( pio0_intf )
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{
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DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL
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DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, pio0_pa_r),
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DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, pio0_pa_w),
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DEVCB_DEVICE_LINE_MEMBER(Z80PIO_0_TAG, z80pio_device, strobe_a),
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DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, pio0_pb_r),
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DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, pio0_pb_w),
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DEVCB_DEVICE_LINE_MEMBER(Z80PIO_0_TAG, z80pio_device, strobe_b)
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};
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@ -135,14 +228,63 @@ static Z80PIO_INTERFACE( pio0_intf )
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// Z80PIO_INTERFACE( pio2_intf )
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//-------------------------------------------------
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READ8_MEMBER( imi5000h_device::pio2_pa_r )
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{
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/*
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bit description
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0
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1
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2
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3
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4
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5
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6 -SYNC
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7 -DRV.ACK
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*/
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return 0;
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}
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WRITE8_MEMBER( imi5000h_device::pio2_pa_w )
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{
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/*
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bit description
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0 BUS DIR
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1 -DRV.ACK
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2 -ALT SEL
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3 -HSXFER
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4 PIO RDY
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5 -COMPL
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6
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7
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*/
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}
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READ8_MEMBER( imi5000h_device::pio2_pb_r )
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{
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// command bus
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return 0;
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}
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WRITE8_MEMBER( imi5000h_device::pio2_pb_w )
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{
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// command bus
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}
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static Z80PIO_INTERFACE( pio2_intf )
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{
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DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, pio2_pa_r),
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DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, pio2_pa_w),
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DEVCB_DEVICE_LINE_MEMBER(Z80PIO_2_TAG, z80pio_device, strobe_a),
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DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, pio2_pb_r),
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DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, pio2_pb_w),
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DEVCB_NULL
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};
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@ -151,15 +293,91 @@ static Z80PIO_INTERFACE( pio2_intf )
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// Z80PIO_INTERFACE( pio3_intf )
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//-------------------------------------------------
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READ8_MEMBER( imi5000h_device::pio3_pa_r )
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{
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/*
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bit description
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0 -TIMEOUT DISABLE (UB4:8)
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1 -UNIT SELECT 1 (UB4:7)
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2 -UNIT SELECT 2 (UB4:6)
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3 SYSTEM/-DIAG (UB4:5)
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4 -RXD
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5
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6 -TRACK 00
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7
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*/
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return 0;
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}
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WRITE8_MEMBER( imi5000h_device::pio3_pa_w )
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{
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/*
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bit description
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0
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1
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2
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3
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4
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5 TXD
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6
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7 -WRITE DISABLE
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*/
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}
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READ8_MEMBER( imi5000h_device::pio3_pb_r )
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{
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/*
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bit description
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0
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1
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2 6MB1
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3 -WRITE PROTECT (W2)
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4 -FORMAT ENABLE
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5 6MB2
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6 12MB1
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7 12MB2
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*/
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return 0;
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}
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WRITE8_MEMBER( imi5000h_device::pio3_pb_w )
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{
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/*
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bit description
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0 -DRV 1 SEL
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1 -DRV 2 SEL
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2
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3
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4
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5
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6
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7
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*/
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}
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static Z80PIO_INTERFACE( pio3_intf )
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{
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL
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DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, pio3_pa_r),
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DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, pio3_pa_w),
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DEVCB_DEVICE_LINE_MEMBER(Z80PIO_3_TAG, z80pio_device, strobe_a),
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DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, pio3_pb_r),
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DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, pio3_pb_w),
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DEVCB_DEVICE_LINE_MEMBER(Z80PIO_3_TAG, z80pio_device, strobe_b)
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};
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@ -168,15 +386,15 @@ static Z80PIO_INTERFACE( pio3_intf )
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//-------------------------------------------------
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static MACHINE_CONFIG_FRAGMENT( imi5000h )
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MCFG_CPU_ADD(Z80_TAG, Z80, 4000000)
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MCFG_CPU_ADD(Z80_TAG, Z80, XTAL_8MHz/2)
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MCFG_CPU_CONFIG(z80_daisy_chain)
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MCFG_CPU_PROGRAM_MAP(imi5000h_mem)
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MCFG_CPU_IO_MAP(imi5000h_io)
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MCFG_Z80CTC_ADD(Z80CTC_TAG, 4000000, ctc_intf)
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MCFG_Z80PIO_ADD(Z80PIO_0_TAG, 4000000, pio0_intf)
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MCFG_Z80PIO_ADD(Z80PIO_2_TAG, 4000000, pio2_intf)
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MCFG_Z80PIO_ADD(Z80PIO_3_TAG, 4000000, pio3_intf)
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MCFG_Z80CTC_ADD(Z80CTC_TAG, XTAL_8MHz/2, ctc_intf)
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MCFG_Z80PIO_ADD(Z80PIO_0_TAG, XTAL_8MHz/2, pio0_intf)
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MCFG_Z80PIO_ADD(Z80PIO_2_TAG, XTAL_8MHz/2, pio2_intf)
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MCFG_Z80PIO_ADD(Z80PIO_3_TAG, XTAL_8MHz/2, pio3_intf)
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MACHINE_CONFIG_END
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@ -196,6 +414,24 @@ machine_config_constructor imi5000h_device::device_mconfig_additions() const
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//-------------------------------------------------
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static INPUT_PORTS_START( imi5000h )
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PORT_START("LSI-11")
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PORT_DIPNAME( 0x01, 0x00, "LSI-11" )
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PORT_DIPSETTING( 0x01, "Normal" )
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PORT_DIPSETTING( 0x00, "LSI-11" ) // emulate DEC RL01 and RL02
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PORT_START("MUX")
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PORT_DIPNAME( 0x01, 0x00, "MUX" )
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PORT_DIPSETTING( 0x01, "Single" )
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PORT_DIPSETTING( 0x00, "Multiplexer" ) // Corvus Multiplexer Network
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PORT_START("FORMAT")
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PORT_DIPNAME( 0x01, 0x00, "FORMAT" )
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PORT_DIPSETTING( 0x01, "Normal" ) // read controller firmware from cylinders 0 and 1
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PORT_DIPSETTING( 0x00, "Format" ) // drive ready after self-test, allow format
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PORT_START("RESET")
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PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("RESET")
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PORT_START("UB4")
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PORT_DIPUNKNOWN_DIPLOC( 0x01, IP_ACTIVE_LOW, "UB4:1" )
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PORT_DIPUNKNOWN_DIPLOC( 0x02, IP_ACTIVE_LOW, "UB4:2" )
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@ -230,6 +466,10 @@ ioport_constructor imi5000h_device::device_input_ports() const
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imi5000h_device::imi5000h_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: device_t(mconfig, IMI5000H, "IMI 5000H", tag, owner, clock, "imi5000h", __FILE__),
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m_maincpu(*this, Z80_TAG),
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m_ctc(*this, Z80CTC_TAG),
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m_lsi11(*this, "LSI-11"),
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m_mux(*this, "MUX"),
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m_format(*this, "FORMAT"),
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m_ub4(*this, "UB4")
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{
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}
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@ -242,3 +482,14 @@ imi5000h_device::imi5000h_device(const machine_config &mconfig, const char *tag,
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void imi5000h_device::device_start()
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{
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}
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//-------------------------------------------------
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// device_reset - device-specific reset
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//-------------------------------------------------
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void imi5000h_device::device_reset()
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{
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m_maincpu->reset();
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m_ctc->reset();
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}
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@ -48,12 +48,43 @@ public:
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virtual machine_config_constructor device_mconfig_additions() const;
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virtual ioport_constructor device_input_ports() const;
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DECLARE_WRITE_LINE_MEMBER( ctc_z0_w );
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DECLARE_WRITE_LINE_MEMBER( ctc_z1_w );
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DECLARE_WRITE_LINE_MEMBER( ctc_z2_w );
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DECLARE_READ8_MEMBER( pio0_pa_r );
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DECLARE_WRITE8_MEMBER( pio0_pa_w );
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DECLARE_READ8_MEMBER( pio0_pb_r );
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DECLARE_WRITE8_MEMBER( pio0_pb_w );
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DECLARE_READ8_MEMBER( pio2_pa_r );
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DECLARE_WRITE8_MEMBER( pio2_pa_w );
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DECLARE_READ8_MEMBER( pio2_pb_r );
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DECLARE_WRITE8_MEMBER( pio2_pb_w );
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DECLARE_READ8_MEMBER( pio3_pa_r );
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DECLARE_WRITE8_MEMBER( pio3_pa_w );
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DECLARE_READ8_MEMBER( pio3_pb_r );
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DECLARE_WRITE8_MEMBER( pio3_pb_w );
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protected:
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// device-level overrides
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virtual void device_start();
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virtual void device_reset();
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private:
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enum
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{
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LED_FAULT,
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LED_BUSY,
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LED_READY
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};
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required_device<cpu_device> m_maincpu;
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required_device<z80ctc_device> m_ctc;
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required_ioport m_lsi11;
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required_ioport m_mux;
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required_ioport m_format;
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required_ioport m_ub4;
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};
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