SM511: small update to divider

This commit is contained in:
hap 2016-03-30 00:31:06 +02:00
parent 742fa79792
commit 80615fa83e
4 changed files with 13 additions and 5 deletions

View File

@ -22,7 +22,7 @@
- SM511 undocumented/guessed opcodes:
* $01 is guessed as DIV to ACC transfer, unknown which bits
* $5d is certainly CEND
* $65 is certainly IDIV, but not sure if it behaves same as on SM510
* $65 is certainly divider reset, but not sure if it behaves same as on SM510
*/
@ -144,6 +144,7 @@ void sm510_base_device::device_start()
void sm510_base_device::device_reset()
{
// ACL
m_skip = false;
m_halt = false;
m_op = m_prev_op = 0;
@ -317,7 +318,7 @@ TIMER_CALLBACK_MEMBER(sm510_base_device::div_timer_cb)
{
m_div = (m_div + 1) & 0x7fff;
// 1S signal on overflow(falling edge of f1)
// 1S signal on overflow(falling edge of F1)
if (m_div == 0)
m_1s = true;

View File

@ -284,6 +284,7 @@ protected:
void op_skip();
void op_cend();
void op_idiv();
void op_dr();
void op_dta();
void op_illegal();

View File

@ -450,10 +450,16 @@ void sm510_base_device::op_idiv()
m_div = 0;
}
void sm510_base_device::op_dr()
{
// DR: reset divider low 8 bits
m_div &= 0x7f;
}
void sm510_base_device::op_dta()
{
// DTA: transfer divider low bits to ACC
m_acc = BITSWAP16(m_div,0,0,0,0, 0,0,0,0, 0,0,0,0, 7,8,9,10) & 0xf;
// DTA: transfer divider low 4 bits to ACC
m_acc = BITSWAP16(m_div,0,0,0,0, 0,0,0,0, 0,0,0,0, 14,13,12,11) & 0xf;
}
void sm510_base_device::op_illegal()

View File

@ -127,7 +127,7 @@ void sm511_device::execute_one()
case 0x62: op_wr(); break;
case 0x63: op_ws(); break;
case 0x64: op_incb(); break;
case 0x65: op_idiv(); break;
case 0x65: op_dr(); break; // guessed
case 0x66: op_rc(); break;
case 0x67: op_sc(); break;
case 0x6c: op_decb(); break;