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https://github.com/holub/mame
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Merge pull request #896 from Tauwasser/gameboy_v5
Gameboy Changes (M161, MMM01 support)
This commit is contained in:
commit
809d20439c
135
hash/gameboy.xml
135
hash/gameboy.xml
@ -11917,13 +11917,13 @@
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</part>
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</software>
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<software name="4in1_601" supported="no">
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<software name="4in1_601">
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<description>Mani 4 in 1 (Chi, DMG-601 CHN)</description>
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<year>19??</year>
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<publisher>Mani</publisher>
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<info name="serial" value="DMG-601-CHN"/>
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<part name="cart" interface="gameboy_cart">
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<feature name="slot" value="rom_m161_m12" />
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<feature name="slot" value="rom_m161" />
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<dataarea name="rom" size="262144">
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<rom name="dmg-601-chn.bin" size="262144" crc="0c38a775" sha1="dfe46e066c599c17e684ddda3fd74c5357910630" offset="0" />
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</dataarea>
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@ -25101,10 +25101,12 @@
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<part name="cart" interface="gameboy_cart">
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<feature name="slot" value="rom_sachen1" />
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<dataarea name="rom" size="65536">
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<rom name="4 in 1 (europe) (4b-002) (unl).bin" size="65536" crc="5e438db8" sha1="d9cb1721854709be7667f5dbce0adf2488c0919b" offset="0" />
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<rom name="4b-002.bin" size="65536" crc="5e438db8" sha1="d9cb1721854709be7667f5dbce0adf2488c0919b" offset="0" />
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</dataarea>
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</part>
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</software>
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<!-- 4in1_003 missing -->
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<software name="4in1_004">
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<description>4 in 1 (Euro, 4B-004)</description>
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@ -25145,7 +25147,7 @@
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</part>
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</software>
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<software name="4in1_007" supported="no">
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<software name="4in1_007">
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<description>4 in 1 (Euro, 4B-007)</description>
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<year>19??</year>
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<publisher>Sachen</publisher>
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@ -25158,7 +25160,7 @@
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</part>
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</software>
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<software name="4in1_008" supported="no">
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<software name="4in1_008">
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<description>4 in 1 (Euro, 4B-008)</description>
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<year>19??</year>
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<publisher>Sachen</publisher>
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@ -25171,7 +25173,7 @@
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</part>
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</software>
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<software name="4in1_009" supported="no">
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<software name="4in1_009">
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<description>4 in 1 (Euro, 4B-009)</description>
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<year>19??</year>
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<publisher>Sachen</publisher>
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@ -25184,127 +25186,6 @@
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</part>
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</software>
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<!-- Below we list the ripped games from Sachen multicarts (I assumed they come from a 4-in-1 cart, but they could come as well from a 8-in-1 cart).
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They should be removed as soon as the carts are properly dumped and emulated -->
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<software name="antsoldr" supported="partial">
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<description>Ant Soldier (ripped from 4-in-1 4B-007)</description>
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<year>1993</year>
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<publisher>Sachen</publisher>
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<part name="cart" interface="gameboy_cart">
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<feature name="slot" value="rom_mbc1" />
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<dataarea name="rom" size="131072">
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<rom name="ant soldier (unl).bin" size="131072" crc="b4a5936e" sha1="d81514eabcf08fdfd50921516300d0ce2b424bf8" offset="0" />
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</dataarea>
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</part>
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</software>
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<software name="danlaser">
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<description>Dan Laser (ripped from 4-in-1 4B-007)</description>
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<year>19??</year>
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<publisher>Sachen</publisher>
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<part name="cart" interface="gameboy_cart">
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<dataarea name="rom" size="32768">
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<rom name="dan laser (unl).bin" size="32768" crc="aabc00f6" sha1="54ac969c8c3e36d9a24e7862cd1f81b3f23772f9" offset="0" />
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</dataarea>
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</part>
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</software>
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<software name="skyace">
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<description>Sky Ace (ripped from 4-in-1 4B-007)</description>
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<year>19??</year>
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<publisher>Sachen</publisher>
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<part name="cart" interface="gameboy_cart">
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<feature name="slot" value="rom_mbc1" />
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<dataarea name="rom" size="65536">
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<rom name="sky ace (unl).bin" size="65536" crc="395fe571" sha1="e62d74152d06ae817658cdcb20954fc32d33dc65" offset="0" />
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</dataarea>
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</part>
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</software>
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<software name="zooblock">
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<description>Zoo Block (ripped from 4-in-1 4B-007)</description>
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<year>19??</year>
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<publisher>Sachen</publisher>
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<part name="cart" interface="gameboy_cart">
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<dataarea name="rom" size="32768">
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<rom name="zoo block (unl).bin" size="32768" crc="fc6f3bc2" sha1="2d6d85b8b6345b3e200f3dd30c2e28e5fea555da" offset="0" />
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</dataarea>
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</part>
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</software>
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<software name="captkk" supported="no">
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<description>Captain Knick-Knack (ripped from 4-in-1 4B-008)</description>
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<year>19??</year>
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<publisher>Sachen</publisher>
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<part name="cart" interface="gameboy_cart">
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<dataarea name="rom" size="131072">
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<rom name="captain knick-knack (unl).bin" size="131072" crc="6b4fefb0" sha1="58942f42130c9536adbfe9994afcc7a4c36a3251" offset="0" />
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</dataarea>
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</part>
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</software>
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<!-- Flea War is missing -->
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<software name="expbrick">
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<description>Explosive Brick '94 (ripped from 4-in-1 4B-008)</description>
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<year>19??</year>
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<publisher>Sachen</publisher>
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<part name="cart" interface="gameboy_cart">
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<dataarea name="rom" size="32768">
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<rom name="explosive brick 94 (unl).bin" size="32768" crc="e5541ff5" sha1="81bac46c005183313117d3e9145122db6a3e6227" offset="0" />
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</dataarea>
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</part>
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</software>
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<software name="magmaze">
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<description>Magic Maze (ripped from 4-in-1 4B-008)</description>
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<year>19??</year>
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<publisher>Sachen</publisher>
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<part name="cart" interface="gameboy_cart">
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<dataarea name="rom" size="32768">
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<rom name="magic maze (unl).bin" size="32768" crc="b1acbd28" sha1="b44fd8a827dd3cffb4733c48d710d9a4e81b4314" offset="0" />
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</dataarea>
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</part>
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</software>
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<software name="zipball">
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<description>Zipball (ripped from 4-in-1 4B-009)</description>
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<year>19??</year>
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<publisher>Sachen</publisher>
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<part name="cart" interface="gameboy_cart">
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<feature name="slot" value="rom_mbc1" />
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<dataarea name="rom" size="65536">
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<rom name="zip ball (unl).bin" size="65536" crc="7279b3c4" sha1="45b954ff03b819effee8433d7d9799d994ce4c79" offset="0" />
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</dataarea>
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</part>
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</software>
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<!-- Gorilla is missing -->
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<software name="crazybur">
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<description>Crazy Burger (ripped from 4-in-1 4B-009)</description>
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<year>19??</year>
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<publisher>Sachen</publisher>
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<part name="cart" interface="gameboy_cart">
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<feature name="slot" value="rom_mbc1" />
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<dataarea name="rom" size="65536">
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<rom name="crazy burger (unl).bin" size="65536" crc="cd6e3136" sha1="7c100be43ed57b4011bfa5dceab244da8f987305" offset="0" />
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</dataarea>
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</part>
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</software>
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<software name="deep">
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<description>Deep - Final Mission (ripped from 4-in-1 4B-009)</description>
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<year>19??</year>
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<publisher>Sachen</publisher>
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<part name="cart" interface="gameboy_cart">
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<feature name="slot" value="rom_mbc1" />
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<dataarea name="rom" size="65536">
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<rom name="deep - final mission (unl).bin" size="65536" crc="44e97af9" sha1="70c90365f4aefe5e320f9459e63b2ba9bccbfa3c" offset="0" />
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</dataarea>
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</part>
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</software>
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<!-- Other Asian pirate carts -->
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<software name="smw7" cloneof="advisln2">
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@ -209,7 +209,7 @@ static const gb_slot slot_list[] =
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{ GB_MBC_MBC7, "rom_mbc7" },
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{ GB_MBC_TAMA5, "rom_tama5" },
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{ GB_MBC_MMM01, "rom_mmm01" },
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{ GB_MBC_M161, "rom_m161_m12" },
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{ GB_MBC_M161, "rom_m161" },
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{ GB_MBC_MBC3, "rom_huc1" }, // for now treat this as alias for MBC3
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{ GB_MBC_MBC3, "rom_huc3" }, // for now treat this as alias for MBC3
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{ GB_MBC_SACHEN1, "rom_sachen1" },
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@ -12,7 +12,7 @@
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enum
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{
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GB_MBC_NONE = 0, /* 32KB ROM - No memory bank controller */
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GB_MBC_MBC1, /* ~2MB ROM, 8KB RAM -or- 512KB ROM, 32KB RAM */
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GB_MBC_MBC1, /* 2MB ROM, 8KB RAM -or- 512KB ROM, 32KB RAM */
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GB_MBC_MBC2, /* 256KB ROM, 32KB RAM */
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GB_MBC_MBC3, /* 2MB ROM, 32KB RAM, RTC */
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GB_MBC_MBC4, /* ?? ROM, ?? RAM */
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@ -22,12 +22,12 @@ enum
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GB_MBC_HUC3, /* ?? ROM, ?? RAM - Hudson Soft Controller */
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GB_MBC_MBC6, /* ?? ROM, 32KB SRAM */
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GB_MBC_MBC7, /* ?? ROM, ?? RAM */
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GB_MBC_M161, /* ?? ROM, ?? RAM */
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GB_MBC_MMM01, /* ?? ROM, ?? RAM */
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GB_MBC_M161, /* 256kB ROM, No RAM */
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GB_MBC_MMM01, /* 8MB ROM, 128KB RAM */
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GB_MBC_WISDOM, /* ?? ROM, ?? RAM - Wisdom tree controller */
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GB_MBC_MBC1_COL, /* 1MB ROM, 32KB RAM - workaround for MBC1 on PCB that maps rom address lines differently */
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GB_MBC_SACHEN1, /* ?? ROM, ?? RAM - Sachen MMC-1 variant */
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GB_MBC_SACHEN2, /* ?? ROM, ?? RAM - Sachen MMC-2 variant */
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GB_MBC_SACHEN1, /* 4MB ROM, No RAM - Sachen MMC-1 variant */
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GB_MBC_SACHEN2, /* 4MB ROM, No RAM - Sachen MMC-2 variant */
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GB_MBC_YONGYONG, /* ?? ROM, ?? RAM - Appears in Sonic 3D Blast 5 pirate */
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GB_MBC_LASAMA, /* ?? ROM, ?? RAM - Appears in La Sa Ma */
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GB_MBC_ATVRACIN,
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@ -24,7 +24,7 @@ const device_type GB_ROM_MBC3 = &device_creator<gb_rom_mbc3_device>;
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const device_type GB_ROM_MBC5 = &device_creator<gb_rom_mbc5_device>;
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const device_type GB_ROM_MBC6 = &device_creator<gb_rom_mbc6_device>;
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const device_type GB_ROM_MBC7 = &device_creator<gb_rom_mbc7_device>;
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const device_type GB_ROM_M161_M12 = &device_creator<gb_rom_m161_device>;
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const device_type GB_ROM_M161 = &device_creator<gb_rom_m161_device>;
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const device_type GB_ROM_MMM01 = &device_creator<gb_rom_mmm01_device>;
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const device_type GB_ROM_SACHEN1 = &device_creator<gb_rom_sachen_mmc1_device>;
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const device_type GB_ROM_SACHEN2 = &device_creator<gb_rom_sachen_mmc2_device>;
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@ -44,14 +44,14 @@ gb_rom_mbc_device::gb_rom_mbc_device(const machine_config &mconfig, device_type
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}
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gb_rom_mbc1_device::gb_rom_mbc1_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
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: gb_rom_mbc_device(mconfig, type, name, tag, owner, clock, shortname, source), m_mode(0),
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: gb_rom_mbc_device(mconfig, type, name, tag, owner, clock, shortname, source), m_mode(MODE_16M_64k),
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m_mask(0x1f),
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m_shift(0)
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{
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}
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gb_rom_mbc1_device::gb_rom_mbc1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: gb_rom_mbc_device(mconfig, GB_ROM_MBC1, "GB MBC1 Carts", tag, owner, clock, "gb_rom_mbc1", __FILE__), m_mode(0),
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: gb_rom_mbc_device(mconfig, GB_ROM_MBC1, "GB MBC1 Carts", tag, owner, clock, "gb_rom_mbc1", __FILE__), m_mode(MODE_16M_64k),
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m_mask(0x1f),
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m_shift(0)
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{
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@ -88,12 +88,12 @@ gb_rom_mbc7_device::gb_rom_mbc7_device(const machine_config &mconfig, const char
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}
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gb_rom_m161_device::gb_rom_m161_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: gb_rom_mbc_device(mconfig, GB_ROM_M161_M12, "GB M161-M12 Carts", tag, owner, clock, "gb_rom_m161m12", __FILE__), m_base_bank(0)
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: gb_rom_mbc_device(mconfig, GB_ROM_M161, "GB M161 Carts", tag, owner, clock, "gb_rom_m161", __FILE__), m_base_bank(0), m_load_disable(0)
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{
|
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}
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|
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gb_rom_mmm01_device::gb_rom_mmm01_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: gb_rom_mbc_device(mconfig, GB_ROM_MMM01, "GB MMM01 Carts", tag, owner, clock, "gb_rom_mmm01", __FILE__), m_bank_mask(0), m_bank(0), m_reg(0)
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: gb_rom_mbc_device(mconfig, GB_ROM_MMM01, "GB MMM01 Carts", tag, owner, clock, "gb_rom_mmm01", __FILE__), m_romb(0), m_romb_nwe(0), m_ramb(0), m_ramb_nwe(0), m_mode(0), m_mode_nwe(0), m_map(0), m_mux(0)
|
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{
|
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}
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|
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@ -217,30 +217,38 @@ void gb_rom_m161_device::device_start()
|
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{
|
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shared_start();
|
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save_item(NAME(m_base_bank));
|
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save_item(NAME(m_load_disable));
|
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}
|
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|
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void gb_rom_m161_device::device_reset()
|
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{
|
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shared_reset();
|
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m_base_bank = 0;
|
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m_load_disable = 0;
|
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}
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|
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void gb_rom_mmm01_device::device_start()
|
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{
|
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shared_start();
|
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save_item(NAME(m_bank_mask));
|
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save_item(NAME(m_bank));
|
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save_item(NAME(m_reg));
|
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save_item(NAME(m_romb));
|
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save_item(NAME(m_romb_nwe));
|
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save_item(NAME(m_ramb));
|
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save_item(NAME(m_ramb_nwe));
|
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save_item(NAME(m_mode));
|
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save_item(NAME(m_mode_nwe));
|
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save_item(NAME(m_map));
|
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save_item(NAME(m_mux));
|
||||
}
|
||||
|
||||
void gb_rom_mmm01_device::device_reset()
|
||||
{
|
||||
m_latch_bank = 0x200 - 2;
|
||||
m_latch_bank2 = 0x200 - 1;
|
||||
m_ram_bank = 0;
|
||||
m_bank_mask = 0xff;
|
||||
m_bank = 0;
|
||||
m_reg = 0;
|
||||
m_romb = 0x000;
|
||||
m_romb_nwe = 0x00;
|
||||
m_ramb = 0x00;
|
||||
m_ramb_nwe = 0x00;
|
||||
m_mode = 0x00;
|
||||
m_map = 0x00;
|
||||
m_mux = 0x00;
|
||||
}
|
||||
|
||||
void gb_rom_sachen_mmc1_device::device_start()
|
||||
@ -424,7 +432,7 @@ WRITE8_MEMBER(gb_rom_mbc2_device::write_bank)
|
||||
READ8_MEMBER(gb_rom_mbc2_device::read_ram)
|
||||
{
|
||||
if (!m_ram.empty() && m_ram_enable)
|
||||
return m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x01ff)] | 0xF0;
|
||||
return m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x01ff)] | 0xf0;
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
@ -432,7 +440,7 @@ READ8_MEMBER(gb_rom_mbc2_device::read_ram)
|
||||
WRITE8_MEMBER(gb_rom_mbc2_device::write_ram)
|
||||
{
|
||||
if (!m_ram.empty() && m_ram_enable)
|
||||
m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x01ff)] = data & 0x0F;
|
||||
m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x01ff)] = data & 0x0f;
|
||||
}
|
||||
|
||||
|
||||
@ -664,24 +672,26 @@ WRITE8_MEMBER(gb_rom_mbc7_device::write_ram)
|
||||
}
|
||||
|
||||
|
||||
// M161-M12
|
||||
// M161
|
||||
|
||||
READ8_MEMBER(gb_rom_m161_device::read_rom)
|
||||
{
|
||||
if (offset < 0x4000)
|
||||
return m_rom[rom_bank_map[m_base_bank] * 0x4000 + offset];
|
||||
else
|
||||
return m_rom[rom_bank_map[m_base_bank] * 0x4000 + (offset & 0x3fff)];
|
||||
return m_rom[rom_bank_map[m_base_bank] * 0x4000 + (offset & 0x7fff)];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gb_rom_m161_device::write_bank)
|
||||
{
|
||||
switch (offset & 0xe000)
|
||||
// the mapper (74HC161A) only has data lines D2..D0
|
||||
data &= 0x07;
|
||||
|
||||
// A15 is connected to #LOAD and overwritten by QD (m_load_disable)
|
||||
switch (offset & 0x8000)
|
||||
{
|
||||
case 0x4000: // Base Bank Register
|
||||
m_base_bank = data << 1;
|
||||
case 0x0000: // Base Bank Register
|
||||
if (!m_load_disable)
|
||||
m_base_bank = data << 1;
|
||||
m_load_disable = 0x01;
|
||||
break;
|
||||
case 0x2000: // Tetris writes 1 here when selected...
|
||||
default:
|
||||
break;
|
||||
}
|
||||
@ -689,55 +699,111 @@ WRITE8_MEMBER(gb_rom_m161_device::write_bank)
|
||||
|
||||
|
||||
// MMM01
|
||||
// This mmm01 implementation is mostly guess work, no clue how correct it all is
|
||||
/* TODO: This implementation is wrong. Tauwasser
|
||||
*
|
||||
* Register 0: Map Latch, AA Mask, RAM Enable
|
||||
* Register 1: EA1..EA0, RA18..RA14
|
||||
* Register 2: ??, AA18..AA15, AA14..AA13
|
||||
* Register 3: AA Multiplex, RA Mask, ???, MBC1 Mode
|
||||
*
|
||||
*/
|
||||
|
||||
READ8_MEMBER(gb_rom_mmm01_device::read_rom)
|
||||
{
|
||||
if (offset < 0x4000)
|
||||
return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + offset];
|
||||
else
|
||||
return m_rom[rom_bank_map[m_latch_bank2] * 0x4000 + (offset & 0x3fff)];
|
||||
|
||||
UINT16 romb = m_romb & ~m_romb_nwe;
|
||||
UINT16 romb_base = m_romb & (0x1e0 | m_romb_nwe);
|
||||
UINT8 ramb_masked = ((offset & 0x4000) | m_mode ? m_ramb : m_ramb & ~0x03);
|
||||
|
||||
// zero-adjust RA18..RA14
|
||||
romb = (romb ? romb : 0x01);
|
||||
// if unmapped, force
|
||||
romb = (m_map ? romb : 0x01);
|
||||
|
||||
// RB 0 logic
|
||||
if (!(offset & 0x4000))
|
||||
romb = 0x00;
|
||||
|
||||
// combine with base
|
||||
romb |= romb_base;
|
||||
|
||||
// multiplex with AA14..AA13
|
||||
if (m_mux)
|
||||
romb = (romb & ~0x60) | ((ramb_masked & 0x03) << 5);
|
||||
|
||||
// if unmapped, force
|
||||
if (!m_map)
|
||||
romb |= 0x1fe;
|
||||
|
||||
return m_rom[rom_bank_map[romb] * 0x4000 + (offset & 0x3fff)];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gb_rom_mmm01_device::write_bank)
|
||||
{
|
||||
if (offset < 0x2000)
|
||||
// the mapper only has data lines D6..D0
|
||||
data &= 0x7f;
|
||||
|
||||
// the mapper only uses inputs A15..A13
|
||||
switch (offset & 0xe000)
|
||||
{
|
||||
if (data & 0x40)
|
||||
{
|
||||
m_latch_bank = m_reg;
|
||||
m_latch_bank2 = m_latch_bank + m_bank;
|
||||
}
|
||||
case 0x0000: // Map Latch, AA #WE, RAM Enable
|
||||
if (!m_map) {
|
||||
m_ramb_nwe = (data & (0x30)) >> 4;
|
||||
m_map = (data & 0x40);
|
||||
}
|
||||
m_ram_enable = ((data & 0x0f) == 0x0a) ? 1 : 0;
|
||||
break;
|
||||
case 0x2000: // RA20..RA19 RA18..RA14
|
||||
if (!m_map)
|
||||
m_romb = (m_romb & ~0x60) | (data & 0x60);
|
||||
|
||||
m_romb = (m_romb & (~0x1f | m_romb_nwe)) | (data & (0x1f & ~m_romb_nwe));
|
||||
break;
|
||||
case 0x4000: // Mode #WE, RA22..RA21, AA16..AA15, AA14..AA13
|
||||
if (!m_map) {
|
||||
m_mode_nwe = data & 0x40;
|
||||
m_romb = (m_romb & ~0x180) | ((data & 0x30) << 3);
|
||||
m_ramb = (m_ramb & ~0x0c) | (data & 0x0c);
|
||||
}
|
||||
|
||||
m_ramb = (m_ramb & (~0x03 | m_ramb_nwe)) | (data & (0x03 & ~m_ramb_nwe));
|
||||
break;
|
||||
case 0x6000: // Mux, RA18..RA15 #WE/Mask, ???, MBC1 Mode
|
||||
if (!m_map) {
|
||||
m_mux = data & 0x40;
|
||||
// m_romb_nwe is aligned to RA14, hence >> 1 instead of >> 2
|
||||
m_romb_nwe = (data & 0x3c) >> 1;
|
||||
}
|
||||
|
||||
if (!m_mode_nwe)
|
||||
m_mode = data & 0x01;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
else if (offset < 0x4000)
|
||||
}
|
||||
|
||||
READ8_MEMBER(gb_rom_mmm01_device::read_ram)
|
||||
{
|
||||
UINT8 ramb_masked = ((offset & 0x4000) | m_mode ? m_ramb : m_ramb & ~0x03);
|
||||
UINT8 ramb = ramb_masked;
|
||||
|
||||
// multiplex with RA20..RA19
|
||||
if (m_mux)
|
||||
ramb = (ramb & ~0x03) | ((m_romb & 0x60) >> 5);
|
||||
|
||||
if (!m_ram.empty() && m_ram_enable)
|
||||
{
|
||||
m_reg = data & ((m_rom_size / 0x4000) - 1);
|
||||
m_bank = m_reg & m_bank_mask;
|
||||
if (m_bank == 0)
|
||||
m_bank = 1;
|
||||
m_latch_bank2 = m_latch_bank + m_bank;
|
||||
return m_ram[ram_bank_map[ramb] * 0x2000 + (offset & 0x1fff)];
|
||||
}
|
||||
else if (offset < 0x6000)
|
||||
logerror("0x%04X: write 0x%02X to 0x%04X\n", space.device().safe_pc(), data, offset);
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gb_rom_mmm01_device::write_ram)
|
||||
{
|
||||
UINT8 ramb_masked = ((offset & 0x4000) | m_mode ? m_ramb : m_ramb & ~0x03);
|
||||
UINT8 ramb = ramb_masked;
|
||||
|
||||
// multiplex with RA20..RA19
|
||||
if (m_mux)
|
||||
ramb = (ramb & ~0x03) | ((m_romb & 0x60) >> 5);
|
||||
|
||||
if (!m_ram.empty() && m_ram_enable)
|
||||
{
|
||||
logerror("0x%04X: write 0x%02X to 0x%04X\n", space.device().safe_pc(), data, offset);
|
||||
/* Not sure if this is correct, Taito Variety Pack sets these values */
|
||||
/* Momotarou Collection 2 writes 01 and 21 here */
|
||||
switch (data)
|
||||
{
|
||||
case 0x30: m_bank_mask = 0x07; break;
|
||||
case 0x38: m_bank_mask = 0x03; break;
|
||||
default: m_bank_mask = 0xff; break;
|
||||
}
|
||||
m_ram[ram_bank_map[ramb] * 0x2000 + (offset & 0x1fff)] = data;
|
||||
}
|
||||
}
|
||||
|
||||
@ -759,8 +825,8 @@ READ8_MEMBER(gb_rom_sachen_mmc1_device::read_rom)
|
||||
off_edit |= 0x80;
|
||||
|
||||
/* Header Un-Scramble */
|
||||
if ((off_edit & 0xFF00) == 0x0100) {
|
||||
off_edit &= 0xFFAC;
|
||||
if ((off_edit & 0xff00) == 0x0100) {
|
||||
off_edit &= 0xffac;
|
||||
off_edit |= ((offset >> 6) & 0x01) << 0;
|
||||
off_edit |= ((offset >> 4) & 0x01) << 1;
|
||||
off_edit |= ((offset >> 1) & 0x01) << 4;
|
||||
@ -778,7 +844,7 @@ WRITE8_MEMBER(gb_rom_sachen_mmc1_device::write_bank)
|
||||
{
|
||||
/* Only A15..A6, A4, A1..A0 are connected */
|
||||
/* We only decode upper three bits */
|
||||
switch ((offset & 0xFFD3) & 0xE000)
|
||||
switch ((offset & 0xffd3) & 0xe000)
|
||||
{
|
||||
case 0x0000: /* Base ROM Bank Register */
|
||||
|
||||
@ -838,8 +904,8 @@ READ8_MEMBER(gb_rom_sachen_mmc2_device::read_rom)
|
||||
off_edit |= 0x80;
|
||||
|
||||
/* Header Un-Scramble */
|
||||
if ((off_edit & 0xFF00) == 0x0100) {
|
||||
off_edit &= 0xFFAC;
|
||||
if ((off_edit & 0xff00) == 0x0100) {
|
||||
off_edit &= 0xffac;
|
||||
off_edit |= ((offset >> 6) & 0x01) << 0;
|
||||
off_edit |= ((offset >> 4) & 0x01) << 1;
|
||||
off_edit |= ((offset >> 1) & 0x01) << 4;
|
||||
@ -859,7 +925,7 @@ READ8_MEMBER(gb_rom_sachen_mmc2_device::read_ram)
|
||||
m_unlock_cnt = 0x00;
|
||||
m_mode = MODE_LOCKED_CGB;
|
||||
}
|
||||
return 0xFF;
|
||||
return 0xff;
|
||||
|
||||
}
|
||||
|
||||
|
@ -172,6 +172,7 @@ public:
|
||||
virtual DECLARE_WRITE8_MEMBER(write_ram) override { }
|
||||
|
||||
UINT8 m_base_bank;
|
||||
UINT8 m_load_disable;
|
||||
};
|
||||
|
||||
// ======================> gb_rom_mmm01_device
|
||||
@ -188,7 +189,17 @@ public:
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_bank) override;
|
||||
UINT8 m_bank_mask, m_bank, m_reg;
|
||||
virtual DECLARE_READ8_MEMBER(read_ram) override;
|
||||
virtual DECLARE_WRITE8_MEMBER(write_ram) override;
|
||||
|
||||
UINT16 m_romb;
|
||||
UINT8 m_romb_nwe;
|
||||
UINT8 m_ramb;
|
||||
UINT8 m_ramb_nwe;
|
||||
UINT8 m_mode;
|
||||
UINT8 m_mode_nwe;
|
||||
UINT8 m_map;
|
||||
UINT8 m_mux;
|
||||
};
|
||||
|
||||
// ======================> gb_rom_sachen_mmc1_device
|
||||
@ -378,7 +389,7 @@ extern const device_type GB_ROM_MBC4;
|
||||
extern const device_type GB_ROM_MBC5;
|
||||
extern const device_type GB_ROM_MBC6;
|
||||
extern const device_type GB_ROM_MBC7;
|
||||
extern const device_type GB_ROM_M161_M12;
|
||||
extern const device_type GB_ROM_M161;
|
||||
extern const device_type GB_ROM_MMM01;
|
||||
extern const device_type GB_ROM_SACHEN1;
|
||||
extern const device_type GB_ROM_SACHEN2;
|
||||
|
@ -650,7 +650,7 @@ static SLOT_INTERFACE_START(gb_cart)
|
||||
SLOT_INTERFACE_INTERNAL("rom_mbc7", GB_ROM_MBC7)
|
||||
SLOT_INTERFACE_INTERNAL("rom_tama5", GB_ROM_TAMA5)
|
||||
SLOT_INTERFACE_INTERNAL("rom_mmm01", GB_ROM_MMM01)
|
||||
SLOT_INTERFACE_INTERNAL("rom_m161_m12",GB_ROM_M161_M12)
|
||||
SLOT_INTERFACE_INTERNAL("rom_m161", GB_ROM_M161)
|
||||
SLOT_INTERFACE_INTERNAL("rom_sachen1", GB_ROM_SACHEN1)
|
||||
SLOT_INTERFACE_INTERNAL("rom_sachen2", GB_ROM_SACHEN2)
|
||||
SLOT_INTERFACE_INTERNAL("rom_wisdom", GB_ROM_WISDOM)
|
||||
|
Loading…
Reference in New Issue
Block a user