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https://github.com/holub/mame
synced 2025-06-05 20:33:45 +03:00
Procrastinating this semi-fix from too much time, 1/2 frames in Samurai Showdown 64 games are now visible, nw
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@ -650,7 +650,7 @@ READ32_MEMBER(hng64_state::fight_io_r)
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switch (offset*4)
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{
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case 0x000: return 0x00000400;
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case 0x000: return 0x00000400;
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case 0x004: return ioport("SYSTEM")->read();
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case 0x008: return ioport("P1_P2")->read();
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case 0x600: return m_no_machine_error_code;
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@ -914,16 +914,17 @@ WRITE32_MEMBER(hng64_state::dl_upload_w)
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machine().scheduler().timer_set(m_maincpu->cycles_to_attotime(0x200*8), timer_expired_delegate(FUNC(hng64_state::hng64_3dfifo_processed),this));
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}
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/* Note: Samurai Shodown games never calls bit 1, so it can't be framebuffer clear. It also calls bit 3 at start-up, meaning unknown */
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WRITE32_MEMBER(hng64_state::dl_control_w) // This handles framebuffers
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{
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if(data & 2) // clear current buffer
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{
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clear3d();
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}
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//if(data & 2) // swap buffers
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//{
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// clear3d();
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//}
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// printf("%02x\n",data);
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// printf("%02x\n",data);
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// if(data & 1) // swap buffers?
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// if(data & 1) // process DMA from 3d FIFO to framebuffer
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// if(data & 4) // reset buffer count
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}
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@ -983,11 +984,11 @@ READ32_MEMBER(hng64_state::tcram_r)
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*/
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READ32_MEMBER(hng64_state::unk_vreg_r)
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{
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// m_unk_vreg_toggle^=0x8000;
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// m_unk_vreg_toggle^=0x8000;
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return 0;
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// return ++m_unk_vreg_toggle;
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// return ++m_unk_vreg_toggle;
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}
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/***** I don't think there is a soundram2, having it NOT hooked up causes xrally to copy the sound program to the expected location, see memory map note *****/
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@ -1892,11 +1893,11 @@ TIMER_DEVICE_CALLBACK_MEMBER(hng64_state::hng64_irq)
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switch(scanline)
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{
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case 224*2: m_set_irq(0x0001); break; // lv 0 vblank irq
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// case 0*2: m_set_irq(0x0002); break; // lv 1
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// case 32*2: m_set_irq(0x0008); break; // lv 2
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// case 64*2: m_set_irq(0x0008); break; // lv 2
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case 128*2: m_set_irq(0x0800); break; // lv 11 network irq?
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case 224*2: m_set_irq(0x0001); break; // lv 0 vblank irq
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// case 0*2: m_set_irq(0x0002); break; // lv 1
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// case 32*2: m_set_irq(0x0008); break; // lv 2
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// case 64*2: m_set_irq(0x0008); break; // lv 2
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case 128*2: m_set_irq(0x0800); break; // lv 11 network irq?
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}
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}
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@ -1925,11 +1926,11 @@ void hng64_state::machine_reset()
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m_audiocpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
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m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
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// m_comm->set_input_line(INPUT_LINE_RESET, PULSE_LINE); // reset the CPU and let 'er rip
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// m_comm->set_input_line(INPUT_LINE_RESET, PULSE_LINE); // reset the CPU and let 'er rip
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// m_comm->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); // hold on there pardner...
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// "Display List" init - ugly
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// m_activeBuffer = 0;
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// m_activeBuffer = 0;
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/* For simulate MCU stepping */
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m_mcu_fake_time = 0;
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@ -1636,8 +1636,8 @@ UINT32 hng64_state::screen_update_hng64(screen_device &screen, bitmap_rgb32 &bit
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void hng64_state::screen_eof_hng64(screen_device &screen, bool state)
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{
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// rising edge
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//if (state)
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// clear3d();
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if (state)
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clear3d();
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}
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void hng64_state::video_start()
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