c140: fix regression with namcos2 assault engine noise

This commit is contained in:
hap 2021-06-05 21:47:21 +02:00
parent d3397e05d6
commit 80f1aecc8e
3 changed files with 9 additions and 13 deletions

View File

@ -467,11 +467,11 @@ inline u8 c140_device::keyon_status_read(u16 offset)
{
m_stream->update();
C140_VOICE const &v = m_voi[offset >> 4];
// suzuka 8 hours and final lap games reads from here,
// expecting bit 6 to be an inprogress sample flag.
// suzuka 8 hours and final lap games read from here, expecting bit 6 to be an in-progress sample flag.
// four trax also expects bit 4 high for some specific channels to make engine noises to work properly
// (sounds kinda bogus when player crashes in an object and jump spin, needs real HW verification)
return (v.key ? 0x40 : 0x00) | (v.mode & 0x3f);
return (v.key ? 0x40 : 0x00) | (m_REG[offset] & 0x3f);
}
@ -552,13 +552,9 @@ void c140_device::c140_w(offs_t offset, u8 data)
u8 c219_device::c219_r(offs_t offset)
{
offset &= 0x1ff;
// assume same as c140
// TODO: what happens here on reading unmapped voice regs?
if ((offset & 0xf) == 0x5)
return keyon_status_read(offset);
return m_REG[offset];
return c140_r(offset);
}

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@ -79,6 +79,8 @@ protected:
virtual const inline bool ch_mulaw(C140_VOICE *v) { return BIT(v->mode, 3); }
// bit 6 used, unknown
u8 keyon_status_read(u16 offset);
TIMER_CALLBACK_MEMBER(int1_on);
devcb_write_line m_int1_callback;
@ -97,8 +99,6 @@ protected:
C140_VOICE m_voi[MAX_VOICE];
emu_timer *m_int1_timer;
u8 keyon_status_read(u16 offset);
};
class c219_device : public c140_device

View File

@ -61,9 +61,9 @@
or manually with the command RUN "<shortname of program in list>"
As for the CC-40+, the product was finalized, but in the end it wasn't released.
The hardware is very similar to CC-40. The main differences are the CPU:
a TMS70C40 (twice larger internal ROM), and a cassette port separate from Hexbus.
The controller chip is a TI TP0373 this time, it appears that the basic functionality
The hardware is very similar to CC-40. The main differences are a TMS70C40 CPU
(twice larger internal ROM), and a cassette port separate from Hexbus. The
controller chip is a TI TP0373 this time, it appears that the basic functionality
is the same as the one by AMI. Like the CC-40, it had either 6KB or 18KB RAM.
The CC-40+ cassette device number is 1, eg. SAVE"1.FILENAME" to save, and