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https://github.com/holub/mame
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apple2: fixed IIe/IIc self-test regression, fixed IIe LC reset state. [R. Belmont]
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6febbaeb68
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@ -69,7 +69,6 @@ void a2bus_ramcard_device::do_io(int offset, bool write)
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{
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int old_inh_state = m_inh_state;
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m_inh_state = INH_NONE;
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m_dxxx_bank = 0;
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switch (offset)
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@ -88,10 +87,12 @@ void a2bus_ramcard_device::do_io(int offset, bool write)
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{
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m_writecnt++;
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}
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m_inh_state &= ~INH_READ;
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break;
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case 0x2: case 0xa: case 0x6: case 0xe:
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m_writecnt = 0;
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m_inh_state = INH_NONE;
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break;
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case 0x3: case 0xb: case 0x7: case 0xf:
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@ -103,13 +104,14 @@ void a2bus_ramcard_device::do_io(int offset, bool write)
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{
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m_writecnt++;
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}
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m_inh_state = INH_READ;
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m_inh_state |= INH_READ;
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break;
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}
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if (m_writecnt >= 2)
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{
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m_inh_state |= INH_WRITE;
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m_writecnt = 2;
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}
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if (!(offset & 8))
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@ -757,7 +757,9 @@ void apple2e_state::machine_reset()
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m_lcram = false;
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m_lcram2 = true;
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m_lcwriteenable = true;
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m_wrtcount = 0;
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m_wrtcount = 2;
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// set bank device to read ROM, write enabled
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m_lcbank->set_bank(0);
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m_exp_bankhior = 0xf0;
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@ -1013,12 +1015,12 @@ void apple2e_state::lc_update(int offset, bool write)
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m_lcram = false;
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m_lcram2 = false;
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m_lcwriteenable = false;
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switch (offset)
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{
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case 0x0: case 0x8: case 0x4: case 0xc:
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m_wrtcount = 0;
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m_lcwriteenable = false;
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m_lcram = true;
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break;
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@ -1035,6 +1037,7 @@ void apple2e_state::lc_update(int offset, bool write)
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case 0x2: case 0xa: case 0x6: case 0xe:
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m_wrtcount = 0;
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m_lcwriteenable = false;
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break;
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case 0x3: case 0xb: case 0x7: case 0xf:
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@ -1053,6 +1056,7 @@ void apple2e_state::lc_update(int offset, bool write)
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if (m_wrtcount >= 2)
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{
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m_lcwriteenable = true;
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m_wrtcount = 2;
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}
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if (!(offset & 8))
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@ -1080,9 +1084,10 @@ void apple2e_state::lc_update(int offset, bool write)
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}
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#if 0
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printf("LC: new state %c%c dxxx=%04x altzp=%d\n",
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printf("LC: new state %c%c (%d) dxxx=%04x altzp=%d\n",
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m_lcram ? 'R' : 'x',
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m_lcwriteenable ? 'W' : 'x',
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m_wrtcount,
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m_lcram2 ? 0x1000 : 0x0000,
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m_altzp);
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#endif
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