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a2ssc: Add DIP switch locations and correct their bit assignments; mirror register addresses

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This commit is contained in:
AJR 2020-12-29 22:05:53 -05:00
parent 741d866c08
commit 810a143a40
2 changed files with 57 additions and 57 deletions
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110
src/devices/bus/a2bus/a2ssc.cpp
View File

@ -34,7 +34,7 @@ ROM_END
static INPUT_PORTS_START( ssc )
PORT_START("DSW1")
PORT_DIPNAME( 0xf0, 0xf0, "Baud rate" )
PORT_DIPNAME( 0xf0, 0xe0, "Baud Rate" ) PORT_DIPLOCATION("SW1:4,3,2,1")
PORT_DIPSETTING( 0x00, "Undefined/115200" )
PORT_DIPSETTING( 0x10, "50" )
PORT_DIPSETTING( 0x20, "75" )
@ -51,36 +51,48 @@ static INPUT_PORTS_START( ssc )
PORT_DIPSETTING( 0xd0, "7200" )
PORT_DIPSETTING( 0xe0, "9600" )
PORT_DIPSETTING( 0xf0, "19200" )
PORT_DIPNAME( 0x0c, 0x00, "Mode" )
PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_DIPNAME( 0x03, 0x00, "Mode" ) PORT_DIPLOCATION("SW1:6,5")
PORT_DIPSETTING( 0x00, "Communications Mode" )
PORT_DIPSETTING( 0x04, "SIC P8 Emulation Mode" )
PORT_DIPSETTING( 0x08, "Printer Mode" )
PORT_DIPSETTING( 0x0c, "SIC P8A Emulation Mode" )
PORT_DIPNAME( 0x01, 0x00, "Clear To Send" )
PORT_DIPSETTING( 0x00, "Normal Clear To Send" )
PORT_DIPSETTING( 0x01, "Secondary Clear To Send" )
PORT_DIPSETTING( 0x01, "SIC P8 Emulation Mode" )
PORT_DIPSETTING( 0x02, "Printer Mode" )
PORT_DIPSETTING( 0x03, "SIC P8A Emulation Mode" )
PORT_START("DSW2")
PORT_DIPNAME( 0xc0, 0x00, "Format" )
PORT_DIPSETTING( 0x00, "8 data, 1 stop")
PORT_DIPSETTING( 0x40, "7 data, 1 stop")
PORT_DIPSETTING( 0x80, "8 data, 2 stop")
PORT_DIPSETTING( 0xc0, "7 data, 2 stop")
PORT_DIPNAME( 0x30, 0x00, "Parity" )
PORT_DIPSETTING( 0x00, "None")
PORT_DIPSETTING( 0x10, "Odd")
PORT_DIPSETTING( 0x30, "Even")
PORT_DIPNAME( 0x08, 0x08, "End of Line" )
PORT_DIPNAME( 0x80, 0x00, "Stop Bits" ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x00, "1")
PORT_DIPSETTING( 0x80, "2")
PORT_DIPNAME( 0x20, 0x00, "Data Bits" ) PORT_DIPLOCATION("SW2:2") PORT_CONDITION("DSW1", 0x03, NOTEQUALS, 0x02)
PORT_DIPSETTING( 0x20, "7")
PORT_DIPSETTING( 0x00, "8")
PORT_DIPNAME( 0x20, 0x00, "Delay After CR" ) PORT_DIPLOCATION("SW2:2") PORT_CONDITION("DSW1", 0x03, EQUALS, 0x02)
PORT_DIPSETTING( 0x20, DEF_STR(None))
PORT_DIPSETTING( 0x00, "1/4 sec")
PORT_BIT( 0x50, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_DIPNAME( 0x0c, 0x00, "Parity" ) PORT_DIPLOCATION("SW2:4,3") PORT_CONDITION("DSW1", 0x03, NOTEQUALS, 0x02)
PORT_DIPSETTING( 0x00, DEF_STR(None))
PORT_DIPSETTING( 0x08, "None (2)")
PORT_DIPSETTING( 0x04, "Odd")
PORT_DIPSETTING( 0x0c, "Even")
PORT_DIPNAME( 0x0c, 0x00, "Line Width" ) PORT_DIPLOCATION("SW2:4,3") PORT_CONDITION("DSW1", 0x03, EQUALS, 0x02)
PORT_DIPSETTING( 0x00, "40 Characters")
PORT_DIPSETTING( 0x04, "72 Characters")
PORT_DIPSETTING( 0x08, "80 Characters")
PORT_DIPSETTING( 0x0c, "132 Characters")
PORT_DIPNAME( 0x02, 0x02, "End of Line" ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x00, "Add LF after CR")
PORT_DIPSETTING( 0x08, "Don't add LF after CR")
PORT_DIPSETTING( 0x02, "Don't add LF after CR")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER(SSC_RS232_TAG, rs232_port_device, cts_r)
PORT_DIPNAME( 0x04, 0x04, "Interrupts" )
PORT_DIPSETTING( 0x00, "On")
PORT_DIPSETTING( 0x04, "Off")
PORT_START("DSWX") // Non-memory-mapped DIP switches
PORT_DIPNAME( 0x04, 0x04, "Interrupts" ) PORT_DIPLOCATION("SW2:6")
PORT_DIPSETTING( 0x04, DEF_STR(Off))
PORT_DIPSETTING( 0x00, DEF_STR(On))
PORT_DIPNAME( 0x02, 0x00, "DTR Connected" ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x00, DEF_STR(On))
PORT_DIPNAME( 0x01, 0x00, "Clear To Send" ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x00, "Normal Clear To Send" )
PORT_DIPSETTING( 0x01, "Secondary Clear To Send" )
INPUT_PORTS_END
//-------------------------------------------------
@ -102,6 +114,7 @@ void a2bus_ssc_device::device_add_mconfig(machine_config &config)
m_acia->set_xtal(1.8432_MHz_XTAL);
m_acia->irq_handler().set(FUNC(a2bus_ssc_device::acia_irq_w));
m_acia->txd_handler().set(SSC_RS232_TAG, FUNC(rs232_port_device::write_txd));
m_acia->dtr_handler().set(SSC_RS232_TAG, FUNC(rs232_port_device::write_dtr));
rs232_port_device &rs232(RS232_PORT(config, SSC_RS232_TAG, default_rs232_devices, nullptr));
rs232.rxd_handler().set(m_acia, FUNC(mos6551_device::write_rxd));
@ -133,8 +146,9 @@ a2bus_ssc_device::a2bus_ssc_device(const machine_config &mconfig, device_type ty
device_a2bus_card_interface(mconfig, *this),
m_dsw1(*this, "DSW1"),
m_dsw2(*this, "DSW2"),
m_acia(*this, SSC_ACIA_TAG), m_rom(nullptr),
m_started(false)
m_dswx(*this, "DSWX"),
m_acia(*this, SSC_ACIA_TAG),
m_rom(*this, SSC_ROM_REGION)
{
}
@ -144,12 +158,10 @@ a2bus_ssc_device::a2bus_ssc_device(const machine_config &mconfig, device_type ty
void a2bus_ssc_device::device_start()
{
m_rom = machine().root_device().memregion(this->subtag(SSC_ROM_REGION).c_str())->base();
}
void a2bus_ssc_device::device_reset()
{
m_started = true;
}
/*-------------------------------------------------
@ -178,22 +190,17 @@ uint8_t a2bus_ssc_device::read_c0nx(uint8_t offset)
{
// dips at C0n1/C0n2, ACIA at C0n8/9/A/B
switch (offset)
if (BIT(offset, 3))
return m_acia->read(offset & 3);
else
{
case 1:
return m_dsw1->read();
case 2:
return m_dsw2->read();
case 8:
case 9:
case 0xa:
case 0xb:
return m_acia->read(offset-8);
uint8_t buffer = 0xff;
if (!BIT(offset, 1))
buffer &= m_dsw1->read();
if (!BIT(offset, 0))
buffer &= m_dsw2->read();
return buffer;
}
return 0;
}
/*-------------------------------------------------
@ -202,22 +209,15 @@ uint8_t a2bus_ssc_device::read_c0nx(uint8_t offset)
void a2bus_ssc_device::write_c0nx(uint8_t offset, uint8_t data)
{
switch (offset)
{
case 8:
case 9:
case 0xa:
case 0xb:
m_acia->write(offset-8, data);
break;
}
if (BIT(offset, 3))
m_acia->write(offset & 3, data);
}
WRITE_LINE_MEMBER( a2bus_ssc_device::acia_irq_w )
{
if (m_started)
if (machine().ioport().safe_to_read())
{
if (!(m_dsw2->read() & 4))
if (!(m_dswx->read() & 4))
{
if (state)
{

4
src/devices/bus/a2bus/a2ssc.h
View File

@ -41,14 +41,14 @@ protected:
virtual uint8_t read_c800(uint16_t offset) override;
required_ioport m_dsw1, m_dsw2;
required_ioport m_dswx;
required_device<mos6551_device> m_acia;
private:
DECLARE_WRITE_LINE_MEMBER( acia_irq_w );
uint8_t *m_rom;
bool m_started;
required_region_ptr<uint8_t> m_rom;
};
// device type definition