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bus/pci: convert opti82c861 to a pci_slot, add basic OpenHCI values (#11940)

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Angelo Salese 2024-01-17 02:47:07 +01:00 committed by GitHub
parent 8d4b2e2916
commit 81a6a18e47
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GPG Key ID: B5690EEEBB952194
7 changed files with 91 additions and 67 deletions
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2
scripts/src/bus.lua
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@ -5442,5 +5442,7 @@ if (BUSES["PCI"]~=null) then
MAME_DIR .. "src/devices/bus/pci/sonicvibes.h",
MAME_DIR .. "src/devices/bus/pci/rtl8029as_pci.cpp",
MAME_DIR .. "src/devices/bus/pci/rtl8029as_pci.h",
MAME_DIR .. "src/devices/bus/pci/opti82c861.cpp",
MAME_DIR .. "src/devices/bus/pci/opti82c861.h",
}
end

12
scripts/src/machine.lua
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@ -4640,18 +4640,6 @@ if (MACHINES["GEN_FIFO"]~=null) then
}
end
---------------------------------------------------
--
--@src/devices/machine/opti82c861.h,MACHINES["OPTI82C861"] = true
---------------------------------------------------
if (MACHINES["OPTI82C861"]~=null) then
files {
MAME_DIR .. "src/devices/machine/opti82c861.cpp",
MAME_DIR .. "src/devices/machine/opti82c861.h",
}
end
---------------------------------------------------
--
--@src/devices/machine/output_latch.h,MACHINES["OUTPUT_LATCH"] = true

81
src/devices/bus/pci/opti82c861.cpp Normal file
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@ -0,0 +1,81 @@
// license:BSD-3-Clause
// copyright-holders: R. Belmont
/*
OPTi 82C861 "FireLink" USB 1.1 OHCI controller
Skeleton by R. Belmont
*/
#include "emu.h"
#include "opti82c861.h"
#define LOG_REGISTERS (1U << 1)
#define VERBOSE (LOG_GENERAL)
#include "logmacro.h"
DEFINE_DEVICE_TYPE(OPTI_82C861, opti_82c861_device, "opti82c861", "OPTi 82C861 \"FireLink\" USB OHCI controller")
opti_82c861_device::opti_82c861_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
: pci_card_device(mconfig, type, tag, owner, clock)
{
}
opti_82c861_device::opti_82c861_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: opti_82c861_device(mconfig, OPTI_82C861, tag, owner, clock)
{
}
void opti_82c861_device::mem_map(address_map& map)
{
// HcRevision: OpenHCI v1.0 with legacy support
map(0x000, 0x003).lr32(NAME([]() { return 0x00000110; }));
map(0x048, 0x04b).lrw32(
NAME([this] () {
// 2 downstream ports (always?)
return (m_HcRhDescriptorA & 0xff001b00) | 0x02;
}),
NAME([this] (offs_t offset, u32 data, u32 mem_mask) {
COMBINE_DATA(&m_HcRhDescriptorA);
if (ACCESSING_BITS_24_31)
LOG("HcRhDescriptorA: set Power-On to Power-Good Time %d msec\n", (m_HcRhDescriptorA >> 24) * 2);
if (ACCESSING_BITS_8_15)
LOG("HcRhDescriptorA: set status %02x\n", (m_HcRhDescriptorA & 0x1b00) >> 8);
})
);
}
void opti_82c861_device::config_map(address_map &map)
{
pci_card_device::config_map(map);
// map(0x4e, 0x4e) i2c Control Register
// map(0x50, 0x50) PCI Host Feature Control Register
// map(0x51, 0x51) Interrupt Assignment Register
// map(0x52, 0x52) Strap Option Enable
// map(0x54, 0x57) IRQ Driveback Address Register
// map(0x6c, 0x6f) Test Mode Enable Register
}
void opti_82c861_device::device_start()
{
pci_card_device::device_start();
set_ids(0x1045c861, 0x10, 0x0c0310, 0);
revision = 0x10;
add_map(0x1000, M_MEM, FUNC(opti_82c861_device::mem_map)); // 4KiB memory map
command = 0;
// fast back-to-back, medium DEVSEL#
status = 0x0280;
intr_pin = 1;
intr_line = 0;
}
void opti_82c861_device::device_reset()
{
pci_card_device::device_reset();
m_HcRhDescriptorA = 0x01000000;
}
void opti_82c861_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space,
uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space)
{
}

6
src/devices/machine/opti82c861.h → src/devices/bus/pci/opti82c861.h
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@ -6,9 +6,9 @@
#pragma once
#include "machine/pci.h"
#include "pci_slot.h"
class opti_82c861_device : public pci_device
class opti_82c861_device : public pci_card_device
{
public:
opti_82c861_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
@ -18,12 +18,14 @@ public:
protected:
virtual void device_start() override;
virtual void device_reset() override;
void map_extra(u64 memory_window_start, u64 memory_window_end, u64 memory_offset, address_space *memory_space,
u64 io_window_start, u64 io_window_end, u64 io_offset, address_space *io_space) override;
void config_map(address_map &map) override;
private:
u32 m_HcRhDescriptorA = 0;
};
DECLARE_DEVICE_TYPE(OPTI_82C861, opti_82c861_device)

3
src/devices/bus/pci/pci_slot.cpp
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@ -15,6 +15,7 @@
#include "sonicvibes.h"
#include "sw1000xg.h"
#include "rtl8029as_pci.h"
#include "opti82c861.h"
DEFINE_DEVICE_TYPE(PCI_SLOT, pci_slot_device, "pci_slot", "PCI extension motherboard port")
@ -103,6 +104,8 @@ void pci_cards(device_slot_interface &device)
// 0x0a - docking stations
// 0x0b - processors
// 0x0c - Serial Bus controllers
device.option_add("opti82c861", OPTI_82C861);
// 0x0d - wireless controllers
// 0x0e - Intelligent I/O controllers
// 0x0f - Satellite Communication controllers

52
src/devices/machine/opti82c861.cpp
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@ -1,52 +0,0 @@
// license:BSD-3-Clause
// copyright-holders: R. Belmont
/*
OPTi 82C861 "FireLink" USB 1.1 OHCI controller
Skeleton by R. Belmont
*/
#include "emu.h"
#include "opti82c861.h"
#define LOG_REGISTERS (1U << 1)
#define VERBOSE (0)
#include "logmacro.h"
DEFINE_DEVICE_TYPE(OPTI_82C861, opti_82c861_device, "opti82c861", "OPTi 82C861 USB OHCI controller")
opti_82c861_device::opti_82c861_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
: pci_device(mconfig, type, tag, owner, clock)
{
}
opti_82c861_device::opti_82c861_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: opti_82c861_device(mconfig, OPTI_82C861, tag, owner, clock)
{
}
void opti_82c861_device::mem_map(address_map& map)
{
}
void opti_82c861_device::config_map(address_map &map)
{
pci_device::config_map(map);
}
void opti_82c861_device::device_start()
{
pci_device::device_start();
set_ids(0x1045c861, 0x10, 0x0c0310, 0);
revision = 0x10;
add_map(0x1000, M_MEM, FUNC(opti_82c861_device::mem_map)); // 4KiB memory map
command = 0;
intr_pin = 1;
intr_line = 0;
}
void opti_82c861_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space,
uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space)
{
}

2
src/mame/apple/imacg3.cpp
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@ -20,12 +20,12 @@
****************************************************************************/
#include "emu.h"
#include "bus/pci/opti82c861.h"
#include "cpu/powerpc/ppc.h"
#include "machine/dimm_spd.h"
#include "machine/i2cmem.h"
#include "machine/input_merger.h"
#include "machine/mpc106.h"
#include "machine/opti82c861.h"
#include "machine/pci.h"
#include "machine/pci-ide.h"
#include "machine/ram.h"