mirror of
https://github.com/holub/mame
synced 2025-04-23 00:39:36 +03:00
srcclean and cleanup (nw)
This commit is contained in:
Vas Crabb
parent
112bce124d
commit
82501770de
@ -1055,6 +1055,12 @@ The following views will be automatically generated:
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play games that don't automatically rotate the display for the second player.
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The screen will be displayed at its physical aspect ratio, with rotation
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applied.
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* If the system has exactly two emulated screens, MAME will generate a view
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showing the second screen above the first screen with a small gap between
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them. The second screen will be rotated by 180 degrees. This view can be
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used to play a dual-screen two-player game on a "cocktail table" cabinet with
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a single screen. The screens will be displayed at their physical aspect
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ratios, with rotation applied.
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* If the system has exactly two emulated screens and no view in the internal or
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external layouts shows all screens, or if the system has more than two
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emulated screens, MAME will generate views with the screens arranged
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@ -2,37 +2,37 @@
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<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
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<softwarelist name="mac_hdflop" description="Macintosh High Density Disk images">
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<!-- S/N: Z93350-001A -->
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<software name="clarisw">
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<description>ClarisWorks (Swedish)</description>
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<year>1993</year>
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<publisher>Claris</publisher>
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<info name="version" value="2.0" />
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<part name="flop1" interface="floppy_3_5">
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<dataarea name="flop" size="1474560">
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<rom name="clarisworks 2.0 (swe) (disk 1).img" size="1474560" crc="25da86b7" sha1="99e9fa57e0d7d03fb89611745bd04b4d7c4af998" offset="0" />
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</dataarea>
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</part>
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<part name="flop2" interface="floppy_3_5">
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<dataarea name="flop" size="1474560">
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<rom name="clarisworks 2.0 (swe) (disk 2).img" size="1474560" crc="76e73be8" sha1="46921d446169d949b37879f6cbbdfb802323b7ef" offset="0" />
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</dataarea>
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</part>
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<part name="flop3" interface="floppy_3_5">
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<dataarea name="flop" size="1474560">
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<rom name="clarisworks 2.0 (swe) (disk 3).img" size="1474560" crc="8e2dbabc" sha1="6b2b982348874be31899b6b2bace55518e5e9477" offset="0" />
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</dataarea>
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</part>
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<part name="flop4" interface="floppy_3_5">
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<dataarea name="flop" size="1474560">
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<rom name="clarisworks 2.0 (swe) (disk 4).img" size="1474560" crc="9ad039ef" sha1="18777ffd48cb9a016b169e38cf867f81367271b0" offset="0" />
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</dataarea>
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</part>
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<part name="flop4" interface="floppy_3_5">
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<dataarea name="flop" size="1474560">
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<rom name="clarisworks 2.0 (swe) (disk 5).img" size="1474560" crc="f74f6289" sha1="b60aae3606fec538dc60ba15bbec47e3da607a65" offset="0" />
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</dataarea>
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</part>
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</software>
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<!-- S/N: Z93350-001A -->
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<software name="clarisw">
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<description>ClarisWorks (Swedish)</description>
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<year>1993</year>
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<publisher>Claris</publisher>
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<info name="version" value="2.0" />
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<part name="flop1" interface="floppy_3_5">
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<dataarea name="flop" size="1474560">
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<rom name="clarisworks 2.0 (swe) (disk 1).img" size="1474560" crc="25da86b7" sha1="99e9fa57e0d7d03fb89611745bd04b4d7c4af998" offset="0" />
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</dataarea>
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</part>
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<part name="flop2" interface="floppy_3_5">
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<dataarea name="flop" size="1474560">
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<rom name="clarisworks 2.0 (swe) (disk 2).img" size="1474560" crc="76e73be8" sha1="46921d446169d949b37879f6cbbdfb802323b7ef" offset="0" />
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</dataarea>
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</part>
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<part name="flop3" interface="floppy_3_5">
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<dataarea name="flop" size="1474560">
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<rom name="clarisworks 2.0 (swe) (disk 3).img" size="1474560" crc="8e2dbabc" sha1="6b2b982348874be31899b6b2bace55518e5e9477" offset="0" />
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</dataarea>
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</part>
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<part name="flop4" interface="floppy_3_5">
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<dataarea name="flop" size="1474560">
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<rom name="clarisworks 2.0 (swe) (disk 4).img" size="1474560" crc="9ad039ef" sha1="18777ffd48cb9a016b169e38cf867f81367271b0" offset="0" />
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</dataarea>
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</part>
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<part name="flop4" interface="floppy_3_5">
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<dataarea name="flop" size="1474560">
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<rom name="clarisworks 2.0 (swe) (disk 5).img" size="1474560" crc="f74f6289" sha1="b60aae3606fec538dc60ba15bbec47e3da607a65" offset="0" />
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</dataarea>
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</part>
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</software>
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</softwarelist>
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@ -4,7 +4,7 @@
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Mertec Compact Companion
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http://chrisacorns.computinghistory.org.uk/8bit_Upgrades/Mertec_CompactComp.html
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http://chrisacorns.computinghistory.org.uk/8bit_Upgrades/Mertec_CompactComp.html
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**********************************************************************/
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@ -18,13 +18,12 @@
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DEFINE_DEVICE_TYPE_NS(HPDIO_98265A, bus::hp_dio, dio16_98265a_device, "hp98265a", "HP98265A SCSI S16 Interface")
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namespace bus {
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namespace hp_dio {
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namespace bus { namespace hp_dio {
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static void scsi_devices(device_slot_interface &device)
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{
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device.option_add("cdrom", NSCSI_CDROM);
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device.option_add("harddisk", NSCSI_HARDDISK);
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device.option_add("cdrom", NSCSI_CDROM);
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device.option_add("harddisk", NSCSI_HARDDISK);
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}
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void dio16_98265a_device::mb87030_scsi_adapter(device_t *device)
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@ -299,5 +298,4 @@ WRITE_LINE_MEMBER(dio16_98265a_device::dmar0_w)
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}
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}
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}
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} } // namespace bus::hp_dio
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@ -257,11 +257,11 @@ void dio16_device::install_memory(offs_t start, offs_t end,
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switch (m_prgwidth) {
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case 16:
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m_prgspace->install_readwrite_handler(start, end, rhandler,
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whandler);
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whandler);
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break;
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case 32:
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m_prgspace->install_readwrite_handler(start, end, rhandler,
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whandler, 0xffffffff);
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whandler, 0xffffffff);
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break;
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default:
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fatalerror("DIO: Bus width %d not supported\n", m_prgwidth);
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@ -475,7 +475,7 @@ int hle_hp_ipc_device::hil_poll()
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return frames;
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m_hp_hil_mlc->hil_write(m_device_id16 | 0x40); // Keycode Set 1, no coordinate data
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while (!m_fifo.empty()) {
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while (!m_fifo.empty()) {
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m_hp_hil_mlc->hil_write(m_device_id16 | m_fifo.dequeue());
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frames++;
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}
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@ -490,7 +490,7 @@ int hle_hp_itf_device::hil_poll()
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LOG("KBD HAVE DATA\n");
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frames++;
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m_hp_hil_mlc->hil_write(m_device_id16 | 0x40); // Keycode Set 1, no coordinate data
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while (!m_fifo.empty()) {
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while (!m_fifo.empty()) {
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m_hp_hil_mlc->hil_write(m_device_id16 | m_fifo.dequeue());
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frames++;
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}
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@ -68,7 +68,7 @@ int hle_hp_46060b_device::hil_poll()
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frames+=2;
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}
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while (!m_fifo.empty()) {
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while (!m_fifo.empty()) {
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m_hp_hil_mlc->hil_write(m_device_id16 | m_fifo.dequeue());
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frames++;
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}
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@ -64,7 +64,7 @@ brk_xav_imp
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else
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{
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PC = read_arg(0xfffa);
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PC = set_h(PC, read_arg(0xfffb));
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PC = set_h(PC, read_arg(0xfffb));
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}
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}
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@ -86,7 +86,7 @@ brk_xav_imp
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else
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{
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PC = read_arg(0xfffe);
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PC = set_h(PC, read_arg(0xffff));
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PC = set_h(PC, read_arg(0xffff));
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}
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}
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@ -122,4 +122,4 @@ xavlda_idy
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}
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A = read_special(TMP+Y);
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set_nz(A);
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prefetch();
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prefetch();
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@ -141,7 +141,7 @@ adcl3_acc
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read_pc_noinc();
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do_adc((m_l & 0xff000000) >> 24);
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prefetch();
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stal0_acc
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read_pc_noinc();
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m_l = (m_l & 0xffffff00) | (A & 0xff); // TODO: flags
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@ -241,7 +241,7 @@ lpa1_acc
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read_pc_noinc();
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A = (m_pa & 0x00ff00) >> 8; // TODO: Flags?
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prefetch();
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spa2_acc
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read_pc_noinc();
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m_pa = (m_pa & 0x00ffff) | (A << 16); // TODO: Flags?
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@ -341,7 +341,7 @@ cmppa_imp
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sbcpa_imp
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do_sbc(read_full_data_sp(m_pa+Y));
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prefetch();
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orapb_imp
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fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
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read_pc_noinc();
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@ -92,11 +92,11 @@ protected:
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virtual space_config_vector memory_space_config() const override;
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address_space_config m_special_data_config;
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address_space *m_special_data_space;
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address_space *m_special_data_space;
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address_space_config m_lowbus_config;
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address_space_config m_extbus_config;
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address_space *m_lowbus_space;
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address_space *m_extbus_space;
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address_space *m_lowbus_space;
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address_space *m_extbus_space;
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uint8_t read_special(uint16_t adr);
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@ -25,51 +25,51 @@
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some of the documented but 'undocumented' opcodes on the 6502 to have additonal
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meaning for one specific function on startup
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this just seems to be some very buggy checksum code where the games don't even care about the result...
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(actually it looks like some games might be using it as a PRNG seed?)
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this just seems to be some very buggy checksum code where the games don't even care about the result...
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(actually it looks like some games might be using it as a PRNG seed?)
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a is 80 when entering here?
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a is 80 when entering here?
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01BC37: A0 3F ldy #$3f
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01BC39: B2 clr a // clear acculuator
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01BC3A: 1B spa0 a // store 'accumulator' into byte 0 of PA 'address' register
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01BC3B: 9B spa2 a // store 'accumulator' into byte 2 of PA 'address' register
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-- loop point 2
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01BC3C: 98 tya // y -> a (3f on first run of loop)
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01BC3D: 5B spa1 a // store 'accumulator' into byte 1 of PA 'address' register (003f00 on first loop?)
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-- loop point 1
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01BC3E: A3 ldal0 a // read byte 0 of 32-bit 'long' register into accumulator
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01BC3F: 73 adcpa // adc ($Address PA), y
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01BC40: 83 stal0 a // store accumulator back in byte 0 of 32-bit 'long' register (even byte checksum?)
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01BC41: FB incpa // increase 'address' register PA
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01BC42: A7 ldal1 a // read byte 1 of 32-bit 'long' register into accumulator
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01BC43: 73 adcpa // adc ($Address PA), y
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01BC44: 87 stal1 a // store accumulator back in byte 0 of 32-bit 'long' register (odd byte checksum?)
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01BC45: FB incpa // increase 'address' register PA
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01BC46: D0 F6 bne $1bc3e // (branch based on PA increase, so PA must set flags?, probably overflows after 0xffff if upper byte is 'bank'? or at 0xff if this really is a mirror of the function below
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01BC37: A0 3F ldy #$3f
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01BC39: B2 clr a // clear acculuator
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01BC3A: 1B spa0 a // store 'accumulator' into byte 0 of PA 'address' register
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01BC3B: 9B spa2 a // store 'accumulator' into byte 2 of PA 'address' register
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01BC48: 88 dey // decrease y, which contained 3f at the start
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01BC49: 10 F1 bpl $1bc3c // branch back to loop point 2 to reload counter
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-- loop point 2
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01BC3C: 98 tya // y -> a (3f on first run of loop)
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01BC3D: 5B spa1 a // store 'accumulator' into byte 1 of PA 'address' register (003f00 on first loop?)
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// contains the odd byte checksum once we drop out the loop
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01BC4B: 8D FB 00 sta $00fb // store it in zero page memory
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01BC4E: A3 ldal0 a // get the even byte checksum from byte 0 of 32-bit 'long' register
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01BC4F: 8D FA 00 sta $00fa // store it in zero page memory
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01BC52: 07 oral1 a // why do we want to do this? (routine below does it too)
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01BC53: D0 03 bne $1bc58
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01BC55: CE FA 00 dec $00fa
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01BC58: 80 retf
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-- loop point 1
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01BC3E: A3 ldal0 a // read byte 0 of 32-bit 'long' register into accumulator
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01BC3F: 73 adcpa // adc ($Address PA), y
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01BC40: 83 stal0 a // store accumulator back in byte 0 of 32-bit 'long' register (even byte checksum?)
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01BC41: FB incpa // increase 'address' register PA
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01BC42: A7 ldal1 a // read byte 1 of 32-bit 'long' register into accumulator
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01BC43: 73 adcpa // adc ($Address PA), y
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01BC44: 87 stal1 a // store accumulator back in byte 0 of 32-bit 'long' register (odd byte checksum?)
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01BC45: FB incpa // increase 'address' register PA
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01BC46: D0 F6 bne $1bc3e // (branch based on PA increase, so PA must set flags?, probably overflows after 0xffff if upper byte is 'bank'? or at 0xff if this really is a mirror of the function below
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01BC48: 88 dey // decrease y, which contained 3f at the start
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01BC49: 10 F1 bpl $1bc3c // branch back to loop point 2 to reload counter
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// contains the odd byte checksum once we drop out the loop
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01BC4B: 8D FB 00 sta $00fb // store it in zero page memory
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01BC4E: A3 ldal0 a // get the even byte checksum from byte 0 of 32-bit 'long' register
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01BC4F: 8D FA 00 sta $00fa // store it in zero page memory
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01BC52: 07 oral1 a // why do we want to do this? (routine below does it too)
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01BC53: D0 03 bne $1bc58
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01BC55: CE FA 00 dec $00fa
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01BC58: 80 retf
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this is presumably meant to be similar to the function found in Namco
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Nostalgia 2
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// A is 80 on entry
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// A is 80 on entry
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09FFD8: A9 3F lda #$3f
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09FFDA: 85 01 sta $01 // set upper bit of pointer at 0x0000 to 3f (it completely fails to initialize the ram at 00, we currently init it to ff, but should probably be 0?)
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09FFDC: A0 00 ldy #$00 // clear inner loop counter
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-- loop point 1 and 2
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-- loop point 1 and 2
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09FFDE: AD FA 00 lda $00fa // read current even byte checksum value from zero page ram fa (game also completely fails to initialize this)
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09FFE1: 71 00 adc ($00), y // so 3f00 + y first outer loop, 3e00 + y second outer loop with y increasing in inner loop (add byte read to even checksum byte?)
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09FFE3: 8D FA 00 sta $00fa // store even checksum at 0xfa in zero page ram
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@ -82,8 +82,8 @@
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09FFF2: C6 01 dec $01 // decrease accumulator (started at 3f) (inner loop counter already 0 because it overflowed)
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09FFF4: 10 E8 bpl $9ffde // branch back
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// checksums are already in place after loop so no need to copy them like in above
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09FFF6: 0D FA 00 ora $00fa // same weird 'or' call
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// checksums are already in place after loop so no need to copy them like in above
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09FFF6: 0D FA 00 ora $00fa // same weird 'or' call
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--
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09FFF9: D0 03 bne $9fffe
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09FFFB: CE FA 00 dec $00fa
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@ -61,7 +61,7 @@ public:
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O(adcl1_acc);
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O(adcl2_acc);
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O(adcl3_acc);
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O(stal0_acc);
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O(stal1_acc);
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O(stal2_acc);
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@ -247,12 +247,12 @@ bool pmmu_atc_lookup(const uint32_t addr_in, const int fc, const int ptest, uint
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for (int i = 0; i < MMU_ATC_ENTRIES; i++)
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{
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if (m_mmu_atc_tag[i] != atc_tag)
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continue;
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continue;
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if (!m_mmu_tmp_rw && (m_mmu_atc_data[i] & M68K_MMU_ATC_WRITE_PR))
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continue;
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continue;
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if (!m_mmu_tmp_rw && !(m_mmu_atc_data[i] & M68K_MMU_ATC_MODIFIED))
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continue;
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continue;
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// read access or write access and not write protected
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if (!ptest)
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@ -954,10 +954,10 @@ next;
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if (rd != 0) then r[rd] <- result;
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if (ANDcccc or ANDNcc or ORcc or ORNcc or XORcc or XNORcc) then (
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N <- result<31>;
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Z <- if (result = 0) then 1 else 0;
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V <- 0
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C <- 0
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N <- result<31>;
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Z <- if (result = 0) then 1 else 0;
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V <- 0
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C <- 0
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);
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*/
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@ -2178,100 +2178,100 @@ void mb86901_device::execute_store(uint32_t op)
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/* The SPARC Instruction Manual: Version 8, page 163, "Appendix C - ISP Descriptions - C.9. Instruction Defintions - Load Instructions" (SPARCv8.pdf, pg. 160)
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if (LDD or LD or LDSH or LDUH or LDSB or LDUB or LDDF or LDF or LDFSR or LDDC or LDC or LDCSR) then (
|
||||
address <- r[rs1] + (if (i = 0) then r[rs2] else sign_extend(simm13));
|
||||
addr_space <- (if (S = 0) then 10 else 11)
|
||||
address <- r[rs1] + (if (i = 0) then r[rs2] else sign_extend(simm13));
|
||||
addr_space <- (if (S = 0) then 10 else 11)
|
||||
) else if (LDDA or LDA or LDSHA or LDUHA or LDSBA or LDUBA) then (
|
||||
if (S = 0) then (
|
||||
trap <- 1;
|
||||
privileged_instruction <- 1
|
||||
) else if (i = 1) then (
|
||||
trap <- 1;
|
||||
illegal_instruction <- 1
|
||||
) else (
|
||||
address <- r[rs1] + r[rs2];
|
||||
addr_space <- asi
|
||||
)
|
||||
if (S = 0) then (
|
||||
trap <- 1;
|
||||
privileged_instruction <- 1
|
||||
) else if (i = 1) then (
|
||||
trap <- 1;
|
||||
illegal_instruction <- 1
|
||||
) else (
|
||||
address <- r[rs1] + r[rs2];
|
||||
addr_space <- asi
|
||||
)
|
||||
)
|
||||
next;
|
||||
if (trap = 0) then (
|
||||
if ( (LDF or LDDF or LDFSR) and ((EF = 0) or (bp_FPU_present = 0)) then (
|
||||
trap <- 1;
|
||||
fp_disabled <- 1
|
||||
) else if ( (LDC or LDDC or LDCSR) and ((EC = 0) or (bp_CP_present = 0)) then (
|
||||
trap <- 1;
|
||||
cp_disabled <- 1
|
||||
) else if ( ( (LDD or LDDA or LDDF or LDDC) and (address<2:0> != 0)) or
|
||||
((LD or LDA or LDF or LDFSR or LDC or LDCSR) and (address<1:0> != 0)) or
|
||||
((LDSH or LDSHA or LDUH or LDUHA) and address<0> != 0) ) then (
|
||||
trap <- 1;
|
||||
mem_address_not_aligned <- 1
|
||||
) else if (LDDF and (rd<0> != 0)) then (
|
||||
trap <- 1;
|
||||
fp_exception <- 1;
|
||||
ftt <- invalid_fpr_register
|
||||
) else if ((LDF or LDDF or LDFSR) and (an FPU sequence error is detected)) then (
|
||||
trap <- 1;
|
||||
fp_exception <- 1;
|
||||
ftt <- sequence_error
|
||||
) else if ((LDC or LDDC or LDCSR) and (a CP sequence error is detected)) then (
|
||||
trap <- 1;
|
||||
cp_exception <- 1;
|
||||
{ possibly additional implementation-dependent actions }
|
||||
)
|
||||
if ( (LDF or LDDF or LDFSR) and ((EF = 0) or (bp_FPU_present = 0)) then (
|
||||
trap <- 1;
|
||||
fp_disabled <- 1
|
||||
) else if ( (LDC or LDDC or LDCSR) and ((EC = 0) or (bp_CP_present = 0)) then (
|
||||
trap <- 1;
|
||||
cp_disabled <- 1
|
||||
) else if ( ( (LDD or LDDA or LDDF or LDDC) and (address<2:0> != 0)) or
|
||||
((LD or LDA or LDF or LDFSR or LDC or LDCSR) and (address<1:0> != 0)) or
|
||||
((LDSH or LDSHA or LDUH or LDUHA) and address<0> != 0) ) then (
|
||||
trap <- 1;
|
||||
mem_address_not_aligned <- 1
|
||||
) else if (LDDF and (rd<0> != 0)) then (
|
||||
trap <- 1;
|
||||
fp_exception <- 1;
|
||||
ftt <- invalid_fpr_register
|
||||
) else if ((LDF or LDDF or LDFSR) and (an FPU sequence error is detected)) then (
|
||||
trap <- 1;
|
||||
fp_exception <- 1;
|
||||
ftt <- sequence_error
|
||||
) else if ((LDC or LDDC or LDCSR) and (a CP sequence error is detected)) then (
|
||||
trap <- 1;
|
||||
cp_exception <- 1;
|
||||
{ possibly additional implementation-dependent actions }
|
||||
)
|
||||
);
|
||||
next;
|
||||
if (trap = 0) then {
|
||||
(data, MAE) <- memory_read(addr_space, address);
|
||||
next;
|
||||
if (MAE = 1) then (
|
||||
trap <- 1;
|
||||
data_access_exception <- 1;
|
||||
) else (
|
||||
if (LDSB or LDSBA or LDUB or LDUBA) then (
|
||||
if (address<1:0> = 0) then byte <- data<31:24>
|
||||
else if (address<1:0> = 1) then byte <- data<23:16>
|
||||
else if (address<1:0> = 2) then byte <- data<15: 8>
|
||||
else if (address<1:0> = 3) then byte <- data< 7: 0>
|
||||
next;
|
||||
if (LDSB or LDSBA) then
|
||||
word0 <- sign_extend_byte(byte)
|
||||
else
|
||||
word0 <- zero_extend_byte(byte)
|
||||
) else if (LDSH or LDSHA or LDUH or LDUHA) then (
|
||||
if (address<1:0> = 0) then halfword <- data<31:16>
|
||||
else if (address<1:0> = 2) then halfword <- data<15: 0>
|
||||
next;
|
||||
if (LDSH or LDSHA) then
|
||||
word0 <- sign_extend_halfword(halfword)
|
||||
else
|
||||
word0 <- zero_extend_halfword(halfword)
|
||||
) else
|
||||
word0 <- data
|
||||
)
|
||||
(data, MAE) <- memory_read(addr_space, address);
|
||||
next;
|
||||
if (MAE = 1) then (
|
||||
trap <- 1;
|
||||
data_access_exception <- 1;
|
||||
) else (
|
||||
if (LDSB or LDSBA or LDUB or LDUBA) then (
|
||||
if (address<1:0> = 0) then byte <- data<31:24>
|
||||
else if (address<1:0> = 1) then byte <- data<23:16>
|
||||
else if (address<1:0> = 2) then byte <- data<15: 8>
|
||||
else if (address<1:0> = 3) then byte <- data< 7: 0>
|
||||
next;
|
||||
if (LDSB or LDSBA) then
|
||||
word0 <- sign_extend_byte(byte)
|
||||
else
|
||||
word0 <- zero_extend_byte(byte)
|
||||
) else if (LDSH or LDSHA or LDUH or LDUHA) then (
|
||||
if (address<1:0> = 0) then halfword <- data<31:16>
|
||||
else if (address<1:0> = 2) then halfword <- data<15: 0>
|
||||
next;
|
||||
if (LDSH or LDSHA) then
|
||||
word0 <- sign_extend_halfword(halfword)
|
||||
else
|
||||
word0 <- zero_extend_halfword(halfword)
|
||||
) else
|
||||
word0 <- data
|
||||
)
|
||||
);
|
||||
next;
|
||||
if (trap = 0) then (
|
||||
if ( (rd != 0) and (LD or LDA or LDSH or LDSHA
|
||||
or LDUHA or LDUH or LDSB or LDSBA or LDUB or LDUBA) ) then
|
||||
r[rd] <- word0
|
||||
else if (LDF) then f[rd] <- word0
|
||||
else if (LDC) then { implementation-dependent actions }
|
||||
else if (LDFSR) then FSR <- word0
|
||||
else if (LDCSR) then CSR <- word0
|
||||
else if (LDD or LDDA) then r[rd and 11110] <- word0
|
||||
else if (LDDF) then f[rd and 11110] <- word0
|
||||
else if (LDDC) then { implementation-dependent actions }
|
||||
if ( (rd != 0) and (LD or LDA or LDSH or LDSHA
|
||||
or LDUHA or LDUH or LDSB or LDSBA or LDUB or LDUBA) ) then
|
||||
r[rd] <- word0
|
||||
else if (LDF) then f[rd] <- word0
|
||||
else if (LDC) then { implementation-dependent actions }
|
||||
else if (LDFSR) then FSR <- word0
|
||||
else if (LDCSR) then CSR <- word0
|
||||
else if (LDD or LDDA) then r[rd and 11110] <- word0
|
||||
else if (LDDF) then f[rd and 11110] <- word0
|
||||
else if (LDDC) then { implementation-dependent actions }
|
||||
);
|
||||
next;
|
||||
if (((trap = 0) and (LDD or LDDA or LDDF or LDDC)) then (
|
||||
(word1, MAE) <- memory_read(addr_space, address + 4);
|
||||
next;
|
||||
if (MAE = 1) then ( { MAE = 1 only due to a "non-resumable machine-check error" }
|
||||
trap <- 1;
|
||||
data_access_exception <- 1 )
|
||||
else if (LDD or LDDA) then r[rd or 1] <- word1
|
||||
else if (LDDF) then f[rd or 1] <- word1
|
||||
else if (LDDC) then { implementation-dependent actions }
|
||||
(word1, MAE) <- memory_read(addr_space, address + 4);
|
||||
next;
|
||||
if (MAE = 1) then ( { MAE = 1 only due to a "non-resumable machine-check error" }
|
||||
trap <- 1;
|
||||
data_access_exception <- 1 )
|
||||
else if (LDD or LDDA) then r[rd or 1] <- word1
|
||||
else if (LDDF) then f[rd or 1] <- word1
|
||||
else if (LDDC) then { implementation-dependent actions }
|
||||
);
|
||||
*/
|
||||
|
||||
@ -3389,16 +3389,16 @@ inline void mb86901_device::execute_group3(uint32_t op)
|
||||
|
||||
bool mb86901_device::evaluate_condition(uint32_t op)
|
||||
{
|
||||
// COND & 8
|
||||
// 0 8
|
||||
// bn ba
|
||||
// bz bne
|
||||
// ble bg
|
||||
// bl bge
|
||||
// bleu bgu
|
||||
// bcs bcc
|
||||
// bneg bpos
|
||||
// bvs bvc
|
||||
// COND & 8
|
||||
// 0 8
|
||||
// bn ba
|
||||
// bz bne
|
||||
// ble bg
|
||||
// bl bge
|
||||
// bleu bgu
|
||||
// bcs bcc
|
||||
// bneg bpos
|
||||
// bvs bvc
|
||||
|
||||
switch(COND)
|
||||
{
|
||||
|
||||
@ -127,7 +127,7 @@
|
||||
#define CMASK ((op >> 4) & 7)
|
||||
|
||||
#define RD ((op >> 25) & 31)
|
||||
#define RDBITS (op & 0x3e000000)
|
||||
#define RDBITS (op & 0x3e000000)
|
||||
#define RS1 ((op >> 14) & 31)
|
||||
#define RS2 (op & 31)
|
||||
|
||||
|
||||
@ -2,13 +2,13 @@
|
||||
// copyright-holders:Segher Boessenkool,Ryan Holtz
|
||||
/*****************************************************************************
|
||||
|
||||
SunPlus micro'nSP emulator
|
||||
SunPlus micro'nSP emulator
|
||||
|
||||
Copyright 2008-2017 Segher Boessenkool <segher@kernel.crashing.org>
|
||||
Licensed under the terms of the GNU GPL, version 2
|
||||
http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
|
||||
Copyright 2008-2017 Segher Boessenkool <segher@kernel.crashing.org>
|
||||
Licensed under the terms of the GNU GPL, version 2
|
||||
http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
|
||||
|
||||
Ported to MAME framework by Ryan Holtz
|
||||
Ported to MAME framework by Ryan Holtz
|
||||
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
@ -2,13 +2,13 @@
|
||||
// copyright-holders:Segher Boessenkool,Ryan Holtz
|
||||
/*****************************************************************************
|
||||
|
||||
SunPlus micro'nSP emulator
|
||||
SunPlus micro'nSP emulator
|
||||
|
||||
Copyright 2008-2017 Segher Boessenkool <segher@kernel.crashing.org>
|
||||
Licensed under the terms of the GNU GPL, version 2
|
||||
http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
|
||||
Copyright 2008-2017 Segher Boessenkool <segher@kernel.crashing.org>
|
||||
Licensed under the terms of the GNU GPL, version 2
|
||||
http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
|
||||
|
||||
Ported to MAME framework by Ryan Holtz
|
||||
Ported to MAME framework by Ryan Holtz
|
||||
|
||||
*****************************************************************************/
|
||||
|
||||
@ -17,7 +17,7 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
#define UNSP_LOG_OPCODES (0)
|
||||
#define UNSP_LOG_OPCODES (0)
|
||||
|
||||
enum
|
||||
{
|
||||
|
||||
@ -2,11 +2,11 @@
|
||||
// copyright-holders:Segher Boessenkool
|
||||
/*****************************************************************************
|
||||
|
||||
SunPlus micro'nSP disassembler
|
||||
SunPlus micro'nSP disassembler
|
||||
|
||||
Copyright 2008-2017 Segher Boessenkool <segher@kernel.crashing.org>
|
||||
Licensed under the terms of the GNU GPL, version 2
|
||||
http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
|
||||
Copyright 2008-2017 Segher Boessenkool <segher@kernel.crashing.org>
|
||||
Licensed under the terms of the GNU GPL, version 2
|
||||
http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
|
||||
|
||||
*****************************************************************************/
|
||||
|
||||
@ -166,7 +166,7 @@ offs_t unsp_disassembler::disassemble(std::ostream &stream, offs_t pc, uint16_t
|
||||
util::stream_format(stream, "reti");
|
||||
else if (opA+1 < 8 && opA+opN < 8)
|
||||
util::stream_format(stream, "pop %s, %s from [%s]",
|
||||
regs[opA+1], regs[opA+opN], regs[opB]);
|
||||
regs[opA+1], regs[opA+opN], regs[opB]);
|
||||
else
|
||||
util::stream_format(stream, "<BAD>");
|
||||
return UNSP_DASM_OK;
|
||||
@ -176,7 +176,7 @@ offs_t unsp_disassembler::disassemble(std::ostream &stream, offs_t pc, uint16_t
|
||||
case 0x2d:
|
||||
if (opA+1 >= opN && opA < opN+7)
|
||||
util::stream_format(stream, "push %s, %s to [%s]",
|
||||
regs[opA+1-opN], regs[opA], regs[opB]);
|
||||
regs[opA+1-opN], regs[opA], regs[opB]);
|
||||
else
|
||||
util::stream_format(stream, "<BAD>");
|
||||
return UNSP_DASM_OK;
|
||||
|
||||
@ -2,11 +2,11 @@
|
||||
// copyright-holders:Segher Boessenkool
|
||||
/*****************************************************************************
|
||||
|
||||
SunPlus micro'nSP disassembler
|
||||
SunPlus micro'nSP disassembler
|
||||
|
||||
Copyright 2008-2017 Segher Boessenkool <segher@kernel.crashing.org>
|
||||
Licensed under the terms of the GNU GPL, version 2
|
||||
http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
|
||||
Copyright 2008-2017 Segher Boessenkool <segher@kernel.crashing.org>
|
||||
Licensed under the terms of the GNU GPL, version 2
|
||||
http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
|
||||
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
@ -457,11 +457,11 @@ void mb87030_device::device_start()
|
||||
save_item(NAME(m_hdb));
|
||||
save_item(NAME(m_hdb_loaded));
|
||||
save_item(NAME(m_send_atn_during_selection));
|
||||
// save_item(NAME(m_fifo));
|
||||
// save_item(NAME(m_fifo));
|
||||
save_item(NAME(m_scsi_phase));
|
||||
save_item(NAME(m_scsi_ctrl));
|
||||
save_item(NAME(m_dma_transfer));
|
||||
// save_item(NAME(m_state));
|
||||
// save_item(NAME(m_state));
|
||||
}
|
||||
|
||||
void mb87030_device::scsi_ctrl_changed()
|
||||
@ -551,9 +551,9 @@ WRITE8_MEMBER(mb87030_device::scmd_w)
|
||||
break;
|
||||
case SCMD_CMD_RESET_ATN:
|
||||
LOG("%s: Reset ATN\n", __FUNCTION__);
|
||||
// if (m_state == State::Idle)
|
||||
// if (m_state == State::Idle)
|
||||
m_send_atn_during_selection = false;
|
||||
// else
|
||||
// else
|
||||
scsi_set_ctrl(0, S_ATN);
|
||||
break;
|
||||
case SCMD_CMD_SET_ATN:
|
||||
|
||||
@ -16,42 +16,42 @@
|
||||
DEFINE_DEVICE_TYPE(SPG24X, spg24x_device, "spg24x", "SPG240-series System-on-a-Chip")
|
||||
DEFINE_DEVICE_TYPE(SPG28X, spg28x_device, "spg28x", "SPG280-series System-on-a-Chip")
|
||||
|
||||
#define LOG_IO_READS (1U << 0)
|
||||
#define LOG_IO_WRITES (1U << 1)
|
||||
#define LOG_UNKNOWN_IO (1U << 2)
|
||||
#define LOG_IRQS (1U << 3)
|
||||
#define LOG_VLINES (1U << 4)
|
||||
#define LOG_GPIO (1U << 5)
|
||||
#define LOG_UART (1U << 6)
|
||||
#define LOG_I2C (1U << 7)
|
||||
#define LOG_DMA (1U << 8)
|
||||
#define LOG_SEGMENT (1U << 9)
|
||||
#define LOG_WATCHDOG (1U << 10)
|
||||
#define LOG_TIMERS (1U << 11)
|
||||
#define LOG_SPU_READS (1U << 12)
|
||||
#define LOG_SPU_WRITES (1U << 13)
|
||||
#define LOG_UNKNOWN_SPU (1U << 14)
|
||||
#define LOG_CHANNEL_READS (1U << 15)
|
||||
#define LOG_CHANNEL_WRITES (1U << 16)
|
||||
#define LOG_ENVELOPES (1U << 17)
|
||||
#define LOG_SAMPLES (1U << 18)
|
||||
#define LOG_RAMPDOWN (1U << 19)
|
||||
#define LOG_BEAT (1U << 20)
|
||||
#define LOG_PPU_READS (1U << 21)
|
||||
#define LOG_PPU_WRITES (1U << 22)
|
||||
#define LOG_UNKNOWN_PPU (1U << 23)
|
||||
#define LOG_IO (LOG_IO_READS | LOG_IO_WRITES | LOG_IRQS | LOG_GPIO | LOG_UART | LOG_I2C | LOG_DMA | LOG_TIMERS | LOG_UNKNOWN_IO)
|
||||
#define LOG_CHANNELS (LOG_CHANNEL_READS | LOG_CHANNEL_WRITES)
|
||||
#define LOG_SPU (LOG_SPU_READS | LOG_SPU_WRITES | LOG_UNKNOWN_SPU | LOG_CHANNEL_READS | LOG_CHANNEL_WRITES \
|
||||
#define LOG_IO_READS (1U << 0)
|
||||
#define LOG_IO_WRITES (1U << 1)
|
||||
#define LOG_UNKNOWN_IO (1U << 2)
|
||||
#define LOG_IRQS (1U << 3)
|
||||
#define LOG_VLINES (1U << 4)
|
||||
#define LOG_GPIO (1U << 5)
|
||||
#define LOG_UART (1U << 6)
|
||||
#define LOG_I2C (1U << 7)
|
||||
#define LOG_DMA (1U << 8)
|
||||
#define LOG_SEGMENT (1U << 9)
|
||||
#define LOG_WATCHDOG (1U << 10)
|
||||
#define LOG_TIMERS (1U << 11)
|
||||
#define LOG_SPU_READS (1U << 12)
|
||||
#define LOG_SPU_WRITES (1U << 13)
|
||||
#define LOG_UNKNOWN_SPU (1U << 14)
|
||||
#define LOG_CHANNEL_READS (1U << 15)
|
||||
#define LOG_CHANNEL_WRITES (1U << 16)
|
||||
#define LOG_ENVELOPES (1U << 17)
|
||||
#define LOG_SAMPLES (1U << 18)
|
||||
#define LOG_RAMPDOWN (1U << 19)
|
||||
#define LOG_BEAT (1U << 20)
|
||||
#define LOG_PPU_READS (1U << 21)
|
||||
#define LOG_PPU_WRITES (1U << 22)
|
||||
#define LOG_UNKNOWN_PPU (1U << 23)
|
||||
#define LOG_IO (LOG_IO_READS | LOG_IO_WRITES | LOG_IRQS | LOG_GPIO | LOG_UART | LOG_I2C | LOG_DMA | LOG_TIMERS | LOG_UNKNOWN_IO)
|
||||
#define LOG_CHANNELS (LOG_CHANNEL_READS | LOG_CHANNEL_WRITES)
|
||||
#define LOG_SPU (LOG_SPU_READS | LOG_SPU_WRITES | LOG_UNKNOWN_SPU | LOG_CHANNEL_READS | LOG_CHANNEL_WRITES \
|
||||
| LOG_ENVELOPES | LOG_SAMPLES | LOG_RAMPDOWN | LOG_BEAT)
|
||||
#define LOG_PPU (LOG_PPU_READS | LOG_PPU_WRITES | LOG_UNKNOWN_PPU)
|
||||
#define LOG_ALL (LOG_IO | LOG_SPU | LOG_PPU | LOG_VLINES | LOG_SEGMENT)
|
||||
#define LOG_PPU (LOG_PPU_READS | LOG_PPU_WRITES | LOG_UNKNOWN_PPU)
|
||||
#define LOG_ALL (LOG_IO | LOG_SPU | LOG_PPU | LOG_VLINES | LOG_SEGMENT)
|
||||
|
||||
#define VERBOSE (0)
|
||||
#define VERBOSE (0)
|
||||
#include "logmacro.h"
|
||||
|
||||
#define SPG_DEBUG_VIDEO (0)
|
||||
#define SPG_DEBUG_AUDIO (0)
|
||||
#define SPG_DEBUG_VIDEO (0)
|
||||
#define SPG_DEBUG_AUDIO (0)
|
||||
|
||||
#if SPG2XX_VISUAL_AUDIO_DEBUG
|
||||
static const uint32_t s_visual_debug_palette[8] = {
|
||||
@ -70,8 +70,8 @@ static const uint32_t s_visual_debug_palette[8] = {
|
||||
#define SPG_VDB_VOL 4
|
||||
#endif
|
||||
|
||||
#define IO_IRQ_ENABLE m_io_regs[0x21]
|
||||
#define IO_IRQ_STATUS m_io_regs[0x22]
|
||||
#define IO_IRQ_ENABLE m_io_regs[0x21]
|
||||
#define IO_IRQ_STATUS m_io_regs[0x22]
|
||||
#define VIDEO_IRQ_ENABLE m_video_regs[0x62]
|
||||
#define VIDEO_IRQ_STATUS m_video_regs[0x63]
|
||||
|
||||
@ -2751,4 +2751,4 @@ bool spg2xx_device::audio_envelope_tick(address_space &space, const uint32_t cha
|
||||
}
|
||||
LOGMASKED(LOG_ENVELOPES, "envelope %d post-tick, count is now %04x, register is %04x\n", channel, new_count, m_audio_regs[(channel << 4) | AUDIO_ENVELOPE_DATA]);
|
||||
return edd_changed;
|
||||
}
|
||||
}
|
||||
|
||||
@ -68,10 +68,10 @@ protected:
|
||||
enum
|
||||
{
|
||||
PAGE_ENABLE_MASK = 0x0008,
|
||||
PAGE_WALLPAPER_MASK = 0x0004,
|
||||
PAGE_WALLPAPER_MASK = 0x0004,
|
||||
|
||||
SPRITE_ENABLE_MASK = 0x0001,
|
||||
SPRITE_COORD_TL_MASK = 0x0002,
|
||||
SPRITE_ENABLE_MASK = 0x0001,
|
||||
SPRITE_COORD_TL_MASK = 0x0002,
|
||||
|
||||
PAGE_DEPTH_FLAG_MASK = 0x3000,
|
||||
PAGE_DEPTH_FLAG_SHIFT = 12,
|
||||
@ -161,205 +161,205 @@ protected:
|
||||
|
||||
enum
|
||||
{
|
||||
AUDIO_WAVE_ADDR = 0x000,
|
||||
AUDIO_WAVE_ADDR = 0x000,
|
||||
|
||||
AUDIO_MODE = 0x001,
|
||||
AUDIO_WADDR_HIGH_MASK = 0x003f,
|
||||
AUDIO_LADDR_HIGH_MASK = 0x0fc0,
|
||||
AUDIO_LADDR_HIGH_SHIFT = 6,
|
||||
AUDIO_TONE_MODE_MASK = 0x3000,
|
||||
AUDIO_TONE_MODE_SHIFT = 12,
|
||||
AUDIO_TONE_MODE_SW = 0,
|
||||
AUDIO_MODE = 0x001,
|
||||
AUDIO_WADDR_HIGH_MASK = 0x003f,
|
||||
AUDIO_LADDR_HIGH_MASK = 0x0fc0,
|
||||
AUDIO_LADDR_HIGH_SHIFT = 6,
|
||||
AUDIO_TONE_MODE_MASK = 0x3000,
|
||||
AUDIO_TONE_MODE_SHIFT = 12,
|
||||
AUDIO_TONE_MODE_SW = 0,
|
||||
AUDIO_TONE_MODE_HW_ONESHOT = 1,
|
||||
AUDIO_TONE_MODE_HW_LOOP = 2,
|
||||
AUDIO_16M_MASK = 0x4000,
|
||||
AUDIO_ADPCM_MASK = 0x8000,
|
||||
AUDIO_TONE_MODE_HW_LOOP = 2,
|
||||
AUDIO_16M_MASK = 0x4000,
|
||||
AUDIO_ADPCM_MASK = 0x8000,
|
||||
|
||||
AUDIO_LOOP_ADDR = 0x002,
|
||||
AUDIO_LOOP_ADDR = 0x002,
|
||||
|
||||
AUDIO_PAN_VOL = 0x003,
|
||||
AUDIO_PAN_VOL_MASK = 0x7f7f,
|
||||
AUDIO_VOLUME_MASK = 0x007f,
|
||||
AUDIO_PAN_MASK = 0x7f00,
|
||||
AUDIO_PAN_SHIFT = 8,
|
||||
AUDIO_PAN_VOL = 0x003,
|
||||
AUDIO_PAN_VOL_MASK = 0x7f7f,
|
||||
AUDIO_VOLUME_MASK = 0x007f,
|
||||
AUDIO_PAN_MASK = 0x7f00,
|
||||
AUDIO_PAN_SHIFT = 8,
|
||||
|
||||
AUDIO_ENVELOPE0 = 0x004,
|
||||
AUDIO_ENVELOPE_INC_MASK = 0x007f,
|
||||
AUDIO_ENVELOPE_SIGN_MASK = 0x0080,
|
||||
AUDIO_ENVELOPE_TARGET_MASK = 0x7f00,
|
||||
AUDIO_ENVELOPE_TARGET_SHIFT = 8,
|
||||
AUDIO_ENVELOPE0 = 0x004,
|
||||
AUDIO_ENVELOPE_INC_MASK = 0x007f,
|
||||
AUDIO_ENVELOPE_SIGN_MASK = 0x0080,
|
||||
AUDIO_ENVELOPE_TARGET_MASK = 0x7f00,
|
||||
AUDIO_ENVELOPE_TARGET_SHIFT = 8,
|
||||
AUDIO_ENVELOPE_REPEAT_PERIOD_MASK = 0x8000,
|
||||
|
||||
AUDIO_ENVELOPE_DATA = 0x005,
|
||||
AUDIO_ENVELOPE_DATA_MASK = 0xff7f,
|
||||
AUDIO_EDD_MASK = 0x007f,
|
||||
AUDIO_ENVELOPE_COUNT_MASK = 0xff00,
|
||||
AUDIO_ENVELOPE_COUNT_SHIFT = 8,
|
||||
AUDIO_ENVELOPE_DATA = 0x005,
|
||||
AUDIO_ENVELOPE_DATA_MASK = 0xff7f,
|
||||
AUDIO_EDD_MASK = 0x007f,
|
||||
AUDIO_ENVELOPE_COUNT_MASK = 0xff00,
|
||||
AUDIO_ENVELOPE_COUNT_SHIFT = 8,
|
||||
|
||||
AUDIO_ENVELOPE1 = 0x006,
|
||||
AUDIO_ENVELOPE_LOAD_MASK = 0x00ff,
|
||||
AUDIO_ENVELOPE_RPT_MASK = 0x0100,
|
||||
AUDIO_ENVELOPE_RPCNT_MASK = 0xfe00,
|
||||
AUDIO_ENVELOPE_RPCNT_SHIFT = 9,
|
||||
AUDIO_ENVELOPE1 = 0x006,
|
||||
AUDIO_ENVELOPE_LOAD_MASK = 0x00ff,
|
||||
AUDIO_ENVELOPE_RPT_MASK = 0x0100,
|
||||
AUDIO_ENVELOPE_RPCNT_MASK = 0xfe00,
|
||||
AUDIO_ENVELOPE_RPCNT_SHIFT = 9,
|
||||
|
||||
AUDIO_ENVELOPE_ADDR_HIGH = 0x007,
|
||||
AUDIO_EADDR_HIGH_MASK = 0x003f,
|
||||
AUDIO_IRQ_EN_MASK = 0x0040,
|
||||
AUDIO_IRQ_ADDR_MASK = 0xff80,
|
||||
AUDIO_IRQ_ADDR_SHIFT = 7,
|
||||
AUDIO_ENVELOPE_ADDR_HIGH = 0x007,
|
||||
AUDIO_EADDR_HIGH_MASK = 0x003f,
|
||||
AUDIO_IRQ_EN_MASK = 0x0040,
|
||||
AUDIO_IRQ_ADDR_MASK = 0xff80,
|
||||
AUDIO_IRQ_ADDR_SHIFT = 7,
|
||||
|
||||
AUDIO_ENVELOPE_ADDR = 0x008,
|
||||
AUDIO_WAVE_DATA_PREV = 0x009,
|
||||
AUDIO_ENVELOPE_ADDR = 0x008,
|
||||
AUDIO_WAVE_DATA_PREV = 0x009,
|
||||
|
||||
AUDIO_ENVELOPE_LOOP_CTRL = 0x00a,
|
||||
AUDIO_EAOFFSET_MASK = 0x01ff,
|
||||
AUDIO_RAMPDOWN_OFFSET_MASK = 0xfe00,
|
||||
AUDIO_RAMPDOWN_OFFSET_SHIFT = 9,
|
||||
AUDIO_ENVELOPE_LOOP_CTRL = 0x00a,
|
||||
AUDIO_EAOFFSET_MASK = 0x01ff,
|
||||
AUDIO_RAMPDOWN_OFFSET_MASK = 0xfe00,
|
||||
AUDIO_RAMPDOWN_OFFSET_SHIFT = 9,
|
||||
|
||||
AUDIO_WAVE_DATA = 0x00b,
|
||||
AUDIO_WAVE_DATA = 0x00b,
|
||||
|
||||
AUDIO_ADPCM_SEL = 0x00d,
|
||||
AUDIO_ADPCM_SEL_MASK = 0xfe00,
|
||||
AUDIO_POINT_NUMBER_MASK = 0x7e00,
|
||||
AUDIO_POINT_NUMBER_SHIFT = 9,
|
||||
AUDIO_ADPCM36_MASK = 0x8000,
|
||||
AUDIO_ADPCM_SEL = 0x00d,
|
||||
AUDIO_ADPCM_SEL_MASK = 0xfe00,
|
||||
AUDIO_POINT_NUMBER_MASK = 0x7e00,
|
||||
AUDIO_POINT_NUMBER_SHIFT = 9,
|
||||
AUDIO_ADPCM36_MASK = 0x8000,
|
||||
|
||||
AUDIO_PHASE_HIGH = 0x200,
|
||||
AUDIO_PHASE_HIGH_MASK = 0x0007,
|
||||
AUDIO_PHASE_HIGH = 0x200,
|
||||
AUDIO_PHASE_HIGH_MASK = 0x0007,
|
||||
|
||||
AUDIO_PHASE_ACCUM_HIGH = 0x201,
|
||||
AUDIO_PHASE_ACCUM_HIGH_MASK = 0x0007,
|
||||
AUDIO_PHASE_ACCUM_HIGH = 0x201,
|
||||
AUDIO_PHASE_ACCUM_HIGH_MASK = 0x0007,
|
||||
|
||||
AUDIO_TARGET_PHASE_HIGH = 0x202,
|
||||
AUDIO_TARGET_PHASE_HIGH = 0x202,
|
||||
AUDIO_TARGET_PHASE_HIGH_MASK= 0x0007,
|
||||
|
||||
AUDIO_RAMP_DOWN_CLOCK = 0x203,
|
||||
AUDIO_RAMP_DOWN_CLOCK_MASK = 0x0007,
|
||||
AUDIO_RAMP_DOWN_CLOCK = 0x203,
|
||||
AUDIO_RAMP_DOWN_CLOCK_MASK = 0x0007,
|
||||
|
||||
AUDIO_PHASE = 0x204,
|
||||
AUDIO_PHASE_ACCUM = 0x205,
|
||||
AUDIO_TARGET_PHASE = 0x206,
|
||||
AUDIO_PHASE = 0x204,
|
||||
AUDIO_PHASE_ACCUM = 0x205,
|
||||
AUDIO_TARGET_PHASE = 0x206,
|
||||
|
||||
AUDIO_PHASE_CTRL = 0x207,
|
||||
AUDIO_PHASE_OFFSET_MASK = 0x0fff,
|
||||
AUDIO_PHASE_SIGN_MASK = 0x1000,
|
||||
AUDIO_PHASE_SIGN_SHIFT = 12,
|
||||
AUDIO_PHASE_TIME_STEP_MASK = 0xe000,
|
||||
AUDIO_PHASE_TIME_STEP_SHIFT = 13,
|
||||
AUDIO_PHASE_CTRL = 0x207,
|
||||
AUDIO_PHASE_OFFSET_MASK = 0x0fff,
|
||||
AUDIO_PHASE_SIGN_MASK = 0x1000,
|
||||
AUDIO_PHASE_SIGN_SHIFT = 12,
|
||||
AUDIO_PHASE_TIME_STEP_MASK = 0xe000,
|
||||
AUDIO_PHASE_TIME_STEP_SHIFT = 13,
|
||||
|
||||
AUDIO_CHAN_OFFSET_MASK = 0xf0f,
|
||||
AUDIO_CHAN_OFFSET_MASK = 0xf0f,
|
||||
|
||||
AUDIO_CHANNEL_ENABLE = 0x400,
|
||||
AUDIO_CHANNEL_ENABLE_MASK = 0xffff,
|
||||
AUDIO_CHANNEL_ENABLE = 0x400,
|
||||
AUDIO_CHANNEL_ENABLE_MASK = 0xffff,
|
||||
|
||||
AUDIO_MAIN_VOLUME = 0x401,
|
||||
AUDIO_MAIN_VOLUME_MASK = 0x007f,
|
||||
AUDIO_MAIN_VOLUME = 0x401,
|
||||
AUDIO_MAIN_VOLUME_MASK = 0x007f,
|
||||
|
||||
AUDIO_CHANNEL_FIQ_ENABLE = 0x402,
|
||||
AUDIO_CHANNEL_FIQ_ENABLE_MASK = 0xffff,
|
||||
AUDIO_CHANNEL_FIQ_ENABLE = 0x402,
|
||||
AUDIO_CHANNEL_FIQ_ENABLE_MASK = 0xffff,
|
||||
|
||||
AUDIO_CHANNEL_FIQ_STATUS = 0x403,
|
||||
AUDIO_CHANNEL_FIQ_STATUS_MASK = 0xffff,
|
||||
AUDIO_CHANNEL_FIQ_STATUS = 0x403,
|
||||
AUDIO_CHANNEL_FIQ_STATUS_MASK = 0xffff,
|
||||
|
||||
AUDIO_BEAT_BASE_COUNT = 0x404,
|
||||
AUDIO_BEAT_BASE_COUNT_MASK = 0x07ff,
|
||||
AUDIO_BEAT_BASE_COUNT = 0x404,
|
||||
AUDIO_BEAT_BASE_COUNT_MASK = 0x07ff,
|
||||
|
||||
AUDIO_BEAT_COUNT = 0x405,
|
||||
AUDIO_BEAT_COUNT_MASK = 0x3fff,
|
||||
AUDIO_BIS_MASK = 0x4000,
|
||||
AUDIO_BIE_MASK = 0x8000,
|
||||
AUDIO_BEAT_COUNT = 0x405,
|
||||
AUDIO_BEAT_COUNT_MASK = 0x3fff,
|
||||
AUDIO_BIS_MASK = 0x4000,
|
||||
AUDIO_BIE_MASK = 0x8000,
|
||||
|
||||
AUDIO_ENVCLK0 = 0x406,
|
||||
AUDIO_ENVCLK0 = 0x406,
|
||||
|
||||
AUDIO_ENVCLK0_HIGH = 0x407,
|
||||
AUDIO_ENVCLK0_HIGH_MASK = 0xffff,
|
||||
AUDIO_ENVCLK0_HIGH = 0x407,
|
||||
AUDIO_ENVCLK0_HIGH_MASK = 0xffff,
|
||||
|
||||
AUDIO_ENVCLK1 = 0x408,
|
||||
AUDIO_ENVCLK1 = 0x408,
|
||||
|
||||
AUDIO_ENVCLK1_HIGH = 0x409,
|
||||
AUDIO_ENVCLK1_HIGH_MASK = 0xffff,
|
||||
AUDIO_ENVCLK1_HIGH = 0x409,
|
||||
AUDIO_ENVCLK1_HIGH_MASK = 0xffff,
|
||||
|
||||
AUDIO_ENV_RAMP_DOWN = 0x40a,
|
||||
AUDIO_ENV_RAMP_DOWN_MASK = 0xffff,
|
||||
AUDIO_ENV_RAMP_DOWN = 0x40a,
|
||||
AUDIO_ENV_RAMP_DOWN_MASK = 0xffff,
|
||||
|
||||
AUDIO_CHANNEL_STOP = 0x40b,
|
||||
AUDIO_CHANNEL_STOP_MASK = 0xffff,
|
||||
AUDIO_CHANNEL_STOP = 0x40b,
|
||||
AUDIO_CHANNEL_STOP_MASK = 0xffff,
|
||||
|
||||
AUDIO_CHANNEL_ZERO_CROSS = 0x40c,
|
||||
AUDIO_CHANNEL_ZERO_CROSS_MASK = 0xffff,
|
||||
AUDIO_CHANNEL_ZERO_CROSS = 0x40c,
|
||||
AUDIO_CHANNEL_ZERO_CROSS_MASK = 0xffff,
|
||||
|
||||
AUDIO_CONTROL = 0x40d,
|
||||
AUDIO_CONTROL_MASK = 0x9fe8,
|
||||
AUDIO_CONTROL_SATURATE_MASK = 0x8000,
|
||||
AUDIO_CONTROL_SOFTCH_MASK = 0x1000,
|
||||
AUDIO_CONTROL_COMPEN_MASK = 0x0800,
|
||||
AUDIO_CONTROL_NOHIGH_MASK = 0x0400,
|
||||
AUDIO_CONTROL_NOINT_MASK = 0x0200,
|
||||
AUDIO_CONTROL_EQEN_MASK = 0x0100,
|
||||
AUDIO_CONTROL_VOLSEL_MASK = 0x00c0,
|
||||
AUDIO_CONTROL_VOLSEL_SHIFT = 6,
|
||||
AUDIO_CONTROL_FOF_MASK = 0x0020,
|
||||
AUDIO_CONTROL_INIT_MASK = 0x0008,
|
||||
AUDIO_CONTROL = 0x40d,
|
||||
AUDIO_CONTROL_MASK = 0x9fe8,
|
||||
AUDIO_CONTROL_SATURATE_MASK = 0x8000,
|
||||
AUDIO_CONTROL_SOFTCH_MASK = 0x1000,
|
||||
AUDIO_CONTROL_COMPEN_MASK = 0x0800,
|
||||
AUDIO_CONTROL_NOHIGH_MASK = 0x0400,
|
||||
AUDIO_CONTROL_NOINT_MASK = 0x0200,
|
||||
AUDIO_CONTROL_EQEN_MASK = 0x0100,
|
||||
AUDIO_CONTROL_VOLSEL_MASK = 0x00c0,
|
||||
AUDIO_CONTROL_VOLSEL_SHIFT = 6,
|
||||
AUDIO_CONTROL_FOF_MASK = 0x0020,
|
||||
AUDIO_CONTROL_INIT_MASK = 0x0008,
|
||||
|
||||
AUDIO_COMPRESS_CTRL = 0x40e,
|
||||
AUDIO_COMPRESS_CTRL_PEAK_MASK = 0x8000,
|
||||
AUDIO_COMPRESS_CTRL_THRESHOLD_MASK = 0x7f00,
|
||||
AUDIO_COMPRESS_CTRL_THRESHOLD_SHIFT = 8,
|
||||
AUDIO_COMPRESS_CTRL_ATTSCALE_MASK = 0x00c0,
|
||||
AUDIO_COMPRESS_CTRL_ATTSCALE_SHIFT = 6,
|
||||
AUDIO_COMPRESS_CTRL_RELSCALE_MASK = 0x0030,
|
||||
AUDIO_COMPRESS_CTRL_RELSCALE_SHIFT = 4,
|
||||
AUDIO_COMPRESS_CTRL_DISZC_MASK = 0x0008,
|
||||
AUDIO_COMPRESS_CTRL_RATIO_MASK = 0x0007,
|
||||
AUDIO_COMPRESS_CTRL = 0x40e,
|
||||
AUDIO_COMPRESS_CTRL_PEAK_MASK = 0x8000,
|
||||
AUDIO_COMPRESS_CTRL_THRESHOLD_MASK = 0x7f00,
|
||||
AUDIO_COMPRESS_CTRL_THRESHOLD_SHIFT = 8,
|
||||
AUDIO_COMPRESS_CTRL_ATTSCALE_MASK = 0x00c0,
|
||||
AUDIO_COMPRESS_CTRL_ATTSCALE_SHIFT = 6,
|
||||
AUDIO_COMPRESS_CTRL_RELSCALE_MASK = 0x0030,
|
||||
AUDIO_COMPRESS_CTRL_RELSCALE_SHIFT = 4,
|
||||
AUDIO_COMPRESS_CTRL_DISZC_MASK = 0x0008,
|
||||
AUDIO_COMPRESS_CTRL_RATIO_MASK = 0x0007,
|
||||
|
||||
AUDIO_CHANNEL_STATUS = 0x40f,
|
||||
AUDIO_CHANNEL_STATUS_MASK = 0xffff,
|
||||
AUDIO_CHANNEL_STATUS = 0x40f,
|
||||
AUDIO_CHANNEL_STATUS_MASK = 0xffff,
|
||||
|
||||
AUDIO_WAVE_IN_L = 0x410,
|
||||
AUDIO_WAVE_IN_L = 0x410,
|
||||
|
||||
AUDIO_WAVE_IN_R = 0x411,
|
||||
AUDIO_SOFTIRQ_MASK = 0x8000,
|
||||
AUDIO_SOFTIRQ_EN_MASK = 0x4000,
|
||||
AUDIO_SOFT_PHASE_HIGH_MASK = 0x0070,
|
||||
AUDIO_SOFT_PHASE_HIGH_SHIFT = 4,
|
||||
AUDIO_FIFO_IRQ_THRESHOLD_MASK = 0x000f,
|
||||
AUDIO_WAVE_IN_R = 0x411,
|
||||
AUDIO_SOFTIRQ_MASK = 0x8000,
|
||||
AUDIO_SOFTIRQ_EN_MASK = 0x4000,
|
||||
AUDIO_SOFT_PHASE_HIGH_MASK = 0x0070,
|
||||
AUDIO_SOFT_PHASE_HIGH_SHIFT = 4,
|
||||
AUDIO_FIFO_IRQ_THRESHOLD_MASK = 0x000f,
|
||||
|
||||
AUDIO_WAVE_OUT_L = 0x412,
|
||||
AUDIO_WAVE_OUT_R = 0x413,
|
||||
AUDIO_WAVE_OUT_L = 0x412,
|
||||
AUDIO_WAVE_OUT_R = 0x413,
|
||||
|
||||
AUDIO_CHANNEL_REPEAT = 0x414,
|
||||
AUDIO_CHANNEL_REPEAT_MASK = 0xffff,
|
||||
AUDIO_CHANNEL_REPEAT = 0x414,
|
||||
AUDIO_CHANNEL_REPEAT_MASK = 0xffff,
|
||||
|
||||
AUDIO_CHANNEL_ENV_MODE = 0x415,
|
||||
AUDIO_CHANNEL_ENV_MODE_MASK = 0xffff,
|
||||
AUDIO_CHANNEL_ENV_MODE = 0x415,
|
||||
AUDIO_CHANNEL_ENV_MODE_MASK = 0xffff,
|
||||
|
||||
AUDIO_CHANNEL_TONE_RELEASE = 0x416,
|
||||
AUDIO_CHANNEL_TONE_RELEASE_MASK = 0xffff,
|
||||
AUDIO_CHANNEL_TONE_RELEASE = 0x416,
|
||||
AUDIO_CHANNEL_TONE_RELEASE_MASK = 0xffff,
|
||||
|
||||
AUDIO_CHANNEL_ENV_IRQ = 0x417,
|
||||
AUDIO_CHANNEL_ENV_IRQ_MASK = 0xffff,
|
||||
AUDIO_CHANNEL_ENV_IRQ = 0x417,
|
||||
AUDIO_CHANNEL_ENV_IRQ_MASK = 0xffff,
|
||||
|
||||
AUDIO_CHANNEL_PITCH_BEND = 0x418,
|
||||
AUDIO_CHANNEL_PITCH_BEND_MASK = 0xffff,
|
||||
AUDIO_CHANNEL_PITCH_BEND = 0x418,
|
||||
AUDIO_CHANNEL_PITCH_BEND_MASK = 0xffff,
|
||||
|
||||
AUDIO_SOFT_PHASE = 0x419,
|
||||
AUDIO_SOFT_PHASE = 0x419,
|
||||
|
||||
AUDIO_ATTACK_RELEASE = 0x41a,
|
||||
AUDIO_RELEASE_TIME_MASK = 0x00ff,
|
||||
AUDIO_ATTACK_TIME_MASK = 0xff00,
|
||||
AUDIO_ATTACK_TIME_SHIFT = 8,
|
||||
AUDIO_ATTACK_RELEASE = 0x41a,
|
||||
AUDIO_RELEASE_TIME_MASK = 0x00ff,
|
||||
AUDIO_ATTACK_TIME_MASK = 0xff00,
|
||||
AUDIO_ATTACK_TIME_SHIFT = 8,
|
||||
|
||||
AUDIO_EQ_CUTOFF10 = 0x41b,
|
||||
AUDIO_EQ_CUTOFF10_MASK = 0x7f7f,
|
||||
AUDIO_EQ_CUTOFF10 = 0x41b,
|
||||
AUDIO_EQ_CUTOFF10_MASK = 0x7f7f,
|
||||
|
||||
AUDIO_EQ_CUTOFF32 = 0x41c,
|
||||
AUDIO_EQ_CUTOFF32_MASK = 0x7f7f,
|
||||
AUDIO_EQ_CUTOFF32 = 0x41c,
|
||||
AUDIO_EQ_CUTOFF32_MASK = 0x7f7f,
|
||||
|
||||
AUDIO_EQ_GAIN10 = 0x41d,
|
||||
AUDIO_EQ_GAIN10_MASK = 0x7f7f,
|
||||
AUDIO_EQ_GAIN10 = 0x41d,
|
||||
AUDIO_EQ_GAIN10_MASK = 0x7f7f,
|
||||
|
||||
AUDIO_EQ_GAIN32 = 0x41e,
|
||||
AUDIO_EQ_GAIN32_MASK = 0x7f7f
|
||||
AUDIO_EQ_GAIN32 = 0x41e,
|
||||
AUDIO_EQ_GAIN32_MASK = 0x7f7f
|
||||
};
|
||||
|
||||
DECLARE_READ16_MEMBER(video_r);
|
||||
|
||||
@ -12,21 +12,21 @@
|
||||
|
||||
DEFINE_DEVICE_TYPE(SUN4C_MMU, sun4c_mmu_device, "sun4c_mmu", "Sun 4C MMU")
|
||||
|
||||
#define LOG_PAGE_MAP (1U << 0)
|
||||
#define LOG_SEGMENT_MAP (1U << 1)
|
||||
#define LOG_INVALID_PTE (1U << 2)
|
||||
#define LOG_SYSTEM (1U << 3)
|
||||
#define LOG_CONTEXT (1U << 4)
|
||||
#define LOG_SYSTEM_ENABLE (1U << 5)
|
||||
#define LOG_BUSERROR (1U << 6)
|
||||
#define LOG_CACHE_TAGS (1U << 7)
|
||||
#define LOG_CACHE_DATA (1U << 8)
|
||||
#define LOG_UNKNOWN_SYSTEM (1U << 9)
|
||||
#define LOG_UNKNOWN_SEGMENT (1U << 10)
|
||||
#define LOG_TYPE0_TIMEOUT (1U << 11)
|
||||
#define LOG_UNKNOWN_SPACE (1U << 12)
|
||||
#define LOG_WRITE_PROTECT (1U << 13)
|
||||
#define LOG_ALL_ASI (1U << 14) // WARNING: Heavy!
|
||||
#define LOG_PAGE_MAP (1U << 0)
|
||||
#define LOG_SEGMENT_MAP (1U << 1)
|
||||
#define LOG_INVALID_PTE (1U << 2)
|
||||
#define LOG_SYSTEM (1U << 3)
|
||||
#define LOG_CONTEXT (1U << 4)
|
||||
#define LOG_SYSTEM_ENABLE (1U << 5)
|
||||
#define LOG_BUSERROR (1U << 6)
|
||||
#define LOG_CACHE_TAGS (1U << 7)
|
||||
#define LOG_CACHE_DATA (1U << 8)
|
||||
#define LOG_UNKNOWN_SYSTEM (1U << 9)
|
||||
#define LOG_UNKNOWN_SEGMENT (1U << 10)
|
||||
#define LOG_TYPE0_TIMEOUT (1U << 11)
|
||||
#define LOG_UNKNOWN_SPACE (1U << 12)
|
||||
#define LOG_WRITE_PROTECT (1U << 13)
|
||||
#define LOG_ALL_ASI (1U << 14) // WARNING: Heavy!
|
||||
|
||||
#define VERBOSE (0)
|
||||
#include "logmacro.h"
|
||||
@ -447,11 +447,11 @@ template uint32_t sun4c_mmu_device::insn_data_r<sun4c_mmu_device::SUPER_DATA>(co
|
||||
template <sun4c_mmu_device::insn_data_mode MODE>
|
||||
uint32_t sun4c_mmu_device::insn_data_r(const uint32_t offset, const uint32_t mem_mask)
|
||||
{
|
||||
// supervisor program fetches in boot state are special
|
||||
if (MODE == SUPER_INSN && m_fetch_bootrom)
|
||||
{
|
||||
return m_rom_ptr[offset & 0x1ffff];
|
||||
}
|
||||
// supervisor program fetches in boot state are special
|
||||
if (MODE == SUPER_INSN && m_fetch_bootrom)
|
||||
{
|
||||
return m_rom_ptr[offset & 0x1ffff];
|
||||
}
|
||||
|
||||
// it's translation time
|
||||
const uint32_t pmeg = m_curr_segmap_masked[(offset >> 16) & 0xfff];// & m_pmeg_mask;
|
||||
|
||||
@ -143,8 +143,8 @@ protected:
|
||||
bool m_page_valid[16384];
|
||||
|
||||
// Internal MAME device state
|
||||
uint8_t m_ctx_mask; // SS2 is sun4c but has 16 contexts; most have 8
|
||||
uint8_t m_pmeg_mask; // SS2 is sun4c but has 16384 PTEs; most have 8192
|
||||
uint8_t m_ctx_mask; // SS2 is sun4c but has 16 contexts; most have 8
|
||||
uint8_t m_pmeg_mask; // SS2 is sun4c but has 16384 PTEs; most have 8192
|
||||
uint32_t m_ram_set_mask[4]; // Used for mirroring within 4 megabyte sets
|
||||
uint32_t m_ram_set_base[4];
|
||||
uint32_t m_populated_ram_words;
|
||||
|
||||
@ -66,12 +66,12 @@ DEFINE_DEVICE_TYPE(DP8367, dp8367_device, "dp8367", "DP8367 CRTC")
|
||||
//-------------------------------------------------
|
||||
|
||||
dp835x_device::dp835x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock,
|
||||
int char_width, int char_height, int chars_per_row, int rows_per_frame,
|
||||
int vsync_delay_f1, int vsync_width_f1, int vblank_interval_f1,
|
||||
int vsync_delay_f0, int vsync_width_f0, int vblank_interval_f0,
|
||||
int chars_per_line, int hsync_delay, int hsync_width, int vblank_stop,
|
||||
bool cursor_on_all_lines, int lbc_0_width, int hsync_serration,
|
||||
bool hsync_active, bool vsync_active, bool vblank_active)
|
||||
int char_width, int char_height, int chars_per_row, int rows_per_frame,
|
||||
int vsync_delay_f1, int vsync_width_f1, int vblank_interval_f1,
|
||||
int vsync_delay_f0, int vsync_width_f0, int vblank_interval_f0,
|
||||
int chars_per_line, int hsync_delay, int hsync_width, int vblank_stop,
|
||||
bool cursor_on_all_lines, int lbc_0_width, int hsync_serration,
|
||||
bool hsync_active, bool vsync_active, bool vblank_active)
|
||||
: device_t(mconfig, type, tag, owner, clock)
|
||||
, device_video_interface(mconfig, *this)
|
||||
, m_char_width(char_width)
|
||||
@ -124,12 +124,12 @@ dp835x_device::dp835x_device(const machine_config &mconfig, device_type type, co
|
||||
|
||||
dp8350_device::dp8350_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
: dp835x_device(mconfig, DP8350, tag, owner, clock,
|
||||
7, 10, 80, 24,
|
||||
4, 10, 20,
|
||||
30, 10, 72,
|
||||
100, 0, 43, 1, // yes, the horizontal sync pulse is more than twice as long as the blanking period
|
||||
true, 4, 0,
|
||||
true, false, true)
|
||||
7, 10, 80, 24,
|
||||
4, 10, 20,
|
||||
30, 10, 72,
|
||||
100, 0, 43, 1, // yes, the horizontal sync pulse is more than twice as long as the blanking period
|
||||
true, 4, 0,
|
||||
true, false, true)
|
||||
{
|
||||
}
|
||||
|
||||
@ -140,12 +140,12 @@ dp8350_device::dp8350_device(const machine_config &mconfig, const char *tag, dev
|
||||
|
||||
dp8367_device::dp8367_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
: dp835x_device(mconfig, DP8367, tag, owner, clock,
|
||||
9, 15, 80, 26,
|
||||
0, 19, 25,
|
||||
38, 64, 108,
|
||||
115, -16, 7, 1, // value of vblank_stop assumed
|
||||
true, 5, 0, // values assumed
|
||||
true, true, true)
|
||||
9, 15, 80, 26,
|
||||
0, 19, 25,
|
||||
38, 64, 108,
|
||||
115, -16, 7, 1, // value of vblank_stop assumed
|
||||
true, 5, 0, // values assumed
|
||||
true, true, true)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
@ -74,12 +74,12 @@ public:
|
||||
protected:
|
||||
// base type constructor
|
||||
dp835x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock,
|
||||
int char_width, int char_height, int chars_per_row, int rows_per_frame,
|
||||
int vsync_delay_f1, int vsync_width_f1, int vblank_interval_f1,
|
||||
int vsync_delay_f0, int vsync_width_f0, int vblank_interval_f0,
|
||||
int chars_per_line, int hsync_delay, int hsync_width, int vblank_stop,
|
||||
bool cursor_on_all_lines, int lbc_0_width, int hsync_serration,
|
||||
bool hsync_active, bool vsync_active, bool vblank_active);
|
||||
int char_width, int char_height, int chars_per_row, int rows_per_frame,
|
||||
int vsync_delay_f1, int vsync_width_f1, int vblank_interval_f1,
|
||||
int vsync_delay_f0, int vsync_width_f0, int vblank_interval_f0,
|
||||
int chars_per_line, int hsync_delay, int hsync_width, int vblank_stop,
|
||||
bool cursor_on_all_lines, int lbc_0_width, int hsync_serration,
|
||||
bool hsync_active, bool vsync_active, bool vblank_active);
|
||||
|
||||
// device-specific overrides
|
||||
virtual void device_config_complete() override;
|
||||
|
||||
@ -690,7 +690,7 @@ ROM_END
|
||||
// "FUCK SHIT CUNT PRICK PENUS BALLS PUTA JODER POLLA PUTO MAMON PICHA COJON TETA TETAS TITS CHULO CULO PENE PIJO LEFA LISTO"
|
||||
ROM_START( zortonbr )
|
||||
ALG_BIOS
|
||||
|
||||
|
||||
ROM_REGION( 0x40000, "game_program", ROMREGION_ERASEFF )
|
||||
ROM_LOAD16_BYTE( "zort_1-01_23-3-94_odd.u2", 0x000000, 0x10000, CRC(21e63949) SHA1(0a62ad108f8cfa00dc8f03dea2ff6f1b277e8d5d) )
|
||||
ROM_LOAD16_BYTE( "zort_1-01_23-3-94_even.u3", 0x000001, 0x10000, CRC(6a051c6a) SHA1(f8daafab068fef57e47287bd72be860b84e2e75c) )
|
||||
|
||||
@ -484,7 +484,7 @@ ROM_START( atetrisb2 )
|
||||
ROM_LOAD( "b-gal16v8-b.bin", 0x117, 0x117, CRC(b1dfab0f) SHA1(e9e4db5459617a35a13df4b7a4586dd1b7be04ac) ) // sub PCB - Same content as "a"
|
||||
ROM_LOAD( "c-gal16v8-b.bin", 0x22e, 0x117, CRC(e1a9db0b) SHA1(5bbac24e37a4d9b8a1387054722fa35478ca7941) ) // sub PCB
|
||||
ROM_LOAD( "1-pal16l8-a.3g" , 0x345, 0x104, CRC(dcf0d2fe) SHA1(0496acaa605ec5008b110c387136bbc714441384) ) // main PCB - Found also as GAL16v8 on some PCBs
|
||||
ROM_LOAD( "2-pal16r4-a.3r" , 0x449, 0x104, CRC(d71bdf27) SHA1(cc3503cb037de344fc353886f3492601638c9d45) ) // main PCB
|
||||
ROM_LOAD( "2-pal16r4-a.3r" , 0x449, 0x104, CRC(d71bdf27) SHA1(cc3503cb037de344fc353886f3492601638c9d45) ) // main PCB
|
||||
ROM_LOAD( "3-pal16r4-a.8p" , 0x54D, 0x104, CRC(e007edf2) SHA1(4f1bc31abd64e402edb4c900ddb21f258d6782c8) ) // main PCB - Found also as GAL16v8 on some PCBs
|
||||
ROM_LOAD( "4-pal16l8-a.9n" , 0x651, 0x104, CRC(3630e734) SHA1(a29dc202ffc75ac48815115b85e984fc0c9d5b59) ) // main PCB - Found also as GAL16v8 on some PCBs
|
||||
ROM_LOAD( "5-pal16l8-a.9m" , 0x755, 0x104, CRC(53b64be1) SHA1(2bf712b766541c90c38c0810ee16848e448c5205) ) // main PCB - Found also as GAL16v8 on some PCBs
|
||||
@ -569,7 +569,7 @@ H |74LS04 PAL16R8 ___________ | | | UN |74LS161 |
|
||||
I |74LS32 74LS373 |__________| 74LS32 | PU |PAL16L8 |
|
||||
| __________ 74LS04 | LA | |
|
||||
J |74LS374 74LS357 | X2804AP | 74LS257 74LS138 | TED |PAL16?? |
|
||||
|____________ |_________| 74LS257 74LS257 | | |
|
||||
|____________ |_________| 74LS257 74LS257 | | |
|
||||
K ||D3 27PC256 | |_____|74LS161 |
|
||||
||___________| 74LS245 74LS245 |
|
||||
L |________________ _______________ 74LS257 74LS74 74LS161 |
|
||||
|
||||
@ -553,7 +553,7 @@ ROM_START( brkthruj )
|
||||
ROM_LOAD( "brkthru.5", 0x8000, 0x8000, CRC(c309435f) SHA1(82914004c2b169a7c31aa49af83a699ebbc7b33f) )
|
||||
ROM_END
|
||||
|
||||
// Tecfri PCB with Data East license.
|
||||
// Tecfri PCB with Data East license.
|
||||
// Although only program ROM "8.bin" is marked as BAD_DUMP, it would be better to redump all program ROMs, to be 100% sure it's a good set.
|
||||
ROM_START( brkthrut )
|
||||
ROM_REGION( 0x20000, "maincpu", 0 ) /* 64k for main CPU + 64k for banked ROMs */
|
||||
@ -569,7 +569,7 @@ ROM_START( brkthrut )
|
||||
/* background */
|
||||
/* we do a lot of scatter loading here, to place the data in a format */
|
||||
/* which can be decoded by MAME's standard functions */
|
||||
ROM_LOAD( "2.bin", 0x00000, 0x4000, CRC(920cc56a) SHA1(c75806691073f1f3bd54dcaca4c14155ecf4471d) ) /* bitplanes 1,2 for bank 1,2 */ /* Same as parent */
|
||||
ROM_LOAD( "2.bin", 0x00000, 0x4000, CRC(920cc56a) SHA1(c75806691073f1f3bd54dcaca4c14155ecf4471d) ) /* bitplanes 1,2 for bank 1,2 */ /* Same as parent */
|
||||
ROM_CONTINUE( 0x08000, 0x4000 ) /* bitplanes 1,2 for bank 3,4 */
|
||||
ROM_LOAD( "1.bin", 0x10000, 0x4000, CRC(6c47dc43) SHA1(3274fb8ddf0e0c91f5796677255ade78e3b3f9d6) ) /* bitplanes 1,2 for bank 5,6 */
|
||||
ROM_CONTINUE( 0x18000, 0x4000 ) /* bitplanes 1,2 for bank 7,8 */
|
||||
|
||||
@ -666,7 +666,7 @@ MACHINE_START_MEMBER(combatsc_state,combatsc)
|
||||
save_pointer(NAME(m_page[0]),0x2000);
|
||||
save_pointer(NAME(m_page[1]),0x2000);
|
||||
save_pointer(NAME(m_scrollram0), 0x40);
|
||||
save_pointer(NAME(m_scrollram1), 0x40);
|
||||
save_pointer(NAME(m_scrollram1), 0x40);
|
||||
}
|
||||
|
||||
MACHINE_START_MEMBER(combatsc_state,combatscb)
|
||||
|
||||
@ -1050,8 +1050,8 @@ uint32_t cps3_state::screen_update_cps3(screen_device &screen, bitmap_rgb32 &bit
|
||||
// decode_charram();
|
||||
|
||||
/* registers are normally 002a006f 01ef01c6
|
||||
widescreen mode = 00230076 026501c6
|
||||
only SFIII2 uses widescreen, I don't know exactly which register controls it */
|
||||
widescreen mode = 00230076 026501c6
|
||||
only SFIII2 uses widescreen, I don't know exactly which register controls it */
|
||||
if (((m_fullscreenzoom[1] & 0xffff0000) >> 16) == 0x0265)
|
||||
{
|
||||
if (m_screenwidth != 496)
|
||||
@ -1154,7 +1154,7 @@ uint32_t cps3_state::screen_update_cps3(screen_device &screen, bitmap_rgb32 &bit
|
||||
int tilemapnum = ((value3 & 0x00000030) >> 4);
|
||||
|
||||
/* Urgh, the startline / endline seem to be direct screen co-ordinates regardless of fullscreen zoom
|
||||
which probably means the fullscreen zoom is applied when rendering everything, not aftewards */
|
||||
which probably means the fullscreen zoom is applied when rendering everything, not aftewards */
|
||||
|
||||
if (bg_drawn[tilemapnum] == 0)
|
||||
{
|
||||
@ -1288,10 +1288,10 @@ uint32_t cps3_state::screen_update_cps3(screen_device &screen, bitmap_rgb32 &bit
|
||||
}
|
||||
|
||||
/*
|
||||
SSRAM 0x0000 - 0x1fff tilemap layout bank 0
|
||||
0x2000 - 0x3fff tilemap layout bank 1
|
||||
0x4000 - 0x7fff rowscroll (banked?)
|
||||
0x8000 - 0xffff tile character definitions
|
||||
SSRAM 0x0000 - 0x1fff tilemap layout bank 0
|
||||
0x2000 - 0x3fff tilemap layout bank 1
|
||||
0x4000 - 0x7fff rowscroll (banked?)
|
||||
0x8000 - 0xffff tile character definitions
|
||||
|
||||
*/
|
||||
|
||||
|
||||
@ -280,7 +280,7 @@ WRITE16_MEMBER(cps_state::knightsb_layer_w)
|
||||
WRITE16_MEMBER(cps_state::mtwinsb_layer_w)
|
||||
{
|
||||
m_cps_a_regs[0x06 / 2] = 0x9100; // bit of a hack - the game never writes this, but does need it
|
||||
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
case 0x00:
|
||||
|
||||
@ -21,6 +21,8 @@
|
||||
#include "screen.h"
|
||||
#include "speaker.h"
|
||||
|
||||
#include <algorithm>
|
||||
|
||||
#define VERBOSE_LEVEL ( 0 )
|
||||
|
||||
class hapyfish_state : public driver_device
|
||||
@ -34,7 +36,7 @@ public:
|
||||
m_nand2(*this, "nand2"),
|
||||
m_ldac(*this, "ldac"),
|
||||
m_rdac(*this, "rdac")
|
||||
{ }
|
||||
{ }
|
||||
|
||||
void hapyfish(machine_config &config);
|
||||
|
||||
@ -70,10 +72,10 @@ inline void hapyfish_state::verboselog(int n_level, const char *s_fmt, ...)
|
||||
{
|
||||
va_list v;
|
||||
char buf[32768];
|
||||
va_start( v, s_fmt);
|
||||
vsprintf( buf, s_fmt, v);
|
||||
va_end( v);
|
||||
logerror( "%s: %s", machine().describe_context(), buf);
|
||||
va_start(v, s_fmt);
|
||||
vsprintf(buf, s_fmt, v);
|
||||
va_end(v);
|
||||
logerror("%s: %s", machine().describe_context(), buf);
|
||||
}
|
||||
}
|
||||
|
||||
@ -191,7 +193,7 @@ WRITE8_MEMBER(hapyfish_state::s3c2440_nand_data_w )
|
||||
|
||||
WRITE16_MEMBER(hapyfish_state::s3c2440_i2s_data_w )
|
||||
{
|
||||
if ( offset )
|
||||
if (offset)
|
||||
m_ldac->write(data);
|
||||
else
|
||||
m_rdac->write(data);
|
||||
@ -217,7 +219,7 @@ void hapyfish_state::machine_start()
|
||||
void hapyfish_state::machine_reset()
|
||||
{
|
||||
m_maincpu->reset();
|
||||
memset( m_port, 0, sizeof( m_port));
|
||||
std::fill(std::begin(m_port), std::end(m_port), 0);
|
||||
m_port[8] = 0x1800; // select NAND #1
|
||||
}
|
||||
|
||||
|
||||
@ -571,17 +571,17 @@ ROM_START( crzrallyrf )
|
||||
ROM_LOAD( "crzrallyrf_8.1k", 0x4000, 0x2000, CRC(2a0d5bca) SHA1(8d7aedd63ea374a5809c24f957b0afa3cad437d0) )
|
||||
ROM_LOAD( "crzrallyrf_9.1i", 0x6000, 0x2000, CRC(49c0c2b8) SHA1(30c4fe1dc2df499927f8fd4a041a707b81a04e1d) )
|
||||
|
||||
/* Not dumped on the Refreativos Franco PCB, taken from the parent set */
|
||||
/* Not dumped on the Refreativos Franco PCB, taken from the parent set */
|
||||
ROM_REGION( 0x0300, "proms", 0 )
|
||||
ROM_LOAD( "82s129.9n", 0x0000, 0x0100, CRC(98ff725a) SHA1(553f033212a7c4785c0beb8156400cabcd53cf25) ) /* Red component */
|
||||
ROM_LOAD( "82s129.9m", 0x0100, 0x0100, CRC(d41f5800) SHA1(446046f5694357da876e1307f49584d79c8d9a1a) ) /* Green component */
|
||||
ROM_LOAD( "82s129.9l", 0x0200, 0x0100, CRC(9ed49cb4) SHA1(f54e66e2211d5fb0da9a81e11670367ee4d9b49a) ) /* Blue component */
|
||||
|
||||
/* Not dumped on the Refreativos Franco PCB, taken from the parent set */
|
||||
/* Not dumped on the Refreativos Franco PCB, taken from the parent set */
|
||||
ROM_REGION( 0x0200, "user1", 0 ) // unknown
|
||||
ROM_LOAD( "82s147.1f", 0x0000, 0x0200, CRC(5261bc11) SHA1(1cc7a9a7376e65f4587b75ef9382049458656372) )
|
||||
|
||||
/* Not dumped on the Refreativos Franco PCB, taken from the parent set */
|
||||
/* Not dumped on the Refreativos Franco PCB, taken from the parent set */
|
||||
ROM_REGION( 0x0800, "plds", 0 )
|
||||
ROM_LOAD( "pal16r6a.5k", 0x0000, 0x0104, CRC(3d12afba) SHA1(60245089947e4a4f7bfa94a8cc96d4d8eebe4afc) )
|
||||
ROM_LOAD( "pal16r4a.5l", 0x0200, 0x0104, NO_DUMP ) /* PAL is read protected */
|
||||
|
||||
@ -215,7 +215,7 @@ void hp9825_state::cpu_mem_map(address_map &map)
|
||||
|
||||
READ16_MEMBER(hp9825_state::kb_scancode_r)
|
||||
{
|
||||
// TODO:
|
||||
// TODO:
|
||||
uint8_t res = m_scancode;
|
||||
if (m_shift_key->read()) {
|
||||
BIT_SET(res , 7);
|
||||
@ -788,7 +788,7 @@ static INPUT_PORTS_START(hp9825)
|
||||
PORT_BIT(IOP_MASK(27) , IP_ACTIVE_HIGH , IPT_UNUSED) // 5,11: N/U
|
||||
PORT_BIT(IOP_MASK(28) , IP_ACTIVE_HIGH , IPT_UNUSED) // 5,12: N/U
|
||||
PORT_BIT(IOP_MASK(29) , IP_ACTIVE_HIGH , IPT_UNUSED) // 5,13: N/U
|
||||
PORT_BIT(IOP_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_NAME("↑ √") // 5,14: ^
|
||||
PORT_BIT(IOP_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_NAME(u8"\u2191 \u221A") // 5,14: ^ (↑ √)
|
||||
PORT_BIT(IOP_MASK(31) , IP_ACTIVE_HIGH , IPT_UNUSED) // 5,15: N/U
|
||||
|
||||
PORT_START("KEY3")
|
||||
@ -819,9 +819,9 @@ static INPUT_PORTS_START(hp9825)
|
||||
PORT_BIT(IOP_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') // 7,8: X
|
||||
PORT_BIT(IOP_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') // 7,9: Y
|
||||
PORT_BIT(IOP_MASK(26) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') // 7,10: Z
|
||||
PORT_BIT(IOP_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("π |") // 7,11: Pi
|
||||
PORT_BIT(IOP_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME(u8"π |") // 7,11: Pi
|
||||
PORT_BIT(IOP_MASK(28) , IP_ACTIVE_HIGH , IPT_UNUSED) // 7,12: N/U
|
||||
PORT_BIT(IOP_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_END) PORT_NAME("→") // 7,13: Gazinta
|
||||
PORT_BIT(IOP_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_END) PORT_NAME(u8"\u2192") // 7,13: Gazinta (→)
|
||||
PORT_BIT(IOP_MASK(30) , IP_ACTIVE_HIGH , IPT_UNUSED) // 7,14: N/U
|
||||
PORT_BIT(IOP_MASK(31) , IP_ACTIVE_HIGH , IPT_UNUSED) // 7,15: N/U
|
||||
|
||||
|
||||
@ -241,7 +241,7 @@ TIMER_CALLBACK_MEMBER(hp9k3xx_state::bus_error_timeout)
|
||||
WRITE16_MEMBER(hp9k3xx_state::led_w)
|
||||
{
|
||||
if (!(mem_mask & 0xff))
|
||||
return;
|
||||
return;
|
||||
|
||||
LOG("LED: %02x\n", data & 0xff);
|
||||
|
||||
@ -290,7 +290,7 @@ void hp9k3xx_state::set_bus_error(uint32_t address, bool write, uint16_t mem_mas
|
||||
|
||||
m_bus_error = true;
|
||||
m_maincpu->set_buserror_details(address, write, m_maincpu->get_fc());
|
||||
m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
|
||||
m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
|
||||
m_bus_error_timer->adjust(m_maincpu->cycles_to_attotime(16)); // let rmw cycles complete
|
||||
}
|
||||
|
||||
|
||||
@ -926,7 +926,7 @@ MACHINE_CONFIG_START(ibm6580_state::ibm6580)
|
||||
|
||||
UPD765A(config, m_fdc, false, false);
|
||||
m_fdc->intrq_wr_callback().set(FUNC(ibm6580_state::floppy_intrq));
|
||||
// m_fdc->intrq_wr_callback().append("pic8259", FUNC(pic8259_device::ir4_w));
|
||||
// m_fdc->intrq_wr_callback().append("pic8259", FUNC(pic8259_device::ir4_w));
|
||||
m_fdc->drq_wr_callback().set(m_dma8257, FUNC(i8257_device::dreq0_w));
|
||||
MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", dw_floppies, "8sssd", floppy_image_device::default_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", dw_floppies, "8sssd", floppy_image_device::default_floppy_formats)
|
||||
|
||||
@ -19,7 +19,7 @@
|
||||
There are at least 4 variants for this hardware.
|
||||
The first 3 share the same layout, the latest is a complete redesign.
|
||||
|
||||
---------
|
||||
---------
|
||||
The oldest revision (green) is marked "H83048" with the following hardware:
|
||||
(note that @IC2 is unpopulated)
|
||||
CPU:
|
||||
@ -27,7 +27,7 @@ The oldest revision (green) is marked "H83048" with the following hardware:
|
||||
(128KB ROM; 4KB RAM)
|
||||
Sound:
|
||||
1x OKI 6295 or clones @IC24
|
||||
1x LM358N dual operational amplifier @IC27
|
||||
1x LM358N dual operational amplifier @IC27
|
||||
1x TDA2003 audio amplifier @IC26
|
||||
PLDs:
|
||||
1x ispLSI2064-80LJ @IC12
|
||||
@ -89,14 +89,14 @@ A complete redesign (green) is marked "ND 2001 Rev 1.0" and uses smaller factor
|
||||
(128KB ROM; 4KB RAM)
|
||||
Sound:
|
||||
1x OKI 6295 or clones @IC15
|
||||
1x LM358N dual operational amplifier @IC13
|
||||
1x LM358N dual operational amplifier @IC13
|
||||
1x TDA2003 audio amplifier @IC8
|
||||
PLDs:
|
||||
1x ispLSI2064-80LJ @IC24
|
||||
Clock:
|
||||
1x Xtal 30.000 MHz @OSC1
|
||||
1x Resonator ZTB1000J (1000 kHz) @X1
|
||||
1x Xtal K0SoF @X2
|
||||
1x Xtal K0SoF @X2
|
||||
ROMs:
|
||||
1x 27C010 (sound) @IC1
|
||||
2x 27C040 (graphics) @IC7,8
|
||||
@ -112,8 +112,8 @@ A complete redesign (green) is marked "ND 2001 Rev 1.0" and uses smaller factor
|
||||
Known games on this hardware revision are:
|
||||
2001.11 Bowling Road (Ver 1.4)
|
||||
2001.12 World Cup (Ver 1.4)
|
||||
|
||||
|
||||
|
||||
|
||||
*******************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
@ -476,7 +476,7 @@ ROM_END
|
||||
/* Pin Ups (Ver 1.0 Rev A)
|
||||
PCB is marked: "CE H83048" on component side
|
||||
PCB is marked: "H83048 bottom" on solder side
|
||||
PCB is labeled: "PIN UPS VER.1.0 REV.A" on component side
|
||||
PCB is labeled: "PIN UPS VER.1.0 REV.A" on component side
|
||||
*/
|
||||
ROM_START( pinups )
|
||||
ROM_REGION( 0x1000000, "maincpu", 0 )
|
||||
|
||||
@ -265,7 +265,7 @@ GAME_CUSTOM( 199?, m4rhrock__a, m4rhrock, "rhr_v300_1216_ce52_nlv.bin", 0x0
|
||||
ROM_REGION( 0x200000, "msm6376", ROMREGION_ERASE00 ) \
|
||||
ROM_LOAD( "redhotwheelssnd.p1", 0x0000, 0x080000, CRC(7b274a71) SHA1(38ba69084819133253b41f2eb1d784104e5f10f7) ) \
|
||||
ROM_LOAD( "redhotwheelssnd.p2", 0x0000, 0x080000, CRC(e36e19e2) SHA1(204554622c9020479b095acd4fbab1f21f829137) )
|
||||
|
||||
|
||||
#undef GAME_CUSTOM
|
||||
#define GAME_CUSTOM(year, setname,parent,name,offset,length,hash,company,title) \
|
||||
ROM_START( setname ) \
|
||||
@ -325,11 +325,11 @@ GAME_CUSTOM( 199?, m4shoknr__a, m4shoknr, "snr_v300_1221_c8ff_nlv.bin", 0
|
||||
GAME_CUSTOM( 199?, m4shoknr__b, m4shoknr, "snr_v200_1145_047f_lv.bin", 0x0000, 0x040000, CRC(73ef1e1a) SHA1(6ccaf64daa5acacfba4df576281bb5478f2fbd29), "Qps","Shock 'n' Roll (Qps) (MPU4) (set 3)" )
|
||||
GAME_CUSTOM( 199?, m4shoknr__c, m4shoknr, "snr_v200_1655_5a69_nlv.bin", 0x0000, 0x040000, CRC(50ba0c6b) SHA1(767fd59858fc55ae95f096f00c54bd619369a56c), "Qps","Shock 'n' Roll (Qps) (MPU4) (set 4)" )
|
||||
|
||||
// 71000300.lo.hex and 71000300.hi.hex converted
|
||||
// 71000300.lo.hex and 71000300.hi.hex converted
|
||||
#define M4TORNAD_EXTRA_ROMS \
|
||||
ROM_REGION( 0x200000, "msm6376", ROMREGION_ERASE00 ) \
|
||||
ROM_LOAD( "tornadosnd.p1", 0x000000, 0x080000, CRC(cac88f25) SHA1(6ccbf372d983a47a49caedb8a526fc7703b31ed4) ) \
|
||||
ROM_LOAD( "tornadosnd.p2", 0x080000, 0x080000, CRC(ef4f563d) SHA1(1268061edd93474296e3454e0a2e706b90c0621c) )
|
||||
ROM_LOAD( "tornadosnd.p2", 0x080000, 0x080000, CRC(ef4f563d) SHA1(1268061edd93474296e3454e0a2e706b90c0621c) )
|
||||
|
||||
#undef GAME_CUSTOM
|
||||
#define GAME_CUSTOM(year, setname,parent,name,offset,length,hash,company,title) \
|
||||
@ -353,7 +353,7 @@ GAME_CUSTOM( 199?, m4tornad__g, m4tornad, "tornsp_v200_1626_ec93_lv.bin",
|
||||
#define M4SHKWAV_EXTRA_ROMS \
|
||||
ROM_REGION( 0x200000, "msm6376", ROMREGION_ERASE00 ) \
|
||||
ROM_LOAD( "shocksnd.p1", 0x000000, 0x080000, CRC(54bf0ddb) SHA1(693b855367972b5a45e9d2d6152849ab2cde38a7) ) \
|
||||
ROM_LOAD( "shocksnd.p2", 0x080000, 0x080000, CRC(facebc55) SHA1(75367473646cfc735f4d1267e13a9c92ea19c4e3) )
|
||||
ROM_LOAD( "shocksnd.p2", 0x080000, 0x080000, CRC(facebc55) SHA1(75367473646cfc735f4d1267e13a9c92ea19c4e3) )
|
||||
|
||||
#undef GAME_CUSTOM
|
||||
#define GAME_CUSTOM(year, setname,parent,name,offset,length,hash,company,title) \
|
||||
|
||||
@ -271,7 +271,7 @@ GFXDECODE_END
|
||||
* Video emulation
|
||||
*
|
||||
*************************************/
|
||||
|
||||
|
||||
uint32_t mwarr_state::screen_update_mwarr(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
return m_video->draw(screen, bitmap, cliprect);
|
||||
|
||||
@ -13,11 +13,11 @@
|
||||
- GFX rom banking is a mystery (bad ROMs? Encryption?)
|
||||
- Where is the extra data ROM mapped?
|
||||
|
||||
gynotai TODOs:
|
||||
- printer (disable it in service mode);
|
||||
- ball sensors aren't understood;
|
||||
- Seems to dislike our YGV608 row/colscroll handling;
|
||||
|
||||
gynotai TODOs:
|
||||
- printer (disable it in service mode);
|
||||
- ball sensors aren't understood;
|
||||
- Seems to dislike our YGV608 row/colscroll handling;
|
||||
|
||||
To make abcheck run when the EEPROM is clear:
|
||||
- F2 to enter service mode
|
||||
- Player 3 A/B to navigate to GAME OPTIONS
|
||||
@ -522,7 +522,7 @@ ROM_START( gynotai )
|
||||
|
||||
ROM_REGION( 0x800000, "ygv608", 0 ) /* 8MB character generator */
|
||||
ROM_LOAD( "gy1cg0.10e", 0x000000, 0x400000, CRC(938c7912) SHA1(36278a945a00e1549ae55ec65a9b4001537023b0) )
|
||||
ROM_LOAD( "gy1cg1.10f", 0x400000, 0x400000, CRC(5a518733) SHA1(b6ea91629bc6ddf67c47c4189084aa947f4e31ed) )
|
||||
ROM_LOAD( "gy1cg1.10f", 0x400000, 0x400000, CRC(5a518733) SHA1(b6ea91629bc6ddf67c47c4189084aa947f4e31ed) )
|
||||
|
||||
ROM_REGION( 0x200000, "c352", 0 ) // Samples
|
||||
ROM_LOAD( "gy1voic.7c", 0x000000, 0x200000, CRC(f135e79b) SHA1(01ce3e3b366d0b9045ad8599b60ca33c6d21f150) )
|
||||
@ -539,9 +539,9 @@ ROM_START( abcheck )
|
||||
ROM_REGION( 0x800000, "ygv608", 0 ) /* 4MB character generator */
|
||||
// TODO: gynotai proves these might be underdumped, please check.
|
||||
ROM_LOAD( "an1cg0.10e", 0x000000, 0x200000, BAD_DUMP CRC(6dae0531) SHA1(2f4a4a22d461eb9a5bb88bdfccc3aff44cd3faee) )
|
||||
ROM_RELOAD( 0x200000, 0x200000 )
|
||||
ROM_RELOAD( 0x200000, 0x200000 )
|
||||
ROM_LOAD( "an1cg1.10f", 0x400000, 0x200000, BAD_DUMP CRC(8485607a) SHA1(1b9a1950c6db61a2b546fe2f5e56333593e93fb4) )
|
||||
ROM_RELOAD( 0x600000, 0x200000 )
|
||||
ROM_RELOAD( 0x600000, 0x200000 )
|
||||
|
||||
ROM_REGION( 0x1000000, "c352", 0 ) // Samples
|
||||
ROM_LOAD( "an1voice.7c", 0x000000, 0x200000, CRC(d2bfa453) SHA1(6b7d6bb4d65290d8fd3df5d12b41ae7dce5f3f1c) )
|
||||
|
||||
@ -1599,7 +1599,7 @@ private:
|
||||
const uint32_t *m_ptrom;
|
||||
uint32_t m_ptrom_limit;
|
||||
uint8_t m_mcu_unk;
|
||||
|
||||
|
||||
int m_vblank_count;
|
||||
|
||||
// It may only be 128
|
||||
@ -2902,9 +2902,9 @@ READ16_MEMBER(namcos23_state::sub_comm_r)
|
||||
// PC=0xbfc03838 bit 7 high => fail (data loaded must be parsed somehow)
|
||||
return 1 | 2;
|
||||
}
|
||||
|
||||
|
||||
m_maincpu->set_input_line(MIPS3_IRQ4, CLEAR_LINE);
|
||||
// data rx, TBD
|
||||
// data rx, TBD
|
||||
return m_mcu_unk; //machine().rand();
|
||||
}
|
||||
|
||||
|
||||
@ -4197,24 +4197,24 @@ ROM_START( mspacmanbg )
|
||||
ROM_END
|
||||
|
||||
ROM_START( mspacmanbg2 )
|
||||
ROM_REGION( 0x10000, "maincpu", 0 )
|
||||
ROM_LOAD( "11-prg.bin", 0x0000, 0x4000, CRC(e11d4132) SHA1(9ab6b9e1ec8ad183ccdddb971e8be3eb3f59db01) )
|
||||
ROM_CONTINUE(0x8000,0x4000) // blocks 5+6 are repeated twice in here
|
||||
ROM_REGION( 0x10000, "maincpu", 0 )
|
||||
ROM_LOAD( "11-prg.bin", 0x0000, 0x4000, CRC(e11d4132) SHA1(9ab6b9e1ec8ad183ccdddb971e8be3eb3f59db01) )
|
||||
ROM_CONTINUE(0x8000,0x4000) // blocks 5+6 are repeated twice in here
|
||||
|
||||
ROM_REGION( 0x8000, "gfx1", 0 )
|
||||
ROM_LOAD( "13-chr.bin", 0x0000, 0x0800, CRC(8ee4a3b0) SHA1(01e3453c99f7a5d78ab083c49c650e898c0dd2ee) )
|
||||
ROM_CONTINUE(0x1000,0x800)
|
||||
ROM_CONTINUE(0x0800,0x800)
|
||||
ROM_CONTINUE(0x1800,0x800)
|
||||
ROM_IGNORE(0x2000)
|
||||
ROM_REGION( 0x8000, "gfx1", 0 )
|
||||
ROM_LOAD( "13-chr.bin", 0x0000, 0x0800, CRC(8ee4a3b0) SHA1(01e3453c99f7a5d78ab083c49c650e898c0dd2ee) )
|
||||
ROM_CONTINUE(0x1000,0x800)
|
||||
ROM_CONTINUE(0x0800,0x800)
|
||||
ROM_CONTINUE(0x1800,0x800)
|
||||
ROM_IGNORE(0x2000)
|
||||
|
||||
ROM_REGION( 0x0120, "proms", 0 ) // not dumped for this set
|
||||
ROM_LOAD( "82s123.h7", 0x0000, 0x0020, BAD_DUMP CRC(3545e7e9) SHA1(b866b02579438afb11296e5c53a32c6425bd044d) )
|
||||
ROM_LOAD( "82s129-3.d1", 0x0020, 0x0100, BAD_DUMP CRC(3eb3a8e4) SHA1(19097b5f60d1030f8b82d9f1d3a241f93e5c75d6) )
|
||||
ROM_REGION( 0x0120, "proms", 0 ) // not dumped for this set
|
||||
ROM_LOAD( "82s123.h7", 0x0000, 0x0020, BAD_DUMP CRC(3545e7e9) SHA1(b866b02579438afb11296e5c53a32c6425bd044d) )
|
||||
ROM_LOAD( "82s129-3.d1", 0x0020, 0x0100, BAD_DUMP CRC(3eb3a8e4) SHA1(19097b5f60d1030f8b82d9f1d3a241f93e5c75d6) )
|
||||
|
||||
ROM_REGION( 0x0200, "namco", 0 ) /* sound PROMs, not dumped for this set */
|
||||
ROM_LOAD( "82s129-1.a9", 0x0000, 0x0100, BAD_DUMP CRC(a9cc86bf) SHA1(bbcec0570aeceb582ff8238a4bc8546a23430081) )
|
||||
ROM_LOAD( "82s129-2.c9", 0x0100, 0x0100, BAD_DUMP CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )
|
||||
ROM_REGION( 0x0200, "namco", 0 ) /* sound PROMs, not dumped for this set */
|
||||
ROM_LOAD( "82s129-1.a9", 0x0000, 0x0100, BAD_DUMP CRC(a9cc86bf) SHA1(bbcec0570aeceb582ff8238a4bc8546a23430081) )
|
||||
ROM_LOAD( "82s129-2.c9", 0x0100, 0x0100, BAD_DUMP CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( mspacmanbgd )
|
||||
@ -4970,7 +4970,7 @@ ROM_START( titanpac ) /* GDP-01 main PCB with GDP-02 auxiliary card (same as Pir
|
||||
ROM_LOAD( "82s126.3m", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) /* timing - not used */
|
||||
ROM_END
|
||||
|
||||
/* Bootleg from Spanish company "FAMARE S.A.". Board labeled "FAMARESA 560-002"
|
||||
/* Bootleg from Spanish company "FAMARE S.A.". Board labeled "FAMARESA 560-002"
|
||||
It's mainly a hack to remove Namco logo, but it was on an original Famaresa bootleg hardware */
|
||||
ROM_START( pacmanfm )
|
||||
ROM_REGION( 0x10000, "maincpu", 0 )
|
||||
@ -5299,17 +5299,17 @@ ROM_START( mspacmbmc )
|
||||
ROM_LOAD( "misspacmanfalgas_4.bin", 0x8000, 0x1000, CRC(8c3e6de6) SHA1(fed6e9a2b210b07e7189a18574f6b8c4ec5bb49b) )
|
||||
ROM_LOAD( "misspacmanfalgas_5.bin", 0x9000, 0x1000, CRC(206a9623) SHA1(20006f945c1b7b0e3c0415eecc0b148e5a6a1dfa) )
|
||||
|
||||
/* Undumped on the Marti Colls PCB, taken from the parent set */
|
||||
/* Undumped on the Marti Colls PCB, taken from the parent set */
|
||||
ROM_REGION( 0x2000, "gfx1", 0 )
|
||||
ROM_LOAD( "5e", 0x0000, 0x1000, BAD_DUMP CRC(5c281d01) SHA1(5e8b472b615f12efca3fe792410c23619f067845) )
|
||||
ROM_LOAD( "5f", 0x1000, 0x1000, BAD_DUMP CRC(615af909) SHA1(fd6a1dde780b39aea76bf1c4befa5882573c2ef4) )
|
||||
|
||||
/* Undumped on the Marti Colls PCB, taken from the parent set */
|
||||
/* Undumped on the Marti Colls PCB, taken from the parent set */
|
||||
ROM_REGION( 0x0120, "proms", 0 )
|
||||
ROM_LOAD( "82s123.7f", 0x0000, 0x0020, BAD_DUMP CRC(2fc650bd) SHA1(8d0268dee78e47c712202b0ec4f1f51109b1f2a5) )
|
||||
ROM_LOAD( "82s126.4a", 0x0020, 0x0100, BAD_DUMP CRC(3eb3a8e4) SHA1(19097b5f60d1030f8b82d9f1d3a241f93e5c75d6) )
|
||||
|
||||
/* Undumped on the Marti Colls PCB, taken from the parent set */
|
||||
/* Undumped on the Marti Colls PCB, taken from the parent set */
|
||||
ROM_REGION( 0x0200, "namco", 0 ) /* sound PROMs */
|
||||
ROM_LOAD( "82s126.1m", 0x0000, 0x0100, BAD_DUMP CRC(a9cc86bf) SHA1(bbcec0570aeceb582ff8238a4bc8546a23430081) )
|
||||
ROM_LOAD( "82s126.3m", 0x0100, 0x0100, BAD_DUMP CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) /* timing - not used */
|
||||
|
||||
@ -113,7 +113,7 @@ private:
|
||||
DECLARE_WRITE32_MEMBER(r9751_mmio_fff8_w);
|
||||
|
||||
DECLARE_READ8_MEMBER(pdc_dma_r);
|
||||
DECLARE_WRITE8_MEMBER(pdc_dma_w);
|
||||
DECLARE_WRITE8_MEMBER(pdc_dma_w);
|
||||
DECLARE_READ8_MEMBER(smioc_dma_r);
|
||||
DECLARE_WRITE8_MEMBER(smioc_dma_w);
|
||||
|
||||
@ -193,7 +193,7 @@ static const GenericCommandRecord GenericCommands[] = {
|
||||
{ 0x2800, "DMA Busy" },
|
||||
{ 0x3000, "Command Result" },
|
||||
{ 0x4000, "Command" }, // Also a write length.
|
||||
//{ 0x8000, "various" }, // Read address,
|
||||
//{ 0x8000, "various" }, // Read address,
|
||||
//{ 0xC000, "various" }, // Write address, Read length
|
||||
};
|
||||
|
||||
@ -268,7 +268,7 @@ void r9751_state::trace_device(int address, int data, const char* direction)
|
||||
// Device is not enabled for tracing.
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
if ((address == m_trace_last_address[dev]) && (data == m_trace_last_data[dev]) && (direction == m_trace_last_direction[dev]))
|
||||
{
|
||||
m_trace_repeat_count[dev]++;
|
||||
@ -699,7 +699,7 @@ WRITE32_MEMBER( r9751_state::r9751_mmio_5ff_w )
|
||||
case 0x0198: // SMIOC soft reset?
|
||||
// It's not clear what exactly this register write does.
|
||||
// It isn't a soft reset of the SMIOC because the 68k does not wait long enough for the SMIOC to finish rebooting.
|
||||
// Also the 68k does this twice in succession, with a status clear in between.
|
||||
// Also the 68k does this twice in succession, with a status clear in between.
|
||||
// The theory now is that a write to this register causes the status registers on the SMIOC to be
|
||||
// set to the magic value 0x0100 (which is set after initialization is complete) - which serves as a trigger
|
||||
// for the disktool software to reinitialize the SMIOC and proceed into a working state.
|
||||
|
||||
@ -3288,7 +3288,7 @@ MACHINE_CONFIG_START(rainbow_state::rainbow)
|
||||
|
||||
// Always set seek complete and track 00 signal (not super clean, but does not affect operation):
|
||||
m_hdc->in_sc_callback().set_constant(1); // SEEK COMPLETE (VCC = complete)
|
||||
m_hdc->in_tk000_callback().set_constant(1); // TRACK 00 signal (= from drive)
|
||||
m_hdc->in_tk000_callback().set_constant(1); // TRACK 00 signal (= from drive)
|
||||
|
||||
MCFG_HARDDISK_ADD("decharddisk1")
|
||||
/// ******************************** / HARD DISK CONTROLLER ****************************************
|
||||
|
||||
@ -1285,7 +1285,7 @@ ROM_START( tazmaniet )
|
||||
ROM_LOAD( "prom.bin", 0x0000, 0x0020, CRC(aa1f7f5e) SHA1(311dd17aa11490a1173c76223e4ccccf8ea29850) ) // same as hustler?! Gives wrong colors
|
||||
|
||||
ROM_REGION( 0x200, "unused_proms", 0) // TODO: are these the correct color PROMs?
|
||||
ROM_LOAD( "13209.prom", 0x0000, 0x0100, CRC(da1708c9) SHA1(b2633eba050866c6f555ed0fd9be369d69f13683) )
|
||||
ROM_LOAD( "13209.prom", 0x0000, 0x0100, CRC(da1708c9) SHA1(b2633eba050866c6f555ed0fd9be369d69f13683) )
|
||||
ROM_LOAD( "13210.prom", 0x0100, 0x0100, CRC(e54d042a) SHA1(e3259b5c178fc5ab43eda27f07107b65555512d3) )
|
||||
ROM_END
|
||||
|
||||
|
||||
@ -1056,33 +1056,33 @@ void snesb_state::init_rushbeat()
|
||||
uint8_t *dst = memregion("user3")->base();
|
||||
|
||||
static const uint8_t address_tab_high[32] = {
|
||||
0x0b, 0x1d, 0x05, 0x15, 0x09, 0x19, 0x04, 0x13, 0x02, 0x1f, 0x07, 0x17, 0x0d, 0x11, 0x0a, 0x1a,
|
||||
0x14, 0x0e, 0x18, 0x06, 0x1e, 0x01, 0x10, 0x0c, 0x1b, 0x0f, 0x16, 0x00, 0x12, 0x08, 0x1c, 0x03
|
||||
0x0b, 0x1d, 0x05, 0x15, 0x09, 0x19, 0x04, 0x13, 0x02, 0x1f, 0x07, 0x17, 0x0d, 0x11, 0x0a, 0x1a,
|
||||
0x14, 0x0e, 0x18, 0x06, 0x1e, 0x01, 0x10, 0x0c, 0x1b, 0x0f, 0x16, 0x00, 0x12, 0x08, 0x1c, 0x03
|
||||
};
|
||||
|
||||
static const uint8_t address_tab_low[64] = {
|
||||
0x14, 0x1d, 0x11, 0x3c, 0x0a, 0x29, 0x2d, 0x2e, 0x30, 0x32, 0x16, 0x36, 0x05, 0x25, 0x26, 0x37,
|
||||
0x20, 0x21, 0x27, 0x28, 0x33, 0x34, 0x23, 0x12, 0x1e, 0x1f, 0x3b, 0x24, 0x2c, 0x35, 0x38, 0x39,
|
||||
0x3d, 0x0c, 0x2a, 0x0d, 0x22, 0x18, 0x19, 0x1a, 0x03, 0x08, 0x04, 0x3a, 0x0b, 0x0f, 0x15, 0x17,
|
||||
0x1b, 0x13, 0x00, 0x1c, 0x2b, 0x01, 0x06, 0x2f, 0x07, 0x09, 0x02, 0x31, 0x10, 0x0e, 0x3f, 0x3e
|
||||
0x14, 0x1d, 0x11, 0x3c, 0x0a, 0x29, 0x2d, 0x2e, 0x30, 0x32, 0x16, 0x36, 0x05, 0x25, 0x26, 0x37,
|
||||
0x20, 0x21, 0x27, 0x28, 0x33, 0x34, 0x23, 0x12, 0x1e, 0x1f, 0x3b, 0x24, 0x2c, 0x35, 0x38, 0x39,
|
||||
0x3d, 0x0c, 0x2a, 0x0d, 0x22, 0x18, 0x19, 0x1a, 0x03, 0x08, 0x04, 0x3a, 0x0b, 0x0f, 0x15, 0x17,
|
||||
0x1b, 0x13, 0x00, 0x1c, 0x2b, 0x01, 0x06, 0x2f, 0x07, 0x09, 0x02, 0x31, 0x10, 0x0e, 0x3f, 0x3e
|
||||
};
|
||||
|
||||
static const uint8_t data_table[256] = {
|
||||
0xac, 0x85, 0xe5, 0xa4, 0xe4, 0xed, 0xad, 0xa5, 0xcd, 0x84, 0x8c, 0xcc, 0xc5, 0xec, 0x8d, 0xc4,
|
||||
0x38, 0x11, 0x71, 0x30, 0x70, 0x79, 0x39, 0x31, 0x59, 0x10, 0x18, 0x58, 0x51, 0x78, 0x19, 0x50,
|
||||
0xba, 0x93, 0xf3, 0xb2, 0xf2, 0xfb, 0xbb, 0xb3, 0xdb, 0x92, 0x9a, 0xda, 0xd3, 0xfa, 0x9b, 0xd2,
|
||||
0xa8, 0x81, 0xe1, 0xa0, 0xe0, 0xe9, 0xa9, 0xa1, 0xc9, 0x80, 0x88, 0xc8, 0xc1, 0xe8, 0x89, 0xc0,
|
||||
0xaa, 0x83, 0xe3, 0xa2, 0xe2, 0xeb, 0xab, 0xa3, 0xcb, 0x82, 0x8a, 0xca, 0xc3, 0xea, 0x8b, 0xc2,
|
||||
0xbe, 0x97, 0xf7, 0xb6, 0xf6, 0xff, 0xbf, 0xb7, 0xdf, 0x96, 0x9e, 0xde, 0xd7, 0xfe, 0x9f, 0xd6,
|
||||
0xbc, 0x95, 0xf5, 0xb4, 0xf4, 0xfd, 0xbd, 0xb5, 0xdd, 0x94, 0x9c, 0xdc, 0xd5, 0xfc, 0x9d, 0xd4,
|
||||
0xb8, 0x91, 0xf1, 0xb0, 0xf0, 0xf9, 0xb9, 0xb1, 0xd9, 0x90, 0x98, 0xd8, 0xd1, 0xf8, 0x99, 0xd0,
|
||||
0x3e, 0x17, 0x77, 0x36, 0x76, 0x7f, 0x3f, 0x37, 0x5f, 0x16, 0x1e, 0x5e, 0x57, 0x7e, 0x1f, 0x56,
|
||||
0x28, 0x01, 0x61, 0x20, 0x60, 0x69, 0x29, 0x21, 0x49, 0x00, 0x08, 0x48, 0x41, 0x68, 0x09, 0x40,
|
||||
0x2c, 0x05, 0x65, 0x24, 0x64, 0x6d, 0x2d, 0x25, 0x4d, 0x04, 0x0c, 0x4c, 0x45, 0x6c, 0x0d, 0x44,
|
||||
0x2e, 0x07, 0x67, 0x26, 0x66, 0x6f, 0x2f, 0x27, 0x4f, 0x06, 0x0e, 0x4e, 0x47, 0x6e, 0x0f, 0x46,
|
||||
0x3a, 0x13, 0x73, 0x32, 0x72, 0x7b, 0x3b, 0x33, 0x5b, 0x12, 0x1a, 0x5a, 0x53, 0x7a, 0x1b, 0x52,
|
||||
0xae, 0x87, 0xe7, 0xa6, 0xe6, 0xef, 0xaf, 0xa7, 0xcf, 0x86, 0x8e, 0xce, 0xc7, 0xee, 0x8f, 0xc6,
|
||||
0x3c, 0x15, 0x75, 0x34, 0x74, 0x7d, 0x3d, 0x35, 0x5d, 0x14, 0x1c, 0x5c, 0x55, 0x7c, 0x1d, 0x54,
|
||||
0xac, 0x85, 0xe5, 0xa4, 0xe4, 0xed, 0xad, 0xa5, 0xcd, 0x84, 0x8c, 0xcc, 0xc5, 0xec, 0x8d, 0xc4,
|
||||
0x38, 0x11, 0x71, 0x30, 0x70, 0x79, 0x39, 0x31, 0x59, 0x10, 0x18, 0x58, 0x51, 0x78, 0x19, 0x50,
|
||||
0xba, 0x93, 0xf3, 0xb2, 0xf2, 0xfb, 0xbb, 0xb3, 0xdb, 0x92, 0x9a, 0xda, 0xd3, 0xfa, 0x9b, 0xd2,
|
||||
0xa8, 0x81, 0xe1, 0xa0, 0xe0, 0xe9, 0xa9, 0xa1, 0xc9, 0x80, 0x88, 0xc8, 0xc1, 0xe8, 0x89, 0xc0,
|
||||
0xaa, 0x83, 0xe3, 0xa2, 0xe2, 0xeb, 0xab, 0xa3, 0xcb, 0x82, 0x8a, 0xca, 0xc3, 0xea, 0x8b, 0xc2,
|
||||
0xbe, 0x97, 0xf7, 0xb6, 0xf6, 0xff, 0xbf, 0xb7, 0xdf, 0x96, 0x9e, 0xde, 0xd7, 0xfe, 0x9f, 0xd6,
|
||||
0xbc, 0x95, 0xf5, 0xb4, 0xf4, 0xfd, 0xbd, 0xb5, 0xdd, 0x94, 0x9c, 0xdc, 0xd5, 0xfc, 0x9d, 0xd4,
|
||||
0xb8, 0x91, 0xf1, 0xb0, 0xf0, 0xf9, 0xb9, 0xb1, 0xd9, 0x90, 0x98, 0xd8, 0xd1, 0xf8, 0x99, 0xd0,
|
||||
0x3e, 0x17, 0x77, 0x36, 0x76, 0x7f, 0x3f, 0x37, 0x5f, 0x16, 0x1e, 0x5e, 0x57, 0x7e, 0x1f, 0x56,
|
||||
0x28, 0x01, 0x61, 0x20, 0x60, 0x69, 0x29, 0x21, 0x49, 0x00, 0x08, 0x48, 0x41, 0x68, 0x09, 0x40,
|
||||
0x2c, 0x05, 0x65, 0x24, 0x64, 0x6d, 0x2d, 0x25, 0x4d, 0x04, 0x0c, 0x4c, 0x45, 0x6c, 0x0d, 0x44,
|
||||
0x2e, 0x07, 0x67, 0x26, 0x66, 0x6f, 0x2f, 0x27, 0x4f, 0x06, 0x0e, 0x4e, 0x47, 0x6e, 0x0f, 0x46,
|
||||
0x3a, 0x13, 0x73, 0x32, 0x72, 0x7b, 0x3b, 0x33, 0x5b, 0x12, 0x1a, 0x5a, 0x53, 0x7a, 0x1b, 0x52,
|
||||
0xae, 0x87, 0xe7, 0xa6, 0xe6, 0xef, 0xaf, 0xa7, 0xcf, 0x86, 0x8e, 0xce, 0xc7, 0xee, 0x8f, 0xc6,
|
||||
0x3c, 0x15, 0x75, 0x34, 0x74, 0x7d, 0x3d, 0x35, 0x5d, 0x14, 0x1c, 0x5c, 0x55, 0x7c, 0x1d, 0x54,
|
||||
0x2a, 0x03, 0x63, 0x22, 0x62, 0x6b, 0x2b, 0x23, 0x4b, 0x02, 0x0a, 0x4a, 0x43, 0x6a, 0x0b, 0x42
|
||||
};
|
||||
|
||||
|
||||
@ -59,7 +59,7 @@ void tecmo16_state::fstarfrc_map(address_map &map)
|
||||
map(0x150030, 0x150031).portr("DSW2").nopw(); /* ??? */
|
||||
map(0x150040, 0x150041).portr("DSW1");
|
||||
map(0x150050, 0x150051).portr("P1_P2");
|
||||
// map(0x160000, 0x160001).nopr(); /* ??? Read at every scene changes */
|
||||
// map(0x160000, 0x160001).nopr(); /* ??? Read at every scene changes */
|
||||
map(0x160000, 0x160001).w(FUNC(tecmo16_state::scroll_char_x_w));
|
||||
map(0x16000c, 0x16000d).w(FUNC(tecmo16_state::scroll_x_w));
|
||||
map(0x160012, 0x160013).w(FUNC(tecmo16_state::scroll_y_w));
|
||||
|
||||
@ -1007,7 +1007,7 @@ ROM_END
|
||||
/* There are some dumps out there that only have the year hacked to 1986 and a little bunch of bytes
|
||||
from the graphics zone. I think that not worth to support these hacks...
|
||||
*/
|
||||
|
||||
|
||||
|
||||
GAME( 1985, tehkanwc, 0, tehkanwc, tehkanwc, tehkanwc_state, empty_init, ROT0, "Tehkan", "Tehkan World Cup (set 1)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1985, tehkanwcb, tehkanwc, tehkanwcb,tehkanwc, tehkanwc_state, empty_init, ROT0, "Tehkan", "Tehkan World Cup (set 2, bootleg?)", MACHINE_SUPPORTS_SAVE )
|
||||
|
||||
@ -445,7 +445,7 @@ MACHINE_CONFIG_START(twins_state::twinsed1)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
/* The Ecogames set and the Electronic Devices second set has different palette hardware
|
||||
/* The Ecogames set and the Electronic Devices second set has different palette hardware
|
||||
and a different port map than Electronic Devices first set */
|
||||
|
||||
void twins_state::twins_io(address_map &map)
|
||||
|
||||
@ -1524,8 +1524,8 @@ void vgmplay_device::execute_run()
|
||||
}
|
||||
//else if ((offset & 0x7f) == 0x15 && m_nes_apu_channel_hack[index] == -2 && (m_file->read_byte(m_pc + 2) & 0x1f) != 0)
|
||||
//{
|
||||
// osd_printf_error("bad rip false positive, late enabling nesapu.%d channels %x/%x\n", index, m_pc, m_io->read_dword(REG_SIZE));
|
||||
// m_nes_apu_channel_hack[index] = -1;
|
||||
// osd_printf_error("bad rip false positive, late enabling nesapu.%d channels %x/%x\n", index, m_pc, m_io->read_dword(REG_SIZE));
|
||||
// m_nes_apu_channel_hack[index] = -1;
|
||||
//}
|
||||
|
||||
if (offset & 0x80)
|
||||
|
||||
@ -345,20 +345,20 @@ void vsmile_state::device_timer(emu_timer &timer, device_timer_id id, int param,
|
||||
}
|
||||
}
|
||||
|
||||
#define VSMILE_PORTB_CS1 0x0001
|
||||
#define VSMILE_PORTB_CS2 0x0002
|
||||
#define VSMILE_PORTB_CART 0x0004
|
||||
#define VSMILE_PORTB_RESET 0x0008
|
||||
#define VSMILE_PORTB_FRONT24 0x0010
|
||||
#define VSMILE_PORTB_OFF 0x0020
|
||||
#define VSMILE_PORTB_OFF_SW 0x0040
|
||||
#define VSMILE_PORTB_ON_SW 0x0080
|
||||
#define VSMILE_PORTB_CS1 0x0001
|
||||
#define VSMILE_PORTB_CS2 0x0002
|
||||
#define VSMILE_PORTB_CART 0x0004
|
||||
#define VSMILE_PORTB_RESET 0x0008
|
||||
#define VSMILE_PORTB_FRONT24 0x0010
|
||||
#define VSMILE_PORTB_OFF 0x0020
|
||||
#define VSMILE_PORTB_OFF_SW 0x0040
|
||||
#define VSMILE_PORTB_ON_SW 0x0080
|
||||
|
||||
#define VSMILE_PORTC_VER 0x000f
|
||||
#define VSMILE_PORTC_LOGO 0x0010
|
||||
#define VSMILE_PORTC_TEST 0x0020
|
||||
#define VSMILE_PORTC_AMP 0x0040
|
||||
#define VSMILE_PORTC_SYSRESET 0x0080
|
||||
#define VSMILE_PORTC_VER 0x000f
|
||||
#define VSMILE_PORTC_LOGO 0x0010
|
||||
#define VSMILE_PORTC_TEST 0x0020
|
||||
#define VSMILE_PORTC_AMP 0x0040
|
||||
#define VSMILE_PORTC_SYSRESET 0x0080
|
||||
|
||||
READ16_MEMBER(vsmile_state::bank0_r)
|
||||
{
|
||||
|
||||
@ -509,10 +509,10 @@ INPUT_PORTS_END
|
||||
|
||||
/*
|
||||
static INPUT_PORTS_START( xavixp )
|
||||
PORT_INCLUDE(xavix)
|
||||
PORT_INCLUDE(xavix)
|
||||
|
||||
PORT_MODIFY("REGION") // PAL/NTSC flag
|
||||
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_CUSTOM )
|
||||
PORT_MODIFY("REGION") // PAL/NTSC flag
|
||||
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_CUSTOM )
|
||||
INPUT_PORTS_END
|
||||
*/
|
||||
|
||||
@ -555,7 +555,7 @@ static INPUT_PORTS_START( rad_crdn )
|
||||
|
||||
PORT_MODIFY("IN0")
|
||||
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON1 )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON2 )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON2 )
|
||||
|
||||
PORT_MODIFY("IN1")
|
||||
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP )
|
||||
@ -603,11 +603,11 @@ static INPUT_PORTS_START( rad_bass )
|
||||
PORT_MODIFY("IN0")
|
||||
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON1 )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN )
|
||||
|
||||
PORT_MODIFY("IN1")
|
||||
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT )
|
||||
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT )
|
||||
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_POWER_OFF ) PORT_NAME("Power Switch") // pressing this will turn the game off.
|
||||
|
||||
INPUT_PORTS_END
|
||||
@ -939,7 +939,7 @@ ROM_END
|
||||
|
||||
/*
|
||||
The e-kara cartridges require the BIOS rom to map into 2nd external bus space as they fetch palette data from
|
||||
it etc.
|
||||
it etc.
|
||||
*/
|
||||
|
||||
#define EKARA_BASE_ROM \
|
||||
|
||||
@ -85,7 +85,7 @@ public:
|
||||
, m_extube(*this, "extube")
|
||||
, m_1mhzbus(*this, "1mhzbus")
|
||||
, m_userport(*this, "userport")
|
||||
// , m_internal(*this, "internal")
|
||||
// , m_internal(*this, "internal")
|
||||
, m_exp(*this, "exp")
|
||||
, m_rtc(*this, "rtc")
|
||||
, m_i2cmem(*this, "i2cmem")
|
||||
|
||||
@ -202,7 +202,7 @@ void superxavix_lowbus_map(address_map &map);
|
||||
|
||||
required_device<xavix_device> m_maincpu;
|
||||
required_device<screen_device> m_screen;
|
||||
|
||||
|
||||
uint8_t m_vectorenable;
|
||||
uint8_t m_nmi_vector_lo_data;
|
||||
uint8_t m_nmi_vector_hi_data;
|
||||
@ -235,7 +235,7 @@ void superxavix_lowbus_map(address_map &map);
|
||||
uint8_t m_timer_baseval;
|
||||
|
||||
int16_t get_vectors(int which, int half);
|
||||
|
||||
|
||||
// raster IRQ
|
||||
TIMER_CALLBACK_MEMBER(interrupt_gen);
|
||||
emu_timer *m_interrupt_timer;
|
||||
|
||||
@ -1,34 +1,41 @@
|
||||
<?xml version="1.0"?>
|
||||
<!--
|
||||
license:CC0
|
||||
copyright-holders:Sven Schnelle
|
||||
Hewlett-Packard 9000/3xx Layout
|
||||
-->
|
||||
<mamelayout version="2">
|
||||
<element name="dotmatrix5dot">
|
||||
<dotmatrix5dot>
|
||||
<color red="1.0" green="0" blue="0" />
|
||||
</dotmatrix5dot>
|
||||
</element>
|
||||
<element name="run_light" defstate="0">
|
||||
<disk state="0">
|
||||
<color red="0.25" green="0" blue="0" />
|
||||
</disk>
|
||||
<disk state="1">
|
||||
<color red="1.0" green="0" blue="0" />
|
||||
</disk>
|
||||
</element>
|
||||
<view name="32-char display">
|
||||
<bounds x="-5" y="0" width="289" height="7"/>
|
||||
<bezel name="run_light" element="run_light">
|
||||
<bounds x="-5" y="2" width="2" height="2"/>
|
||||
</bezel>
|
||||
<!-- 32 5x7 characters -->
|
||||
<repeat count="32">
|
||||
<param name="digitidx" start="0" increment="1" />
|
||||
<param name="digit_x" start="0.0" increment="9"/>
|
||||
<!-- Each of the 7 rows in a character -->
|
||||
<repeat count="7">
|
||||
<param name="rowidx" start="0" increment="1" />
|
||||
<bezel name="char_~digitidx~_~rowidx~" element="dotmatrix5dot" state="0">
|
||||
<bounds x="~digit_x~" y="~rowidx~" width="5" height="1" />
|
||||
</bezel>
|
||||
</repeat>
|
||||
</repeat>
|
||||
</view>
|
||||
<element name="dotmatrix5dot">
|
||||
<dotmatrix5dot>
|
||||
<color red="1.0" green="0" blue="0" />
|
||||
</dotmatrix5dot>
|
||||
</element>
|
||||
|
||||
<element name="run_light" defstate="0">
|
||||
<disk state="0">
|
||||
<color red="0.25" green="0" blue="0" />
|
||||
</disk>
|
||||
<disk state="1">
|
||||
<color red="1.0" green="0" blue="0" />
|
||||
</disk>
|
||||
</element>
|
||||
|
||||
<view name="32-char display">
|
||||
<bounds x="-5" y="0" width="289" height="7"/>
|
||||
<bezel name="run_light" element="run_light">
|
||||
<bounds x="-5" y="2" width="2" height="2"/>
|
||||
</bezel>
|
||||
<!-- 32 5x7 characters -->
|
||||
<repeat count="32">
|
||||
<param name="digitidx" start="0" increment="1" />
|
||||
<param name="digit_x" start="0.0" increment="9"/>
|
||||
<!-- Each of the 7 rows in a character -->
|
||||
<repeat count="7">
|
||||
<param name="rowidx" start="0" increment="1" />
|
||||
<bezel name="char_~digitidx~_~rowidx~" element="dotmatrix5dot" state="0">
|
||||
<bounds x="~digit_x~" y="~rowidx~" width="5" height="1" />
|
||||
</bezel>
|
||||
</repeat>
|
||||
</repeat>
|
||||
</view>
|
||||
</mamelayout>
|
||||
|
||||
@ -52,8 +52,8 @@ Hewlett-Packard 9000/3xx Layout
|
||||
<screen index="0"><bounds x="0" y="0" width="1024" height="768"/></screen>
|
||||
</view>
|
||||
<view name="XGA Screen">
|
||||
<screen index="0">
|
||||
<bounds x="0" y="0" width="1024" height="768" />
|
||||
</screen>
|
||||
<screen index="0">
|
||||
<bounds x="0" y="0" width="1024" height="768" />
|
||||
</screen>
|
||||
</view>
|
||||
</mamelayout>
|
||||
|
||||
@ -51,7 +51,7 @@
|
||||
</rect>
|
||||
</element>
|
||||
|
||||
<view name="Color_Overlay">
|
||||
<view name="Color Overlay">
|
||||
<screen index="0">
|
||||
<bounds x="0" y="0" width="3" height="4" />
|
||||
</screen>
|
||||
|
||||
@ -623,7 +623,7 @@ WRITE8_MEMBER(bbc_state::via_system_porta_w)
|
||||
/* Write enable to the sound generator */
|
||||
//if (!m_latch->q0_r() && m_sn)
|
||||
//{
|
||||
// m_sn->write(m_via_system_porta);
|
||||
// m_sn->write(m_via_system_porta);
|
||||
//}
|
||||
/* Keyboard write enable */
|
||||
if (!m_latch->q3_r())
|
||||
@ -1332,7 +1332,7 @@ void bbc_state::setup_banks(memory_bank *membank, uint32_t shift)
|
||||
/* TODO: expansion devices currently use machine().root_device(), add method to slot interfaces to return pointer to memregion("rom") */
|
||||
//if (m_fdc->rom_region[i])
|
||||
//{
|
||||
// membank->configure_entry(i, m_fdc->rom_region[i] + shift);
|
||||
// membank->configure_entry(i, m_fdc->rom_region[i] + shift);
|
||||
//}
|
||||
/* romslots populated by user override expansion devices */
|
||||
if (m_rom[i] && (rom_region = memregion(region_tag.assign(m_rom[i]->tag()).append(GENERIC_ROM_REGION_TAG).c_str())))
|
||||
|
||||
@ -44,8 +44,8 @@ MACHINE_CONFIG_START(dw_fdc_device::device_add_mconfig)
|
||||
MCFG_DEVICE_ADD("ppi8255", I8255, 0)
|
||||
|
||||
UPD765A(config, "upd765", false, false);
|
||||
// m_upd_fdc->intrq_wr_callback().set("pic8259", FUNC(pic8259_device::ir4_w));
|
||||
// m_upd_fdc->drq_wr_callback().set("dma8257", FUNC(dma8257_device::XXX));
|
||||
// m_upd_fdc->intrq_wr_callback().set("pic8259", FUNC(pic8259_device::ir4_w));
|
||||
// m_upd_fdc->drq_wr_callback().set("dma8257", FUNC(dma8257_device::XXX));
|
||||
// MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", wangpc_floppies, "525dd", wangpc_state::floppy_formats)
|
||||
// MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", wangpc_floppies, "525dd", wangpc_state::floppy_formats)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
@ -37,7 +37,7 @@ INPUT_PORTS_START( poisk1_keyboard_v89 )
|
||||
/*-2*/ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-2 - .") /* PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') */
|
||||
/*-3*/ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-3 - _") /* PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_') */
|
||||
PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P')
|
||||
PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') // scancode 0x54
|
||||
PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') // scancode 0x54
|
||||
|
||||
PORT_START("Y3")
|
||||
PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F')
|
||||
|
||||
@ -104,54 +104,54 @@ bit sig XSn ????n
|
||||
14 22 4 3
|
||||
15 23 5 4
|
||||
|
||||
0xc9 KEY_LANGLE_RANGLE 'резервная клавиша'
|
||||
0xbc KEY_DELETE ЗБ
|
||||
0xbd KEY_RETURN ВК
|
||||
0xbf KEY_TILDE '; +'
|
||||
0xc4 - 'Ъ'
|
||||
0xca - '/ ?'
|
||||
0xed KEY_PERIOD 'Ю @'
|
||||
0xf1 - '_'
|
||||
0xc9 KEY_LANGLE_RANGLE 'резервная клавиша'
|
||||
0xbc KEY_DELETE ЗБ
|
||||
0xbd KEY_RETURN ВК
|
||||
0xbf KEY_TILDE '; +'
|
||||
0xc4 - 'Ъ'
|
||||
0xca - '/ ?'
|
||||
0xed KEY_PERIOD 'Ю @'
|
||||
0xf1 - '_'
|
||||
<...>
|
||||
|
||||
0x56 KEY_F1 СТОП КАДР
|
||||
0x57 KEY_F2 ПЕЧАТЬ КАДРА
|
||||
0x58 KEY_F3 ПАУЗА
|
||||
0x59 KEY_F4 УСТ РЕЖИМА
|
||||
0x5a KEY_F5 Ф5
|
||||
0x56 KEY_F1 СТОП КАДР
|
||||
0x57 KEY_F2 ПЕЧАТЬ КАДРА
|
||||
0x58 KEY_F3 ПАУЗА
|
||||
0x59 KEY_F4 УСТ РЕЖИМА
|
||||
0x5a KEY_F5 Ф5
|
||||
|
||||
0x64 KEY_F6 ПРЕРЫВ
|
||||
0x65 KEY_F7 ПРОДОЛЖ
|
||||
0x66 KEY_F8 ОТМЕН
|
||||
0x67 KEY_F9 ОСНОВН КАДР
|
||||
0x69 KEY_F10 ВЫХОД
|
||||
0x64 KEY_F6 ПРЕРЫВ
|
||||
0x65 KEY_F7 ПРОДОЛЖ
|
||||
0x66 KEY_F8 ОТМЕН
|
||||
0x67 KEY_F9 ОСНОВН КАДР
|
||||
0x69 KEY_F10 ВЫХОД
|
||||
|
||||
0x71 KEY_F11 Ф11 (АР2)
|
||||
0x72 KEY_F12 Ф12 (ВШ)
|
||||
0x73 KEY_F13 Ф13 (ПС)
|
||||
0x74 KEY_F14 ДОП ВАРИАНТ
|
||||
0x71 KEY_F11 Ф11 (АР2)
|
||||
0x72 KEY_F12 Ф12 (ВШ)
|
||||
0x73 KEY_F13 Ф13 (ПС)
|
||||
0x74 KEY_F14 ДОП ВАРИАНТ
|
||||
|
||||
0x7c KEY_HELP ПМ
|
||||
0x7d KEY_MENU ИСП
|
||||
0x7c KEY_HELP ПМ
|
||||
0x7d KEY_MENU ИСП
|
||||
|
||||
0x80 KEY_F17 Ф17
|
||||
0x81 KEY_F18 Ф18
|
||||
0x82 KEY_F19 Ф19
|
||||
0x83 KEY_F20 Ф20
|
||||
0x80 KEY_F17 Ф17
|
||||
0x81 KEY_F18 Ф18
|
||||
0x82 KEY_F19 Ф19
|
||||
0x83 KEY_F20 Ф20
|
||||
|
||||
0xb0 KEY_LOCK ФКС
|
||||
0xae KEY_SHIFT ВР
|
||||
0xaf KEY_CTRL СУ
|
||||
0xb0 KEY_LOCK ФКС
|
||||
0xae KEY_SHIFT ВР
|
||||
0xaf KEY_CTRL СУ
|
||||
|
||||
0xb1 KEY_META КМП
|
||||
0xb2 - РУС/ЛАТ
|
||||
0xb1 KEY_META КМП
|
||||
0xb2 - РУС/ЛАТ
|
||||
|
||||
0x8a KEY_FIND НТ
|
||||
0x8b KEY_INSERT_HERE ВСТ
|
||||
0x8c KEY_REMOVE УДАЛ
|
||||
0x8d KEY_SELECT ВЫБР
|
||||
0x8e KEY_PREV_SCREEN ПРЕД КАДР
|
||||
0x8f KEY_NEXT_SCREEN СЛЕД КАДР
|
||||
0x8a KEY_FIND НТ
|
||||
0x8b KEY_INSERT_HERE ВСТ
|
||||
0x8c KEY_REMOVE УДАЛ
|
||||
0x8d KEY_SELECT ВЫБР
|
||||
0x8e KEY_PREV_SCREEN ПРЕД КАДР
|
||||
0x8f KEY_NEXT_SCREEN СЛЕД КАДР
|
||||
|
||||
nothing sends '@' or '`'
|
||||
|
||||
|
||||
@ -85,7 +85,7 @@ void namcos2_state::machine_start()
|
||||
void namcos2_state::machine_reset()
|
||||
{
|
||||
// address_space &space = m_maincpu->space(AS_PROGRAM);
|
||||
// address_space &audio_space = m_audiocpu->space(AS_PROGRAM);
|
||||
// address_space &audio_space = m_audiocpu->space(AS_PROGRAM);
|
||||
|
||||
/* Initialise the bank select in the sound CPU */
|
||||
m_audiobank->set_entry(0); /* Page in bank 0 */
|
||||
|
||||
@ -140,7 +140,7 @@ WRITE8_MEMBER(xavix_state::adc_7b81_w)
|
||||
|
||||
READ8_MEMBER(xavix_state::adc_7b81_r)
|
||||
{
|
||||
// has_wamg polls this if interrupt is enabled
|
||||
// has_wamg polls this if interrupt is enabled
|
||||
return machine().rand();
|
||||
}
|
||||
|
||||
@ -207,7 +207,7 @@ WRITE8_MEMBER(xavix_state::dispctrl_6ff8_w)
|
||||
}
|
||||
|
||||
m_video_ctrl = data & 0x3f;
|
||||
// printf("%s: dispctrl_6ff8_w %02x\n", machine().describe_context(), data);
|
||||
// printf("%s: dispctrl_6ff8_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -1,16 +1,16 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Pierpaolo Prazzoli, David Haywood
|
||||
/*
|
||||
Electronic Devices video system
|
||||
Electronic Devices video system
|
||||
|
||||
used by
|
||||
stlforce.cpp
|
||||
mwarr.cpp
|
||||
used by
|
||||
stlforce.cpp
|
||||
mwarr.cpp
|
||||
|
||||
TODO:
|
||||
Check if the sprites are an obvious clone of anything else and split out if neccessary
|
||||
Steel Force doesn't use the variable height sprites, does the hardware support them?
|
||||
Verify offsets / visible areas / overscan etc. especially text layer as Steel Force ending does not quite fit on screen
|
||||
TODO:
|
||||
Check if the sprites are an obvious clone of anything else and split out if neccessary
|
||||
Steel Force doesn't use the variable height sprites, does the hardware support them?
|
||||
Verify offsets / visible areas / overscan etc. especially text layer as Steel Force ending does not quite fit on screen
|
||||
*/
|
||||
|
||||
|
||||
@ -247,15 +247,15 @@ void edevices_device::draw_sprites(screen_device &screen, bitmap_ind16 &bitmap,
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
m_vidattrram
|
||||
0 tx xscroll (or global x scroll?)
|
||||
1 back yscroll
|
||||
2 mlow yscroll
|
||||
3 mhigh yscroll
|
||||
4 tx yscroll
|
||||
5 ---- ---- ---s tMmB layer enables (s = sprites, t = tx, M = highmid, m = lowmid, B = back)
|
||||
6 ---- ---- ---M -m-B rowscroll enables (B = back, m = lowmid, M = highmid)
|
||||
/*
|
||||
m_vidattrram
|
||||
0 tx xscroll (or global x scroll?)
|
||||
1 back yscroll
|
||||
2 mlow yscroll
|
||||
3 mhigh yscroll
|
||||
4 tx yscroll
|
||||
5 ---- ---- ---s tMmB layer enables (s = sprites, t = tx, M = highmid, m = lowmid, B = back)
|
||||
6 ---- ---- ---M -m-B rowscroll enables (B = back, m = lowmid, M = highmid)
|
||||
|
||||
*/
|
||||
|
||||
|
||||
@ -121,7 +121,7 @@ uint32_t flkatck_state::screen_update_flkatck(screen_device &screen, bitmap_ind1
|
||||
const rectangle &visarea = screen.visible_area();
|
||||
// TODO: reversed polarity? Hard to say, fwiw Combat School uses this in reverse ...
|
||||
uint16_t sprite_buffer = (m_k007121->ctrlram_r(3) & 8) * 0x100;
|
||||
|
||||
|
||||
if (m_flipscreen)
|
||||
{
|
||||
clip[0] = visarea;
|
||||
|
||||
@ -244,7 +244,7 @@ void k007121_device::sprites_draw( bitmap_ind16 &bitmap, const rectangle &clipre
|
||||
static const int x_offset[4] = {0x0,0x1,0x4,0x5};
|
||||
static const int y_offset[4] = {0x0,0x2,0x8,0xa};
|
||||
int x,y, ex, ey, flipx, flipy, destx, desty;
|
||||
|
||||
|
||||
if (attr & 0x01) sx -= 256;
|
||||
if (sy >= 240) sy -= 256;
|
||||
|
||||
@ -254,7 +254,7 @@ void k007121_device::sprites_draw( bitmap_ind16 &bitmap, const rectangle &clipre
|
||||
|
||||
/* Flak Attack doesn't use a lookup PROM, it maps the color code directly */
|
||||
/* to a palette entry */
|
||||
// TODO: check if it's true or callback-ize this one and remove the per-game hack.
|
||||
// TODO: check if it's true or callback-ize this one and remove the per-game hack.
|
||||
if (is_flakatck)
|
||||
transparent_mask = 1 << 0;
|
||||
else
|
||||
@ -313,7 +313,7 @@ void k007121_device::sprites_draw( bitmap_ind16 &bitmap, const rectangle &clipre
|
||||
transparent_mask);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
source += inc;
|
||||
}
|
||||
}
|
||||
|
||||
@ -76,7 +76,7 @@ void xavix_state::handle_palette(screen_device &screen, bitmap_ind16 &bitmap, co
|
||||
uint16_t dat;
|
||||
dat = ramsh[offs];
|
||||
dat |= raml[offs] << 8;
|
||||
|
||||
|
||||
offs++;
|
||||
|
||||
int l_raw = (dat & 0x1f00) >> 8;
|
||||
@ -578,7 +578,7 @@ void xavix_state::draw_sprites_line(screen_device &screen, bitmap_ind16 &bitmap,
|
||||
tile += gfxbase;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
int bpp = 1;
|
||||
@ -591,7 +591,7 @@ void xavix_state::draw_sprites_line(screen_device &screen, bitmap_ind16 &bitmap,
|
||||
/*
|
||||
if ((spr_ypos[i] != 0x81) && (spr_ypos[i] != 0x80) && (spr_ypos[i] != 0x00))
|
||||
{
|
||||
LOG("sprite with enable? %02x attr0 %02x attr1 %02x attr3 %02x attr5 %02x attr6 %02x attr7 %02x\n", spr_ypos[i], spr_attr0[i], spr_attr1[i], spr_xpos[i], spr_addr_lo[i], spr_addr_md[i], spr_addr_hi[i] );
|
||||
LOG("sprite with enable? %02x attr0 %02x attr1 %02x attr3 %02x attr5 %02x attr6 %02x attr7 %02x\n", spr_ypos[i], spr_attr0[i], spr_attr1[i], spr_xpos[i], spr_addr_lo[i], spr_addr_md[i], spr_addr_hi[i] );
|
||||
}
|
||||
*/
|
||||
}
|
||||
@ -739,7 +739,7 @@ uint32_t xavix_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap,
|
||||
|
||||
//int count = 0;
|
||||
set_data_address(base + base2, 0);
|
||||
|
||||
|
||||
for (int y = 0; y < 256; y++)
|
||||
{
|
||||
for (int x = 0; x < 512; x++)
|
||||
@ -831,33 +831,33 @@ WRITE8_MEMBER(xavix_state::tmap1_regs_w)
|
||||
0x2 pointer to upper tile bits
|
||||
|
||||
0x3 Fftt bbb- Ff = flip Y,X
|
||||
tt = tile/tilemap size
|
||||
b = bpp
|
||||
- = unused
|
||||
tt = tile/tilemap size
|
||||
b = bpp
|
||||
- = unused
|
||||
|
||||
0x4 scroll
|
||||
0x5 scroll
|
||||
|
||||
0x6 pppp zzzz p = palette
|
||||
z = priority
|
||||
z = priority
|
||||
|
||||
0x7 e--m mmmm e = enable
|
||||
m = mode
|
||||
m = mode
|
||||
|
||||
modes are
|
||||
---0 0000 (00) 8-bit addressing (Tile Number)
|
||||
---0 0001 (01) 16-bit addressing (Tile Number) (monster truck, ekara)
|
||||
---0 0010 (02) 16-bit addressing (8-byte alignment Addressing Mode) (boxing)
|
||||
---0 0011 (03) 16-bit addressing (Addressing Mode 2)
|
||||
---0 0100 (04) 24-bit addressing (Addressing Mode 2) (epo_efdx)
|
||||
---0 0000 (00) 8-bit addressing (Tile Number)
|
||||
---0 0001 (01) 16-bit addressing (Tile Number) (monster truck, ekara)
|
||||
---0 0010 (02) 16-bit addressing (8-byte alignment Addressing Mode) (boxing)
|
||||
---0 0011 (03) 16-bit addressing (Addressing Mode 2)
|
||||
---0 0100 (04) 24-bit addressing (Addressing Mode 2) (epo_efdx)
|
||||
|
||||
---0 1000 (08) 8-bit+8 addressing (Tile Number + 8-bit Attribute)
|
||||
---0 1001 (09) 16-bit+8 addressing (Tile Number + 8-bit Attribute) (Taito Nostalgia 2)
|
||||
---0 1010 (0a) 16-bit+8 addressing (8-byte alignment Addressing Mode + 8-bit Attribute) (boxing, Snowboard)
|
||||
---0 1011 (0b) 16-bit+8 addressing (Addressing Mode 2 + 8-bit Attribute)
|
||||
---0 1000 (08) 8-bit+8 addressing (Tile Number + 8-bit Attribute)
|
||||
---0 1001 (09) 16-bit+8 addressing (Tile Number + 8-bit Attribute) (Taito Nostalgia 2)
|
||||
---0 1010 (0a) 16-bit+8 addressing (8-byte alignment Addressing Mode + 8-bit Attribute) (boxing, Snowboard)
|
||||
---0 1011 (0b) 16-bit+8 addressing (Addressing Mode 2 + 8-bit Attribute)
|
||||
|
||||
---1 0011 (13) 16-bit addressing (Addressing Mode 2 + Inline Header) (monster truck)
|
||||
---1 0100 (14) 24-bit addressing (Addressing Mode 2 + Inline Header)
|
||||
---1 0011 (13) 16-bit addressing (Addressing Mode 2 + Inline Header) (monster truck)
|
||||
---1 0100 (14) 24-bit addressing (Addressing Mode 2 + Inline Header)
|
||||
|
||||
*/
|
||||
|
||||
@ -885,16 +885,16 @@ WRITE8_MEMBER(xavix_state::spriteregs_w)
|
||||
{
|
||||
LOG("%s: spriteregs_w data %02x\n", machine().describe_context(), data);
|
||||
/*
|
||||
This is similar to Tilemap reg 7 and is used to set the addressing mode for sprite data
|
||||
This is similar to Tilemap reg 7 and is used to set the addressing mode for sprite data
|
||||
|
||||
---0 -000 (00) 8-bit addressing (Tile Number)
|
||||
---0 -001 (01) 16-bit addressing (Tile Number)
|
||||
---0 -010 (02) 16-bit addressing (8-byte alignment Addressing Mode)
|
||||
---0 -011 (03) 16-bit addressing (Addressing Mode 2)
|
||||
---0 -100 (04) 24-bit addressing (Addressing Mode 2)
|
||||
---0 -000 (00) 8-bit addressing (Tile Number)
|
||||
---0 -001 (01) 16-bit addressing (Tile Number)
|
||||
---0 -010 (02) 16-bit addressing (8-byte alignment Addressing Mode)
|
||||
---0 -011 (03) 16-bit addressing (Addressing Mode 2)
|
||||
---0 -100 (04) 24-bit addressing (Addressing Mode 2)
|
||||
|
||||
---1 -011 (13) 16-bit addressing (Addressing Mode 2 + Inline Header)
|
||||
---1 -100 (14) 24-bit addressing (Addressing Mode 2 + Inline Header)
|
||||
---1 -011 (13) 16-bit addressing (Addressing Mode 2 + Inline Header)
|
||||
---1 -100 (14) 24-bit addressing (Addressing Mode 2 + Inline Header)
|
||||
*/
|
||||
m_spritereg = data;
|
||||
}
|
||||
|
||||
@ -877,7 +877,7 @@ int shaders::create_resources()
|
||||
|
||||
focus_effect->add_uniform("Defocus", uniform::UT_VEC2, uniform::CU_FOCUS_SIZE);
|
||||
|
||||
post_effect->add_uniform("ShadowAlpha", uniform::UT_FLOAT, uniform::CU_POST_SHADOW_ALPHA);
|
||||
post_effect->add_uniform("ShadowAlpha", uniform::UT_FLOAT, uniform::CU_POST_SHADOW_ALPHA);
|
||||
post_effect->add_uniform("ShadowCount", uniform::UT_VEC2, uniform::CU_POST_SHADOW_COUNT);
|
||||
post_effect->add_uniform("ShadowUV", uniform::UT_VEC2, uniform::CU_POST_SHADOW_UV);
|
||||
post_effect->add_uniform("ShadowUVOffset", uniform::UT_VEC2, uniform::CU_POST_SHADOW_UV_OFFSET);
|
||||
@ -1244,17 +1244,18 @@ int shaders::post_pass(d3d_render_target *rt, int source_index, poly_info *poly,
|
||||
float screen_offset[2] = { xoffset, yoffset };
|
||||
|
||||
rgb_t back_color_rgb = screen->has_palette()
|
||||
? screen->palette().palette()->entry_color(0)
|
||||
: rgb_t(0, 0, 0);
|
||||
? screen->palette().palette()->entry_color(0)
|
||||
: rgb_t(0, 0, 0);
|
||||
back_color_rgb = apply_color_convolution(back_color_rgb);
|
||||
float back_color[3] = {
|
||||
float(back_color_rgb.r()) / 255.0f,
|
||||
float(back_color_rgb.g()) / 255.0f,
|
||||
float(back_color_rgb.b()) / 255.0f };
|
||||
float(back_color_rgb.r()) / 255.0f,
|
||||
float(back_color_rgb.g()) / 255.0f,
|
||||
float(back_color_rgb.b()) / 255.0f };
|
||||
|
||||
curr_effect = post_effect;
|
||||
curr_effect->update_uniforms();
|
||||
curr_effect->set_texture("ShadowTexture", shadow_texture == nullptr ? nullptr : shadow_texture->get_finaltex()); curr_effect->set_int("ShadowTileMode", options->shadow_mask_tile_mode);
|
||||
curr_effect->set_texture("ShadowTexture", shadow_texture == nullptr ? nullptr : shadow_texture->get_finaltex());
|
||||
curr_effect->set_int("ShadowTileMode", options->shadow_mask_tile_mode);
|
||||
curr_effect->set_texture("DiffuseTexture", rt->target_texture[next_index]);
|
||||
curr_effect->set_vector("BackColor", 3, back_color);
|
||||
curr_effect->set_vector("ScreenScale", 2, screen_scale);
|
||||
@ -1298,9 +1299,9 @@ int shaders::downsample_pass(d3d_render_target *rt, int source_index, poly_info
|
||||
{
|
||||
curr_effect->set_vector("TargetDims", 2, rt->bloom_dims[bloom_index]);
|
||||
curr_effect->set_texture("DiffuseTexture",
|
||||
bloom_index == 0
|
||||
? rt->source_texture[next_index]
|
||||
: rt->bloom_texture[bloom_index - 1]);
|
||||
bloom_index == 0
|
||||
? rt->source_texture[next_index]
|
||||
: rt->bloom_texture[bloom_index - 1]);
|
||||
|
||||
blit(rt->bloom_surface[bloom_index], false, D3DPT_TRIANGLELIST, 0, 2);
|
||||
}
|
||||
|
||||
@ -325,7 +325,7 @@ win_window_info::win_window_info(
|
||||
m_non_fullscreen_bounds.right = 0;
|
||||
m_non_fullscreen_bounds.bottom = 0;
|
||||
m_prescale = video_config.prescale;
|
||||
m_index = index;
|
||||
m_index = index;
|
||||
}
|
||||
|
||||
POINT win_window_info::s_saved_cursor_pos = { -1, -1 };
|
||||
|
||||
@ -220,7 +220,7 @@ struct s2650_unidasm_t : s2650_disassembler::config
|
||||
virtual ~s2650_unidasm_t() override = default;
|
||||
virtual bool get_z80_mnemonics_mode() const override { return z80_mnemonics; }
|
||||
} s2650_unidasm;
|
||||
|
||||
|
||||
// Configuration missing
|
||||
struct saturn_unidasm_t : saturn_disassembler::config
|
||||
{
|
||||
|
||||
Loading…
Reference in New Issue
Block a user