mirror of
https://github.com/holub/mame
synced 2025-04-23 17:00:53 +03:00
(MESS) Apple II: Another pass on tagmaps, plus preliminary emulation of the standard and extended 80-column cards for the IIe [R. Belmont]
This commit is contained in:
parent
3fad03b0b2
commit
82547ea6dd
4
.gitattributes
vendored
4
.gitattributes
vendored
@ -6719,6 +6719,10 @@ src/mess/machine/a2eauxslot.c svneol=native#text/plain
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src/mess/machine/a2eauxslot.h svneol=native#text/plain
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src/mess/machine/a2echoii.c svneol=native#text/plain
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src/mess/machine/a2echoii.h svneol=native#text/plain
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src/mess/machine/a2eext80col.c svneol=native#text/plain
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src/mess/machine/a2eext80col.h svneol=native#text/plain
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src/mess/machine/a2estd80col.c svneol=native#text/plain
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src/mess/machine/a2estd80col.h svneol=native#text/plain
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src/mess/machine/a2lang.c svneol=native#text/plain
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src/mess/machine/a2lang.h svneol=native#text/plain
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src/mess/machine/a2memexp.c svneol=native#text/plain
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@ -212,6 +212,8 @@ Apple 3.5 and Apple 5.25 drives - up to three devices
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#include "machine/a2echoii.h"
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#include "machine/a2arcadebd.h"
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#include "machine/a2midi.h"
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#include "machine/a2estd80col.h"
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#include "machine/a2eext80col.h"
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/***************************************************************************
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PARAMETERS
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@ -635,6 +637,8 @@ static SLOT_INTERFACE_START(apple2_cards)
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SLOT_INTERFACE_END
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static SLOT_INTERFACE_START(apple2eaux_cards)
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SLOT_INTERFACE("std80", A2EAUX_STD80COL) /* Apple IIe Standard 80 Column Card */
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SLOT_INTERFACE("ext80", A2EAUX_EXT80COL) /* Apple IIe Extended 80 Column Card */
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SLOT_INTERFACE_END
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static MACHINE_CONFIG_START( apple2_common, apple2_state )
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@ -721,7 +725,7 @@ static MACHINE_CONFIG_DERIVED( apple2e, apple2_common )
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MCFG_A2BUS_ONBOARD_ADD("a2bus", "sl0", A2BUS_LANG, NULL)
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MCFG_A2EAUXSLOT_BUS_ADD(AUXSLOT_TAG, "maincpu", a2eauxbus_intf)
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MCFG_A2EAUXSLOT_SLOT_ADD(AUXSLOT_TAG, "slaux", apple2eaux_cards, NULL, NULL)
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MCFG_A2EAUXSLOT_SLOT_ADD(AUXSLOT_TAG, "aux", apple2eaux_cards, "ext80", NULL) // default to an extended 80-column card
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MACHINE_CONFIG_END
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@ -750,6 +754,7 @@ MACHINE_CONFIG_END
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static MACHINE_CONFIG_DERIVED( mprof3, apple2e )
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MCFG_MACHINE_START_OVERRIDE(apple2_state,apple2)
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MCFG_VIDEO_START_OVERRIDE(apple2_state,apple2c)
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/* internal ram */
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MCFG_RAM_MODIFY(RAM_TAG)
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@ -766,6 +771,7 @@ MACHINE_CONFIG_END
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static MACHINE_CONFIG_DERIVED( apple2c, apple2ee )
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MCFG_MACHINE_START_OVERRIDE(apple2_state,apple2)
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MCFG_VIDEO_START_OVERRIDE(apple2_state,apple2c)
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MCFG_A2BUS_SLOT_REMOVE("sl1") // IIc has no slots, of course :)
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MCFG_A2BUS_SLOT_REMOVE("sl2")
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@ -778,8 +784,12 @@ static MACHINE_CONFIG_DERIVED( apple2c, apple2ee )
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// TODO: populate the IIc's other virtual slots with ONBOARD_ADD
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MCFG_A2BUS_ONBOARD_ADD("a2bus", "sl6", A2BUS_DISKII, NULL)
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MCFG_A2EAUXSLOT_SLOT_REMOVE("slaux")
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MCFG_A2EAUXSLOT_SLOT_REMOVE("aux")
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MCFG_A2EAUXSLOT_BUS_REMOVE(AUXSLOT_TAG)
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MCFG_RAM_MODIFY(RAM_TAG)
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MCFG_RAM_DEFAULT_SIZE("128K")
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MCFG_RAM_EXTRA_OPTIONS("128K")
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MACHINE_CONFIG_END
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static MACHINE_CONFIG_DERIVED( apple2c_iwm, apple2c )
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@ -174,8 +174,8 @@ public:
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int m_last_key;
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int m_last_key_unmodified;
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unsigned int m_time_until_repeat;
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const UINT8 *m_a2_videoram;
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UINT32 m_a2_videomask;
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const UINT8 *m_a2_videoram, *m_a2_videoaux, *m_textgfx_data;
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UINT32 m_a2_videomask, m_textgfx_datalen;
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UINT32 m_old_a2;
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int m_fgcolor;
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int m_bgcolor;
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@ -188,8 +188,13 @@ public:
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UINT8 *m_rambase;
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UINT8 *m_rom, *m_slot_ram;
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UINT32 m_rom_length, m_slot_length;
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machine_type_t m_machinetype;
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device_a2eauxslot_card_interface *m_auxslotdevice;
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READ8_MEMBER(apple2_c0xx_r);
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WRITE8_MEMBER(apple2_c0xx_w);
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READ8_MEMBER(apple2_c080_r);
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@ -209,10 +214,43 @@ public:
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WRITE8_MEMBER ( apple2_c05x_w );
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WRITE8_MEMBER ( apple2_c07x_w );
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READ8_MEMBER ( apple2_mainram0000_r );
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READ8_MEMBER ( apple2_mainram0200_r );
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READ8_MEMBER ( apple2_mainram0400_r );
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READ8_MEMBER ( apple2_mainram0800_r );
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READ8_MEMBER ( apple2_mainram2000_r );
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READ8_MEMBER ( apple2_mainram4000_r );
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READ8_MEMBER ( apple2_mainramc000_r );
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READ8_MEMBER ( apple2_mainramd000_r );
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READ8_MEMBER ( apple2_mainrame000_r );
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READ8_MEMBER ( apple2_auxram0000_r );
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READ8_MEMBER ( apple2_auxram0200_r );
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READ8_MEMBER ( apple2_auxram0400_r );
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READ8_MEMBER ( apple2_auxram0800_r );
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READ8_MEMBER ( apple2_auxram2000_r );
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READ8_MEMBER ( apple2_auxram4000_r );
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READ8_MEMBER ( apple2_auxramc000_r );
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READ8_MEMBER ( apple2_auxramd000_r );
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READ8_MEMBER ( apple2_auxrame000_r );
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WRITE8_MEMBER ( apple2_mainram0000_w );
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WRITE8_MEMBER ( apple2_mainram0200_w );
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WRITE8_MEMBER ( apple2_mainram0400_w );
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WRITE8_MEMBER ( apple2_mainram0800_w );
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WRITE8_MEMBER ( apple2_mainram2000_w );
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WRITE8_MEMBER ( apple2_mainram4000_w );
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WRITE8_MEMBER ( apple2_mainramc000_w );
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WRITE8_MEMBER ( apple2_mainramd000_w );
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WRITE8_MEMBER ( apple2_mainrame000_w );
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WRITE8_MEMBER ( apple2_auxram0000_w );
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WRITE8_MEMBER ( apple2_auxram0200_w );
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WRITE8_MEMBER ( apple2_auxram0400_w );
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WRITE8_MEMBER ( apple2_auxram0800_w );
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WRITE8_MEMBER ( apple2_auxram2000_w );
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WRITE8_MEMBER ( apple2_auxram4000_w );
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WRITE8_MEMBER ( apple2_auxramc000_w );
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WRITE8_MEMBER ( apple2_auxramd000_w );
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WRITE8_MEMBER ( apple2_auxrame000_w );
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READ8_MEMBER ( apple2_c1xx_r );
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WRITE8_MEMBER ( apple2_c1xx_w );
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@ -241,8 +279,24 @@ public:
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read8_delegate read_delegates_master[4];
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write8_delegate write_delegates_master[3];
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write8_delegate write_delegates_0000[2];
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write8_delegate write_delegates_0200[2];
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write8_delegate write_delegates_0400[2];
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write8_delegate write_delegates_0800[2];
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write8_delegate write_delegates_2000[2];
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write8_delegate write_delegates_4000[2];
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write8_delegate write_delegates_c000[2];
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write8_delegate write_delegates_d000[2];
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write8_delegate write_delegates_e000[2];
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read8_delegate read_delegates_0000[2];
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read8_delegate read_delegates_0200[2];
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read8_delegate read_delegates_0400[2];
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read8_delegate read_delegates_0800[2];
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read8_delegate read_delegates_2000[2];
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read8_delegate read_delegates_4000[2];
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read8_delegate read_delegates_c000[2];
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read8_delegate read_delegates_d000[2];
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read8_delegate read_delegates_e000[2];
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read8_delegate rd_c000;
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write8_delegate wd_c000;
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read8_delegate rd_c080;
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@ -264,6 +318,7 @@ public:
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DECLARE_MACHINE_START(apple2orig);
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DECLARE_VIDEO_START(apple2p);
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DECLARE_VIDEO_START(apple2e);
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DECLARE_VIDEO_START(apple2c);
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DECLARE_MACHINE_START(tk2000);
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DECLARE_MACHINE_START(laser128);
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DECLARE_MACHINE_START(space84);
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@ -312,7 +367,7 @@ int apple2_pressed_specialkey(running_machine &machine, UINT8 key);
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/*----------- defined in video/apple2.c -----------*/
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void apple2_video_start(running_machine &machine, const UINT8 *vram, size_t vram_size, UINT32 ignored_softswitches, int hires_modulo);
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void apple2_video_start(running_machine &machine, const UINT8 *vram, const UINT8 *aux_vram, UINT32 ignored_softswitches, int hires_modulo);
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#endif /* APPLE2_H_ */
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@ -119,7 +119,11 @@ public:
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device_a2eauxslot_card_interface(const machine_config &mconfig, device_t &device);
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virtual ~device_a2eauxslot_card_interface();
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virtual void write_c07x(address_space &space, UINT8 offset, UINT8 data) { printf("a2eauxslot: unhandled write %02x to C07%x\n", data, offset); }
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virtual UINT8 read_auxram(UINT16 offset) { printf("a2eauxslot: unhandled auxram read @ %04x\n", offset); return 0xff; }
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virtual void write_auxram(UINT16 offset, UINT8 data) { printf("a2eauxslot: unhandled auxram write %02x @ %04x\n", data, offset); }
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virtual void write_c07x(address_space &space, UINT8 offset, UINT8 data) {}
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virtual UINT8 *get_vram_ptr() = 0;
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virtual bool allow_dhr() { return true; }
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device_a2eauxslot_card_interface *next() const { return m_next; }
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69
src/mess/machine/a2eext80col.c
Normal file
69
src/mess/machine/a2eext80col.c
Normal file
@ -0,0 +1,69 @@
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/*********************************************************************
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a2eext80col.c
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Apple IIe Extended 80 Column Card (64K of RAM, double-hi-res)
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*********************************************************************/
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#include "emu.h"
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#include "includes/apple2.h"
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#include "machine/a2eext80col.h"
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/***************************************************************************
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PARAMETERS
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***************************************************************************/
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//**************************************************************************
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// GLOBAL VARIABLES
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//**************************************************************************
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const device_type A2EAUX_EXT80COL = &device_creator<a2eaux_ext80col_device>;
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//**************************************************************************
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// LIVE DEVICE
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//**************************************************************************
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a2eaux_ext80col_device::a2eaux_ext80col_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
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device_t(mconfig, A2EAUX_EXT80COL, "Apple IIe Extended 80-Column Card", tag, owner, clock),
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device_a2eauxslot_card_interface(mconfig, *this)
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{
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m_shortname = "a2eext80";
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}
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a2eaux_ext80col_device::a2eaux_ext80col_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock) :
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device_t(mconfig, type, name, tag, owner, clock),
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device_a2eauxslot_card_interface(mconfig, *this)
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{
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m_shortname = "a2eext80";
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}
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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void a2eaux_ext80col_device::device_start()
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{
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set_a2eauxslot_device();
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}
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void a2eaux_ext80col_device::device_reset()
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{
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}
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UINT8 a2eaux_ext80col_device::read_auxram(UINT16 offset)
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{
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return m_ram[offset];
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}
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void a2eaux_ext80col_device::write_auxram(UINT16 offset, UINT8 data)
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{
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m_ram[offset] = data;
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}
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UINT8 *a2eaux_ext80col_device::get_vram_ptr()
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{
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return &m_ram[0];
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}
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45
src/mess/machine/a2eext80col.h
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45
src/mess/machine/a2eext80col.h
Normal file
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/*********************************************************************
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a2eext80col.c
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Apple IIe Extended 80 Column Card
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*********************************************************************/
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#ifndef __A2EAUX_EXT80COL__
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#define __A2EAUX_EXT80COL__
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#include "emu.h"
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#include "machine/a2eauxslot.h"
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//**************************************************************************
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// TYPE DEFINITIONS
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//**************************************************************************
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class a2eaux_ext80col_device:
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public device_t,
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public device_a2eauxslot_card_interface
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{
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public:
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// construction/destruction
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a2eaux_ext80col_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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a2eaux_ext80col_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
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protected:
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virtual void device_start();
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virtual void device_reset();
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virtual UINT8 read_auxram(UINT16 offset);
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virtual void write_auxram(UINT16 offset, UINT8 data);
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virtual UINT8 *get_vram_ptr();
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virtual bool allow_dhr() { return true; }
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private:
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UINT8 m_ram[64*1024];
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};
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// device type definition
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extern const device_type A2EAUX_EXT80COL;
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#endif /* __A2EAUX_EXT80COL__ */
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77
src/mess/machine/a2estd80col.c
Normal file
77
src/mess/machine/a2estd80col.c
Normal file
@ -0,0 +1,77 @@
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/*********************************************************************
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a2estd80col.c
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Apple IIe Standard 80 Column Card (2K of RAM, no double-hi-res)
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*********************************************************************/
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#include "emu.h"
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#include "includes/apple2.h"
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#include "machine/a2estd80col.h"
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/***************************************************************************
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PARAMETERS
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***************************************************************************/
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//**************************************************************************
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// GLOBAL VARIABLES
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//**************************************************************************
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const device_type A2EAUX_STD80COL = &device_creator<a2eaux_std80col_device>;
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//**************************************************************************
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// LIVE DEVICE
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//**************************************************************************
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a2eaux_std80col_device::a2eaux_std80col_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
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device_t(mconfig, A2EAUX_STD80COL, "Apple IIe Standard 80-Column Card", tag, owner, clock),
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device_a2eauxslot_card_interface(mconfig, *this)
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{
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m_shortname = "a2estd80";
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}
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a2eaux_std80col_device::a2eaux_std80col_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock) :
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device_t(mconfig, type, name, tag, owner, clock),
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device_a2eauxslot_card_interface(mconfig, *this)
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{
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m_shortname = "a2estd80";
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}
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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void a2eaux_std80col_device::device_start()
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{
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set_a2eauxslot_device();
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}
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void a2eaux_std80col_device::device_reset()
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{
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}
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UINT8 a2eaux_std80col_device::read_auxram(UINT16 offset)
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{
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if (offset < 0x800)
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{
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return m_ram[offset];
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}
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return 0xff;
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}
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void a2eaux_std80col_device::write_auxram(UINT16 offset, UINT8 data)
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{
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if (offset < 0x800)
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{
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m_ram[offset] = data;
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}
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}
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UINT8 *a2eaux_std80col_device::get_vram_ptr()
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{
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return &m_ram[0];
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}
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45
src/mess/machine/a2estd80col.h
Normal file
45
src/mess/machine/a2estd80col.h
Normal file
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/*********************************************************************
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a2estd80col.c
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Apple IIe Standard 80 Column Card
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*********************************************************************/
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#ifndef __A2EAUX_STD80COL__
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#define __A2EAUX_STD80COL__
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#include "emu.h"
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#include "machine/a2eauxslot.h"
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//**************************************************************************
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// TYPE DEFINITIONS
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//**************************************************************************
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class a2eaux_std80col_device:
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public device_t,
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public device_a2eauxslot_card_interface
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{
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public:
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// construction/destruction
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a2eaux_std80col_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
a2eaux_std80col_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
|
||||
virtual UINT8 read_auxram(UINT16 offset);
|
||||
virtual void write_auxram(UINT16 offset, UINT8 data);
|
||||
virtual UINT8 *get_vram_ptr();
|
||||
virtual bool allow_dhr() { return false; } // we don't allow DHR
|
||||
|
||||
private:
|
||||
UINT8 m_ram[2*1024];
|
||||
};
|
||||
|
||||
// device type definition
|
||||
extern const device_type A2EAUX_STD80COL;
|
||||
|
||||
#endif /* __A2EAUX_STD80COL__ */
|
||||
|
@ -65,8 +65,8 @@ void apple2_state::apple2_update_memory()
|
||||
read8_delegate *rh;
|
||||
write8_delegate *wh;
|
||||
offs_t begin, end_r, end_w;
|
||||
UINT8 *rbase, *wbase, *rom;
|
||||
UINT32 rom_length, offset;
|
||||
UINT8 *rbase, *wbase;
|
||||
UINT32 offset;
|
||||
bank_disposition_t bank_disposition;
|
||||
int wh_nop = 0;
|
||||
|
||||
@ -79,10 +79,6 @@ void apple2_state::apple2_update_memory()
|
||||
full_update = 1;
|
||||
}
|
||||
|
||||
/* get critical info */
|
||||
rom = memregion("maincpu")->base();
|
||||
rom_length = memregion("maincpu")->bytes() & ~0xFFF;
|
||||
|
||||
/* loop through the entire memory map */
|
||||
bank = m_mem_config.first_bank;
|
||||
for (i = 0; m_mem_config.memmap[i].get_meminfo; i++)
|
||||
@ -149,7 +145,7 @@ void apple2_state::apple2_update_memory()
|
||||
{
|
||||
/* ROM */
|
||||
offset = meminfo.read_mem & APPLE2_MEM_MASK;
|
||||
rbase = &rom[offset % rom_length];
|
||||
rbase = &m_rom[offset % m_rom_length];
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -388,16 +384,8 @@ WRITE8_MEMBER(apple2_state::apple2_c080_w)
|
||||
INT8 apple2_slotram_r(address_space &space, int slotnum, int offset)
|
||||
{
|
||||
apple2_state *state = space.machine().driver_data<apple2_state>();
|
||||
UINT8 *rom, *slot_ram;
|
||||
UINT32 rom_length, slot_length;
|
||||
|
||||
// find slot_ram if any
|
||||
rom = state->memregion("maincpu")->base();
|
||||
rom_length = state->memregion("maincpu")->bytes() & ~0xFFF;
|
||||
slot_length = state->memregion("maincpu")->bytes() - rom_length;
|
||||
slot_ram = (slot_length > 0) ? &rom[rom_length] : NULL;
|
||||
|
||||
if (slot_ram)
|
||||
if (state->m_slot_ram)
|
||||
{
|
||||
if (!space.debugger_access())
|
||||
{
|
||||
@ -406,7 +394,7 @@ INT8 apple2_slotram_r(address_space &space, int slotnum, int offset)
|
||||
state->apple2_update_memory();
|
||||
}
|
||||
|
||||
return slot_ram[offset];
|
||||
return state->m_slot_ram[offset];
|
||||
}
|
||||
|
||||
// else fall through to floating bus
|
||||
@ -445,14 +433,6 @@ WRITE8_MEMBER(apple2_state::apple2_c1xx_w )
|
||||
{
|
||||
int slotnum;
|
||||
device_a2bus_card_interface *slotdevice;
|
||||
UINT8 *rom, *slot_ram;
|
||||
UINT32 rom_length, slot_length;
|
||||
|
||||
// find slot_ram if any
|
||||
rom = memregion("maincpu")->base();
|
||||
rom_length = memregion("maincpu")->bytes() & ~0xFFF;
|
||||
slot_length = memregion("maincpu")->bytes() - rom_length;
|
||||
slot_ram = (slot_length > 0) ? &rom[rom_length] : NULL;
|
||||
|
||||
slotnum = ((offset>>8) & 0xf) + 1;
|
||||
|
||||
@ -464,8 +444,8 @@ WRITE8_MEMBER(apple2_state::apple2_c1xx_w )
|
||||
}
|
||||
else
|
||||
{
|
||||
if (slot_ram)
|
||||
slot_ram[offset] = data;
|
||||
if (m_slot_ram)
|
||||
m_slot_ram[offset] = data;
|
||||
}
|
||||
}
|
||||
|
||||
@ -501,14 +481,6 @@ WRITE8_MEMBER(apple2_state::apple2_c3xx_w )
|
||||
{
|
||||
int slotnum;
|
||||
device_a2bus_card_interface *slotdevice;
|
||||
UINT8 *rom, *slot_ram;
|
||||
UINT32 rom_length, slot_length;
|
||||
|
||||
// find slot_ram if any
|
||||
rom = memregion("maincpu")->base();
|
||||
rom_length = memregion("maincpu")->bytes() & ~0xFFF;
|
||||
slot_length = memregion("maincpu")->bytes() - rom_length;
|
||||
slot_ram = (slot_length > 0) ? &rom[rom_length] : NULL;
|
||||
|
||||
slotnum = 3;
|
||||
slotdevice = m_a2bus->get_a2bus_card(slotnum);
|
||||
@ -525,8 +497,8 @@ WRITE8_MEMBER(apple2_state::apple2_c3xx_w )
|
||||
}
|
||||
else
|
||||
{
|
||||
if (slot_ram)
|
||||
slot_ram[offset] = data;
|
||||
if (m_slot_ram)
|
||||
m_slot_ram[offset] = data;
|
||||
}
|
||||
}
|
||||
|
||||
@ -561,14 +533,6 @@ WRITE8_MEMBER ( apple2_state::apple2_c4xx_w )
|
||||
{
|
||||
int slotnum;
|
||||
device_a2bus_card_interface *slotdevice;
|
||||
UINT8 *rom, *slot_ram;
|
||||
UINT32 rom_length, slot_length;
|
||||
|
||||
// find slot_ram if any
|
||||
rom = memregion("maincpu")->base();
|
||||
rom_length = memregion("maincpu")->bytes() & ~0xFFF;
|
||||
slot_length = memregion("maincpu")->bytes() - rom_length;
|
||||
slot_ram = (slot_length > 0) ? &rom[rom_length] : NULL;
|
||||
|
||||
slotnum = ((offset>>8) & 0xf) + 4;
|
||||
slotdevice = m_a2bus->get_a2bus_card(slotnum);
|
||||
@ -585,8 +549,8 @@ WRITE8_MEMBER ( apple2_state::apple2_c4xx_w )
|
||||
}
|
||||
else
|
||||
{
|
||||
if (slot_ram)
|
||||
slot_ram[offset] = data;
|
||||
if (m_slot_ram)
|
||||
m_slot_ram[offset] = data;
|
||||
}
|
||||
}
|
||||
|
||||
@ -720,15 +684,15 @@ WRITE8_MEMBER(apple2_state::apple2_inh_e000_w )
|
||||
static void apple2_mem_0000(running_machine &machine, offs_t begin, offs_t end, apple2_meminfo *meminfo)
|
||||
{
|
||||
apple2_state *state = machine.driver_data<apple2_state>();
|
||||
meminfo->read_mem = (state->m_flags & VAR_ALTZP) ? 0x010000 : 0x000000;
|
||||
meminfo->write_mem = (state->m_flags & VAR_ALTZP) ? 0x010000 : 0x000000;
|
||||
meminfo->read_handler = (state->m_flags & VAR_ALTZP) ? &state->read_delegates_0000[0] : &state->read_delegates_0000[1];
|
||||
meminfo->write_handler = (state->m_flags & VAR_ALTZP) ? &state->write_delegates_0000[0] : &state->write_delegates_0000[1];
|
||||
}
|
||||
|
||||
static void apple2_mem_0200(running_machine &machine, offs_t begin, offs_t end, apple2_meminfo *meminfo)
|
||||
{
|
||||
apple2_state *state = machine.driver_data<apple2_state>();
|
||||
meminfo->read_mem = (state->m_flags & VAR_RAMRD) ? 0x010200 : 0x000200;
|
||||
meminfo->write_mem = (state->m_flags & VAR_RAMWRT) ? 0x010200 : 0x000200;
|
||||
meminfo->read_handler = (state->m_flags & VAR_RAMRD) ? &state->read_delegates_0200[0] : &state->read_delegates_0200[1];
|
||||
meminfo->write_handler = (state->m_flags & VAR_RAMWRT) ? &state->write_delegates_0200[0] : &state->write_delegates_0200[1];
|
||||
}
|
||||
|
||||
static void apple2_mem_0400(running_machine &machine, offs_t begin, offs_t end, apple2_meminfo *meminfo)
|
||||
@ -737,14 +701,12 @@ static void apple2_mem_0400(running_machine &machine, offs_t begin, offs_t end,
|
||||
|
||||
if (state->m_flags & VAR_80STORE)
|
||||
{
|
||||
meminfo->read_mem = (state->m_flags & VAR_PAGE2) ? 0x010400 : 0x000400;
|
||||
meminfo->write_mem = (state->m_flags & VAR_PAGE2) ? 0x010400 : 0x000400;
|
||||
meminfo->read_handler = (state->m_flags & VAR_PAGE2) ? &state->read_delegates_0400[0] : &state->read_delegates_0400[1];
|
||||
meminfo->write_handler = (state->m_flags & VAR_PAGE2) ? &state->write_delegates_0400[0] : &state->write_delegates_0400[1];
|
||||
}
|
||||
else
|
||||
{
|
||||
meminfo->read_mem = (state->m_flags & VAR_RAMRD) ? 0x010400 : 0x000400;
|
||||
meminfo->write_mem = (state->m_flags & VAR_RAMWRT) ? 0x010400 : 0x000400;
|
||||
meminfo->read_handler = (state->m_flags & VAR_RAMRD) ? &state->read_delegates_0400[0] : &state->read_delegates_0400[1];
|
||||
meminfo->write_handler = (state->m_flags & VAR_RAMWRT) ? &state->write_delegates_0400[0] : &state->write_delegates_0400[1];
|
||||
}
|
||||
}
|
||||
@ -752,8 +714,8 @@ static void apple2_mem_0400(running_machine &machine, offs_t begin, offs_t end,
|
||||
static void apple2_mem_0800(running_machine &machine, offs_t begin, offs_t end, apple2_meminfo *meminfo)
|
||||
{
|
||||
apple2_state *state = machine.driver_data<apple2_state>();
|
||||
meminfo->read_mem = (state->m_flags & VAR_RAMRD) ? 0x010800 : 0x000800;
|
||||
meminfo->write_mem = (state->m_flags & VAR_RAMWRT) ? 0x010800 : 0x000800;
|
||||
meminfo->read_handler = (state->m_flags & VAR_RAMRD) ? &state->read_delegates_0800[0] : &state->read_delegates_0800[1];
|
||||
meminfo->write_handler = (state->m_flags & VAR_RAMWRT) ? &state->write_delegates_0800[0] : &state->write_delegates_0800[1];
|
||||
}
|
||||
|
||||
static void apple2_mem_2000(running_machine &machine, offs_t begin, offs_t end, apple2_meminfo *meminfo)
|
||||
@ -761,14 +723,12 @@ static void apple2_mem_2000(running_machine &machine, offs_t begin, offs_t end,
|
||||
apple2_state *state = machine.driver_data<apple2_state>();
|
||||
if ((state->m_flags & (VAR_80STORE|VAR_HIRES)) == (VAR_80STORE|VAR_HIRES))
|
||||
{
|
||||
meminfo->read_mem = (state->m_flags & VAR_PAGE2) ? 0x012000 : 0x002000;
|
||||
meminfo->write_mem = (state->m_flags & VAR_PAGE2) ? 0x012000 : 0x002000;
|
||||
meminfo->read_handler = (state->m_flags & VAR_PAGE2) ? &state->read_delegates_2000[0] : &state->read_delegates_2000[1];
|
||||
meminfo->write_handler = (state->m_flags & VAR_PAGE2) ? &state->write_delegates_2000[0] : &state->write_delegates_2000[1];
|
||||
}
|
||||
else
|
||||
{
|
||||
meminfo->read_mem = (state->m_flags & VAR_RAMRD) ? 0x012000 : 0x002000;
|
||||
meminfo->write_mem = (state->m_flags & VAR_RAMWRT) ? 0x012000 : 0x002000;
|
||||
meminfo->read_handler = (state->m_flags & VAR_RAMRD) ? &state->read_delegates_2000[0] : &state->read_delegates_2000[1];
|
||||
meminfo->write_handler = (state->m_flags & VAR_RAMWRT) ? &state->write_delegates_2000[0] : &state->write_delegates_2000[1];
|
||||
}
|
||||
}
|
||||
@ -776,8 +736,8 @@ static void apple2_mem_2000(running_machine &machine, offs_t begin, offs_t end,
|
||||
static void apple2_mem_4000(running_machine &machine, offs_t begin, offs_t end, apple2_meminfo *meminfo)
|
||||
{
|
||||
apple2_state *state = machine.driver_data<apple2_state>();
|
||||
meminfo->read_mem = (state->m_flags & VAR_RAMRD) ? 0x014000 : 0x004000;
|
||||
meminfo->write_mem = (state->m_flags & VAR_RAMWRT) ? 0x014000 : 0x004000;
|
||||
meminfo->read_handler = (state->m_flags & VAR_RAMRD) ? &state->read_delegates_4000[0] : &state->read_delegates_4000[1];
|
||||
meminfo->write_handler = (state->m_flags & VAR_RAMWRT) ? &state->write_delegates_4000[0] : &state->write_delegates_4000[1];
|
||||
}
|
||||
|
||||
static void apple2_mem_C000(running_machine &machine, offs_t begin, offs_t end, apple2_meminfo *meminfo)
|
||||
@ -896,9 +856,13 @@ static void apple2_mem_D000(running_machine &machine, offs_t begin, offs_t end,
|
||||
if (state->m_flags & VAR_LCRAM)
|
||||
{
|
||||
if (state->m_flags & VAR_LCRAM2)
|
||||
meminfo->read_mem = (state->m_flags & VAR_ALTZP) ? 0x01C000 : 0x00C000;
|
||||
{
|
||||
meminfo->read_handler = (state->m_flags & VAR_ALTZP) ? &state->read_delegates_c000[0] : &state->read_delegates_c000[1];
|
||||
}
|
||||
else
|
||||
meminfo->read_mem = (state->m_flags & VAR_ALTZP) ? 0x01D000 : 0x00D000;
|
||||
{
|
||||
meminfo->read_handler = (state->m_flags & VAR_ALTZP) ? &state->read_delegates_d000[0] : &state->read_delegates_d000[1];
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -909,9 +873,13 @@ static void apple2_mem_D000(running_machine &machine, offs_t begin, offs_t end,
|
||||
if (state->m_flags & VAR_LCWRITE)
|
||||
{
|
||||
if (state->m_flags & VAR_LCRAM2)
|
||||
meminfo->write_mem = (state->m_flags & VAR_ALTZP) ? 0x01C000 : 0x00C000;
|
||||
{
|
||||
meminfo->write_handler = (state->m_flags & VAR_ALTZP) ? &state->write_delegates_c000[0] : &state->write_delegates_c000[1];
|
||||
}
|
||||
else
|
||||
meminfo->write_mem = (state->m_flags & VAR_ALTZP) ? 0x01D000 : 0x00D000;
|
||||
{
|
||||
meminfo->write_handler = (state->m_flags & VAR_ALTZP) ? &state->write_delegates_d000[0] : &state->write_delegates_d000[1];
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -933,7 +901,7 @@ static void apple2_mem_E000(running_machine &machine, offs_t begin, offs_t end,
|
||||
{
|
||||
if (state->m_flags & VAR_LCRAM)
|
||||
{
|
||||
meminfo->read_mem = (state->m_flags & VAR_ALTZP) ? 0x01E000 : 0x00E000;
|
||||
meminfo->read_handler = (state->m_flags & VAR_ALTZP) ? &state->read_delegates_e000[0] : &state->read_delegates_e000[1];
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -943,7 +911,7 @@ static void apple2_mem_E000(running_machine &machine, offs_t begin, offs_t end,
|
||||
|
||||
if (state->m_flags & VAR_LCWRITE)
|
||||
{
|
||||
meminfo->write_mem = (state->m_flags & VAR_ALTZP) ? 0x01E000 : 0x00E000;
|
||||
meminfo->write_handler = (state->m_flags & VAR_ALTZP) ? &state->write_delegates_e000[0] : &state->write_delegates_e000[1];
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -1220,37 +1188,397 @@ TIMER_DEVICE_CALLBACK_MEMBER(apple2_state::apple2_interrupt)
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
apple2_mainram0400_w
|
||||
apple2_mainram2000_w
|
||||
apple2_auxram0400_w
|
||||
apple2_auxram2000_w
|
||||
apple2_mainramxx00_r
|
||||
apple2_mainramxx00_w
|
||||
apple2_auxramxx00_r
|
||||
apple2_auxramxx00_w
|
||||
***************************************************************************/
|
||||
|
||||
READ8_MEMBER ( apple2_state::apple2_mainram0000_r )
|
||||
{
|
||||
return m_rambase[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER ( apple2_state::apple2_mainram0200_r )
|
||||
{
|
||||
offset += 0x200;
|
||||
return m_rambase[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER ( apple2_state::apple2_mainram0400_r )
|
||||
{
|
||||
offset += 0x400;
|
||||
return m_rambase[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER ( apple2_state::apple2_mainram0800_r )
|
||||
{
|
||||
offset += 0x800;
|
||||
return m_rambase[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER ( apple2_state::apple2_mainram2000_r )
|
||||
{
|
||||
offset += 0x2000;
|
||||
return m_rambase[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER ( apple2_state::apple2_mainram4000_r )
|
||||
{
|
||||
offset += 0x4000;
|
||||
return m_rambase[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER ( apple2_state::apple2_mainramc000_r )
|
||||
{
|
||||
offset += 0xc000;
|
||||
return m_rambase[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER ( apple2_state::apple2_mainramd000_r )
|
||||
{
|
||||
offset += 0xd000;
|
||||
return m_rambase[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER ( apple2_state::apple2_mainrame000_r )
|
||||
{
|
||||
offset += 0xe000;
|
||||
return m_rambase[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER ( apple2_state::apple2_auxram0000_r )
|
||||
{
|
||||
if (m_auxslotdevice)
|
||||
{
|
||||
return m_auxslotdevice->read_auxram(offset);
|
||||
}
|
||||
else if (m_machinetype == APPLE_IIE)
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
offset += 0x10000;
|
||||
return m_rambase[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER ( apple2_state::apple2_auxram0200_r )
|
||||
{
|
||||
if (m_auxslotdevice)
|
||||
{
|
||||
return m_auxslotdevice->read_auxram(offset+0x200);
|
||||
}
|
||||
else if (m_machinetype == APPLE_IIE)
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
offset += 0x10200;
|
||||
return m_rambase[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER ( apple2_state::apple2_auxram0400_r )
|
||||
{
|
||||
if (m_auxslotdevice)
|
||||
{
|
||||
return m_auxslotdevice->read_auxram(offset+0x400);
|
||||
}
|
||||
else if (m_machinetype == APPLE_IIE)
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
offset += 0x10400;
|
||||
return m_rambase[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER ( apple2_state::apple2_auxram0800_r )
|
||||
{
|
||||
if (m_auxslotdevice)
|
||||
{
|
||||
return m_auxslotdevice->read_auxram(offset+0x800);
|
||||
}
|
||||
else if (m_machinetype == APPLE_IIE)
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
offset += 0x10800;
|
||||
return m_rambase[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER ( apple2_state::apple2_auxram2000_r )
|
||||
{
|
||||
if (m_auxslotdevice)
|
||||
{
|
||||
return m_auxslotdevice->read_auxram(offset+0x2000);
|
||||
}
|
||||
else if (m_machinetype == APPLE_IIE)
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
offset += 0x12000;
|
||||
return m_rambase[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER ( apple2_state::apple2_auxram4000_r )
|
||||
{
|
||||
if (m_auxslotdevice)
|
||||
{
|
||||
return m_auxslotdevice->read_auxram(offset+0x4000);
|
||||
}
|
||||
else if (m_machinetype == APPLE_IIE)
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
offset += 0x14000;
|
||||
return m_rambase[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER ( apple2_state::apple2_auxramc000_r )
|
||||
{
|
||||
if (m_auxslotdevice)
|
||||
{
|
||||
return m_auxslotdevice->read_auxram(offset+0xc000);
|
||||
}
|
||||
else if (m_machinetype == APPLE_IIE)
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
offset += 0x1c000;
|
||||
return m_rambase[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER ( apple2_state::apple2_auxramd000_r )
|
||||
{
|
||||
if (m_auxslotdevice)
|
||||
{
|
||||
return m_auxslotdevice->read_auxram(offset+0xd000);
|
||||
}
|
||||
else if (m_machinetype == APPLE_IIE)
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
offset += 0x1d000;
|
||||
return m_rambase[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER ( apple2_state::apple2_auxrame000_r )
|
||||
{
|
||||
if (m_auxslotdevice)
|
||||
{
|
||||
return m_auxslotdevice->read_auxram(offset+0xe000);
|
||||
}
|
||||
else if (m_machinetype == APPLE_IIE)
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
offset += 0x1e000;
|
||||
return m_rambase[offset];
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER ( apple2_state::apple2_mainram0000_w )
|
||||
{
|
||||
m_rambase[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER ( apple2_state::apple2_mainram0200_w )
|
||||
{
|
||||
offset += 0x200;
|
||||
m_rambase[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER ( apple2_state::apple2_mainram0400_w )
|
||||
{
|
||||
offset += 0x400;
|
||||
m_rambase[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER ( apple2_state::apple2_mainram0800_w )
|
||||
{
|
||||
offset += 0x800;
|
||||
m_rambase[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER ( apple2_state::apple2_mainram2000_w )
|
||||
{
|
||||
offset += 0x2000;
|
||||
m_rambase[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER ( apple2_state::apple2_mainram4000_w )
|
||||
{
|
||||
offset += 0x4000;
|
||||
m_rambase[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER ( apple2_state::apple2_mainramc000_w )
|
||||
{
|
||||
offset += 0xc000;
|
||||
m_rambase[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER ( apple2_state::apple2_mainramd000_w )
|
||||
{
|
||||
offset += 0xd000;
|
||||
m_rambase[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER ( apple2_state::apple2_mainrame000_w )
|
||||
{
|
||||
offset += 0xe000;
|
||||
m_rambase[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER ( apple2_state::apple2_auxram0000_w )
|
||||
{
|
||||
if (m_auxslotdevice)
|
||||
{
|
||||
m_auxslotdevice->write_auxram(offset, data);
|
||||
return;
|
||||
}
|
||||
else if (m_machinetype == APPLE_IIE)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
offset += 0x10000;
|
||||
m_rambase[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER ( apple2_state::apple2_auxram0200_w )
|
||||
{
|
||||
if (m_auxslotdevice)
|
||||
{
|
||||
m_auxslotdevice->write_auxram(offset+0x200, data);
|
||||
return;
|
||||
}
|
||||
else if (m_machinetype == APPLE_IIE)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
offset += 0x10200;
|
||||
m_rambase[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER ( apple2_state::apple2_auxram0400_w )
|
||||
{
|
||||
if (m_auxslotdevice)
|
||||
{
|
||||
m_auxslotdevice->write_auxram(offset+0x400, data);
|
||||
return;
|
||||
}
|
||||
else if (m_machinetype == APPLE_IIE)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
offset += 0x10400;
|
||||
m_rambase[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER ( apple2_state::apple2_auxram0800_w )
|
||||
{
|
||||
if (m_auxslotdevice)
|
||||
{
|
||||
m_auxslotdevice->write_auxram(offset+0x800, data);
|
||||
return;
|
||||
}
|
||||
else if (m_machinetype == APPLE_IIE)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
offset += 0x10800;
|
||||
m_rambase[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER ( apple2_state::apple2_auxram2000_w )
|
||||
{
|
||||
if (m_auxslotdevice)
|
||||
{
|
||||
m_auxslotdevice->write_auxram(offset+0x2000, data);
|
||||
return;
|
||||
}
|
||||
else if (m_machinetype == APPLE_IIE)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
offset += 0x12000;
|
||||
m_rambase[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER ( apple2_state::apple2_auxram4000_w )
|
||||
{
|
||||
if (m_auxslotdevice)
|
||||
{
|
||||
m_auxslotdevice->write_auxram(offset+0x4000, data);
|
||||
return;
|
||||
}
|
||||
else if (m_machinetype == APPLE_IIE)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
offset += 0x14000;
|
||||
m_rambase[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER ( apple2_state::apple2_auxramc000_w )
|
||||
{
|
||||
if (m_auxslotdevice)
|
||||
{
|
||||
m_auxslotdevice->write_auxram(offset+0xc000, data);
|
||||
return;
|
||||
}
|
||||
else if (m_machinetype == APPLE_IIE)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
offset += 0x1c000;
|
||||
m_rambase[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER ( apple2_state::apple2_auxramd000_w )
|
||||
{
|
||||
if (m_auxslotdevice)
|
||||
{
|
||||
m_auxslotdevice->write_auxram(offset+0xd000, data);
|
||||
return;
|
||||
}
|
||||
else if (m_machinetype == APPLE_IIE)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
offset += 0x1d000;
|
||||
m_rambase[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER ( apple2_state::apple2_auxrame000_w )
|
||||
{
|
||||
if (m_auxslotdevice)
|
||||
{
|
||||
m_auxslotdevice->write_auxram(offset+0xe000, data);
|
||||
return;
|
||||
}
|
||||
else if (m_machinetype == APPLE_IIE)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
offset += 0x1e000;
|
||||
m_rambase[offset] = data;
|
||||
}
|
||||
|
||||
/***************************************************************************
|
||||
apple2_c00x_r
|
||||
@ -1582,16 +1910,9 @@ READ8_MEMBER ( apple2_state::apple2_c07x_r )
|
||||
WRITE8_MEMBER ( apple2_state::apple2_c07x_w )
|
||||
{
|
||||
// this a machine with an aux slot?
|
||||
if (m_machinetype == APPLE_IIE)
|
||||
if (m_auxslotdevice)
|
||||
{
|
||||
device_a2eauxslot_card_interface *auxslotdevice = NULL;
|
||||
|
||||
auxslotdevice = m_a2eauxslot->get_a2eauxslot_card();
|
||||
|
||||
if (auxslotdevice)
|
||||
{
|
||||
auxslotdevice->write_c07x(space, offset&0xf, data);
|
||||
}
|
||||
m_auxslotdevice->write_c07x(space, offset&0xf, data);
|
||||
}
|
||||
|
||||
// AE RamWorks manual indicates that even if the auxslot card sees the c07x write,
|
||||
@ -1771,6 +2092,18 @@ void apple2_init_common(running_machine &machine)
|
||||
state->m_flags = 0;
|
||||
state->m_fdc_diskreg = 0;
|
||||
|
||||
// do these lookups once at startup
|
||||
state->m_rom = state->memregion("maincpu")->base();
|
||||
state->m_rom_length = state->memregion("maincpu")->bytes() & ~0xFFF;
|
||||
state->m_slot_length = state->memregion("maincpu")->bytes() - state->m_rom_length;
|
||||
state->m_slot_ram = (state->m_slot_length > 0) ? &state->m_rom[state->m_rom_length] : NULL;
|
||||
|
||||
state->m_auxslotdevice = NULL;
|
||||
if (state->m_machinetype == APPLE_IIE)
|
||||
{
|
||||
state->m_auxslotdevice = state->m_a2eauxslot->get_a2eauxslot_card();
|
||||
}
|
||||
|
||||
AY3600_init(machine);
|
||||
|
||||
/* state save registers */
|
||||
@ -1937,9 +2270,6 @@ void apple2_state::apple2_refresh_delegates()
|
||||
write_delegates_master[1] = write8_delegate(FUNC(apple2_state::apple2_c3xx_w), this);
|
||||
write_delegates_master[2] = write8_delegate(FUNC(apple2_state::apple2_c4xx_w), this);
|
||||
|
||||
write_delegates_2000[0] = write8_delegate(FUNC(apple2_state::apple2_auxram2000_w), this);
|
||||
write_delegates_2000[1] = write8_delegate(FUNC(apple2_state::apple2_mainram2000_w), this);
|
||||
|
||||
rd_c000 = read8_delegate(FUNC(apple2_state::apple2_c0xx_r), this);
|
||||
wd_c000 = write8_delegate(FUNC(apple2_state::apple2_c0xx_w), this);
|
||||
|
||||
@ -1961,7 +2291,41 @@ void apple2_state::apple2_refresh_delegates()
|
||||
rd_inh_e000 = read8_delegate(FUNC(apple2_state::apple2_inh_e000_r), this);
|
||||
wd_inh_e000 = write8_delegate(FUNC(apple2_state::apple2_inh_e000_w), this);
|
||||
|
||||
read_delegates_0000[0] = read8_delegate(FUNC(apple2_state::apple2_auxram0000_r), this);
|
||||
read_delegates_0000[1] = read8_delegate(FUNC(apple2_state::apple2_mainram0000_r), this);
|
||||
read_delegates_0200[0] = read8_delegate(FUNC(apple2_state::apple2_auxram0200_r), this);
|
||||
read_delegates_0200[1] = read8_delegate(FUNC(apple2_state::apple2_mainram0200_r), this);
|
||||
read_delegates_0400[0] = read8_delegate(FUNC(apple2_state::apple2_auxram0400_r), this);
|
||||
read_delegates_0400[1] = read8_delegate(FUNC(apple2_state::apple2_mainram0400_r), this);
|
||||
read_delegates_0800[0] = read8_delegate(FUNC(apple2_state::apple2_auxram0800_r), this);
|
||||
read_delegates_0800[1] = read8_delegate(FUNC(apple2_state::apple2_mainram0800_r), this);
|
||||
read_delegates_2000[0] = read8_delegate(FUNC(apple2_state::apple2_auxram2000_r), this);
|
||||
read_delegates_2000[1] = read8_delegate(FUNC(apple2_state::apple2_mainram2000_r), this);
|
||||
read_delegates_4000[0] = read8_delegate(FUNC(apple2_state::apple2_auxram4000_r), this);
|
||||
read_delegates_4000[1] = read8_delegate(FUNC(apple2_state::apple2_mainram4000_r), this);
|
||||
read_delegates_c000[0] = read8_delegate(FUNC(apple2_state::apple2_auxramc000_r), this);
|
||||
read_delegates_c000[1] = read8_delegate(FUNC(apple2_state::apple2_mainramc000_r), this);
|
||||
read_delegates_d000[0] = read8_delegate(FUNC(apple2_state::apple2_auxramd000_r), this);
|
||||
read_delegates_d000[1] = read8_delegate(FUNC(apple2_state::apple2_mainramd000_r), this);
|
||||
read_delegates_e000[0] = read8_delegate(FUNC(apple2_state::apple2_auxrame000_r), this);
|
||||
read_delegates_e000[1] = read8_delegate(FUNC(apple2_state::apple2_mainrame000_r), this);
|
||||
|
||||
write_delegates_0000[0] = write8_delegate(FUNC(apple2_state::apple2_auxram0000_w), this);
|
||||
write_delegates_0000[1] = write8_delegate(FUNC(apple2_state::apple2_mainram0000_w), this);
|
||||
write_delegates_0200[0] = write8_delegate(FUNC(apple2_state::apple2_auxram0200_w), this);
|
||||
write_delegates_0200[1] = write8_delegate(FUNC(apple2_state::apple2_mainram0200_w), this);
|
||||
write_delegates_0400[0] = write8_delegate(FUNC(apple2_state::apple2_auxram0400_w), this);
|
||||
write_delegates_0400[1] = write8_delegate(FUNC(apple2_state::apple2_mainram0400_w), this);
|
||||
|
||||
write_delegates_0800[0] = write8_delegate(FUNC(apple2_state::apple2_auxram0800_w), this);
|
||||
write_delegates_0800[1] = write8_delegate(FUNC(apple2_state::apple2_mainram0800_w), this);
|
||||
write_delegates_2000[0] = write8_delegate(FUNC(apple2_state::apple2_auxram2000_w), this);
|
||||
write_delegates_2000[1] = write8_delegate(FUNC(apple2_state::apple2_mainram2000_w), this);
|
||||
write_delegates_4000[0] = write8_delegate(FUNC(apple2_state::apple2_auxram4000_w), this);
|
||||
write_delegates_4000[1] = write8_delegate(FUNC(apple2_state::apple2_mainram4000_w), this);
|
||||
write_delegates_c000[0] = write8_delegate(FUNC(apple2_state::apple2_auxramc000_w), this);
|
||||
write_delegates_c000[1] = write8_delegate(FUNC(apple2_state::apple2_mainramc000_w), this);
|
||||
write_delegates_d000[0] = write8_delegate(FUNC(apple2_state::apple2_auxramd000_w), this);
|
||||
write_delegates_d000[1] = write8_delegate(FUNC(apple2_state::apple2_mainramd000_w), this);
|
||||
write_delegates_e000[0] = write8_delegate(FUNC(apple2_state::apple2_auxrame000_w), this);
|
||||
write_delegates_e000[1] = write8_delegate(FUNC(apple2_state::apple2_mainrame000_w), this);
|
||||
}
|
||||
|
@ -1060,7 +1060,7 @@ READ8_MEMBER( apple2gs_state::apple2gs_c0xx_r )
|
||||
case 0x78: case 0x79: case 0x7a: case 0x7b:
|
||||
case 0x7c: case 0x7d: case 0x7e: case 0x7f:
|
||||
offset |= (memregion("maincpu")->bytes() - 1) & ~0x3FFF;
|
||||
result = memregion("maincpu")->base()[offset];
|
||||
result = m_rom[offset];
|
||||
break;
|
||||
|
||||
case 0x21: /* C021 - MONOCOLOR */
|
||||
@ -1564,13 +1564,14 @@ static const apple2_memmap_entry apple2gs_memmap_entries[] =
|
||||
|
||||
static UINT8 *apple2gs_getslotmem(running_machine &machine, offs_t address)
|
||||
{
|
||||
apple2gs_state *state = machine.driver_data<apple2gs_state>();
|
||||
UINT8 *rom;
|
||||
|
||||
address %= 0x00FFFF;
|
||||
assert(address >= 0xC000);
|
||||
assert(address <= 0xCFFF);
|
||||
|
||||
rom = machine.root_device().memregion("maincpu")->base();
|
||||
rom = state->m_rom;
|
||||
rom += 0x030000 % machine.root_device().memregion("maincpu")->bytes();
|
||||
return &rom[address];
|
||||
}
|
||||
@ -1878,7 +1879,7 @@ static void apple2gs_setup_memory(running_machine &machine)
|
||||
begin = 0x1000000 - state->memregion("maincpu")->bytes();
|
||||
end = 0xffffff;
|
||||
space.install_read_bank(begin, end, "bank3");
|
||||
state->membank("bank3")->set_base(state->memregion("maincpu")->base());
|
||||
state->membank("bank3")->set_base(state->m_rom);
|
||||
|
||||
/* install new xxC000-xxCFFF handlers */
|
||||
space.install_legacy_read_handler(0x00c000, 0x00cfff, FUNC(apple2gs_00Cxxx_r));
|
||||
|
@ -695,6 +695,8 @@ $(MESSOBJ)/apple.a: \
|
||||
$(MESS_MACHINE)/a2echoii.o \
|
||||
$(MESS_MACHINE)/a2arcadebd.o \
|
||||
$(MESS_MACHINE)/a2midi.o \
|
||||
$(MESS_MACHINE)/a2estd80col.o \
|
||||
$(MESS_MACHINE)/a2eext80col.o \
|
||||
$(MESS_MACHINE)/lisa.o \
|
||||
$(MESS_DRIVERS)/lisa.o \
|
||||
$(MESS_MACHINE)/nubus.o \
|
||||
|
@ -160,8 +160,6 @@ static void apple2_text_draw(running_machine &machine, bitmap_ind16 &bitmap, con
|
||||
int row, col;
|
||||
UINT32 start_address = (page ? 0x0800 : 0x0400);
|
||||
UINT32 address;
|
||||
const UINT8 *textgfx_data = machine.root_device().memregion("gfx1")->base();
|
||||
UINT32 textgfx_datalen = state->memregion("gfx1")->bytes();
|
||||
UINT32 my_a2 = effective_a2(state);
|
||||
|
||||
/* perform adjustments */
|
||||
@ -176,15 +174,15 @@ static void apple2_text_draw(running_machine &machine, bitmap_ind16 &bitmap, con
|
||||
|
||||
if (my_a2 & VAR_80COL)
|
||||
{
|
||||
apple2_plot_text_character(machine, bitmap, col * 14 + 0, row, 1, state->m_a2_videoram[address + 0x10000],
|
||||
textgfx_data, textgfx_datalen, my_a2);
|
||||
apple2_plot_text_character(machine, bitmap, col * 14 + 7, row, 1, state->m_a2_videoram[address + 0x00000],
|
||||
textgfx_data, textgfx_datalen, my_a2);
|
||||
apple2_plot_text_character(machine, bitmap, col * 14 + 0, row, 1, state->m_a2_videoaux[address],
|
||||
state->m_textgfx_data, state->m_textgfx_datalen, my_a2);
|
||||
apple2_plot_text_character(machine, bitmap, col * 14 + 7, row, 1, state->m_a2_videoram[address],
|
||||
state->m_textgfx_data, state->m_textgfx_datalen, my_a2);
|
||||
}
|
||||
else
|
||||
{
|
||||
apple2_plot_text_character(machine, bitmap, col * 14, row, 2, state->m_a2_videoram[address],
|
||||
textgfx_data, textgfx_datalen, my_a2);
|
||||
state->m_textgfx_data, state->m_textgfx_datalen, my_a2);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -239,7 +237,7 @@ static void apple2_lores_draw(running_machine &machine, bitmap_ind16 &bitmap, co
|
||||
static void apple2_hires_draw(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, int page, int beginrow, int endrow)
|
||||
{
|
||||
apple2_state *state = machine.driver_data<apple2_state>();
|
||||
const UINT8 *vram;
|
||||
const UINT8 *vram, *vaux;
|
||||
int row, col, b;
|
||||
int offset;
|
||||
int columns;
|
||||
@ -259,11 +257,13 @@ static void apple2_hires_draw(running_machine &machine, bitmap_ind16 &bitmap, co
|
||||
|
||||
if (state->m_machinetype == TK2000)
|
||||
{
|
||||
vram = state->m_a2_videoram + (page ? 0xa000 : 0x2000);
|
||||
vram = state->m_a2_videoram + (page ? 0xa000 : 0x2000);
|
||||
vaux = state->m_a2_videoaux + (page ? 0xa000 : 0x2000);
|
||||
}
|
||||
else
|
||||
{
|
||||
vram = state->m_a2_videoram + (page ? 0x4000 : 0x2000);
|
||||
vram = state->m_a2_videoram + (page ? 0x4000 : 0x2000);
|
||||
vaux = state->m_a2_videoaux + (page ? 0x4000 : 0x2000);
|
||||
}
|
||||
columns = ((effective_a2(state) & (VAR_DHIRES|VAR_80COL)) == (VAR_DHIRES|VAR_80COL)) ? 80 : 40;
|
||||
|
||||
@ -283,8 +283,8 @@ static void apple2_hires_draw(running_machine &machine, bitmap_ind16 &bitmap, co
|
||||
break;
|
||||
|
||||
case 80:
|
||||
vram_row[1+(col*2)+0] = vram[offset + 0x10000];
|
||||
vram_row[1+(col*2)+1] = vram[offset + 0x00000];
|
||||
vram_row[1+(col*2)+0] = vaux[offset];
|
||||
vram_row[1+(col*2)+1] = vram[offset];
|
||||
break;
|
||||
|
||||
default:
|
||||
@ -347,7 +347,7 @@ static void apple2_hires_draw(running_machine &machine, bitmap_ind16 &bitmap, co
|
||||
VIDEO CORE
|
||||
***************************************************************************/
|
||||
|
||||
void apple2_video_start(running_machine &machine, const UINT8 *vram, size_t vram_size, UINT32 ignored_softswitches, int hires_modulo)
|
||||
void apple2_video_start(running_machine &machine, const UINT8 *vram, const UINT8 *aux_vram, UINT32 ignored_softswitches, int hires_modulo)
|
||||
{
|
||||
apple2_state *state = machine.driver_data<apple2_state>();
|
||||
int i, j;
|
||||
@ -374,6 +374,10 @@ void apple2_video_start(running_machine &machine, const UINT8 *vram, size_t vram
|
||||
apple2_font = machine.root_device().memregion("gfx1")->base();
|
||||
state->m_alt_charset_value = machine.root_device().memregion("gfx1")->bytes() / 16;
|
||||
state->m_a2_videoram = vram;
|
||||
state->m_a2_videoaux = aux_vram;
|
||||
|
||||
state->m_textgfx_data = machine.root_device().memregion("gfx1")->base();
|
||||
state->m_textgfx_datalen = state->memregion("gfx1")->bytes();
|
||||
|
||||
/* 2^3 dependent pixels * 2 color sets * 2 offsets */
|
||||
state->m_hires_artifact_map = auto_alloc_array(machine, UINT16, 8 * 2 * 2);
|
||||
@ -444,7 +448,7 @@ void apple2_video_start(running_machine &machine, const UINT8 *vram, size_t vram
|
||||
|
||||
VIDEO_START_MEMBER(apple2_state,apple2)
|
||||
{
|
||||
apple2_video_start(machine(), machine().device<ram_device>(RAM_TAG)->pointer(), machine().device<ram_device>(RAM_TAG)->size(), VAR_80COL | VAR_ALTCHARSET | VAR_DHIRES, 4);
|
||||
apple2_video_start(machine(), m_ram->pointer(), m_ram->pointer()+0x10000, VAR_80COL | VAR_ALTCHARSET | VAR_DHIRES, 4);
|
||||
|
||||
/* hack to fix the colors on apple2/apple2p */
|
||||
m_fgcolor = 0;
|
||||
@ -456,7 +460,7 @@ VIDEO_START_MEMBER(apple2_state,apple2)
|
||||
|
||||
VIDEO_START_MEMBER(apple2_state,apple2p)
|
||||
{
|
||||
apple2_video_start(machine(), machine().device<ram_device>(RAM_TAG)->pointer(), machine().device<ram_device>(RAM_TAG)->size(), VAR_80COL | VAR_ALTCHARSET | VAR_DHIRES, 8);
|
||||
apple2_video_start(machine(), m_ram->pointer(), m_ram->pointer(), VAR_80COL | VAR_ALTCHARSET | VAR_DHIRES, 8);
|
||||
|
||||
/* hack to fix the colors on apple2/apple2p */
|
||||
m_fgcolor = 0;
|
||||
@ -468,10 +472,23 @@ VIDEO_START_MEMBER(apple2_state,apple2p)
|
||||
|
||||
VIDEO_START_MEMBER(apple2_state,apple2e)
|
||||
{
|
||||
apple2_video_start(machine(), machine().device<ram_device>(RAM_TAG)->pointer(), machine().device<ram_device>(RAM_TAG)->size(), 0, 8);
|
||||
device_a2eauxslot_card_interface *auxslotdevice = m_a2eauxslot->get_a2eauxslot_card();
|
||||
if (auxslotdevice)
|
||||
{
|
||||
apple2_video_start(machine(), m_ram->pointer(), auxslotdevice->get_vram_ptr(), auxslotdevice->allow_dhr() ? 0 : VAR_DHIRES, 8);
|
||||
}
|
||||
else
|
||||
{
|
||||
apple2_video_start(machine(), m_ram->pointer(), m_ram->pointer(), VAR_80COL | VAR_DHIRES, 8);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
VIDEO_START_MEMBER(apple2_state,apple2c)
|
||||
{
|
||||
apple2_video_start(machine(), m_ram->pointer(), m_ram->pointer()+0x10000, 0, 8);
|
||||
}
|
||||
|
||||
UINT32 apple2_state::screen_update_apple2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
int page;
|
||||
|
@ -16,7 +16,7 @@
|
||||
VIDEO_START_MEMBER(apple2gs_state,apple2gs)
|
||||
{
|
||||
m_bordercolor = 0;
|
||||
apple2_video_start(machine(), m_slowmem, 0x20000, 0, 8);
|
||||
apple2_video_start(machine(), m_slowmem, m_slowmem+0x10000, 0, 8);
|
||||
m_legacy_gfx = auto_bitmap_ind16_alloc(machine(), 560, 192);
|
||||
|
||||
state_save_register_item(machine(), "BORDERCLR", NULL, 0, m_bordercolor);
|
||||
|
Loading…
Reference in New Issue
Block a user