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tms99xx: devcb3 changes, removing MCFG macros for 9900, 9901, 9980A, 9995.

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This commit is contained in:
Michael Zapf 2018-08-14 22:47:26 +02:00
parent 928e18545c
commit 82cb9f35c3
29 changed files with 281 additions and 320 deletions
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4
src/devices/bus/abcbus/unidisk.cpp
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@ -74,7 +74,9 @@ void unidisk_t::unidisk_io(address_map &map)
//-------------------------------------------------
MACHINE_CONFIG_START(unidisk_t::device_add_mconfig)
MCFG_TMS99xx_ADD(TMS9995_TAG, TMS9995, 12000000, unidisk_mem, unidisk_io)
TMS9995(config, m_maincpu, 12000000);
m_maincpu->set_addrmap(AS_PROGRAM, &unidisk_t::unidisk_mem);
m_maincpu->set_addrmap(AS_IO, &unidisk_t::unidisk_io);
MACHINE_CONFIG_END

8
src/devices/bus/hexbus/hx5102.cpp
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@ -678,9 +678,11 @@ MACHINE_CONFIG_START(hx5102_device::device_add_mconfig)
MCFG_HEXBUS_ADD("hexbus")
// TMS9995 CPU @ 12.0 MHz
MCFG_TMS99xx_ADD(TMS9995_TAG, TMS9995, XTAL(12'000'000), memmap, crumap)
MCFG_TMS9995_EXTOP_HANDLER( WRITE8(*this, hx5102_device, external_operation) )
MCFG_TMS9995_CLKOUT_HANDLER( WRITELINE(*this, hx5102_device, clock_out) )
TMS9995(config, m_flopcpu, XTAL(12'000'000));
m_flopcpu->set_addrmap(AS_PROGRAM, &hx5102_device::memmap);
m_flopcpu->set_addrmap(AS_IO, &hx5102_device::crumap);
m_flopcpu->extop_cb().set(FUNC(hx5102_device::external_operation));
m_flopcpu->clkout_cb().set(FUNC(hx5102_device::clock_out));
// Disk controller i8272A
// Not connected: Select lines (DS0, DS1), Head load (HDL), VCO

14
src/devices/cpu/tms9900/tms9900.h
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@ -56,13 +56,13 @@ public:
void set_hold(int state);
// Callbacks
template<class Object> devcb_base &set_extop_callback(Object &&cb) { return m_external_operation.set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_intlevel_callback(Object &&cb) { return m_get_intlevel.set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_iaq_callback(Object &&cb) { return m_iaq_line.set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_clkout_callback(Object &&cb) { return m_clock_out_line.set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_wait_callback(Object &&cb) { return m_wait_line.set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_holda_callback(Object &&cb) { return m_holda_line.set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_dbin_callback(Object &&cb) { return m_dbin_line.set_callback(std::forward<Object>(cb)); }
auto extop_cb() { return m_external_operation.bind(); }
auto intlevel_cb() { return m_get_intlevel.bind(); }
auto iaq_cb() { return m_iaq_line.bind(); }
auto clkout_cb() { return m_clock_out_line.bind(); }
auto wait_cb() { return m_wait_line.bind(); }
auto holda_cb() { return m_holda_line.bind(); }
auto dbin_cb() { return m_dbin_line.bind(); }
protected:
tms99xx_device(const machine_config &mconfig, device_type type,

29
src/devices/cpu/tms9900/tms9995.h
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@ -27,25 +27,6 @@ enum
INT_9995_INT4 = 3
};
#define MCFG_TMS9995_EXTOP_HANDLER( _extop) \
downcast<tms9995_device &>(*device).set_extop_callback(DEVCB_##_extop);
#define MCFG_TMS9995_IAQ_HANDLER( _iaq ) \
downcast<tms9995_device &>(*device).set_iaq_callback(DEVCB_##_iaq);
#define MCFG_TMS9995_CLKOUT_HANDLER( _clkout ) \
downcast<tms9995_device &>(*device).set_clkout_callback(DEVCB_##_clkout);
#define MCFG_TMS9995_HOLDA_HANDLER( _holda ) \
downcast<tms9995_device &>(*device).set_holda_callback(DEVCB_##_holda);
#define MCFG_TMS9995_DBIN_HANDLER( _dbin ) \
downcast<tms9995_device &>(*device).set_dbin_callback(DEVCB_##_dbin);
#define MCFG_TMS9995_ENABLE_OVINT( _ovint ) \
downcast<tms9995_device*>(device)->set_overflow_interrupt( _ovint );
class tms9995_device : public cpu_device
{
public:
@ -68,11 +49,11 @@ public:
DECLARE_WRITE_LINE_MEMBER( reset_line );
// Callbacks
template<class Object> devcb_base &set_extop_callback(Object &&cb) { return m_external_operation.set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_iaq_callback(Object &&cb) { return m_iaq_line.set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_clkout_callback(Object &&cb) { return m_clock_out_line.set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_holda_callback(Object &&cb) { return m_holda_line.set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_dbin_callback(Object &&cb) { return m_dbin_line.set_callback(std::forward<Object>(cb)); }
auto extop_cb() { return m_external_operation.bind(); }
auto iaq_cb() { return m_iaq_line.bind(); }
auto clkout_cb() { return m_clock_out_line.bind(); }
auto holda_cb() { return m_holda_line.bind(); }
auto dbin_cb() { return m_dbin_line.bind(); }
// For debugger access
uint8_t debug_read_onchip_memory(offs_t addr) { return m_onchip_memory[addr & 0xff]; };

26
src/devices/cpu/tms9900/tms99com.h
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@ -41,32 +41,6 @@
#ifndef __TMS99COMMON_H__
#define __TMS99COMMON_H__
#define MCFG_TMS99xx_ADD(_tag, _device, _clock, _prgmap, _iomap ) \
MCFG_DEVICE_ADD(_tag, _device, _clock) \
MCFG_DEVICE_PROGRAM_MAP(_prgmap) \
MCFG_DEVICE_IO_MAP(_iomap)
#define MCFG_TMS99xx_EXTOP_HANDLER( _extop) \
downcast<tms99xx_device &>(*device).set_extop_callback(DEVCB_##_extop);
#define MCFG_TMS99xx_INTLEVEL_HANDLER( _intlevel ) \
downcast<tms99xx_device &>(*device).set_intlevel_callback(DEVCB_##_intlevel);
#define MCFG_TMS99xx_IAQ_HANDLER( _iaq ) \
downcast<tms99xx_device &>(*device).set_iaq_callback(DEVCB_##_iaq);
#define MCFG_TMS99xx_CLKOUT_HANDLER( _clkout ) \
downcast<tms99xx_device &>(*device).set_clkout_callback(DEVCB_##_clkout);
#define MCFG_TMS99xx_WAIT_HANDLER( _wait ) \
downcast<tms99xx_device &>(*device).set_wait_callback(DEVCB_##_wait);
#define MCFG_TMS99xx_HOLDA_HANDLER( _holda ) \
downcast<tms99xx_device &>(*device).set_holda_callback(DEVCB_##_holda);
#define MCFG_TMS99xx_DBIN_HANDLER( _dbin ) \
downcast<tms99xx_device &>(*device).set_dbin_callback(DEVCB_##_dbin);
enum
{
TI990_10_ID = 1,

64
src/devices/machine/tms9901.h
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@ -63,9 +63,9 @@ public:
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
template <class Object> devcb_base &set_readblock_callback(Object &&cb) { return m_read_block.set_callback(std::forward<Object>(cb)); }
template <unsigned N, class Object> devcb_base &set_p_callback(Object &&cb) { return m_write_p[N].set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_intlevel_callback(Object &&cb) { return m_interrupt.set_callback(std::forward<Object>(cb)); }
auto p_out_cb(int n) { return m_write_p[n].bind(); }
auto read_cb() { return m_read_block.bind(); }
auto intlevel_cb() { return m_interrupt.bind(); }
private:
static constexpr device_timer_id DECREMENTER = 0;
@ -134,62 +134,4 @@ private:
devcb_write8 m_interrupt;
};
/***************************************************************************
DEVICE CONFIGURATION MACROS
***************************************************************************/
#define MCFG_TMS9901_READBLOCK_HANDLER( _read ) \
downcast<tms9901_device &>(*device).set_readblock_callback(DEVCB_##_read);
#define MCFG_TMS9901_P0_HANDLER( _write ) \
downcast<tms9901_device &>(*device).set_p_callback<0>(DEVCB_##_write);
#define MCFG_TMS9901_P1_HANDLER( _write ) \
downcast<tms9901_device &>(*device).set_p_callback<1>(DEVCB_##_write);
#define MCFG_TMS9901_P2_HANDLER( _write ) \
downcast<tms9901_device &>(*device).set_p_callback<2>(DEVCB_##_write);
#define MCFG_TMS9901_P3_HANDLER( _write ) \
downcast<tms9901_device &>(*device).set_p_callback<3>(DEVCB_##_write);
#define MCFG_TMS9901_P4_HANDLER( _write ) \
downcast<tms9901_device &>(*device).set_p_callback<4>(DEVCB_##_write);
#define MCFG_TMS9901_P5_HANDLER( _write ) \
downcast<tms9901_device &>(*device).set_p_callback<5>(DEVCB_##_write);
#define MCFG_TMS9901_P6_HANDLER( _write ) \
downcast<tms9901_device &>(*device).set_p_callback<6>(DEVCB_##_write);
#define MCFG_TMS9901_P7_HANDLER( _write ) \
downcast<tms9901_device &>(*device).set_p_callback<7>(DEVCB_##_write);
#define MCFG_TMS9901_P8_HANDLER( _write ) \
downcast<tms9901_device &>(*device).set_p_callback<8>(DEVCB_##_write);
#define MCFG_TMS9901_P9_HANDLER( _write ) \
downcast<tms9901_device &>(*device).set_p_callback<9>(DEVCB_##_write);
#define MCFG_TMS9901_P10_HANDLER( _write ) \
downcast<tms9901_device &>(*device).set_p_callback<10>(DEVCB_##_write);
#define MCFG_TMS9901_P11_HANDLER( _write ) \
downcast<tms9901_device &>(*device).set_p_callback<11>(DEVCB_##_write);
#define MCFG_TMS9901_P12_HANDLER( _write ) \
downcast<tms9901_device &>(*device).set_p_callback<12>(DEVCB_##_write);
#define MCFG_TMS9901_P13_HANDLER( _write ) \
downcast<tms9901_device &>(*device).set_p_callback<13>(DEVCB_##_write);
#define MCFG_TMS9901_P14_HANDLER( _write ) \
downcast<tms9901_device &>(*device).set_p_callback<14>(DEVCB_##_write);
#define MCFG_TMS9901_P15_HANDLER( _write ) \
downcast<tms9901_device &>(*device).set_p_callback<15>(DEVCB_##_write);
#define MCFG_TMS9901_INTLEVEL_HANDLER( _intlevel ) \
downcast<tms9901_device &>(*device).set_intlevel_callback(DEVCB_##_intlevel);
#endif // MAME_MACHINE_TMS9901_H

4
src/mame/drivers/cortex.cpp
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@ -184,7 +184,9 @@ MACHINE_CONFIG_START(cortex_state::cortex)
/* TMS9995 CPU @ 12.0 MHz */
// Standard variant, no overflow int
// No lines connected yet
MCFG_TMS99xx_ADD("maincpu", TMS9995, XTAL(12'000'000), mem_map, io_map)
TMS9995(config, m_maincpu, XTAL(12'000'000));
m_maincpu->set_addrmap(AS_PROGRAM, &cortex_state::mem_map);
m_maincpu->set_addrmap(AS_IO, &cortex_state::io_map);
ls259_device &control(LS259(config, "control")); // IC64
//control.q_out_cb<0>().set(FUNC(cortex_state::basic_led_w));

7
src/mame/drivers/cosmic.cpp
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@ -1092,8 +1092,11 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(cosmic_state::cosmicg)
/* basic machine hardware */
MCFG_TMS99xx_ADD("maincpu", TMS9980A, COSMICG_MASTER_CLOCK/8, cosmicg_map, cosmicg_io_map)
/* 9.828 MHz Crystal */
TMS9980A(config, m_maincpu, COSMICG_MASTER_CLOCK/8);
m_maincpu->set_addrmap(AS_PROGRAM, &cosmic_state::cosmicg_map);
m_maincpu->set_addrmap(AS_IO, &cosmic_state::cosmicg_io_map);
/* 9.828 MHz Crystal */
/* R Nabet : huh ? This would imply the crystal frequency is somehow divided by 2 before being
fed to the tms9904 or tms9980. Also, I have never heard of a tms9900/9980 operating under
1.5MHz. So, if someone can check this... */

4
src/mame/drivers/evmbug.cpp
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@ -118,7 +118,9 @@ MACHINE_CONFIG_START(evmbug_state::evmbug)
// basic machine hardware
// TMS9995 CPU @ 12.0 MHz
// We have no lines connected yet
MCFG_TMS99xx_ADD("maincpu", TMS9995, XTAL(12'000'000), mem_map, io_map )
TMS9995(config, m_maincpu, XTAL(12'000'000));
m_maincpu->set_addrmap(AS_PROGRAM, &evmbug_state::mem_map);
m_maincpu->set_addrmap(AS_IO, &evmbug_state::io_map);
/* video hardware */
MCFG_DEVICE_ADD(m_terminal, GENERIC_TERMINAL, 0)

36
src/mame/drivers/geneve.cpp
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@ -725,11 +725,13 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(geneve_state::geneve_common)
// basic machine hardware
// TMS9995 CPU @ 12.0 MHz
MCFG_TMS99xx_ADD("maincpu", TMS9995, 12000000, memmap, crumap)
MCFG_DEVICE_ADDRESS_MAP(tms9995_device::AS_SETOFFSET, memmap_setoffset)
MCFG_TMS9995_EXTOP_HANDLER( WRITE8(*this, geneve_state, external_operation) )
MCFG_TMS9995_CLKOUT_HANDLER( WRITELINE(*this, geneve_state, clock_out) )
MCFG_TMS9995_DBIN_HANDLER( WRITELINE(*this, geneve_state, dbin_line) )
TMS9995(config, m_cpu, 12000000);
m_cpu->set_addrmap(AS_PROGRAM, &geneve_state::memmap);
m_cpu->set_addrmap(AS_IO, &geneve_state::crumap);
m_cpu->set_addrmap(tms9995_device::AS_SETOFFSET, &geneve_state::memmap_setoffset);
m_cpu->extop_cb().set(FUNC(geneve_state::external_operation));
m_cpu->clkout_cb().set(FUNC(geneve_state::clock_out));
m_cpu->dbin_cb().set(FUNC(geneve_state::dbin_line));
// Video hardware
MCFG_V9938_ADD(TI_VDP_TAG, TI_SCREEN_TAG, 0x20000, XTAL(21'477'272)) /* typical 9938 clock, not verified */
@ -737,18 +739,18 @@ MACHINE_CONFIG_START(geneve_state::geneve_common)
MCFG_V99X8_SCREEN_ADD_NTSC(TI_SCREEN_TAG, TI_VDP_TAG, XTAL(21'477'272))
// Main board components
MCFG_DEVICE_ADD(TI_TMS9901_TAG, TMS9901, 3000000)
MCFG_TMS9901_READBLOCK_HANDLER( READ8(*this, geneve_state, read_by_9901) )
MCFG_TMS9901_P0_HANDLER( WRITELINE( *this, geneve_state, peripheral_bus_reset) )
MCFG_TMS9901_P1_HANDLER( WRITELINE( *this, geneve_state, VDP_reset) )
MCFG_TMS9901_P2_HANDLER( WRITELINE( *this, geneve_state, joystick_select) )
MCFG_TMS9901_P4_HANDLER( WRITELINE( GENEVE_MAPPER_TAG, bus::ti99::internal::geneve_mapper_device, pfm_select_lsb) ) // new for PFM
MCFG_TMS9901_P5_HANDLER( WRITELINE( GENEVE_MAPPER_TAG, bus::ti99::internal::geneve_mapper_device, pfm_output_enable) ) // new for PFM
MCFG_TMS9901_P6_HANDLER( WRITELINE( GENEVE_KEYBOARD_TAG, bus::ti99::internal::geneve_keyboard_device, reset_line) )
MCFG_TMS9901_P7_HANDLER( WRITELINE( *this, geneve_state, extbus_wait_states) )
MCFG_TMS9901_P9_HANDLER( WRITELINE( *this, geneve_state, video_wait_states) )
MCFG_TMS9901_P13_HANDLER( WRITELINE( GENEVE_MAPPER_TAG, bus::ti99::internal::geneve_mapper_device, pfm_select_msb) ) // new for PFM
MCFG_TMS9901_INTLEVEL_HANDLER( WRITE8( *this, geneve_state, tms9901_interrupt) )
TMS9901(config, m_tms9901, 3000000);
m_tms9901->read_cb().set(FUNC(geneve_state::read_by_9901));
m_tms9901->p_out_cb(0).set(FUNC(geneve_state::peripheral_bus_reset));
m_tms9901->p_out_cb(1).set(FUNC(geneve_state::VDP_reset));
m_tms9901->p_out_cb(2).set(FUNC(geneve_state::joystick_select));
m_tms9901->p_out_cb(4).set(GENEVE_MAPPER_TAG, FUNC(bus::ti99::internal::geneve_mapper_device::pfm_select_lsb));
m_tms9901->p_out_cb(5).set(GENEVE_MAPPER_TAG, FUNC(bus::ti99::internal::geneve_mapper_device::pfm_output_enable));
m_tms9901->p_out_cb(6).set(GENEVE_KEYBOARD_TAG, FUNC(bus::ti99::internal::geneve_keyboard_device::reset_line));
m_tms9901->p_out_cb(7).set(FUNC(geneve_state::extbus_wait_states));
m_tms9901->p_out_cb(9).set(FUNC(geneve_state::video_wait_states));
m_tms9901->p_out_cb(13).set(GENEVE_MAPPER_TAG, FUNC(bus::ti99::internal::geneve_mapper_device::pfm_select_msb));
m_tms9901->intlevel_cb().set(FUNC(geneve_state::tms9901_interrupt));
// Clock
MCFG_DEVICE_ADD(GENEVE_CLOCK_TAG, MM58274C, 0)

4
src/mame/drivers/jpmmps.cpp
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@ -248,7 +248,9 @@ void jpmmps_state::machine_reset()
MACHINE_CONFIG_START(jpmmps_state::jpmmps)
// CPU TMS9995, standard variant; no line connections
MCFG_TMS99xx_ADD(m_maincpu, TMS9995, MAIN_CLOCK, jpmmps_map, jpmmps_io_map)
TMS9995(config, m_maincpu, MAIN_CLOCK);
m_maincpu->set_addrmap(AS_PROGRAM, &jpmmps_state::jpmmps_map);
m_maincpu->set_addrmap(AS_IO, &jpmmps_state::jpmmps_io_map);
ls259_device &mainlatch(LS259(config, "mainlatch")); // IC10
mainlatch.q_out_cb<0>().set_nop(); // watchdog

5
src/mame/drivers/jpms80.cpp
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@ -135,7 +135,10 @@ void jpms80_state::machine_reset()
MACHINE_CONFIG_START(jpms80_state::jpms80)
// CPU TMS9995, standard variant; no line connections
MCFG_TMS99xx_ADD(m_maincpu, TMS9995, MAIN_CLOCK, jpms80_map, jpms80_io_map)
TMS9995(config, m_maincpu, MAIN_CLOCK);
m_maincpu->set_addrmap(AS_PROGRAM, &jpms80_state::jpms80_map);
m_maincpu->set_addrmap(AS_IO, &jpms80_state::jpms80_io_map);
SPEAKER(config, "mono").front_center();
LS259(config, "outlatch0"); // I/O IC5

8
src/mame/drivers/jpmsru.cpp
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@ -74,11 +74,15 @@ static INPUT_PORTS_START( jpmsru )
INPUT_PORTS_END
MACHINE_CONFIG_START(jpmsru_state::jpmsru)
MCFG_TMS99xx_ADD("maincpu", TMS9980A, MAIN_CLOCK, jpmsru_map, jpmsru_io)
TMS9980A(config, m_maincpu, MAIN_CLOCK);
m_maincpu->set_addrmap(AS_PROGRAM, &jpmsru_state::jpmsru_map);
m_maincpu->set_addrmap(AS_IO, &jpmsru_state::jpmsru_io);
MACHINE_CONFIG_END
MACHINE_CONFIG_START(jpmsru_state::jpmsru_4)
MCFG_TMS99xx_ADD("maincpu", TMS9980A, MAIN_CLOCK, jpmsru_4_map, jpmsru_io)
TMS9980A(config, m_maincpu, MAIN_CLOCK);
m_maincpu->set_addrmap(AS_PROGRAM, &jpmsru_state::jpmsru_4_map);
m_maincpu->set_addrmap(AS_IO, &jpmsru_state::jpmsru_io);
MACHINE_CONFIG_END
void jpmsru_state::init_jpmsru()

6
src/mame/drivers/jubilee.cpp
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@ -673,8 +673,10 @@ GFXDECODE_END
MACHINE_CONFIG_START(jubilee_state::jubileep)
// Main CPU TMS9980A, no line connections.
MCFG_TMS99xx_ADD("maincpu", TMS9980A, CPU_CLOCK, jubileep_map, jubileep_cru_map)
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", jubilee_state, jubileep_interrupt)
TMS9980A(config, m_maincpu, CPU_CLOCK);
m_maincpu->set_addrmap(AS_PROGRAM, &jubilee_state::jubileep_map);
m_maincpu->set_addrmap(AS_IO, &jubilee_state::jubileep_cru_map);
m_maincpu->set_vblank_int("screen", FUNC(jubilee_state::jubileep_interrupt));
MCFG_NVRAM_ADD_0FILL("videoworkram")

10
src/mame/drivers/looping.cpp
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@ -624,11 +624,15 @@ GFXDECODE_END
MACHINE_CONFIG_START(looping_state::looping)
// CPU TMS9995, standard variant; no line connections
MCFG_TMS99xx_ADD("maincpu", TMS9995, MAIN_CPU_CLOCK, looping_map, looping_io_map)
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", looping_state, looping_interrupt)
TMS9995(config, m_maincpu, MAIN_CPU_CLOCK);
m_maincpu->set_addrmap(AS_PROGRAM, &looping_state::looping_map);
m_maincpu->set_addrmap(AS_IO, &looping_state::looping_io_map);
m_maincpu->set_vblank_int("screen", FUNC(looping_state::looping_interrupt));
// CPU TMS9980A for audio subsystem; no line connections
MCFG_TMS99xx_ADD("audiocpu", TMS9980A, SOUND_CLOCK/4, looping_sound_map, looping_sound_io_map)
TMS9980A(config, m_audiocpu, SOUND_CLOCK/4);
m_audiocpu->set_addrmap(AS_PROGRAM, &looping_state::looping_sound_map);
m_audiocpu->set_addrmap(AS_IO, &looping_state::looping_sound_io_map);
MCFG_DEVICE_ADD("mcu", COP420, COP_CLOCK)
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false )

6
src/mame/drivers/nibble.cpp
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@ -311,8 +311,10 @@ GFXDECODE_END
MACHINE_CONFIG_START(nibble_state::nibble)
MCFG_TMS99xx_ADD("maincpu", TMS9900, MASTER_CLOCK/4, nibble_map, nibble_cru_map)
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", nibble_state, nibble_interrupt)
TMS9900(config, m_maincpu, MASTER_CLOCK/4);
m_maincpu->set_addrmap(AS_PROGRAM, &nibble_state::nibble_map);
m_maincpu->set_addrmap(AS_IO, &nibble_state::nibble_cru_map);
m_maincpu->set_vblank_int("screen", FUNC(nibble_state::nibble_interrupt));
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

4
src/mame/drivers/nsm.cpp
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@ -128,7 +128,9 @@ void nsm_state::machine_reset()
MACHINE_CONFIG_START(nsm_state::nsm)
// CPU TMS9995, standard variant; no line connection
MCFG_TMS99xx_ADD("maincpu", TMS9995, 11052000, nsm_map, nsm_io_map)
TMS9995(config, m_maincpu, 11052000);
m_maincpu->set_addrmap(AS_PROGRAM, &nsm_state::nsm_map);
m_maincpu->set_addrmap(AS_IO, &nsm_state::nsm_io_map);
/* Video */
config.set_default_layout(layout_nsm);

6
src/mame/drivers/nsmpoker.cpp
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@ -419,8 +419,10 @@ void nsmpoker_state::machine_reset()
MACHINE_CONFIG_START(nsmpoker_state::nsmpoker)
// CPU TMS9995, standard variant; no line connections
MCFG_TMS99xx_ADD("maincpu", TMS9995, MASTER_CLOCK/2, nsmpoker_map, nsmpoker_portmap)
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", nsmpoker_state, nsmpoker_interrupt)
TMS9995(config, m_maincpu, MASTER_CLOCK/2);
m_maincpu->set_addrmap(AS_PROGRAM, &nsmpoker_state::nsmpoker_map);
m_maincpu->set_addrmap(AS_IO, &nsmpoker_state::nsmpoker_portmap);
m_maincpu->set_vblank_int("screen", FUNC(nsmpoker_state::nsmpoker_interrupt));
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

4
src/mame/drivers/pachifev.cpp
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@ -353,7 +353,9 @@ void pachifev_state::machine_start()
MACHINE_CONFIG_START(pachifev_state::pachifev)
// CPU TMS9995, standard variant; no line connections
MCFG_TMS99xx_ADD("maincpu", TMS9995, XTAL(12'000'000), pachifev_map, pachifev_cru)
TMS9995(config, m_maincpu, XTAL(12'000'000));
m_maincpu->set_addrmap(AS_PROGRAM, &pachifev_state::pachifev_map);
m_maincpu->set_addrmap(AS_IO, &pachifev_state::pachifev_cru);
/* video hardware */
MCFG_DEVICE_ADD( "tms9928a", TMS9928A, XTAL(10'738'635) / 2 )

6
src/mame/drivers/supertnk.cpp
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@ -436,8 +436,10 @@ INPUT_PORTS_END
MACHINE_CONFIG_START(supertnk_state::supertnk)
// CPU TMS9980A; no line connections
MCFG_TMS99xx_ADD("maincpu", TMS9980A, 2598750, supertnk_map, supertnk_io_map)
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", supertnk_state, supertnk_interrupt)
TMS9980A(config, m_maincpu, 2598750);
m_maincpu->set_addrmap(AS_PROGRAM, &supertnk_state::supertnk_map);
m_maincpu->set_addrmap(AS_IO, &supertnk_state::supertnk_io_map);
m_maincpu->set_vblank_int("screen", FUNC(supertnk_state::supertnk_interrupt));
MCFG_WATCHDOG_ADD("watchdog")

4
src/mame/drivers/ti990_10.cpp
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@ -320,7 +320,9 @@ WRITE_LINE_MEMBER(ti990_10_state::tape_interrupt)
MACHINE_CONFIG_START(ti990_10_state::ti990_10)
/* basic machine hardware */
/* TI990/10 CPU @ 4.0(???) MHz */
MCFG_TMS99xx_ADD("maincpu", TI990_10, 4000000, ti990_10_memmap, ti990_10_io )
TI990_10(config, m_maincpu, 4000000);
m_maincpu->set_addrmap(AS_PROGRAM, &ti990_10_state::ti990_10_memmap);
m_maincpu->set_addrmap(AS_IO, &ti990_10_state::ti990_10_io);
// VDT 911 terminal
MCFG_DEVICE_ADD(m_terminal, VDT911, 0)

25
src/mame/drivers/ti990_4.cpp
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@ -73,8 +73,8 @@ private:
DECLARE_MACHINE_RESET(ti990_4);
void cru_map(address_map &map);
void cru_map_v(address_map &map);
void crumap(address_map &map);
void crumap_v(address_map &map);
void memmap(address_map &map);
void hold_load();
@ -246,7 +246,7 @@ void ti990_4_state::memmap(address_map &map)
0x0a0-0x0bf: VDT3 (int ??? - wired to int 9, unused)
*/
void ti990_4_state::cru_map(address_map &map)
void ti990_4_state::crumap(address_map &map)
{
map(0x00, 0x01).r("asr733", FUNC(asr733_device::cru_r));
map(0x00, 0x0f).w("asr733", FUNC(asr733_device::cru_w));
@ -258,7 +258,7 @@ void ti990_4_state::cru_map(address_map &map)
map(0xff0, 0xfff).w(FUNC(ti990_4_state::panel_write));
}
void ti990_4_state::cru_map_v(address_map &map)
void ti990_4_state::crumap_v(address_map &map)
{
map(0x10, 0x11).r("vdt911", FUNC(vdt911_device::cru_r));
map(0x80, 0x8f).w("vdt911", FUNC(vdt911_device::cru_w));
@ -294,9 +294,11 @@ void ti990_4_state::init_ti990_4()
MACHINE_CONFIG_START(ti990_4_state::ti990_4)
/* basic machine hardware */
/* TMS9900 CPU @ 3.0(???) MHz */
MCFG_TMS99xx_ADD("maincpu", TMS9900, 3000000, memmap, cru_map)
MCFG_TMS99xx_EXTOP_HANDLER( WRITE8(*this, ti990_4_state, external_operation) )
MCFG_TMS99xx_INTLEVEL_HANDLER( READ8(*this, ti990_4_state, interrupt_level) )
TMS9900(config, m_maincpu, 3000000);
m_maincpu->set_addrmap(AS_PROGRAM, &ti990_4_state::memmap);
m_maincpu->set_addrmap(AS_IO, &ti990_4_state::crumap);
m_maincpu->extop_cb().set(FUNC(ti990_4_state::external_operation));
m_maincpu->intlevel_cb().set(FUNC(ti990_4_state::interrupt_level));
MCFG_MACHINE_RESET_OVERRIDE(ti990_4_state, ti990_4 )
@ -315,10 +317,11 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(ti990_4_state::ti990_4v)
/* basic machine hardware */
/* TMS9900 CPU @ 3.0(???) MHz */
MCFG_TMS99xx_ADD("maincpu", TMS9900, 3000000, memmap, cru_map_v)
MCFG_TMS99xx_EXTOP_HANDLER( WRITE8(*this, ti990_4_state, external_operation) )
MCFG_TMS99xx_INTLEVEL_HANDLER( READ8(*this, ti990_4_state, interrupt_level) )
MCFG_MACHINE_RESET_OVERRIDE(ti990_4_state, ti990_4 )
TMS9900(config, m_maincpu, 3000000);
m_maincpu->set_addrmap(AS_PROGRAM, &ti990_4_state::memmap);
m_maincpu->set_addrmap(AS_IO, &ti990_4_state::crumap_v);
m_maincpu->extop_cb().set(FUNC(ti990_4_state::external_operation));
m_maincpu->intlevel_cb().set(FUNC(ti990_4_state::interrupt_level));
// Terminal
MCFG_DEVICE_ADD("vdt911", VDT911, 0)

6
src/mame/drivers/ti99_2.cpp
View File

@ -453,8 +453,10 @@ MACHINE_CONFIG_START(ti99_2_state::ti99_2)
// TMS9995, standard variant
// Documents state that there is a divider by 2 for the clock rate
// Experiments with real consoles proved them wrong.
MCFG_TMS99xx_ADD("maincpu", TMS9995, XTAL(10'738'635), memmap, crumap)
MCFG_TMS9995_HOLDA_HANDLER( WRITELINE(*this, ti99_2_state, holda) )
TMS9995(config, m_maincpu, XTAL(10'738'635));
m_maincpu->set_addrmap(AS_PROGRAM, &ti99_2_state::memmap);
m_maincpu->set_addrmap(AS_IO, &ti99_2_state::crumap);
m_maincpu->holda_cb().set(FUNC(ti99_2_state::holda));
// RAM 4 KiB
// Early documents indicate 2 KiB RAM, but this does not work with

38
src/mame/drivers/ti99_4p.cpp
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@ -189,7 +189,7 @@ private:
DECLARE_WRITE_LINE_MEMBER(video_interrupt_in);
void cru_map(address_map &map);
void crumap(address_map &map);
void memmap(address_map &map);
void memmap_setoffset(address_map &map);
@ -302,7 +302,7 @@ void ti99_4p_state::memmap_setoffset(address_map &map)
map(0x0000, 0xffff).r(FUNC(ti99_4p_state::setoffset));
}
void ti99_4p_state::cru_map(address_map &map)
void ti99_4p_state::crumap(address_map &map)
{
map(0x0000, 0x01ff).r(FUNC(ti99_4p_state::cruread));
map(0x0000, 0x003f).r(m_tms9901, FUNC(tms9901_device::read));
@ -1011,24 +1011,26 @@ MACHINE_RESET_MEMBER(ti99_4p_state,ti99_4p)
MACHINE_CONFIG_START(ti99_4p_state::ti99_4p_60hz)
/* basic machine hardware */
/* TMS9900 CPU @ 3.0 MHz */
MCFG_TMS99xx_ADD("maincpu", TMS9900, 3000000, memmap, cru_map)
MCFG_DEVICE_ADDRESS_MAP(tms99xx_device::AS_SETOFFSET, memmap_setoffset)
MCFG_TMS99xx_EXTOP_HANDLER( WRITE8(*this, ti99_4p_state, external_operation) )
MCFG_TMS99xx_INTLEVEL_HANDLER( READ8(*this, ti99_4p_state, interrupt_level) )
MCFG_TMS99xx_CLKOUT_HANDLER( WRITELINE(*this, ti99_4p_state, clock_out) )
MCFG_TMS99xx_DBIN_HANDLER( WRITELINE(*this, ti99_4p_state, dbin_line) )
TMS9900(config, m_cpu, 3000000);
m_cpu->set_addrmap(AS_PROGRAM, &ti99_4p_state::memmap);
m_cpu->set_addrmap(AS_IO, &ti99_4p_state::crumap);
m_cpu->set_addrmap(tms99xx_device::AS_SETOFFSET, &ti99_4p_state::memmap_setoffset);
m_cpu->extop_cb().set(FUNC(ti99_4p_state::external_operation));
m_cpu->intlevel_cb().set(FUNC(ti99_4p_state::interrupt_level));
m_cpu->clkout_cb().set(FUNC(ti99_4p_state::clock_out));
m_cpu->dbin_cb().set(FUNC(ti99_4p_state::dbin_line));
// tms9901
MCFG_DEVICE_ADD(TI_TMS9901_TAG, TMS9901, 3000000)
MCFG_TMS9901_READBLOCK_HANDLER( READ8(*this, ti99_4p_state, read_by_9901) )
MCFG_TMS9901_P2_HANDLER( WRITELINE( *this, ti99_4p_state, keyC0) )
MCFG_TMS9901_P3_HANDLER( WRITELINE( *this, ti99_4p_state, keyC1) )
MCFG_TMS9901_P4_HANDLER( WRITELINE( *this, ti99_4p_state, keyC2) )
MCFG_TMS9901_P5_HANDLER( WRITELINE( *this, ti99_4p_state, alphaW) )
MCFG_TMS9901_P6_HANDLER( WRITELINE( *this, ti99_4p_state, cs_motor) )
MCFG_TMS9901_P8_HANDLER( WRITELINE( *this, ti99_4p_state, audio_gate) )
MCFG_TMS9901_P9_HANDLER( WRITELINE( *this, ti99_4p_state, cassette_output) )
MCFG_TMS9901_INTLEVEL_HANDLER( WRITE8( *this, ti99_4p_state, tms9901_interrupt) )
TMS9901(config, m_tms9901, 3000000);
m_tms9901->read_cb().set(FUNC(ti99_4p_state::read_by_9901));
m_tms9901->p_out_cb(2).set(FUNC(ti99_4p_state::keyC0));
m_tms9901->p_out_cb(3).set(FUNC(ti99_4p_state::keyC1));
m_tms9901->p_out_cb(4).set(FUNC(ti99_4p_state::keyC2));
m_tms9901->p_out_cb(5).set(FUNC(ti99_4p_state::alphaW));
m_tms9901->p_out_cb(6).set(FUNC(ti99_4p_state::cs_motor));
m_tms9901->p_out_cb(8).set(FUNC(ti99_4p_state::audio_gate));
m_tms9901->p_out_cb(9).set(FUNC(ti99_4p_state::cassette_output));
m_tms9901->intlevel_cb().set(FUNC(ti99_4p_state::tms9901_interrupt));
// Peripheral expansion box (SGCPU composition)
TI99_PERIBOX_SG(config, m_peribox, 0);

112
src/mame/drivers/ti99_4x.cpp
View File

@ -167,7 +167,7 @@ private:
DECLARE_WRITE_LINE_MEMBER( video_interrupt_evpc_in );
void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
void cru_map(address_map &map);
void crumap(address_map &map);
void memmap(address_map &map);
void memmap_setoffset(address_map &map);
@ -268,7 +268,7 @@ void ti99_4x_state::memmap_setoffset(address_map &map)
Write:0000 - 01ff corresponds to bit 0 of base address 0000 - 03fe
*/
void ti99_4x_state::cru_map(address_map &map)
void ti99_4x_state::crumap(address_map &map)
{
map(0x0000, 0x01ff).r(FUNC(ti99_4x_state::cruread));
map(0x0000, 0x0003).mirror(0x003c).r(m_tms9901, FUNC(tms9901_device::read));
@ -862,28 +862,30 @@ MACHINE_RESET_MEMBER(ti99_4x_state,ti99_4)
MACHINE_CONFIG_START(ti99_4x_state::ti99_4)
// CPU
MCFG_TMS99xx_ADD("maincpu", TMS9900, 3000000, memmap, cru_map)
MCFG_DEVICE_ADDRESS_MAP(tms99xx_device::AS_SETOFFSET, memmap_setoffset)
MCFG_TMS99xx_EXTOP_HANDLER( WRITE8(*this, ti99_4x_state, external_operation) )
MCFG_TMS99xx_INTLEVEL_HANDLER( READ8(*this, ti99_4x_state, interrupt_level) )
MCFG_TMS99xx_CLKOUT_HANDLER( WRITELINE(*this, ti99_4x_state, clock_out) )
MCFG_TMS99xx_DBIN_HANDLER( WRITELINE(*this, ti99_4x_state, dbin_line) )
TMS9900(config, m_cpu, 3000000);
m_cpu->set_addrmap(AS_PROGRAM, &ti99_4x_state::memmap);
m_cpu->set_addrmap(AS_IO, &ti99_4x_state::crumap);
m_cpu->set_addrmap(tms99xx_device::AS_SETOFFSET, &ti99_4x_state::memmap_setoffset);
m_cpu->extop_cb().set(FUNC(ti99_4x_state::external_operation));
m_cpu->intlevel_cb().set(FUNC(ti99_4x_state::interrupt_level));
m_cpu->clkout_cb().set(FUNC(ti99_4x_state::clock_out));
m_cpu->dbin_cb().set(FUNC(ti99_4x_state::dbin_line));
MCFG_MACHINE_START_OVERRIDE(ti99_4x_state, ti99_4 )
MCFG_MACHINE_RESET_OVERRIDE(ti99_4x_state, ti99_4 )
// Main board
MCFG_DEVICE_ADD(TI_TMS9901_TAG, TMS9901, 3000000)
MCFG_TMS9901_READBLOCK_HANDLER( READ8(*this, ti99_4x_state, read_by_9901) )
MCFG_TMS9901_P0_HANDLER( WRITELINE( *this, ti99_4x_state, handset_ack) )
MCFG_TMS9901_P2_HANDLER( WRITELINE( *this, ti99_4x_state, keyC0) )
MCFG_TMS9901_P3_HANDLER( WRITELINE( *this, ti99_4x_state, keyC1) )
MCFG_TMS9901_P4_HANDLER( WRITELINE( *this, ti99_4x_state, keyC2) )
MCFG_TMS9901_P6_HANDLER( WRITELINE( *this, ti99_4x_state, cs1_motor) )
MCFG_TMS9901_P7_HANDLER( WRITELINE( *this, ti99_4x_state, cs2_motor) )
MCFG_TMS9901_P8_HANDLER( WRITELINE( *this, ti99_4x_state, audio_gate) )
MCFG_TMS9901_P9_HANDLER( WRITELINE( *this, ti99_4x_state, cassette_output) )
MCFG_TMS9901_INTLEVEL_HANDLER( WRITE8( *this, ti99_4x_state, tms9901_interrupt) )
TMS9901(config, m_tms9901, 3000000);
m_tms9901->read_cb().set(FUNC(ti99_4x_state::read_by_9901));
m_tms9901->p_out_cb(0).set(FUNC(ti99_4x_state::handset_ack));
m_tms9901->p_out_cb(2).set(FUNC(ti99_4x_state::keyC0));
m_tms9901->p_out_cb(3).set(FUNC(ti99_4x_state::keyC1));
m_tms9901->p_out_cb(4).set(FUNC(ti99_4x_state::keyC2));
m_tms9901->p_out_cb(6).set(FUNC(ti99_4x_state::cs1_motor));
m_tms9901->p_out_cb(7).set(FUNC(ti99_4x_state::cs2_motor));
m_tms9901->p_out_cb(8).set(FUNC(ti99_4x_state::audio_gate));
m_tms9901->p_out_cb(9).set(FUNC(ti99_4x_state::cassette_output));
m_tms9901->intlevel_cb().set(FUNC(ti99_4x_state::tms9901_interrupt));
TI99_DATAMUX(config, m_datamux, 0);
m_datamux->ready_cb().set(FUNC(ti99_4x_state::console_ready_dmux));
@ -984,28 +986,30 @@ MACHINE_RESET_MEMBER(ti99_4x_state,ti99_4a)
MACHINE_CONFIG_START(ti99_4x_state::ti99_4a)
// CPU
MCFG_TMS99xx_ADD("maincpu", TMS9900, 3000000, memmap, cru_map)
MCFG_DEVICE_ADDRESS_MAP(tms99xx_device::AS_SETOFFSET, memmap_setoffset)
MCFG_TMS99xx_EXTOP_HANDLER( WRITE8(*this, ti99_4x_state, external_operation) )
MCFG_TMS99xx_INTLEVEL_HANDLER( READ8(*this, ti99_4x_state, interrupt_level) )
MCFG_TMS99xx_CLKOUT_HANDLER( WRITELINE(*this, ti99_4x_state, clock_out) )
MCFG_TMS99xx_DBIN_HANDLER( WRITELINE(*this, ti99_4x_state, dbin_line) )
TMS9900(config, m_cpu, 3000000);
m_cpu->set_addrmap(AS_PROGRAM, &ti99_4x_state::memmap);
m_cpu->set_addrmap(AS_IO, &ti99_4x_state::crumap);
m_cpu->set_addrmap(tms99xx_device::AS_SETOFFSET, &ti99_4x_state::memmap_setoffset);
m_cpu->extop_cb().set(FUNC(ti99_4x_state::external_operation));
m_cpu->intlevel_cb().set(FUNC(ti99_4x_state::interrupt_level));
m_cpu->clkout_cb().set(FUNC(ti99_4x_state::clock_out));
m_cpu->dbin_cb().set(FUNC(ti99_4x_state::dbin_line));
MCFG_MACHINE_START_OVERRIDE(ti99_4x_state, ti99_4a )
MCFG_MACHINE_RESET_OVERRIDE(ti99_4x_state, ti99_4a )
// Main board
MCFG_DEVICE_ADD(TI_TMS9901_TAG, TMS9901, 3000000)
MCFG_TMS9901_READBLOCK_HANDLER( READ8(*this, ti99_4x_state, read_by_9901) )
MCFG_TMS9901_P2_HANDLER( WRITELINE( *this, ti99_4x_state, keyC0) )
MCFG_TMS9901_P3_HANDLER( WRITELINE( *this, ti99_4x_state, keyC1) )
MCFG_TMS9901_P4_HANDLER( WRITELINE( *this, ti99_4x_state, keyC2) )
MCFG_TMS9901_P5_HANDLER( WRITELINE( *this, ti99_4x_state, alphaW) )
MCFG_TMS9901_P6_HANDLER( WRITELINE( *this, ti99_4x_state, cs1_motor) )
MCFG_TMS9901_P7_HANDLER( WRITELINE( *this, ti99_4x_state, cs2_motor) )
MCFG_TMS9901_P8_HANDLER( WRITELINE( *this, ti99_4x_state, audio_gate) )
MCFG_TMS9901_P9_HANDLER( WRITELINE( *this, ti99_4x_state, cassette_output) )
MCFG_TMS9901_INTLEVEL_HANDLER( WRITE8( *this, ti99_4x_state, tms9901_interrupt) )
TMS9901(config, m_tms9901, 3000000);
m_tms9901->read_cb().set(FUNC(ti99_4x_state::read_by_9901));
m_tms9901->p_out_cb(2).set(FUNC(ti99_4x_state::keyC0));
m_tms9901->p_out_cb(3).set(FUNC(ti99_4x_state::keyC1));
m_tms9901->p_out_cb(4).set(FUNC(ti99_4x_state::keyC2));
m_tms9901->p_out_cb(5).set(FUNC(ti99_4x_state::alphaW));
m_tms9901->p_out_cb(6).set(FUNC(ti99_4x_state::cs1_motor));
m_tms9901->p_out_cb(7).set(FUNC(ti99_4x_state::cs2_motor));
m_tms9901->p_out_cb(8).set(FUNC(ti99_4x_state::audio_gate));
m_tms9901->p_out_cb(9).set(FUNC(ti99_4x_state::cassette_output));
m_tms9901->intlevel_cb().set(FUNC(ti99_4x_state::tms9901_interrupt));
TI99_DATAMUX(config, m_datamux, 0);
m_datamux->ready_cb().set(FUNC(ti99_4x_state::console_ready_dmux));
@ -1149,28 +1153,30 @@ MACHINE_RESET_MEMBER(ti99_4x_state, ti99_4ev)
MACHINE_CONFIG_START(ti99_4x_state::ti99_4ev_60hz)
// CPU
MCFG_TMS99xx_ADD("maincpu", TMS9900, 3000000, memmap, cru_map)
MCFG_DEVICE_ADDRESS_MAP(tms99xx_device::AS_SETOFFSET, memmap_setoffset)
MCFG_TMS99xx_EXTOP_HANDLER( WRITE8(*this, ti99_4x_state, external_operation) )
MCFG_TMS99xx_INTLEVEL_HANDLER( READ8(*this, ti99_4x_state, interrupt_level) )
MCFG_TMS99xx_CLKOUT_HANDLER( WRITELINE(*this, ti99_4x_state, clock_out) )
MCFG_TMS99xx_DBIN_HANDLER( WRITELINE(*this, ti99_4x_state, dbin_line) )
TMS9900(config, m_cpu, 3000000);
m_cpu->set_addrmap(AS_PROGRAM, &ti99_4x_state::memmap);
m_cpu->set_addrmap(AS_IO, &ti99_4x_state::crumap);
m_cpu->set_addrmap(tms99xx_device::AS_SETOFFSET, &ti99_4x_state::memmap_setoffset);
m_cpu->extop_cb().set(FUNC(ti99_4x_state::external_operation));
m_cpu->intlevel_cb().set(FUNC(ti99_4x_state::interrupt_level));
m_cpu->clkout_cb().set(FUNC(ti99_4x_state::clock_out));
m_cpu->dbin_cb().set(FUNC(ti99_4x_state::dbin_line));
MCFG_MACHINE_START_OVERRIDE(ti99_4x_state, ti99_4ev )
MCFG_MACHINE_RESET_OVERRIDE(ti99_4x_state, ti99_4ev )
// Main board
MCFG_DEVICE_ADD(TI_TMS9901_TAG, TMS9901, 3000000)
MCFG_TMS9901_READBLOCK_HANDLER( READ8(*this, ti99_4x_state, read_by_9901) )
MCFG_TMS9901_P2_HANDLER( WRITELINE( *this, ti99_4x_state, keyC0) )
MCFG_TMS9901_P3_HANDLER( WRITELINE( *this, ti99_4x_state, keyC1) )
MCFG_TMS9901_P4_HANDLER( WRITELINE( *this, ti99_4x_state, keyC2) )
MCFG_TMS9901_P5_HANDLER( WRITELINE( *this, ti99_4x_state, alphaW) )
MCFG_TMS9901_P6_HANDLER( WRITELINE( *this, ti99_4x_state, cs1_motor) )
MCFG_TMS9901_P7_HANDLER( WRITELINE( *this, ti99_4x_state, cs2_motor) )
MCFG_TMS9901_P8_HANDLER( WRITELINE( *this, ti99_4x_state, audio_gate) )
MCFG_TMS9901_P9_HANDLER( WRITELINE( *this, ti99_4x_state, cassette_output) )
MCFG_TMS9901_INTLEVEL_HANDLER( WRITE8( *this, ti99_4x_state, tms9901_interrupt) )
TMS9901(config, m_tms9901, 3000000);
m_tms9901->read_cb().set(FUNC(ti99_4x_state::read_by_9901));
m_tms9901->p_out_cb(2).set(FUNC(ti99_4x_state::keyC0));
m_tms9901->p_out_cb(3).set(FUNC(ti99_4x_state::keyC1));
m_tms9901->p_out_cb(4).set(FUNC(ti99_4x_state::keyC2));
m_tms9901->p_out_cb(5).set(FUNC(ti99_4x_state::alphaW));
m_tms9901->p_out_cb(6).set(FUNC(ti99_4x_state::cs1_motor));
m_tms9901->p_out_cb(7).set(FUNC(ti99_4x_state::cs2_motor));
m_tms9901->p_out_cb(8).set(FUNC(ti99_4x_state::audio_gate));
m_tms9901->p_out_cb(9).set(FUNC(ti99_4x_state::cassette_output));
m_tms9901->intlevel_cb().set(FUNC(ti99_4x_state::tms9901_interrupt));
TI99_DATAMUX(config, m_datamux, 0);
m_datamux->ready_cb().set(FUNC(ti99_4x_state::console_ready_dmux));

38
src/mame/drivers/ti99_8.cpp
View File

@ -732,29 +732,31 @@ MACHINE_CONFIG_START(ti99_8_state::ti99_8)
// basic machine hardware */
// TMS9995-MP9537 CPU @ 10.7 MHz
// MP9537 mask: This variant of the TMS9995 does not contain on-chip RAM
MCFG_TMS99xx_ADD("maincpu", TMS9995_MP9537, XTAL(10'738'635), memmap, crumap)
MCFG_DEVICE_ADDRESS_MAP(tms9995_device::AS_SETOFFSET, memmap_setoffset)
MCFG_TMS9995_EXTOP_HANDLER( WRITE8(*this, ti99_8_state, external_operation) )
MCFG_TMS9995_CLKOUT_HANDLER( WRITELINE(*this, ti99_8_state, clock_out) )
MCFG_TMS9995_DBIN_HANDLER( WRITELINE(*this, ti99_8_state, dbin_line) )
MCFG_TMS9995_HOLDA_HANDLER( WRITELINE(TI998_MAINBOARD_TAG, bus::ti99::internal::mainboard8_device, holda_line) )
TMS9995_MP9537(config, m_cpu, XTAL(10'738'635));
m_cpu->set_addrmap(AS_PROGRAM, &ti99_8_state::memmap);
m_cpu->set_addrmap(AS_IO, &ti99_8_state::crumap);
m_cpu->set_addrmap(tms9995_device::AS_SETOFFSET, &ti99_8_state::memmap_setoffset);
m_cpu->extop_cb().set(FUNC(ti99_8_state::external_operation));
m_cpu->clkout_cb().set(FUNC(ti99_8_state::clock_out));
m_cpu->dbin_cb().set(FUNC(ti99_8_state::dbin_line));
m_cpu->holda_cb().set(TI998_MAINBOARD_TAG, FUNC(bus::ti99::internal::mainboard8_device::holda_line));
MCFG_MACHINE_START_OVERRIDE(ti99_8_state, ti99_8 )
MCFG_MACHINE_RESET_OVERRIDE(ti99_8_state, ti99_8 )
// 9901 configuration
MCFG_DEVICE_ADD(TI_TMS9901_TAG, TMS9901, XTAL(10'738'635)/4.0)
MCFG_TMS9901_READBLOCK_HANDLER( READ8(*this, ti99_8_state, read_by_9901) )
MCFG_TMS9901_P0_HANDLER( WRITELINE( *this, ti99_8_state, keyC0) )
MCFG_TMS9901_P1_HANDLER( WRITELINE( *this, ti99_8_state, keyC1) )
MCFG_TMS9901_P2_HANDLER( WRITELINE( *this, ti99_8_state, keyC2) )
MCFG_TMS9901_P3_HANDLER( WRITELINE( *this, ti99_8_state, keyC3) )
MCFG_TMS9901_P4_HANDLER( WRITELINE( TI998_MAINBOARD_TAG, bus::ti99::internal::mainboard8_device, crus_in) )
MCFG_TMS9901_P5_HANDLER( WRITELINE( TI998_MAINBOARD_TAG, bus::ti99::internal::mainboard8_device, ptgen_in) )
MCFG_TMS9901_P6_HANDLER( WRITELINE( *this, ti99_8_state, cassette_motor) )
MCFG_TMS9901_P8_HANDLER( WRITELINE( *this, ti99_8_state, audio_gate) )
MCFG_TMS9901_P9_HANDLER( WRITELINE( *this, ti99_8_state, cassette_output) )
MCFG_TMS9901_INTLEVEL_HANDLER( WRITE8( *this, ti99_8_state, tms9901_interrupt) )
TMS9901(config, m_tms9901, XTAL(10'738'635)/4.0);
m_tms9901->read_cb().set(FUNC(ti99_8_state::read_by_9901));
m_tms9901->p_out_cb(0).set(FUNC(ti99_8_state::keyC0));
m_tms9901->p_out_cb(1).set(FUNC(ti99_8_state::keyC1));
m_tms9901->p_out_cb(2).set(FUNC(ti99_8_state::keyC2));
m_tms9901->p_out_cb(3).set(FUNC(ti99_8_state::keyC3));
m_tms9901->p_out_cb(4).set(TI998_MAINBOARD_TAG, FUNC(bus::ti99::internal::mainboard8_device::crus_in));
m_tms9901->p_out_cb(5).set(TI998_MAINBOARD_TAG, FUNC(bus::ti99::internal::mainboard8_device::ptgen_in));
m_tms9901->p_out_cb(6).set(FUNC(ti99_8_state::cassette_motor));
m_tms9901->p_out_cb(8).set(FUNC(ti99_8_state::audio_gate));
m_tms9901->p_out_cb(9).set(FUNC(ti99_8_state::cassette_output));
m_tms9901->intlevel_cb().set(FUNC(ti99_8_state::tms9901_interrupt));
// Mainboard with custom chips
MCFG_DEVICE_ADD(TI998_MAINBOARD_TAG, TI99_MAINBOARD8, 0)

113
src/mame/drivers/tm990189.cpp
View File

@ -824,8 +824,10 @@ void tm990189_state::tm990_189_cru_map(address_map &map)
MACHINE_CONFIG_START(tm990189_state::tm990_189)
/* basic machine hardware */
MCFG_TMS99xx_ADD("maincpu", TMS9980A, 2000000, tm990_189_memmap, tm990_189_cru_map)
MCFG_TMS99xx_EXTOP_HANDLER( WRITE8(*this, tm990189_state, external_operation) )
TMS9980A(config, m_tms9980a, 2000000);
m_tms9980a->set_addrmap(AS_PROGRAM, &tm990189_state::tm990_189_memmap);
m_tms9980a->set_addrmap(AS_IO, &tm990189_state::tm990_189_cru_map);
m_tms9980a->extop_cb().set(FUNC(tm990189_state::external_operation));
MCFG_MACHINE_START_OVERRIDE(tm990189_state, tm990_189 )
MCFG_MACHINE_RESET_OVERRIDE(tm990189_state, tm990_189 )
@ -841,32 +843,32 @@ MACHINE_CONFIG_START(tm990189_state::tm990_189)
/* Devices */
MCFG_CASSETTE_ADD( "cassette" )
MCFG_DEVICE_ADD(TMS9901_0_TAG, TMS9901, 2000000)
MCFG_TMS9901_P0_HANDLER( WRITELINE( *this, tm990189_state, usr9901_led0_w) )
MCFG_TMS9901_P1_HANDLER( WRITELINE( *this, tm990189_state, usr9901_led1_w) )
MCFG_TMS9901_P2_HANDLER( WRITELINE( *this, tm990189_state, usr9901_led2_w) )
MCFG_TMS9901_P3_HANDLER( WRITELINE( *this, tm990189_state, usr9901_led3_w) )
MCFG_TMS9901_INTLEVEL_HANDLER( WRITE8( *this, tm990189_state, usr9901_interrupt_callback) )
TMS9901(config, m_tms9901_usr, 2000000);
m_tms9901_usr->p_out_cb(0).set(FUNC(tm990189_state::usr9901_led0_w));
m_tms9901_usr->p_out_cb(1).set(FUNC(tm990189_state::usr9901_led1_w));
m_tms9901_usr->p_out_cb(2).set(FUNC(tm990189_state::usr9901_led2_w));
m_tms9901_usr->p_out_cb(3).set(FUNC(tm990189_state::usr9901_led3_w));
m_tms9901_usr->intlevel_cb().set(FUNC(tm990189_state::usr9901_interrupt_callback));
MCFG_DEVICE_ADD(TMS9901_1_TAG, TMS9901, 2000000)
MCFG_TMS9901_READBLOCK_HANDLER( READ8(*this, tm990189_state, sys9901_r) )
MCFG_TMS9901_P0_HANDLER( WRITELINE( *this, tm990189_state, sys9901_digitsel0_w) )
MCFG_TMS9901_P1_HANDLER( WRITELINE( *this, tm990189_state, sys9901_digitsel1_w) )
MCFG_TMS9901_P2_HANDLER( WRITELINE( *this, tm990189_state, sys9901_digitsel2_w) )
MCFG_TMS9901_P3_HANDLER( WRITELINE( *this, tm990189_state, sys9901_digitsel3_w) )
MCFG_TMS9901_P4_HANDLER( WRITELINE( *this, tm990189_state, sys9901_segment0_w) )
MCFG_TMS9901_P5_HANDLER( WRITELINE( *this, tm990189_state, sys9901_segment1_w) )
MCFG_TMS9901_P6_HANDLER( WRITELINE( *this, tm990189_state, sys9901_segment2_w) )
MCFG_TMS9901_P7_HANDLER( WRITELINE( *this, tm990189_state, sys9901_segment3_w) )
MCFG_TMS9901_P8_HANDLER( WRITELINE( *this, tm990189_state, sys9901_segment4_w) )
MCFG_TMS9901_P9_HANDLER( WRITELINE( *this, tm990189_state, sys9901_segment5_w) )
MCFG_TMS9901_P10_HANDLER( WRITELINE( *this, tm990189_state, sys9901_segment6_w) )
MCFG_TMS9901_P11_HANDLER( WRITELINE( *this, tm990189_state, sys9901_segment7_w) )
MCFG_TMS9901_P12_HANDLER( WRITELINE( *this, tm990189_state, sys9901_dsplytrgr_w) )
MCFG_TMS9901_P13_HANDLER( WRITELINE( *this, tm990189_state, sys9901_shiftlight_w) )
MCFG_TMS9901_P14_HANDLER( WRITELINE( *this, tm990189_state, sys9901_spkrdrive_w) )
MCFG_TMS9901_P15_HANDLER( WRITELINE( *this, tm990189_state, sys9901_tapewdata_w) )
MCFG_TMS9901_INTLEVEL_HANDLER( WRITE8( *this, tm990189_state, sys9901_interrupt_callback) )
TMS9901(config, m_tms9901_sys, 2000000);
m_tms9901_sys->read_cb().set(FUNC(tm990189_state::sys9901_r));
m_tms9901_sys->p_out_cb(0).set(FUNC(tm990189_state::sys9901_digitsel0_w));
m_tms9901_sys->p_out_cb(1).set(FUNC(tm990189_state::sys9901_digitsel1_w));
m_tms9901_sys->p_out_cb(2).set(FUNC(tm990189_state::sys9901_digitsel2_w));
m_tms9901_sys->p_out_cb(3).set(FUNC(tm990189_state::sys9901_digitsel3_w));
m_tms9901_sys->p_out_cb(4).set(FUNC(tm990189_state::sys9901_segment0_w));
m_tms9901_sys->p_out_cb(5).set(FUNC(tm990189_state::sys9901_segment1_w));
m_tms9901_sys->p_out_cb(6).set(FUNC(tm990189_state::sys9901_segment2_w));
m_tms9901_sys->p_out_cb(7).set(FUNC(tm990189_state::sys9901_segment3_w));
m_tms9901_sys->p_out_cb(8).set(FUNC(tm990189_state::sys9901_segment4_w));
m_tms9901_sys->p_out_cb(9).set(FUNC(tm990189_state::sys9901_segment5_w));
m_tms9901_sys->p_out_cb(10).set(FUNC(tm990189_state::sys9901_segment6_w));
m_tms9901_sys->p_out_cb(11).set(FUNC(tm990189_state::sys9901_segment7_w));
m_tms9901_sys->p_out_cb(12).set(FUNC(tm990189_state::sys9901_dsplytrgr_w));
m_tms9901_sys->p_out_cb(13).set(FUNC(tm990189_state::sys9901_shiftlight_w));
m_tms9901_sys->p_out_cb(14).set(FUNC(tm990189_state::sys9901_spkrdrive_w));
m_tms9901_sys->p_out_cb(15).set(FUNC(tm990189_state::sys9901_tapewdata_w));
m_tms9901_sys->intlevel_cb().set(FUNC(tm990189_state::sys9901_interrupt_callback));
MCFG_DEVICE_ADD(m_tms9902, TMS9902, 2000000) // MZ: needs to be fixed once the RS232 support is complete
MCFG_TMS9902_XMIT_CB(WRITE8(*this, tm990189_state, xmit_callback)) /* called when a character is transmitted */
@ -879,8 +881,10 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(tm990189_state::tm990_189_v)
/* basic machine hardware */
MCFG_TMS99xx_ADD("maincpu", TMS9980A, 2000000, tm990_189_v_memmap, tm990_189_cru_map)
MCFG_TMS99xx_EXTOP_HANDLER( WRITE8(*this, tm990189_state, external_operation) )
TMS9980A(config, m_tms9980a, 2000000);
m_tms9980a->set_addrmap(AS_PROGRAM, &tm990189_state::tm990_189_v_memmap);
m_tms9980a->set_addrmap(AS_IO, &tm990189_state::tm990_189_cru_map);
m_tms9980a->extop_cb().set(FUNC(tm990189_state::external_operation));
MCFG_MACHINE_START_OVERRIDE(tm990189_state, tm990_189_v )
MCFG_MACHINE_RESET_OVERRIDE(tm990189_state, tm990_189_v )
@ -899,32 +903,33 @@ MACHINE_CONFIG_START(tm990189_state::tm990_189_v)
/* Devices */
MCFG_CASSETTE_ADD( "cassette" )
MCFG_DEVICE_ADD(TMS9901_0_TAG, TMS9901, 2000000)
MCFG_TMS9901_P0_HANDLER( WRITELINE( *this, tm990189_state, usr9901_led0_w) )
MCFG_TMS9901_P1_HANDLER( WRITELINE( *this, tm990189_state, usr9901_led1_w) )
MCFG_TMS9901_P2_HANDLER( WRITELINE( *this, tm990189_state, usr9901_led2_w) )
MCFG_TMS9901_P3_HANDLER( WRITELINE( *this, tm990189_state, usr9901_led3_w) )
MCFG_TMS9901_INTLEVEL_HANDLER( WRITE8( *this, tm990189_state, usr9901_interrupt_callback) )
MCFG_DEVICE_ADD(TMS9901_1_TAG, TMS9901, 2000000)
MCFG_TMS9901_READBLOCK_HANDLER( READ8(*this, tm990189_state, sys9901_r) )
MCFG_TMS9901_P0_HANDLER( WRITELINE( *this, tm990189_state, sys9901_digitsel0_w) )
MCFG_TMS9901_P1_HANDLER( WRITELINE( *this, tm990189_state, sys9901_digitsel1_w) )
MCFG_TMS9901_P2_HANDLER( WRITELINE( *this, tm990189_state, sys9901_digitsel2_w) )
MCFG_TMS9901_P3_HANDLER( WRITELINE( *this, tm990189_state, sys9901_digitsel3_w) )
MCFG_TMS9901_P4_HANDLER( WRITELINE( *this, tm990189_state, sys9901_segment0_w) )
MCFG_TMS9901_P5_HANDLER( WRITELINE( *this, tm990189_state, sys9901_segment1_w) )
MCFG_TMS9901_P6_HANDLER( WRITELINE( *this, tm990189_state, sys9901_segment2_w) )
MCFG_TMS9901_P7_HANDLER( WRITELINE( *this, tm990189_state, sys9901_segment3_w) )
MCFG_TMS9901_P8_HANDLER( WRITELINE( *this, tm990189_state, sys9901_segment4_w) )
MCFG_TMS9901_P9_HANDLER( WRITELINE( *this, tm990189_state, sys9901_segment5_w) )
MCFG_TMS9901_P10_HANDLER( WRITELINE( *this, tm990189_state, sys9901_segment6_w) )
MCFG_TMS9901_P11_HANDLER( WRITELINE( *this, tm990189_state, sys9901_segment7_w) )
MCFG_TMS9901_P12_HANDLER( WRITELINE( *this, tm990189_state, sys9901_dsplytrgr_w) )
MCFG_TMS9901_P13_HANDLER( WRITELINE( *this, tm990189_state, sys9901_shiftlight_w) )
MCFG_TMS9901_P14_HANDLER( WRITELINE( *this, tm990189_state, sys9901_spkrdrive_w) )
MCFG_TMS9901_P15_HANDLER( WRITELINE( *this, tm990189_state, sys9901_tapewdata_w) )
MCFG_TMS9901_INTLEVEL_HANDLER( WRITE8( *this, tm990189_state, sys9901_interrupt_callback) )
TMS9901(config, m_tms9901_usr, 2000000);
m_tms9901_usr->p_out_cb(0).set(FUNC(tm990189_state::usr9901_led0_w));
m_tms9901_usr->p_out_cb(1).set(FUNC(tm990189_state::usr9901_led1_w));
m_tms9901_usr->p_out_cb(2).set(FUNC(tm990189_state::usr9901_led2_w));
m_tms9901_usr->p_out_cb(3).set(FUNC(tm990189_state::usr9901_led3_w));
m_tms9901_usr->intlevel_cb().set(FUNC(tm990189_state::usr9901_interrupt_callback));
TMS9901(config, m_tms9901_sys, 2000000);
m_tms9901_sys->read_cb().set(FUNC(tm990189_state::sys9901_r));
m_tms9901_sys->p_out_cb(0).set(FUNC(tm990189_state::sys9901_digitsel0_w));
m_tms9901_sys->p_out_cb(1).set(FUNC(tm990189_state::sys9901_digitsel1_w));
m_tms9901_sys->p_out_cb(2).set(FUNC(tm990189_state::sys9901_digitsel2_w));
m_tms9901_sys->p_out_cb(3).set(FUNC(tm990189_state::sys9901_digitsel3_w));
m_tms9901_sys->p_out_cb(4).set(FUNC(tm990189_state::sys9901_segment0_w));
m_tms9901_sys->p_out_cb(5).set(FUNC(tm990189_state::sys9901_segment1_w));
m_tms9901_sys->p_out_cb(6).set(FUNC(tm990189_state::sys9901_segment2_w));
m_tms9901_sys->p_out_cb(7).set(FUNC(tm990189_state::sys9901_segment3_w));
m_tms9901_sys->p_out_cb(8).set(FUNC(tm990189_state::sys9901_segment4_w));
m_tms9901_sys->p_out_cb(9).set(FUNC(tm990189_state::sys9901_segment5_w));
m_tms9901_sys->p_out_cb(10).set(FUNC(tm990189_state::sys9901_segment6_w));
m_tms9901_sys->p_out_cb(11).set(FUNC(tm990189_state::sys9901_segment7_w));
m_tms9901_sys->p_out_cb(12).set(FUNC(tm990189_state::sys9901_dsplytrgr_w));
m_tms9901_sys->p_out_cb(13).set(FUNC(tm990189_state::sys9901_shiftlight_w));
m_tms9901_sys->p_out_cb(14).set(FUNC(tm990189_state::sys9901_spkrdrive_w));
m_tms9901_sys->p_out_cb(15).set(FUNC(tm990189_state::sys9901_tapewdata_w));
m_tms9901_sys->intlevel_cb().set(FUNC(tm990189_state::sys9901_interrupt_callback));
MCFG_DEVICE_ADD(m_tms9902, TMS9902, 2000000) // MZ: needs to be fixed once the RS232 support is complete
MCFG_TMS9902_XMIT_CB(WRITE8(*this, tm990189_state, xmit_callback)) /* called when a character is transmitted */

6
src/mame/drivers/tmspoker.cpp
View File

@ -563,8 +563,10 @@ GFXDECODE_END
MACHINE_CONFIG_START(tmspoker_state::tmspoker)
// CPU TMS9980A; no line connections
MCFG_TMS99xx_ADD("maincpu", TMS9980A, MASTER_CLOCK/4, tmspoker_map, tmspoker_cru_map)
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", tmspoker_state, tmspoker_interrupt)
TMS9980A(config, m_maincpu, MASTER_CLOCK/4);
m_maincpu->set_addrmap(AS_PROGRAM, &tmspoker_state::tmspoker_map);
m_maincpu->set_addrmap(AS_IO, &tmspoker_state::tmspoker_cru_map);
m_maincpu->set_vblank_int("screen", FUNC(tmspoker_state::tmspoker_interrupt));
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

4
src/mame/drivers/tutor.cpp
View File

@ -748,7 +748,9 @@ MACHINE_CONFIG_START(tutor_state::tutor)
// basic machine hardware
// TMS9995 CPU @ 10.7 MHz
// No lines connected yet
MCFG_TMS99xx_ADD("maincpu", TMS9995, XTAL(10'738'635), tutor_memmap, tutor_io)
TMS9995(config, m_maincpu, XTAL(10'738'635));
m_maincpu->set_addrmap(AS_PROGRAM, &tutor_state::tutor_memmap);
m_maincpu->set_addrmap(AS_IO, &tutor_state::tutor_io);
/* video hardware */
MCFG_DEVICE_ADD( "tms9928a", TMS9928A, XTAL(10'738'635) / 2 )