diff --git a/src/mame/drivers/sun2.cpp b/src/mame/drivers/sun2.cpp
index bf34333b27d..66c8fa49fa2 100644
--- a/src/mame/drivers/sun2.cpp
+++ b/src/mame/drivers/sun2.cpp
@@ -123,6 +123,7 @@ How the architecture works:
 #include "cpu/m68000/m68000.h"
 #include "machine/ram.h"
 #include "machine/am9513.h"
+#include "machine/i82586.h"
 #include "machine/mm58167.h"
 #include "machine/z80scc.h"
 #include "machine/bankdev.h"
@@ -155,6 +156,7 @@ public:
 		, m_type1space(*this, "type1")
 		, m_type2space(*this, "type2")
 		, m_type3space(*this, "type3")
+		, m_edlc(*this, "edlc")
 		, m_bw2_vram(*this, "bw2_vram")
 	{ }
 
@@ -166,6 +168,7 @@ private:
 	required_memory_region m_rom, m_idprom;
 	required_device<ram_device> m_ram;
 	required_device<address_map_bank_device> m_type0space, m_type1space, m_type2space, m_type3space;
+	optional_device<i82586_device> m_edlc;
 	required_shared_ptr<uint16_t> m_bw2_vram;
 
 	virtual void machine_start() override;
@@ -177,6 +180,9 @@ private:
 	DECLARE_WRITE16_MEMBER( video_ctrl_w );
 	DECLARE_READ16_MEMBER( ram_r );
 	DECLARE_WRITE16_MEMBER( ram_w );
+	uint8_t ethernet_r();
+	void ethernet_w(uint8_t data);
+	DECLARE_WRITE_LINE_MEMBER(ethernet_int_w);
 
 	uint32_t bw2_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
 
@@ -198,6 +204,7 @@ private:
 	uint32_t m_pagemap[4097];
 	uint32_t m_ram_size, m_ram_size_words;
 	uint16_t m_bw2_ctrl;
+	uint8_t m_ethernet_status;
 };
 
 READ16_MEMBER( sun2_state::ram_r )
@@ -482,6 +489,38 @@ WRITE16_MEMBER( sun2_state::video_ctrl_w )
 	COMBINE_DATA(&m_bw2_ctrl);
 }
 
+// 82586 Ethernet Data Link Controller interface
+uint8_t sun2_state::ethernet_r()
+{
+	return m_ethernet_status;
+}
+
+void sun2_state::ethernet_w(uint8_t data)
+{
+	m_edlc->reset_w(!BIT(data, 7));
+	// Bit 6 = loopback control (active low, though inverted for MB502)
+	m_edlc->ca(BIT(data, 5));
+
+	m_ethernet_status = (data & 0xf0) | (m_ethernet_status & 0x0f);
+	m_maincpu->set_input_line(M68K_IRQ_3, BIT(m_ethernet_status, 0) && BIT(m_ethernet_status, 4) ? ASSERT_LINE : CLEAR_LINE);
+}
+
+WRITE_LINE_MEMBER(sun2_state::ethernet_int_w)
+{
+	if (state)
+	{
+		m_ethernet_status |= 0x01;
+		if (BIT(m_ethernet_status, 4))
+			m_maincpu->set_input_line(M68K_IRQ_3, ASSERT_LINE);
+	}
+	else
+	{
+		m_ethernet_status &= 0xfe;
+		if (BIT(m_ethernet_status, 4))
+			m_maincpu->set_input_line(M68K_IRQ_3, CLEAR_LINE);
+	}
+}
+
 void sun2_state::sun2_mem(address_map &map)
 {
 	map(0x000000, 0xffffff).rw(FUNC(sun2_state::tl_mmu_r), FUNC(sun2_state::tl_mmu_w));
@@ -500,7 +539,7 @@ void sun2_state::vmetype1space_map(address_map &map)
 	map(0x000000, 0x01ffff).ram().share("bw2_vram");
 	map(0x020000, 0x020001).rw(FUNC(sun2_state::video_ctrl_r), FUNC(sun2_state::video_ctrl_w));
 	map(0x7f0000, 0x7f07ff).rom().region("bootprom", 0);    // uses MMU loophole to read 32k from a 2k window
-	// 7f0800-7f0fff: Ethernet interface
+	map(0x7f0800, 0x7f0800).mirror(0x7fe).rw(FUNC(sun2_state::ethernet_r), FUNC(sun2_state::ethernet_w)).cswidth(16);
 	// 7f1000-7f17ff: AM9518 encryption processor
 	//AM_RANGE(0x7f1800, 0x7f1801) AM_DEVREADWRITE8(SCC1_TAG, z80scc_device, cb_r, cb_w, 0xff00)
 	//AM_RANGE(0x7f1802, 0x7f1803) AM_DEVREADWRITE8(SCC1_TAG, z80scc_device, db_r, db_w, 0xff00)
@@ -597,6 +636,8 @@ void sun2_state::machine_start()
 	m_ram_ptr = (uint16_t *)m_ram->pointer();
 	m_ram_size = m_ram->size();
 	m_ram_size_words = m_ram_size >> 1;
+
+	m_ethernet_status = 0;
 }
 
 void sun2_state::machine_reset()
@@ -607,6 +648,9 @@ void sun2_state::machine_reset()
 	m_buserror = 0;
 	memset(m_segmap, 0, sizeof(m_segmap));
 	memset(m_pagemap, 0, sizeof(m_pagemap));
+
+	if (m_edlc.found())
+		ethernet_w(0);
 }
 
 void sun2_state::sun2vme(machine_config &config)
@@ -635,6 +679,10 @@ void sun2_state::sun2vme(machine_config &config)
 	bwtwo.set_visarea(0, 1152-1, 0, 900-1);
 	bwtwo.set_refresh_hz(72);
 
+	I82586(config, m_edlc, 16_MHz_XTAL / 2);
+	m_edlc->set_addrmap(0, &sun2_state::sun2_mem);
+	m_edlc->out_irq_cb().set(FUNC(sun2_state::ethernet_int_w));
+
 	am9513a_device &timer(AM9513A(config, "timer", 19.6608_MHz_XTAL / 4));
 	timer.fout_cb().set("timer", FUNC(am9513_device::gate1_w));
 	timer.out1_cb().set_inputline(m_maincpu, M68K_IRQ_7);