From 835a86ce3b55c164ffd80e1567b08874fc44e9f4 Mon Sep 17 00:00:00 2001 From: hap Date: Sun, 30 Apr 2017 10:59:05 +0200 Subject: [PATCH] sm510: lb/sbm seems ok (nw) --- src/devices/cpu/sm510/sm510.cpp | 3 ++- src/devices/cpu/sm510/sm510op.cpp | 16 +--------------- 2 files changed, 3 insertions(+), 16 deletions(-) diff --git a/src/devices/cpu/sm510/sm510.cpp b/src/devices/cpu/sm510/sm510.cpp index 69a099f1cb4..8bb5f7fd468 100644 --- a/src/devices/cpu/sm510/sm510.cpp +++ b/src/devices/cpu/sm510/sm510.cpp @@ -26,11 +26,12 @@ - proper support for LFSR program counter in debugger - callback for lcd screen as MAME bitmap (when needed) - LCD bs pin blink mode via Y register (0.5s off, 0.5s on) - - LB/SBM is correct? + - SM510 buzzer control divider bit is mask-programmable? - SM511 undocumented/guessed opcodes: * $01 is guessed as DIV to ACC transfer, unknown which bits * $5d is certainly CEND * $65 is certainly divider reset, but not sure if it behaves same as on SM510 + * $6036 may be instruction timing? (16KHz vs 8KHz) */ diff --git a/src/devices/cpu/sm510/sm510op.cpp b/src/devices/cpu/sm510/sm510op.cpp index 8b248c2cf90..69e633cb5c6 100644 --- a/src/devices/cpu/sm510/sm510op.cpp +++ b/src/devices/cpu/sm510/sm510op.cpp @@ -58,22 +58,8 @@ inline u8 sm510_base_device::bitmask(u16 param) void sm510_base_device::op_lb() { // LB x: load BM/BL with 4-bit immediate value (partial) - - // SM510 WIP.. - // bm and bl(low) are probably ok! m_bm = (m_bm & 4) | (m_op & 3); - m_bl = (m_op >> 2 & 3); - - // bl(high) is still unclear, official doc is confusing - u8 hi = 0; - switch (m_bl) - { - case 0: hi = 0; break; - case 1: hi = 3; break; - case 2: hi = 3; break; - case 3: hi = 3; break; - } - m_bl |= (hi << 2 & 0xc); + m_bl = (m_op >> 2 & 3) | ((m_op & 0xc) ? 0xc : 0); } void sm510_base_device::op_lbl()