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Cleanups and version bump.

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This commit is contained in:
Aaron Giles 2009-01-04 23:31:12 +00:00
parent ed893fe35c
commit 835ace034d
67 changed files with 489 additions and 489 deletions
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8
src/emu/clifront.c
View File

@ -435,7 +435,7 @@ int cli_info_listclones(core_options *options, const char *gamename)
/*-------------------------------------------------
cli_info_listbrothers - output the name and
cli_info_listbrothers - output the name and
source filename of one or more games
-------------------------------------------------*/
@ -444,7 +444,7 @@ int cli_info_listbrothers(core_options *options, const char *gamename)
UINT8 *didit = malloc_or_die(driver_list_get_count(drivers));
astring *filename = astring_alloc();
int drvindex, count = 0;
memset(didit, 0, driver_list_get_count(drivers));
/* iterate over drivers */
@ -452,7 +452,7 @@ int cli_info_listbrothers(core_options *options, const char *gamename)
if (!didit[drvindex] && mame_strwildcmp(gamename, drivers[drvindex]->name) == 0)
{
int matchindex;
didit[drvindex] = TRUE;
if (count > 0)
mame_printf_info("\n");
@ -464,7 +464,7 @@ int cli_info_listbrothers(core_options *options, const char *gamename)
{
const char *matchstring = (mame_strwildcmp(gamename, drivers[matchindex]->name) == 0) ? "-> " : " ";
const game_driver *clone_of = driver_get_clone(drivers[matchindex]);
if (clone_of != NULL && (clone_of->flags & GAME_IS_BIOS_ROOT) == 0)
mame_printf_info("%s%-8s [%s]\n", matchstring, drivers[matchindex]->name, clone_of->name);
else

22
src/emu/cpu/esrip/esrip.c
View File

@ -62,7 +62,7 @@
***************************************************************************/
typedef struct
{
{
UINT16 ram[32];
UINT16 acc;
UINT16 d_latch;
@ -74,7 +74,7 @@ typedef struct
UINT8 immflag;
UINT8 ct;
UINT8 t;
/* Instruction latches - current and previous values */
UINT8 l1, pl1;
UINT8 l2, pl2;
@ -139,7 +139,7 @@ static STATE_POSTLOAD( esrip_postload )
//static void esrip_state_register(int index, const char *type)
//{
// state_save_register_item_pointer(type, index, cpustate->ipt_ram, IPT_RAM_SIZE / 2);
// state_save_register_item_pointer(type, index, cpustate->ipt_ram, IPT_RAM_SIZE / 2);
//}
@ -261,9 +261,9 @@ static CPU_INIT( esrip )
cpustate->draw = _config->draw;
cpustate->ipt_ram = auto_malloc(IPT_RAM_SIZE);
//state_save_register_global_pointer(cpustate->ipt_ram, IPT_RAM_SIZE / 2); // TODO
//state_save_register_global_pointer(cpustate->ipt_ram, IPT_RAM_SIZE / 2); // TODO
// esrip_state_register(index, "esrip");
// esrip_state_register(index, "esrip");
cpustate->device = device;
cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
@ -1667,7 +1667,7 @@ static CPU_EXECUTE( esrip )
am29116_execute(cpustate, (cpustate->l7 << 8) | cpustate->l6, BIT(cpustate->l5, 2));
y_bus = cpustate->result;
if (BIT(cpustate->l5, 0))
cpustate->d_latch = y_bus;
}
@ -1741,7 +1741,7 @@ static CPU_EXECUTE( esrip )
cpustate->l6 = (in_h >> 16);
cpustate->l7 = (in_h >> 24);
// if (RISING_EDGE(cpustate->pl7, cpustate->l2, 7))
// if (RISING_EDGE(cpustate->pl7, cpustate->l2, 7))
/* Colour latch */
if (RISING_EDGE(cpustate->pl3, cpustate->l3, 0))
@ -1773,7 +1773,7 @@ static CPU_EXECUTE( esrip )
cpustate->y_scale = x_bus & 0xff;
/* Unknown */
// if (RISING_EDGE(cpustate->pl4, cpustate->l4, 7))
// if (RISING_EDGE(cpustate->pl4, cpustate->l4, 7))
/* Image ROM address */
if (RISING_EDGE(cpustate->pl3, cpustate->l3, 5))
@ -1821,7 +1821,7 @@ static CPU_EXECUTE( esrip )
static CPU_DISASSEMBLE( esrip )
{
#if 0
static const char* const jmp_types[] =
static const char* const jmp_types[] =
{
"JCT",
"JT1",
@ -1833,7 +1833,7 @@ static CPU_DISASSEMBLE( esrip )
"JMP",
};
static const char* const njmp_types[] =
static const char* const njmp_types[] =
{
"JNCT",
"JNT1",
@ -1967,7 +1967,7 @@ CPU_GET_INFO( esrip )
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright Philip J Bennett"); break;
case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c%c%c%c%c%c%c",
case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c%c%c%c%c%c%c",
cpustate->status & 0x80 ? '3' : '.',
cpustate->status & 0x40 ? '2' : '.',
cpustate->status & 0x20 ? '1' : '.',

2
src/emu/cpu/i860/i860.c
View File

@ -106,7 +106,7 @@ CPU_GET_INFO( i860 )
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "0.1"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Jason Eckhardt and Andrew Gardner"); break;
case CPUINFO_INT_PC: info->i = i860->pc; break;
case CPUINFO_INT_PREVIOUSPC: info->i = i860->ppc; break;
}

66
src/emu/cpu/i860/i860dasm.c
View File

@ -48,9 +48,9 @@ CPU_DISASSEMBLE( i860 )
/* Little Endian */
const UINT32 op = (oprom[3] << 24) | (oprom[2] << 16) | (oprom[1] << 8) | (oprom[0] << 0);
//const UINT32 op = (oprom[2] << 24) | (oprom[3] << 16) | (oprom[0] << 8) | (oprom[1] << 0); /* Mixed Endian */
//const UINT32 op = (oprom[0] << 24) | (oprom[1] << 16) | (oprom[2] << 8) | (oprom[3] << 0); /* Big Endian */
//const UINT32 op = (oprom[1] << 24) | (oprom[0] << 16) | (oprom[3] << 8) | (oprom[2] << 0); /* Mixed Endian */
//const UINT32 op = (oprom[2] << 24) | (oprom[3] << 16) | (oprom[0] << 8) | (oprom[1] << 0); /* Mixed Endian */
//const UINT32 op = (oprom[0] << 24) | (oprom[1] << 16) | (oprom[2] << 8) | (oprom[3] << 0); /* Big Endian */
//const UINT32 op = (oprom[1] << 24) | (oprom[0] << 16) | (oprom[3] << 8) | (oprom[2] << 0); /* Mixed Endian */
/* The opcode is the top 6 bits */
UINT8 opcode = (op >> 26) & 0x3f;
@ -61,53 +61,53 @@ CPU_DISASSEMBLE( i860 )
/* Main decode */
switch (opcode)
{
case 0x00:
case 0x00:
case 0x01:
case 0x04:
case 0x05: i860_dasm_ldx(op, tempB); break;
case 0x03:
case 0x07: i860_dasm_stx(op, tempB); break;
case 0x02: i860_dasm_ixfr(op, tempB); break;
case 0x06: sprintf(tempB, "(reserved)"); break;
case 0x08:
case 0x09:
case 0x0a:
case 0x0b: i860_dasm_fid_fst(op, tempB); break;
case 0x0d: i860_dasm_flush(op, tempB); break;
case 0x0f: i860_dasm_pstd(op, tempB); break;
case 0x0c:
case 0x0e: i860_dasm_ldc_sdc(op, tempB); break;
case 0x10: i860_dasm_bri(op, tempB); break;
case 0x11: i860_dasm_trap(op, tempB); break;
case 0x12: i860_dasm_floating_point_dasm(op, tempB); break; /* Floating point operation sub-group */
case 0x13: i860_dasm_core_dasm(op, tempB); break; /* Core operation sub-group */
case 0x14:
case 0x15:
case 0x16:
case 0x17: i860_dasm_bte_btne(op, tempB); break;
case 0x18:
case 0x19: i860_dasm_pfidy(op, tempB); break;
case 0x1a:
case 0x1b:
case 0x1c:
case 0x1d:
case 0x1e:
case 0x1f: i860_dasm_CTRL_dasm(op, tempB); break; /* CTRL operation sub-group */
case 0x20:
case 0x21:
case 0x22:
@ -116,39 +116,39 @@ CPU_DISASSEMBLE( i860 )
case 0x25:
case 0x26:
case 0x27: i860_dasm_addu_subu(op, tempB); break;
case 0x28:
case 0x29:
case 0x2a:
case 0x2b: i860_dasm_shl_shr(op, tempB); break;
case 0x2c: i860_dasm_shrd(op, tempB); break;
case 0x2d: i860_dasm_bla(op, tempB); break;
case 0x2e:
case 0x2f: i860_dasm_shra(op, tempB); break;
case 0x30:
case 0x31:
case 0x32:
case 0x33: i860_dasm_and_andh(op, tempB); break;
case 0x34:
case 0x35:
case 0x36:
case 0x37: i860_dasm_andnot_andnoth(op, tempB); break;
case 0x38:
case 0x39:
case 0x3a:
case 0x3b: i860_dasm_or_orh(op, tempB); break;
case 0x3c:
case 0x3d:
case 0x3e:
case 0x3f: i860_dasm_xor_xorh(op, tempB); break;
default: sprintf(tempB, "(reserved)"); break;
}
@ -228,11 +228,11 @@ static void i860_dasm_stx(const UINT32 op, char* buffer)
static void i860_dasm_ixfr(const UINT32 op, char* buffer)
{
// UINT16 val = op & 0x7ff;
// UINT8 opc = (op >> 26) & 0x3f;
// UINT8 src2 = (op >> 21) & 0x1f;
// UINT8 dest = (op >> 16) & 0x1f;
// UINT8 src1 = (op >> 11) & 0x1f;
// UINT16 val = op & 0x7ff;
// UINT8 opc = (op >> 26) & 0x3f;
// UINT8 src2 = (op >> 21) & 0x1f;
// UINT8 dest = (op >> 16) & 0x1f;
// UINT8 src1 = (op >> 11) & 0x1f;
sprintf(buffer, "ixfr");
}

2
src/emu/cpu/m68000/m68000.h
View File

@ -55,7 +55,7 @@ enum
M68K_SFC, M68K_DFC, M68K_CACR, M68K_CAAR, M68K_PREF_ADDR, M68K_PREF_DATA,
M68K_D0, M68K_D1, M68K_D2, M68K_D3, M68K_D4, M68K_D5, M68K_D6, M68K_D7,
M68K_A0, M68K_A1, M68K_A2, M68K_A3, M68K_A4, M68K_A5, M68K_A6, M68K_A7,
M68K_GENPC = REG_GENPC,
M68K_GENSP = REG_GENSP,
M68K_GENPCBASE = REG_GENPCBASE

4
src/emu/cpu/m68000/m68kcpu.c
View File

@ -669,7 +669,7 @@ static CPU_IMPORT_STATE( m68k )
case M68K_SR:
m68ki_set_sr(m68k, m68k->iotemp);
break;
case M68K_ISP:
if (m68k->s_flag && !m68k->m_flag)
REG_SP = m68k->iotemp;
@ -707,7 +707,7 @@ static CPU_EXPORT_STATE( m68k )
case M68K_SR:
m68k->iotemp = m68ki_get_sr(m68k);
break;
case M68K_ISP:
m68k->iotemp = (m68k->s_flag && !m68k->m_flag) ? REG_SP : REG_ISP;
break;

2
src/emu/cpu/m68000/m68kcpu.h
View File

@ -591,7 +591,7 @@ struct _m68ki_cpu_core
m68k_memory_interface memory;
offs_t encrypted_start;
offs_t encrypted_end;
cpu_state_table state;
UINT32 iotemp;

108
src/emu/cpu/mcs48/mcs48.c
View File

@ -40,27 +40,27 @@ T0 output clock
****************************************************************************
UPI-41/42 chips are MCS-48 derived, with some opcode changes:
MCS-48 opcode UPI-41/42 opcode
------------- ----------------
02: OUTL BUS,A OUT DBB,A
08: INS BUS,A <illegal>
22: <illegal> IN DBB,A
75: ENT0 CLK <illegal>
80: MOVX A,@R0 <illegal>
81: MOVX A,@R1 <illegal>
86: JNI <dest> JOBF <dest>
88: ORL BUS,#n <illegal>
90: MOVX @R0,A MOV STS,A
91: MOVX @R1,A <illegal>
98: ANL BUS,#n <illegal>
D6: <illegal> JNIBF <dest>
E5: SEL MB0 EN DMA
F5: SEL MB1 EN FLAGS
UPI-41/42 chips are MCS-48 derived, with some opcode changes:
MCS-48 opcode UPI-41/42 opcode
------------- ----------------
02: OUTL BUS,A OUT DBB,A
08: INS BUS,A <illegal>
22: <illegal> IN DBB,A
75: ENT0 CLK <illegal>
80: MOVX A,@R0 <illegal>
81: MOVX A,@R1 <illegal>
86: JNI <dest> JOBF <dest>
88: ORL BUS,#n <illegal>
90: MOVX @R0,A MOV STS,A
91: MOVX @R1,A <illegal>
98: ANL BUS,#n <illegal>
D6: <illegal> JNIBF <dest>
E5: SEL MB0 EN DMA
F5: SEL MB1 EN FLAGS
Chip numbers are similar to the MCS-48 series:
Chip numbers are similar to the MCS-48 series:
Chip RAM ROM I/O
---- --- --- ---
8041 128 1k
@ -160,7 +160,7 @@ struct _mcs48_state
UINT8 feature_mask; /* processor feature flags */
UINT16 int_rom_size; /* internal rom size */
cpu_state_table state; /* state table */
UINT8 rtemp; /* temporary for import/export */
};
@ -195,7 +195,7 @@ static const cpu_state_entry state_array[] =
MCS48_STATE_ENTRY(P1, "%02X", p1, 0xff, 0)
MCS48_STATE_ENTRY(P2, "%02X", p2, 0xff, 0)
MCS48_STATE_ENTRY(R0, "%02X", rtemp, 0xff, CPUSTATE_IMPORT | CPUSTATE_EXPORT)
MCS48_STATE_ENTRY(R1, "%02X", rtemp, 0xff, CPUSTATE_IMPORT | CPUSTATE_EXPORT)
MCS48_STATE_ENTRY(R2, "%02X", rtemp, 0xff, CPUSTATE_IMPORT | CPUSTATE_EXPORT)
@ -332,7 +332,7 @@ INLINE void pull_pc_psw(mcs48_state *cpustate)
/*-------------------------------------------------
pull_pc - pull the PC value from the stack,
pull_pc - pull the PC value from the stack,
leaving the upper part of PSW intact
-------------------------------------------------*/
@ -437,7 +437,7 @@ INLINE UINT8 p2_mask(mcs48_state *cpustate)
/*-------------------------------------------------
expander_operation - perform an operation via
expander_operation - perform an operation via
the 8243 expander chip
-------------------------------------------------*/
@ -445,10 +445,10 @@ INLINE void expander_operation(mcs48_state *cpustate, UINT8 operation, UINT8 por
{
/* put opcode/data on low 4 bits of P2 */
port_w(2, cpustate->p2 = (cpustate->p2 & 0xf0) | (operation << 2) | (port & 3));
/* generate high-to-low transition on PROG line */
prog_w(0);
/* put data on low 4 bits of P2 */
if (operation != 0)
port_w(2, cpustate->p2 = (cpustate->p2 & 0xf0) | (cpustate->a & 0x0f));
@ -737,7 +737,7 @@ OPHANDLER( out_dbb_a )
/* copy to the DBBO and update the bit in STS */
cpustate->dbbo = cpustate->a;
cpustate->sts |= STS_OBF;
/* if P2 flags are enabled, update the state of P2 */
if (cpustate->flags_enabled && (cpustate->p2 & P2_OBF) == 0)
port_w(2, cpustate->p2 |= P2_OBF);
@ -824,37 +824,37 @@ SPLIT_OPHANDLER( split_f5, sel_mb1, en_flags )
static const mcs48_ophandler opcode_table[256]=
{
nop, illegal, split_02, add_a_n, jmp_0, en_i, illegal, dec_a, /* 00 */
split_08, in_a_p1, in_a_p2, illegal, movd_a_p4, movd_a_p5, movd_a_p6, movd_a_p7,
split_08, in_a_p1, in_a_p2, illegal, movd_a_p4, movd_a_p5, movd_a_p6, movd_a_p7,
inc_xr0, inc_xr1, jb_0, adc_a_n, call_0, dis_i, jtf, inc_a, /* 10 */
inc_r0, inc_r1, inc_r2, inc_r3, inc_r4, inc_r5, inc_r6, inc_r7,
inc_r0, inc_r1, inc_r2, inc_r3, inc_r4, inc_r5, inc_r6, inc_r7,
xch_a_xr0, xch_a_xr1, split_22, mov_a_n, jmp_1, en_tcnti, jnt_0, clr_a, /* 20 */
xch_a_r0, xch_a_r1, xch_a_r2, xch_a_r3, xch_a_r4, xch_a_r5, xch_a_r6, xch_a_r7,
xch_a_r0, xch_a_r1, xch_a_r2, xch_a_r3, xch_a_r4, xch_a_r5, xch_a_r6, xch_a_r7,
xchd_a_xr0, xchd_a_xr1, jb_1, illegal, call_1, dis_tcnti, jt_0, cpl_a, /* 30 */
illegal, outl_p1_a, outl_p2_a, illegal, movd_p4_a, movd_p5_a, movd_p6_a, movd_p7_a,
illegal, outl_p1_a, outl_p2_a, illegal, movd_p4_a, movd_p5_a, movd_p6_a, movd_p7_a,
orl_a_xr0, orl_a_xr1, mov_a_t, orl_a_n, jmp_2, strt_cnt, jnt_1, swap_a, /* 40 */
orl_a_r0, orl_a_r1, orl_a_r2, orl_a_r3, orl_a_r4, orl_a_r5, orl_a_r6, orl_a_r7,
orl_a_r0, orl_a_r1, orl_a_r2, orl_a_r3, orl_a_r4, orl_a_r5, orl_a_r6, orl_a_r7,
anl_a_xr0, anl_a_xr1, jb_2, anl_a_n, call_2, strt_t, jt_1, da_a, /* 50 */
anl_a_r0, anl_a_r1, anl_a_r2, anl_a_r3, anl_a_r4, anl_a_r5, anl_a_r6, anl_a_r7,
anl_a_r0, anl_a_r1, anl_a_r2, anl_a_r3, anl_a_r4, anl_a_r5, anl_a_r6, anl_a_r7,
add_a_xr0, add_a_xr1, mov_t_a, illegal, jmp_3, stop_tcnt, illegal, rrc_a, /* 60 */
add_a_r0, add_a_r1, add_a_r2, add_a_r3, add_a_r4, add_a_r5, add_a_r6, add_a_r7,
add_a_r0, add_a_r1, add_a_r2, add_a_r3, add_a_r4, add_a_r5, add_a_r6, add_a_r7,
adc_a_xr0, adc_a_xr1, jb_3, illegal, call_3, split_75, jf1, rr_a, /* 70 */
adc_a_r0, adc_a_r1, adc_a_r2, adc_a_r3, adc_a_r4, adc_a_r5, adc_a_r6, adc_a_r7,
adc_a_r0, adc_a_r1, adc_a_r2, adc_a_r3, adc_a_r4, adc_a_r5, adc_a_r6, adc_a_r7,
split_80, split_81, illegal, ret, jmp_4, clr_f0, split_86, illegal, /* 80 */
split_88, orl_p1_n, orl_p2_n, illegal, orld_p4_a, orld_p5_a, orld_p6_a, orld_p7_a,
split_88, orl_p1_n, orl_p2_n, illegal, orld_p4_a, orld_p5_a, orld_p6_a, orld_p7_a,
split_90, split_91, jb_4, retr, call_4, cpl_f0, jnz, clr_c, /* 90 */
split_98, anl_p1_n, anl_p2_n, illegal, anld_p4_a, anld_p5_a, anld_p6_a, anld_p7_a,
split_98, anl_p1_n, anl_p2_n, illegal, anld_p4_a, anld_p5_a, anld_p6_a, anld_p7_a,
mov_xr0_a, mov_xr1_a, illegal, movp_a_xa, jmp_5, clr_f1, illegal, cpl_c, /* A0 */
mov_r0_a, mov_r1_a, mov_r2_a, mov_r3_a, mov_r4_a, mov_r5_a, mov_r6_a, mov_r7_a,
mov_r0_a, mov_r1_a, mov_r2_a, mov_r3_a, mov_r4_a, mov_r5_a, mov_r6_a, mov_r7_a,
mov_xr0_n, mov_xr1_n, jb_5, jmpp_xa, call_5, cpl_f1, jf0, illegal, /* B0 */
mov_r0_n, mov_r1_n, mov_r2_n, mov_r3_n, mov_r4_n, mov_r5_n, mov_r6_n, mov_r7_n,
mov_r0_n, mov_r1_n, mov_r2_n, mov_r3_n, mov_r4_n, mov_r5_n, mov_r6_n, mov_r7_n,
illegal, illegal, illegal, illegal, jmp_6, sel_rb0, jz, mov_a_psw, /* C0 */
dec_r0, dec_r1, dec_r2, dec_r3, dec_r4, dec_r5, dec_r6, dec_r7,
dec_r0, dec_r1, dec_r2, dec_r3, dec_r4, dec_r5, dec_r6, dec_r7,
xrl_a_xr0, xrl_a_xr1, jb_6, xrl_a_n, call_6, sel_rb1, split_d6, mov_psw_a, /* D0 */
xrl_a_r0, xrl_a_r1, xrl_a_r2, xrl_a_r3, xrl_a_r4, xrl_a_r5, xrl_a_r6, xrl_a_r7,
xrl_a_r0, xrl_a_r1, xrl_a_r2, xrl_a_r3, xrl_a_r4, xrl_a_r5, xrl_a_r6, xrl_a_r7,
illegal, illegal, illegal, movp3_a_xa,jmp_7, split_e5, jnc, rl_a, /* E0 */
djnz_r0, djnz_r1, djnz_r2, djnz_r3, djnz_r4, djnz_r5, djnz_r6, djnz_r7,
djnz_r0, djnz_r1, djnz_r2, djnz_r3, djnz_r4, djnz_r5, djnz_r6, djnz_r7,
mov_a_xr0, mov_a_xr1, jb_7, illegal, call_7, split_f5, jc, rlc_a, /* F0 */
mov_a_r0, mov_a_r1, mov_a_r2, mov_a_r3, mov_a_r4, mov_a_r5, mov_a_r6, mov_a_r7
mov_a_r0, mov_a_r1, mov_a_r2, mov_a_r3, mov_a_r4, mov_a_r5, mov_a_r6, mov_a_r7
};
@ -926,7 +926,7 @@ static void mcs48_init(const device_config *device, cpu_irq_callback irqcallback
/*-------------------------------------------------
mcs48_norom_init - initialization for systems
mcs48_norom_init - initialization for systems
with no internal ROM
-------------------------------------------------*/
@ -937,7 +937,7 @@ static CPU_INIT( mcs48_norom )
/*-------------------------------------------------
mcs48_1k_rom_init - initialization for systems
mcs48_1k_rom_init - initialization for systems
with 1k of internal ROM
-------------------------------------------------*/
@ -948,7 +948,7 @@ static CPU_INIT( mcs48_1k_rom )
/*-------------------------------------------------
mcs48_2k_rom - initialization for systems
mcs48_2k_rom - initialization for systems
with 2k of internal ROM
-------------------------------------------------*/
@ -959,7 +959,7 @@ static CPU_INIT( mcs48_2k_rom )
/*-------------------------------------------------
mcs48_4k_rom - initialization for systems
mcs48_4k_rom - initialization for systems
with 2k of internal ROM
-------------------------------------------------*/
@ -970,7 +970,7 @@ static CPU_INIT( mcs48_4k_rom )
/*-------------------------------------------------
upi41_1k_rom_init - initialization for systems
upi41_1k_rom_init - initialization for systems
with 1k of internal ROM
-------------------------------------------------*/
@ -981,7 +981,7 @@ static CPU_INIT( upi41_1k_rom )
/*-------------------------------------------------
upi41_2k_rom_init - initialization for systems
upi41_2k_rom_init - initialization for systems
with 2k of internal ROM
-------------------------------------------------*/
@ -1136,7 +1136,7 @@ static CPU_EXECUTE( mcs48 )
do
{
unsigned opcode;
/* fetch next opcode */
cpustate->prevpc = cpustate->pc;
debugger_instruction_hook(device, cpustate->pc);
@ -1169,7 +1169,7 @@ static CPU_EXECUTE( mcs48 )
UINT8 upi41_master_r(const device_config *device, UINT8 a0)
{
mcs48_state *cpustate = device->token;
/* if just reading the status, return it */
if ((a0 & 1) != 0)
return cpustate->sts;
@ -1196,10 +1196,10 @@ static TIMER_CALLBACK( master_callback )
mcs48_state *cpustate = device->token;
UINT8 a0 = (param >> 8) & 1;
UINT8 data = param;
/* data always goes to the input buffer */
cpustate->dbbi = data;
/* set the appropriate flags */
if ((cpustate->sts & STS_IBF) == 0)
{
@ -1207,7 +1207,7 @@ static TIMER_CALLBACK( master_callback )
if (cpustate->flags_enabled)
port_w(2, cpustate->p2 &= ~P2_NIBF);
}
/* set F1 accordingly */
if (a0 == 0)
cpustate->sts &= ~STS_F1;

2
src/emu/cpu/mcs48/mcs48.h
View File

@ -44,7 +44,7 @@ enum
MCS48_STS, /* UPI-41 systems only */
MCS48_DBBO, /* UPI-41 systems only */
MCS48_DBBI, /* UPI-41 systems only */
MCS48_GENPC = REG_GENPC,
MCS48_GENSP = REG_GENSP,
MCS48_GENPCBASE = REG_GENPCBASE

4
src/emu/cpu/mcs48/mcs48dsm.c
View File

@ -14,7 +14,7 @@ static UINT32 common_dasm(const device_config *device, char *buffer, offs_t pc,
{
const UINT8 *startram = opram;
UINT32 flags = 0;
opram++;
switch (*oprom++)
{
@ -293,7 +293,7 @@ static UINT32 common_dasm(const device_config *device, char *buffer, offs_t pc,
case 0xfe: sprintf(buffer, "mov a,r6"); break;
case 0xff: sprintf(buffer, "mov a,r7"); break;
}
return (opram - startram) | flags | DASMFLAG_SUPPORTED;
}

2
src/emu/cpu/powerpc/ppcfe.c
View File

@ -1191,7 +1191,7 @@ static int describe_instruction_1f(powerpc_state *ppc, UINT32 op, opcode_desc *d
if (op & MSR_EE)
desc->flags |= OPFLAG_CAN_EXPOSE_EXTERNAL_INT;
return TRUE;
case 0x254: /* ESA */
case 0x274: /* DSA */
if (!is_602_class(ppc))

16
src/emu/cpuexec.c
View File

@ -256,18 +256,18 @@ void cpuexec_timeslice(running_machine *machine)
timer_execution_state *timerexec = timer_get_execution_state(machine);
cpuexec_private *global = machine->cpuexec_data;
int ran;
/* build the execution list if we don't have one yet */
if (global->executelist == NULL)
rebuild_execute_list(machine);
/* loop until we hit the next timer */
while (ATTOTIME_LT(timerexec->basetime, timerexec->nextfire))
{
cpu_class_data *classdata;
UINT32 suspendchanged;
attotime target;
/* by default, assume our target is the end of the next quantum */
target.seconds = timerexec->basetime.seconds;
target.attoseconds = timerexec->basetime.attoseconds + timerexec->curquantum;
@ -290,7 +290,7 @@ void cpuexec_timeslice(running_machine *machine)
classdata->nextsuspend &= ~SUSPEND_REASON_TIMESLICE;
classdata->eatcycles = classdata->nexteatcycles;
}
/* recompute the execute list if any CPUs changed their suspension state */
if (suspendchanged != 0)
rebuild_execute_list(machine);
@ -302,7 +302,7 @@ void cpuexec_timeslice(running_machine *machine)
if (target.seconds >= classdata->localtime.seconds)
{
attoseconds_t delta, actualdelta;
/* compute how many attoseconds to execute this CPU */
delta = target.attoseconds - classdata->localtime.attoseconds;
if (delta < 0 && target.seconds > classdata->localtime.seconds)
@ -340,10 +340,10 @@ void cpuexec_timeslice(running_machine *machine)
ran -= classdata->cycles_stolen;
profiler_mark(PROFILER_END);
}
/* account for these cycles */
classdata->totalcycles += ran;
/* update the local time for this CPU */
actualdelta = classdata->attoseconds_per_cycle * ran;
classdata->localtime.attoseconds += actualdelta;
@ -355,7 +355,7 @@ void cpuexec_timeslice(running_machine *machine)
{
assert(attotime_compare(classdata->localtime, target) < 0);
target = classdata->localtime;
/* however, if this puts us before the base, clamp to the base as a minimum */
if (ATTOTIME_LT(target, timerexec->basetime))
{

4
src/emu/debug/debugcpu.c
View File

@ -382,7 +382,7 @@ int debug_cpu_translate(const address_space *space, int intention, offs_t *addre
/*-------------------------------------------------
debug_cpu_disassemble - disassemble a line at
debug_cpu_disassemble - disassemble a line at
a given PC on a given CPU
-------------------------------------------------*/
@ -441,7 +441,7 @@ offs_t debug_cpu_disassemble(const device_config *device, char *buffer, offs_t p
/*-------------------------------------------------
debug_cpu_set_dasm_override - set an override
debug_cpu_set_dasm_override - set an override
handler for disassembly
-------------------------------------------------*/

14
src/emu/machine/i8243.c
View File

@ -83,7 +83,7 @@ WRITE8_DEVICE_HANDLER( i8243_prog_w )
{
i8243_state *i8243 = get_safe_token(device);
i8243_config *config = get_safe_config(device);
/* only care about low bit */
data &= 1;
@ -91,7 +91,7 @@ WRITE8_DEVICE_HANDLER( i8243_prog_w )
if (i8243->prog && !data)
{
i8243->opcode = i8243->p2;
/* if this is a read opcode, copy result to p2out */
if ((i8243->opcode >> 2) == MCS48_EXPANDER_OP_READ)
{
@ -100,7 +100,7 @@ WRITE8_DEVICE_HANDLER( i8243_prog_w )
i8243->p2out = i8243->p[i8243->opcode & 3] & 0x0f;
}
}
/* on low->high transition state, act on opcode */
else if (!i8243->prog && data)
{
@ -111,13 +111,13 @@ WRITE8_DEVICE_HANDLER( i8243_prog_w )
if (config->writehandler != NULL)
(*config->writehandler)(device, i8243->opcode & 3, i8243->p[i8243->opcode & 3]);
break;
case MCS48_EXPANDER_OP_OR:
i8243->p[i8243->opcode & 3] |= i8243->p2 & 0x0f;
if (config->writehandler != NULL)
(*config->writehandler)(device, i8243->opcode & 3, i8243->p[i8243->opcode & 3]);
break;
case MCS48_EXPANDER_OP_AND:
i8243->p[i8243->opcode & 3] &= i8243->p2 & 0x0f;
if (config->writehandler != NULL)
@ -125,7 +125,7 @@ WRITE8_DEVICE_HANDLER( i8243_prog_w )
break;
}
}
/* remember the state */
i8243->prog = data;
}
@ -153,7 +153,7 @@ static DEVICE_START( i8243 )
static DEVICE_RESET( i8243 )
{
i8243_state *i8243 = get_safe_token(device);
i8243->p2 = 0x0f;
i8243->p2out = 0x0f;
i8243->prog = 1;

4
src/emu/machine/ldcore.c
View File

@ -1287,7 +1287,7 @@ static void init_disc(const device_config *device)
laserdisc_state *ld = get_safe_token(device);
ldcore_data *ldcore = ld->core;
chd_error err;
/* get a handle to the disc to play */
if (config->getdisc != NULL)
ldcore->disc = (*config->getdisc)(device);
@ -1456,7 +1456,7 @@ static DEVICE_START( laserdisc )
assert(ld->screen != NULL);
if (!ld->screen->started)
return DEVICE_START_MISSING_DEPENDENCY;
/* save a copy of the device pointer */
ld->device = device;

24
src/emu/profiler.c
View File

@ -41,7 +41,7 @@ profiler_state global_profiler;
***************************************************************************/
/*-------------------------------------------------
_profiler_mark - mark the beginning/end of a
_profiler_mark - mark the beginning/end of a
profiler entry
-------------------------------------------------*/
@ -70,21 +70,21 @@ void _profiler_mark(int type)
profiler_filo_entry *preventry = entry - 1;
data->duration[preventry->type] += curticks - preventry->start;
}
/* fill in this entry */
entry->type = type;
entry->start = curticks;
}
/* if we're ending an existing bucket, update the time */
else if (global_profiler.filoindex > 0)
{
int index = --global_profiler.filoindex;
profiler_filo_entry *entry = &global_profiler.filo[index];
/* account for the time taken */
data->duration[entry->type] += curticks - entry->start;
/* if we have a previous entry, restart his time now */
if (index != 0)
{
@ -96,7 +96,7 @@ void _profiler_mark(int type)
/*-------------------------------------------------
_profiler_get_text - return the current text
_profiler_get_text - return the current text
in an astring
-------------------------------------------------*/
@ -130,13 +130,13 @@ astring *_profiler_get_text(running_machine *machine, astring *string)
int curtype, curmem, switches;
profiler_mark(PROFILER_PROFILER);
/* compute the total time for all bits, not including profiler or idle */
computed = 0;
for (curtype = 0; curtype < PROFILER_PROFILER; curtype++)
for (curmem = 0; curmem < ARRAY_LENGTH(global_profiler.data); curmem++)
computed += global_profiler.data[curmem].duration[curtype];
/* save that result in normalize, and continue adding the rest */
normalize = computed;
for ( ; curtype < PROFILER_TOTAL; curtype++)
@ -161,14 +161,14 @@ astring *_profiler_get_text(running_machine *machine, astring *string)
if (global_profiler.dataready && computed != 0)
{
int nameindex;
/* start with the un-normalized percentage */
astring_catprintf(string, "%02d%% ", (int)((computed * 100 + total/2) / total));
/* followed by the normalized percentage for everything but profiler and idle */
if (curtype < PROFILER_PROFILER)
astring_catprintf(string, "%02d%% ", (int)((computed * 100 + normalize/2) / normalize));
/* and then the text */
if (curtype >= PROFILER_CPU_FIRST && curtype <= PROFILER_CPU_MAX)
astring_catprintf(string, "CPU '%s'", device_list_find_by_index(machine->config->devicelist, CPU, curtype - PROFILER_CPU_FIRST)->tag);
@ -179,7 +179,7 @@ astring *_profiler_get_text(running_machine *machine, astring *string)
astring_catc(string, names[nameindex].string);
break;
}
/* followed by a carriage return */
astring_catc(string, "\n");
}

12
src/emu/profiler.h
View File

@ -9,14 +9,14 @@
****************************************************************************
To start profiling a certain section, e.g. video:
profiler_mark(PROFILER_VIDEO);
To start profiling a certain section, e.g. video:
profiler_mark(PROFILER_VIDEO);
to end profiling the current section:
profiler_mark(PROFILER_END);
to end profiling the current section:
profiler_mark(PROFILER_END);
the profiler handles a FILO list so calls may be nested.
the profiler handles a FILO list so calls may be nested.
***************************************************************************/
#pragma once

2
src/emu/restrack.c
View File

@ -277,7 +277,7 @@ bitmap_t *auto_bitmap_alloc_file_line(int width, int height, bitmap_format forma
/*-------------------------------------------------
validate_auto_malloc_memory - validate that a
block of memory has been allocated by
block of memory has been allocated by
auto_malloc()
-------------------------------------------------*/

16
src/emu/romload.c
View File

@ -278,7 +278,7 @@ astring *rom_region_name(astring *result, const game_driver *drv, const rom_sour
/*-------------------------------------------------
rom_file_size - return the expected size of a
rom_file_size - return the expected size of a
file given the ROM description
-------------------------------------------------*/
@ -300,7 +300,7 @@ UINT32 rom_file_size(const rom_entry *romp)
maxlength = MAX(maxlength, curlength);
}
while (ROMENTRY_ISRELOAD(romp));
return maxlength;
}
@ -338,9 +338,9 @@ static void determine_bios_rom(rom_load_data *romdata)
const rom_entry *rom;
int default_no = 1;
int bios_count = 0;
romdata->system_bios = 0;
/* first determine the default BIOS name */
for (rom = romdata->machine->gamedrv->rom; !ROMENTRY_ISEND(rom); rom++)
if (ROMENTRY_ISDEFAULT_BIOS(rom))
@ -837,7 +837,7 @@ static int read_rom_data(rom_load_data *romdata, const rom_entry *romp)
}
}
free(tempbuf);
LOG((" All done\n"));
return ROM_GETLENGTH(romp);
}
@ -1010,8 +1010,8 @@ chd_error open_disk_image(const game_driver *gamedrv, const rom_entry *romp, mam
/*-------------------------------------------------
open_disk_image_options - open a disk image,
searching up the parent and loading by
open_disk_image_options - open a disk image,
searching up the parent and loading by
checksum
-------------------------------------------------*/
@ -1338,7 +1338,7 @@ void rom_init(running_machine *machine)
memset(&romdata, 0, sizeof(romdata));
romdata.machine = machine;
romdata.errorstring = astring_alloc();
/* figure out which BIOS we are using */
determine_bios_rom(&romdata);

4
src/emu/timer.c
View File

@ -95,7 +95,7 @@ struct _timer_private
emu_timer * activelist; /* head of the active list */
emu_timer * freelist; /* head of the free list */
emu_timer * freelist_tail; /* tail of the free list */
/* execution state */
timer_execution_state exec; /* current global execution state */
@ -361,7 +361,7 @@ timer_execution_state *timer_get_execution_state(running_machine *machine)
/*-------------------------------------------------
timer_execute_timers - execute timers and
timer_execute_timers - execute timers and
update scheduling quanta
-------------------------------------------------*/

2
src/ldplayer/ldplayer.c
View File

@ -140,7 +140,7 @@ static chd_file *get_disc(const device_config *device)
/* if we failed, pop a message and exit */
if (image_file == NULL)
fatalerror("No valid image file found!\n");
return get_disk_handle("laserdisc");
}

2
src/mame/audio/gottlieb.c
View File

@ -593,7 +593,7 @@ MACHINE_DRIVER_START( gottlieb_soundrev2 )
MDRV_CPU_ADD("speech", M6502, SOUND2_CLOCK/4)
MDRV_CPU_PROGRAM_MAP(gottlieb_speech2_map,0)
/* sound hardware */
MDRV_SOUND_START( gottlieb2 )

6
src/mame/audio/segag80r.c
View File

@ -836,7 +836,7 @@ MACHINE_DRIVER_START( monsterb_sound_board )
/* basic machine hardware */
MDRV_CPU_ADD("audio", N7751, 6000000)
MDRV_CPU_IO_MAP(monsterb_7751_portmap,0)
MDRV_I8243_ADD("audio_8243", NULL, n7751_rom_control_w)
/* sound hardware */
@ -959,7 +959,7 @@ static WRITE8_DEVICE_HANDLER( n7751_rom_control_w )
case 2:
sound_addr = (sound_addr & ~0xf00) | ((data & 0x0f) << 8);
break;
case 3:
sound_addr &= 0xfff;
{
@ -993,7 +993,7 @@ static WRITE8_DEVICE_HANDLER( n7751_p2_w )
{
/* write to P2; low 4 bits go to 8243 */
i8243_p2_w(device, offset, data & 0x0f);
/* output of bit $80 indicates we are ready (1) or busy (0) */
/* no other outputs are used */
n7751_busy = data >> 7;

2
src/mame/audio/tx1.c
View File

@ -448,7 +448,7 @@ static STREAM_UPDATE( buggyboy_stream_update )
gain0 = BIT(ym2_outputb, 3) ? 1.0 : 2.0;
else
gain0 = BIT(ym1_outputa, 3) ? 1.0 : 2.0;
n1_en = BIT(ym2_outputb, 4);
n2_en = BIT(ym2_outputb, 5);

2
src/mame/drivers/2mindril.c
View File

@ -395,7 +395,7 @@ static INTERRUPT_GEN( drill_interrupt )
/* WRONG,it does something with 60000c & 700002,likely to be called when the player throws the ball.*/
static void irqhandler(running_machine *machine, int irq)
{
// cpu_set_input_line(machine->cpu[0],5,irq ? ASSERT_LINE : CLEAR_LINE);
// cpu_set_input_line(machine->cpu[0],5,irq ? ASSERT_LINE : CLEAR_LINE);
}
static const ym2610_interface ym2610_config =

8
src/mame/drivers/bingoc.c
View File

@ -84,13 +84,13 @@ static WRITE16_HANDLER( main_sound_latch_w )
static WRITE8_HANDLER( bingoc_play_w )
{
/*
---- --x- sound rom banking
---- ---x start-stop sample
*/
---- --x- sound rom banking
---- ---x start-stop sample
*/
UINT8 *upd = memory_region(space->machine, "upd");
memcpy(&upd[0x00000], &upd[0x20000 + (((data & 2)>>1) * 0x20000)], 0x20000);
upd7759_start_w(0, data & 1);
// printf("%02x\n",data);
// printf("%02x\n",data);
}
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )

6
src/mame/drivers/bishjan.c
View File

@ -257,7 +257,7 @@ static VIDEO_UPDATE( bishjan )
if (layers_ctrl & 1) tilemap_draw(bitmap,cliprect, tmap_1, 0, 0);
if (layers_ctrl & 2) tilemap_draw(bitmap,cliprect, tmap_2, 0, 0);
// popmessage("SCROLL: %03x,%03x - %03x,%03x DISABLE: %02x", bishjan_scroll_1_x,bishjan_scroll_1_y, bishjan_scroll_2_x,bishjan_scroll_2_y, bishjan_disable);
// popmessage("SCROLL: %03x,%03x - %03x,%03x DISABLE: %02x", bishjan_scroll_1_x,bishjan_scroll_1_y, bishjan_scroll_2_x,bishjan_scroll_2_y, bishjan_disable);
return 0;
}
@ -447,7 +447,7 @@ static WRITE8_HANDLER( saklove_outputs_w )
break;
}
// popmessage("0: %02x - 1: %02x - 2: %02x - 3: %02x", saklove_outputs[0], saklove_outputs[1], saklove_outputs[2], saklove_outputs[3]);
// popmessage("0: %02x - 1: %02x - 2: %02x - 3: %02x", saklove_outputs[0], saklove_outputs[1], saklove_outputs[2], saklove_outputs[3]);
}
static WRITE8_HANDLER( saklove_oki_bank_w )
@ -992,7 +992,7 @@ Notes:
HSync - 15.3234kHz
***************************************************************************/
ROM_START( saklove )
ROM_REGION( 0x20000, "main", 0 ) // AM188-EM
ROM_LOAD( "1.u23", 0x00000, 0x20000, CRC(02319bfb) SHA1(1a425dcdeecae92d8b7457d1897c700ac7856a9d) )

6
src/mame/drivers/btime.c
View File

@ -102,8 +102,8 @@ static MACHINE_START( btime )
static WRITE8_HANDLER( audio_nmi_enable_w )
{
/* for most games, this serves as the NMI enable for the audio CPU; however,
lnc and disco use bit 0 of the first AY-8910's port A instead; many other
games also write there in addition to this address */
lnc and disco use bit 0 of the first AY-8910's port A instead; many other
games also write there in addition to this address */
if (audio_nmi_enable_type == AUDIO_ENABLE_DIRECT)
{
audio_nmi_enabled = data & 1;
@ -1238,7 +1238,7 @@ static MACHINE_DRIVER_START( btime )
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_RAW_PARAMS(HCLK, 384, 8, 248, 272, 8, 248)
MDRV_MACHINE_START(btime)
MDRV_GFXDECODE(btime)

36
src/mame/drivers/cb2001.c
View File

@ -3,7 +3,7 @@
Cherry Bonus 2001 (c)2000/2001 Dyna
Produttore Dyna
Produttore Dyna
N.revisione
CPU
@ -46,37 +46,37 @@ In test mode (c) is 2000
const UINT8 cb2001_decryption_table[256] = {
0xe8,xxxx,xxxx,xxxx,xxxx,0x61,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, /* 00 */
// pppp ????
// pppp ????
xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, 0x32,xxxx,xxxx,xxxx,0x3a,xxxx,xxxx,0x1f, /* 10 */
// pppp pppp ????
// pppp pppp ????
xxxx,0x8e,xxxx,0x0f,xxxx,0x49,0xbc,xxxx, xxxx,xxxx,xxxx,0x75,xxxx,xxxx,xxxx,xxxx, /* 20 */
// !!!! ???? ???? ???? pppp
// !!!! ???? ???? ???? pppp
0x9d,xxxx,xxxx,xxxx,xxxx,xxxx,0xbe,xxxx, xxxx,xxxx,0x74,xxxx,xxxx,0xa6,0xbf,xxxx, /* 30 */
// ???? pppp ???? ???? ????
// ???? pppp ???? ???? ????
xxxx,0xea,xxxx,xxxx,xxxx,0xb0,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, /* 40 */
// !!!! gggg
// !!!! gggg
xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,0x42,xxxx, xxxx,xxxx,xxxx,xxxx,0xeb,xxxx,xxxx,xxxx, /* 50 */
// ???? ????
// ???? ????
xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, xxxx,0xa5,xxxx,xxxx,xxxx,xxxx,0xba,xxxx, /* 60 */
// ???? gggg
// ???? gggg
0xc3,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, 0x72,xxxx,0xf2,xxxx,xxxx,xxxx,xxxx,xxxx, /* 70 */
// pppp ???? ????
// pppp ???? ????
xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,0x34, xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, /* 80 */
// ????
// ????
xxxx,xxxx,0xe9,xxxx,xxxx,0xbe,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,0xb9,xxxx,xxxx,xxxx, /* 90 */
// ???? ???? pppp
// ???? ???? pppp
xxxx,xxxx,xxxx,0x06,0xaa,0x9c,xxxx,0xb8, xxxx,xxxx,0xfc,xxxx,xxxx,xxxx,xxxx,xxxx, /* A0 */
// ???? ???? ???? !!!! ????
// ???? ???? ???? !!!! ????
xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,0x1e,xxxx,0x07,0xcf, /* B0 */
// ???? ???? ????
// ???? ???? ????
xxxx,xxxx,0xee,xxxx,xxxx,0xe2,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,0xa4,xxxx, /* C0 */
// ???? pppp ????
// ???? pppp ????
xxxx,xxxx,0x46,xxxx,0x60,xxxx,xxxx,xxxx, 0x88,xxxx,xxxx,xxxx,xxxx,0xfa,0xc7,xxxx, /* D0 */
// pppp ???? pppp ???? !!!!
0x8a,xxxx,xxxx,0xc6,xxxx,xxxx,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, /* E0 */
// ???? !!!!
// ???? !!!!
xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, /* F0 */
//
//
};
/* robiza notes:
@ -99,7 +99,7 @@ c2 -> ee (out dw,al)
probably:
2b -> conditional jmp for sure (75)
36 -> be
36 -> be
9c -> it's a counter (like mov cw,#value) -> not sure the register (cw,bw,....) -> b9 (cw)
c5 -> 75 (loop?)
@ -150,7 +150,7 @@ INPUT_PORTS_END
static INTERRUPT_GEN( vblank_irq )
{
// cpu_set_input_line_and_vector(device,0,HOLD_LINE,0x08/4);
// cpu_set_input_line_and_vector(device,0,HOLD_LINE,0x08/4);
}
static const nec_config cb2001_config = { cb2001_decryption_table, };

18
src/mame/drivers/cchance.c
View File

@ -19,12 +19,12 @@ This one should be a simple project, it uses a Z80 and a Seta graphics chipset a
There are 3 banks of dipswitches, 4,8,8. Battery backup of a 4364 cpu ram. 2 6264 video rams. All 5 eproms are 27512
Chip checksum
cpu $ba0d
cha0 $2ed7
cha1 $dc81
cha2 $cca8
cha3 $10d8
Chip checksum
cpu $ba0d
cha0 $2ed7
cha1 $dc81
cha2 $cca8
cha3 $10d8
2 color proms for the output. will get those dumped as well.
@ -43,7 +43,7 @@ static WRITE8_HANDLER( output_0_w )
//---- --x- divider?
coin_lockout_w(0,~data & 1);
// coin_counter_w(0,~data & 1);
// coin_counter_w(0,~data & 1);
}
static UINT8 hop_io,bell_io;
@ -92,8 +92,8 @@ static INPUT_PORTS_START( cchance )
PORT_START("SP")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Opt 1") PORT_CODE(KEYCODE_A)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Opt 2") PORT_CODE(KEYCODE_S)
// PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Payout") PORT_CODE(KEYCODE_D)
// PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Hop Over") PORT_CODE(KEYCODE_F)
// PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Payout") PORT_CODE(KEYCODE_D)
// PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Hop Over") PORT_CODE(KEYCODE_F)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Slottle") PORT_CODE(KEYCODE_Z)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Drop SW") PORT_CODE(KEYCODE_H)
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Reset Key") PORT_CODE(KEYCODE_J)

2
src/mame/drivers/ddenlovr.c
View File

@ -7943,7 +7943,7 @@ Notes:
YM2413- clock 3.579545MHz [28.63636/8]
VSync - 60.8516Hz
HSync - 15.2782kHz
Hardware info by Guru
***************************************************************************/

4
src/mame/drivers/decocass.c
View File

@ -308,7 +308,7 @@ static const gfx_layout tilelayout =
static const UINT32 objlayout_xoffset[64] =
{
STEP8(7*8,1), STEP8(6*8,1), STEP8(5*8,1), STEP8(4*8,1),
STEP8(7*8,1), STEP8(6*8,1), STEP8(5*8,1), STEP8(4*8,1),
STEP8(3*8,1), STEP8(2*8,1), STEP8(1*8,1), STEP8(0*8,1)
};
@ -384,7 +384,7 @@ static MACHINE_DRIVER_START( decocass )
MDRV_MACHINE_START(decocass)
MDRV_MACHINE_RESET(decocass)
MDRV_DECOCASS_TAPE_ADD("cassette")
/* video hardware */

22
src/mame/drivers/dmndrby.c
View File

@ -100,18 +100,18 @@ static READ8_HANDLER( input_r )
static WRITE8_HANDLER( output_w )
{
/*
---- x--- refill meter [4]
---- x--- token out meter [5]
---- x--- token in meter [6]
---- x--- cash out meter [7]
---- -x-- coin out (meter) [0-3]
---- -x-- coin lockout token [4]
---- -x-- coin counter (meter) [5]
---- --x- coin lockout [0-3]
---- ---x lamp [0-6]
*/
---- x--- refill meter [4]
---- x--- token out meter [5]
---- x--- token in meter [6]
---- x--- cash out meter [7]
---- -x-- coin out (meter) [0-3]
---- -x-- coin lockout token [4]
---- -x-- coin counter (meter) [5]
---- --x- coin lockout [0-3]
---- ---x lamp [0-6]
*/
io_port[offset] = data;
// popmessage("%02x|%02x|%02x|%02x|%02x|%02x|%02x|%02x|",io_port[0],io_port[1],io_port[2],io_port[3],io_port[4],io_port[5],io_port[6],io_port[7]);
// popmessage("%02x|%02x|%02x|%02x|%02x|%02x|%02x|%02x|",io_port[0],io_port[1],io_port[2],io_port[3],io_port[4],io_port[5],io_port[6],io_port[7]);
}
static ADDRESS_MAP_START( memmap, ADDRESS_SPACE_PROGRAM, 8 )

4
src/mame/drivers/drw80pkr.c
View File

@ -54,8 +54,8 @@ static WRITE8_HANDLER( p2_w )
static WRITE8_HANDLER( prog_w )
{
/* this is written via an out to port 4, but unless there is an 8243 port expander,
it is more likely that the port 4 output is used to toggle the PROG line; see
videopkr */
it is more likely that the port 4 output is used to toggle the PROG line; see
videopkr */
prog = data;
}

12
src/mame/drivers/esripsys.c
View File

@ -597,9 +597,9 @@ static WRITE8_HANDLER( dac_w )
UINT16 dac_data = (dac_msb << 8) | data;
/*
The 8-bit DAC modulates the 10-bit DAC.
Shift down to prevent clipping.
*/
The 8-bit DAC modulates the 10-bit DAC.
Shift down to prevent clipping.
*/
dac_signed_data_16_w(0, (dac_vol * dac_data) >> 1);
}
}
@ -684,8 +684,8 @@ static DRIVER_INIT( esripsys )
memory_set_bankptr(machine, 4, &ROM[0x0000+0x8000]);
/* TODO: Finish me! */
// state_save_register_global_pointer(fdt_a, FDT_RAM_SIZE);
// state_save_register_global_pointer(fdt_b, FDT_RAM_SIZE);
// state_save_register_global_pointer(fdt_a, FDT_RAM_SIZE);
// state_save_register_global_pointer(fdt_b, FDT_RAM_SIZE);
}
static NVRAM_HANDLER( esripsys )
@ -987,6 +987,6 @@ ROM_END
* Game drivers
*
*************************************/
GAME( 1985, turbosub, 0, esripsys, turbosub, esripsys, ROT0, "Entertainment Sciences", "Turbo Sub (prototype rev. TSCA)", GAME_IMPERFECT_SOUND )
GAME( 1985, turbosba, turbosub, esripsys, turbosub, esripsys, ROT0, "Entertainment Sciences", "Turbo Sub (prototype rev. TSC6)", GAME_IMPERFECT_SOUND )

2
src/mame/drivers/galaga.c
View File

@ -3025,7 +3025,7 @@ ROM_END
* The letter "B" is silkscreened in the P12 corner (on right side of
the edge connector).
* Also, the three Z80's are located on the opposite side of the edge connector and
they are stacked in a column. (The Z80's are oriented vertically instead of
they are stacked in a column. (The Z80's are oriented vertically instead of
horizontal as the other chips are.)
* The 4th edition TM-203 and SP-203 manuals cover this board.
*/

2
src/mame/drivers/galdrvr.c
View File

@ -5045,7 +5045,7 @@ GAME( 1981, frogf, frogger, frogf, frogger, froggers, ROT90, "Falcon",
GAME( 1981, frogg, frogger, galaxian, frogg, frogg, ROT90, "bootleg", "Frog (Galaxian hardware)", GAME_SUPPORTS_SAVE )
/*
/*
Turtles based hardware
CPU/Video Board: KT-4108-2

4
src/mame/drivers/goldnpkr.c
View File

@ -584,8 +584,8 @@
- Added common MC6845 device interface.
- Merged witchcrd and sloco93 machine drivers.
- Added/corrected the 50/60 Hz. DIP switches to all games.
The 50hz mode needs to be corrected. Some games as most bsuerte sets have
the 50/60 Hz. DIP switch connection patched.
The 50hz mode needs to be corrected. Some games as most bsuerte sets have
the 50/60 Hz. DIP switch connection patched.
TODO:

22
src/mame/drivers/goldstar.c
View File

@ -161,19 +161,19 @@ static ADDRESS_MAP_START( ncb3_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xf820, 0xf823) AM_DEVREADWRITE(PPI8255, "ppi8255_2", ppi8255_r, ppi8255_w) /* Input/Output Ports */
AM_RANGE(0xf830, 0xf830) AM_READWRITE(ay8910_read_port_0_r,ay8910_write_port_0_w)
AM_RANGE(0xf840, 0xf840) AM_WRITE(ay8910_control_port_0_w)
// AM_RANGE(0xf850, 0xf850) AM_WRITE(ncb3_p1_flip_w) // need flip?
// AM_RANGE(0xf860, 0xf860) AM_WRITE(ncb3_p2_flip_w) // need flip?
// AM_RANGE(0xf850, 0xf850) AM_WRITE(ncb3_p1_flip_w) // need flip?
// AM_RANGE(0xf860, 0xf860) AM_WRITE(ncb3_p2_flip_w) // need flip?
AM_RANGE(0xf870, 0xf870) AM_WRITE(sn76496_0_w) /* guess... device is initialized, but doesn't seems to be used.*/
ADDRESS_MAP_END
static ADDRESS_MAP_START( ncb3_readwriteport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
// AM_RANGE(0x00, 0x00) AM_READ(ncb3_unkread_r) // read from 0x00 when controls set1 is used...
// AM_RANGE(0x02, 0x02) AM_READ(ncb3_unkread_r) // read from 0x02 when controls set2 is used...
// AM_RANGE(0x06, 0x06) AM_READ(ncb3_unkread_r) // unknown...
// AM_RANGE(0x08, 0x08) AM_READ(ncb3_unkread_r) // unknown...
// AM_RANGE(0x00, 0x00) AM_READ(ncb3_unkread_r) // read from 0x00 when controls set1 is used...
// AM_RANGE(0x02, 0x02) AM_READ(ncb3_unkread_r) // read from 0x02 when controls set2 is used...
// AM_RANGE(0x06, 0x06) AM_READ(ncb3_unkread_r) // unknown...
// AM_RANGE(0x08, 0x08) AM_READ(ncb3_unkread_r) // unknown...
AM_RANGE(0x10, 0x10) AM_READ_PORT("DSW5") /* confirmed for ncb3 */
// AM_RANGE(0x81, 0x81) ---> large writes.
// AM_RANGE(0x81, 0x81) ---> large writes.
ADDRESS_MAP_END
@ -3110,7 +3110,7 @@ static void do_blockswaps(UINT8* ROM)
0x0000, 0x4800, 0x2000, 0x5000,
0x1000, 0x7800, 0x6000, 0x3800,
/* bit below, I'm not sure, no exact match, but only the first ones matter,
as the is just garbage */
as the is just garbage */
0xc000, 0xc800, 0xd000, 0xd800,
0xe000, 0xe800, 0xf000, 0xf800,
0x8000, 0x8800, 0x9000, 0x9800,
@ -3237,7 +3237,7 @@ static DRIVER_INIT(cm)
UINT8 *ROM = memory_region(machine, "main");
/* forcing PPI mode 0 for all, and A, B & C as input.
the mixed modes 2-0 are not working properly.
the mixed modes 2-0 are not working properly.
*/
ROM[0x0021] = 0x9b;
ROM[0x0025] = 0x9b;
@ -3248,7 +3248,7 @@ static DRIVER_INIT(cmv4)
UINT8 *ROM = memory_region(machine, "main");
/* forcing PPI mode 0 for all, and A, B & C as input.
the mixed modes 2-0 are not working properly.
the mixed modes 2-0 are not working properly.
*/
ROM[0x0209] = 0x9b;
ROM[0x020d] = 0x9b;
@ -3259,7 +3259,7 @@ static DRIVER_INIT(cmast91)
UINT8 *ROM = memory_region(machine, "main");
/* forcing PPI mode 0 for all, and A, B & C as input.
the mixed modes 2-0 are not working properly.
the mixed modes 2-0 are not working properly.
*/
ROM[0x0070] = 0x9b;
ROM[0x0a92] = 0x9b;

60
src/mame/drivers/gstream.c
View File

@ -204,43 +204,43 @@ static WRITE32_HANDLER( gstream_oki_banking_w )
{
/* OKI BANKING (still far from perfect, based on game behaviour)
The two okis can indifferently play music or samples and are switched on the fly during game
This is a preliminary table of the banks:
The two okis can indifferently play music or samples and are switched on the fly during game
This is a preliminary table of the banks:
BANK MUSIC SAMPLES
0 X
1 X
2 X
3 X
4 X
5 X
6 X
7 X
BANK MUSIC SAMPLES
0 X
1 X
2 X
3 X
4 X
5 X
6 X
7 X
Two nibbles are used in this handler: (data & 0xf) and ((data >> 4) & 0xf)
The values for the first nibble are the followings and should map the 8 oki banks:
- 0x6, 0x7, 0x9, 0xa, 0xb, 0xd, 0xe, 0xf
The values for the second nibble are the followings and should probably be used too:
- 0x6, 0x9, 0xa
Two nibbles are used in this handler: (data & 0xf) and ((data >> 4) & 0xf)
The values for the first nibble are the followings and should map the 8 oki banks:
- 0x6, 0x7, 0x9, 0xa, 0xb, 0xd, 0xe, 0xf
The values for the second nibble are the followings and should probably be used too:
- 0x6, 0x9, 0xa
Same values are redudant, for example:
level 2: data = 0x99
level 6: data = 0x99
(this means same background music for the two levels - it could be correct, though)
Same values are redudant, for example:
level 2: data = 0x99
level 6: data = 0x99
(this means same background music for the two levels - it could be correct, though)
Also with current implementation, using only (data & 0xf), we have to force some values
manually, because the correspondent places in the table are already used
Also with current implementation, using only (data & 0xf), we have to force some values
manually, because the correspondent places in the table are already used
Musics order is completely guessed but close to what the original PCB game should be */
Musics order is completely guessed but close to what the original PCB game should be */
static const int bank_table_0[16] = { -1, -1, -1, -1, -1, -1, 0, 0, -1, 6, 0, 5, -1, 0, 0, 0 };
static const int bank_table_1[16] = { -1, -1, -1, -1, -1, -1, 2, 2, -1, 0, 0, 4, -1, 1, 1, 1 };
static int bank_0 = 0;
static int bank_1 = 0;
//popmessage("oki_0 banking value = %X\noki_1 banking value = %X\n",data & 0xf,(data >> 4) & 0xf);
bank_0 = bank_table_0[data & 0xf];
bank_1 = bank_table_1[data & 0xf]; // (data >> 4) & 0xf ??
@ -253,14 +253,14 @@ static WRITE32_HANDLER( gstream_oki_banking_w )
if (data == 0x9b)
{
bank_0 = 7; // level 7 music
bank_1 = 0; // level 7 samples
bank_0 = 7; // level 7 music
bank_1 = 0; // level 7 samples
}
if (data == 0x9f)
{
bank_0 = 0; // end sequence samples
bank_1 = 3; // end sequence music
bank_0 = 0; // end sequence samples
bank_1 = 3; // end sequence music
}
okim6295_set_bank_base(0, bank_0 * 0x40000);
@ -276,7 +276,7 @@ static ADDRESS_MAP_START( gstream_io, ADDRESS_SPACE_IO, 32 )
AM_RANGE(0x4000, 0x4003) AM_READ_PORT("IN0")
AM_RANGE(0x4010, 0x4013) AM_READ_PORT("IN1")
AM_RANGE(0x4020, 0x4023) AM_READ_PORT("IN2") // extra coin switches etc
AM_RANGE(0x4030, 0x4033) AM_WRITE(gstream_oki_banking_w) // oki banking
AM_RANGE(0x4030, 0x4033) AM_WRITE(gstream_oki_banking_w) // oki banking
AM_RANGE(0x4040, 0x4043) AM_WRITE(gstream_oki_4040_w) // ??
AM_RANGE(0x4050, 0x4053) AM_READWRITE(gstream_oki_1_r, gstream_oki_1_w) // music and samples
AM_RANGE(0x4060, 0x4063) AM_READWRITE(gstream_oki_0_r, gstream_oki_0_w) // music and samples

4
src/mame/drivers/jack.c
View File

@ -1307,12 +1307,12 @@ ROM_START( striv )
ROM_REGION( 0x10000, "audio", 0 )
ROM_LOAD( "snd.5a", 0x0000, 0x1000, CRC(b7ddf84f) SHA1(fa4cc0b2e5a88c82c62492c03e97ac6aa8a905b1) )
ROM_REGION( 0x4000, "gfx1", ROMREGION_DISPOSE )
ROM_REGION( 0x4000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "chr3.5a", 0x0000, 0x1000, CRC(8f982a9c) SHA1(dd6f454dfd3e03d008080890881cfafd79758a40) )
ROM_LOAD( "chr2.4a", 0x1000, 0x1000, CRC(8f982a9c) SHA1(dd6f454dfd3e03d008080890881cfafd79758a40) )
ROM_LOAD( "chr1.2a", 0x2000, 0x1000, CRC(7ad4358e) SHA1(dd3a03c78fa8bf435e9905b901dc5a9987cd52e4) )
ROM_LOAD( "chr0.1a", 0x3000, 0x1000, CRC(8f60229b) SHA1(96a888ae02797a205e1c6202395d3b42a820ad4d) )
ROM_REGION( 0x80000, "user1", ROMREGION_ERASEFF ) /* Question roms */
ROM_LOAD( "rom.u6", 0x00000, 0x8000, CRC(a32d7a28) SHA1(fbad0b5c9f1dbeb4f245a2198248c18ceae556fa) )
ROM_LOAD( "rom.u7", 0x08000, 0x8000, CRC(bc44ae18) SHA1(815cc3c87b89fc702a9ca88d5117ab46464b53c0) )

8
src/mame/drivers/jongkyo.c
View File

@ -63,7 +63,7 @@ static VIDEO_UPDATE(jongkyo)
// good mahjong tiles
data3 = 0x0f; // we're missing 2 bits.. there must be another piece of video ram somewhere or we can't use all the colours (6bpp).. banked somehow?
// good girl tiles
// data3 = 0x00; // we're missing 2 bits.. there must be another piece of video ram somewhere or we can't use all the colours (6bpp).. banked somehow?
// data3 = 0x00; // we're missing 2 bits.. there must be another piece of video ram somewhere or we can't use all the colours (6bpp).. banked somehow?
@ -107,7 +107,7 @@ static UINT8 mux_data;
static WRITE8_HANDLER( mux_w )
{
mux_data = ~data;
// printf("%02x\n",mux_data);
// printf("%02x\n",mux_data);
}
static WRITE8_HANDLER( jongkyo_coin_counter_w )
@ -133,7 +133,7 @@ static READ8_HANDLER( input_1p_r )
case 0x10: return input_port_read(space->machine, "PL1_5") | cr_clear;
case 0x20: return input_port_read(space->machine, "PL1_6") | cr_clear;
}
// printf("%04x\n",mux_data);
// printf("%04x\n",mux_data);
return (input_port_read(space->machine, "PL1_1") & input_port_read(space->machine, "PL1_2") & input_port_read(space->machine, "PL1_3") &
input_port_read(space->machine, "PL1_4") & input_port_read(space->machine, "PL1_5") & input_port_read(space->machine, "PL1_6")) | cr_clear;//input_port_read(space->machine, "PL1_0") && ;
@ -154,7 +154,7 @@ static READ8_HANDLER( input_2p_r )
case 0x10: return input_port_read(space->machine, "PL2_5") | coin_port;
case 0x20: return input_port_read(space->machine, "PL2_6") | coin_port;
}
// printf("%04x\n",mux_data);
// printf("%04x\n",mux_data);
return (input_port_read(space->machine, "PL2_1") & input_port_read(space->machine, "PL2_2") & input_port_read(space->machine, "PL2_3") &
input_port_read(space->machine, "PL2_4") & input_port_read(space->machine, "PL2_5") & input_port_read(space->machine, "PL2_6")) | coin_port;//input_port_read(space->machine, "PL1_0") && ;

42
src/mame/drivers/luckgrln.c
View File

@ -2,13 +2,13 @@
Lucky Girl (newer 1991 version on different hardware?)
-- there is an early 'Lucky Girl' which appears to be running on Nichibutsu like hardware.
The program rom extracted from the Z180 also refers to this as Lucky 74..
Lucky Girl
Wing 1991
@ -41,7 +41,7 @@
1x 06B30P 40-pin PDIP Unknown
1x 101810P 64-pin SDIP Unknown
1x HG62E11B10P 64-pin SDIP Hitachi gate array (custom)
1x CPU module 90-pin SDIP
1x CPU module 90-pin SDIP
Others
@ -69,19 +69,19 @@
Reset switch cuts power supply going to Video/Work RAM.
*/
#include "driver.h"
#include "cpu/z180/z180.h"
static ADDRESS_MAP_START( mainmap, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x00000, 0x03fff) AM_ROM
AM_RANGE(0x10000, 0x1ffff) AM_READ(SMH_BANK1)
AM_RANGE(0x0d800, 0x0dfff) AM_RAM
AM_RANGE(0x0f000, 0x0ffff) AM_RAM
AM_RANGE(0x0f000, 0x0ffff) AM_RAM
AM_RANGE(0xf0000, 0xfffff) AM_RAM
ADDRESS_MAP_END
@ -107,7 +107,7 @@ static const gfx_layout tiles8x8_layout =
};
static GFXDECODE_START( luckgrln )
GFXDECODE_ENTRY( "gfx1", 0, tiles8x8_layout, 0, 16 )
GFXDECODE_ENTRY( "gfx2", 0, tiles8x8_layout, 0, 16 )
GFXDECODE_ENTRY( "gfx2", 0, tiles8x8_layout, 0, 16 )
GFXDECODE_END
static VIDEO_START(luckgrln)
@ -121,11 +121,11 @@ static VIDEO_UPDATE(luckgrln)
}
static MACHINE_DRIVER_START( luckgrln )
MDRV_CPU_ADD("main", Z180,8000000)
MDRV_CPU_ADD("main", Z180,8000000)
MDRV_CPU_PROGRAM_MAP(mainmap,0)
MDRV_CPU_IO_MAP(portmap,0)
MDRV_CPU_IO_MAP(portmap,0)
MDRV_CPU_VBLANK_INT("main", irq0_line_hold)
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(60)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
@ -145,7 +145,7 @@ DRIVER_INIT( luckgrln )
int i;
UINT8 x,v;
UINT8* rom = memory_region(machine,"user1");
for (i=0;i<0x20000;i++)
{
x = rom[i];
@ -155,7 +155,7 @@ DRIVER_INIT( luckgrln )
x = (x << (i & 7)) | (x >> (8-(i & 7)));
rom[i] = x;
}
#if 0
{
FILE *fp;
@ -168,24 +168,24 @@ DRIVER_INIT( luckgrln )
fclose(fp);
}
}
#endif
#endif
// ??
memory_set_bankptr(machine, 1,&rom[0x010000]);
memory_set_bankptr(machine, 1,&rom[0x010000]);
}
ROM_START( luckgrln )
ROM_REGION( 0x4000, "main", 0 ) // internal Z180 rom
ROM_LOAD( "lucky74.bin", 0x00000, 0x4000, CRC(fa128e05) SHA1(97a9534b8414f984159271db48b153b0724d22f9) )
ROM_REGION( 0x20000, "user1", 0 ) // external data / cpu rom
ROM_LOAD( "falcon.13", 0x00000, 0x20000, CRC(f7a717fd) SHA1(49a39b84620876ee2faf73aaa405a1e17cab2da2) )
ROM_REGION( 0x60000, "gfx1", 0 )
ROM_LOAD( "eagle.1", 0x00000, 0x20000, CRC(37209082) SHA1(ffb30da5920886f37c6b97e03f5a8ec3b6265e68) )
ROM_LOAD( "eagle.2", 0x20000, 0x20000, CRC(bdb2d694) SHA1(3e58fe3f6b447181e3a85f0fc2a0c996231bc8e8) )
ROM_LOAD( "eagle.3", 0x40000, 0x20000, CRC(2c765389) SHA1(d5697c73cc939aa46f36c2dd87e90bba2536e347))
ROM_REGION( 0x60000, "gfx2", 0 ) // luckgrlns - 3bpp
ROM_LOAD( "falcon.4", 0x00000, 0x20000, CRC(369eaddf) SHA1(52387ea63e5c8fb0c27b796026152a06b68467af) )
ROM_LOAD( "falcon.5", 0x20000, 0x20000, CRC(c9ac1fe7) SHA1(fc027002754b90cc49ca74fac5240a99a194c0b3))

56
src/mame/drivers/magicard.c
View File

@ -30,7 +30,7 @@
1x 19.6608 MHz.
- PLDs: 1x PAL16L8ACN
1x PALCE18V8H-25
1x PALCE18V8H-25
*******************************************************************************
@ -136,7 +136,7 @@ static ADDRESS_MAP_START( magicard_mem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x020002, 0x020003) AM_READ(test_r)
AM_RANGE(0x040000, 0x05ffff) AM_RAM
AM_RANGE(0x060000, 0x07ffff) AM_RAM AM_BASE(&blit_ram)
// AM_RANGE(0x100000, 0x17ffff) AM_RAM AM_REGION("main", 0)
// AM_RANGE(0x100000, 0x17ffff) AM_RAM AM_REGION("main", 0)
AM_RANGE(0x180000, 0x1ffbff) AM_ROM AM_REGION("main", 0)
AM_RANGE(0x1ffc00, 0x1fffff) AM_RAM
AM_RANGE(0x260000, 0x27ffff) AM_RAM /*???*/
@ -160,27 +160,27 @@ MACHINE_RESET( magicard )
static PALETTE_INIT( magicard )
{
/* int bit0, bit1, bit2 , r, g, b;
int i;
/* int bit0, bit1, bit2 , r, g, b;
int i;
for (i = 0; i < 0x100; ++i)
{
bit0 = (color_prom[0] >> 0) & 0x01;
bit1 = (color_prom[0] >> 1) & 0x01;
bit2 = (color_prom[0] >> 2) & 0x01;
r = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
bit0 = (color_prom[0] >> 3) & 0x01;
bit1 = (color_prom[0] >> 4) & 0x01;
bit2 = (color_prom[0] >> 5) & 0x01;
g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
bit0 = 0;
bit1 = (color_prom[0] >> 6) & 0x01;
bit2 = (color_prom[0] >> 7) & 0x01;
b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
for (i = 0; i < 0x100; ++i)
{
bit0 = (color_prom[0] >> 0) & 0x01;
bit1 = (color_prom[0] >> 1) & 0x01;
bit2 = (color_prom[0] >> 2) & 0x01;
r = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
bit0 = (color_prom[0] >> 3) & 0x01;
bit1 = (color_prom[0] >> 4) & 0x01;
bit2 = (color_prom[0] >> 5) & 0x01;
g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
bit0 = 0;
bit1 = (color_prom[0] >> 6) & 0x01;
bit2 = (color_prom[0] >> 7) & 0x01;
b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
palette_set_color(machine, i, MAKE_RGB(r, g, b));
color_prom++;
}*/
palette_set_color(machine, i, MAKE_RGB(r, g, b));
color_prom++;
}*/
}
/*************************
@ -224,13 +224,13 @@ static const gfx_layout mca_tilelayout =
static GFXDECODE_START( magicard )
GFXDECODE_ENTRY( "main", 0x21562, mca_charlayout, 0, 32 )
GFXDECODE_ENTRY( "main", 0x16470, mca_tilelayout, 0, 32 )
// GFXDECODE_ENTRY( "main", 0x22efa, mca_tilelayout, 0, 32 )
// GFXDECODE_ENTRY( "main", 0x22efa, mca_tilelayout, 0, 32 )
GFXDECODE_END
static GFXDECODE_START( magicrda )
GFXDECODE_ENTRY( "main", 0x21562 + 0x792, mca_charlayout, 0, 32 )
GFXDECODE_ENTRY( "main", 0x16470, mca_tilelayout, 0, 32 )
// GFXDECODE_ENTRY( "main", 0x22efa, mca_tilelayout, 0, 32 )
// GFXDECODE_ENTRY( "main", 0x22efa, mca_tilelayout, 0, 32 )
GFXDECODE_END
@ -250,7 +250,7 @@ static INTERRUPT_GEN( magicard_irq )
static MACHINE_DRIVER_START( magicard )
MDRV_CPU_ADD("main", M68000, CLOCK_A/2) /* SCC-68070 CCA84 datasheet */
MDRV_CPU_PROGRAM_MAP(magicard_mem,0)
// MDRV_CPU_VBLANK_INT("main", magicard_irq) /* no interrupts? (it erases the vectors..) */
// MDRV_CPU_VBLANK_INT("main", magicard_irq) /* no interrupts? (it erases the vectors..) */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(60)
@ -287,8 +287,8 @@ ROM_START( magicard )
ROM_REGION( 0x80000, "main", 0 ) /* 68000 Code & GFX */
ROM_LOAD16_WORD_SWAP( "magicorg.bin", 0x000000, 0x80000, CRC(810edf9f) SHA1(0f1638a789a4be7413aa019b4e198353ba9c12d9) )
// ROM_REGION( 0x400, "boot_prg", 0 )
// ROM_COPY( "main", 0x00000, 0x00000, 0x400)
// ROM_REGION( 0x400, "boot_prg", 0 )
// ROM_COPY( "main", 0x00000, 0x00000, 0x400)
ROM_REGION( 0x0100, "proms", 0 ) /* Color PROM?? */
ROM_LOAD16_WORD_SWAP("mgorigee.bin", 0x0000, 0x0100, CRC(73522889) SHA1(3e10d6c1585c3a63cff717a0b950528d5373c781) )
@ -299,8 +299,8 @@ ROM_START( magicrda )
ROM_LOAD16_WORD_SWAP( "mcorigg2.bin", 0x00000, 0x20000, CRC(48546aa9) SHA1(23099a5e4c9f2c3386496f6d7f5bb7d435a6fb16) )
ROM_LOAD16_WORD_SWAP( "mcorigg1.bin", 0x20000, 0x20000, CRC(c9e4a38d) SHA1(812e5826b27c7ad98142a0f52fbdb6b61a2e31d7) )
// ROM_REGION( 0x400, "boot_prg", 0 )
// ROM_COPY( "main", 0x00000, 0x00000, 0x400)
// ROM_REGION( 0x400, "boot_prg", 0 )
// ROM_COPY( "main", 0x00000, 0x00000, 0x400)
ROM_REGION( 0x0100, "proms", 0 ) /* Color PROM?? */
ROM_LOAD("mgorigee.bin", 0x0000, 0x0100, CRC(73522889) SHA1(3e10d6c1585c3a63cff717a0b950528d5373c781) )

8
src/mame/drivers/mpoker.c
View File

@ -49,10 +49,10 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x8001, 0x8001) AM_READ(test_r)
AM_RANGE(0x8002, 0x8002) AM_READ_PORT("IN1")
AM_RANGE(0x8003, 0x8003) AM_READ_PORT("IN2")
// AM_RANGE(0x8004, 0x8004) AM_READ(test_r)
// AM_RANGE(0x8005, 0x8005) AM_READ(test_r)
// AM_RANGE(0x8006, 0x8006) AM_READ(test_r)
// AM_RANGE(0x8007, 0x8007) AM_READ(test_r)
// AM_RANGE(0x8004, 0x8004) AM_READ(test_r)
// AM_RANGE(0x8005, 0x8005) AM_READ(test_r)
// AM_RANGE(0x8006, 0x8006) AM_READ(test_r)
// AM_RANGE(0x8007, 0x8007) AM_READ(test_r)
ADDRESS_MAP_END
static INPUT_PORTS_START( mpoker )

6
src/mame/drivers/nbmj8688.c
View File

@ -354,7 +354,7 @@ static WRITE8_HANDLER( barline_output_w )
static ADDRESS_MAP_START( readport_barline, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
// AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
// AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
AM_RANGE(0x80, 0x80) AM_READ(ym3812_status_port_0_r)
AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
AM_RANGE(0xa0, 0xa0) AM_READ(nb1413m3_inputport1_r)
@ -374,7 +374,7 @@ static ADDRESS_MAP_START( writeport_barline, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
AM_RANGE(0xb0, 0xb0) AM_WRITE(barline_output_w)
AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj8688_clut_w)
// AM_RANGE(0xd0, 0xd0) AM_WRITE(DAC_0_WRITE) //not used
// AM_RANGE(0xd0, 0xd0) AM_WRITE(DAC_0_WRITE) //not used
AM_RANGE(0xe0, 0xe0) AM_WRITE(secolove_romsel_w)
AM_RANGE(0xf0, 0xf0) AM_WRITE(mjsikaku_scrolly_w)
ADDRESS_MAP_END
@ -3063,7 +3063,7 @@ static MACHINE_DRIVER_START( barline )
MDRV_IMPORT_FROM(mbmj_h12bit)
MDRV_CPU_MODIFY("main")
MDRV_CPU_IO_MAP(readport_barline, writeport_barline)
// MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 128) // nmiclock = 60
// MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 128) // nmiclock = 60
MDRV_SOUND_REPLACE("8910", YM3812, 20000000/8)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.70)

74
src/mame/drivers/nightgal.c
View File

@ -253,7 +253,7 @@ static UINT8 mux_data;
static WRITE8_HANDLER( mux_w )
{
mux_data = ~data;
// printf("%02x\n",mux_data);
// printf("%02x\n",mux_data);
}
static READ8_HANDLER( input_1p_r )
@ -271,7 +271,7 @@ static READ8_HANDLER( input_1p_r )
case 0x10: return input_port_read(space->machine, "PL1_5") | cr_clear;
case 0x20: return input_port_read(space->machine, "PL1_6") | cr_clear;
}
// printf("%04x\n",mux_data);
// printf("%04x\n",mux_data);
return (input_port_read(space->machine, "PL1_1") & input_port_read(space->machine, "PL1_2") & input_port_read(space->machine, "PL1_3") &
input_port_read(space->machine, "PL1_4") & input_port_read(space->machine, "PL1_5") & input_port_read(space->machine, "PL1_6")) | cr_clear;//input_port_read(space->machine, "PL1_0") && ;
@ -292,7 +292,7 @@ static READ8_HANDLER( input_2p_r )
case 0x10: return input_port_read(space->machine, "PL2_5") | coin_port;
case 0x20: return input_port_read(space->machine, "PL2_6") | coin_port;
}
// printf("%04x\n",mux_data);
// printf("%04x\n",mux_data);
return (input_port_read(space->machine, "PL2_1") & input_port_read(space->machine, "PL2_2") & input_port_read(space->machine, "PL2_3") &
input_port_read(space->machine, "PL2_4") & input_port_read(space->machine, "PL2_5") & input_port_read(space->machine, "PL2_6")) | coin_port;//input_port_read(space->machine, "PL1_0") && ;
@ -318,7 +318,7 @@ static ADDRESS_MAP_START( nightgal_io, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x01,0x01) AM_READ(ay8910_read_port_0_r) //ay read port
AM_RANGE(0x02,0x02) AM_WRITE(ay8910_write_port_0_w)
AM_RANGE(0x03,0x03) AM_WRITE(ay8910_control_port_0_w)
// AM_RANGE(0x10,0x10) AM_WRITE(output_w)
// AM_RANGE(0x10,0x10) AM_WRITE(output_w)
AM_RANGE(0x10,0x10) AM_READ_PORT("DSWC")
AM_RANGE(0x11,0x11) AM_READ_PORT("SYSA")
AM_RANGE(0x12,0x12) AM_READ_PORT("DSWA")
@ -338,7 +338,7 @@ static ADDRESS_MAP_START( nsc_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1100, 0x1100) AM_READWRITE(z80_latch_r,z80_latch_w) //irq control?
AM_RANGE(0x1200, 0x1200) AM_READNOP //flip screen set bit
AM_RANGE(0x1300, 0x130f) AM_READ(blit_vregs_r)
// AM_RANGE(0x1000, 0xdfff) AM_ROM AM_REGION("gfx1", 0 )
// AM_RANGE(0x1000, 0xdfff) AM_ROM AM_REGION("gfx1", 0 )
AM_RANGE(0xe000, 0xffff) AM_ROM AM_WRITENOP
ADDRESS_MAP_END
@ -618,8 +618,8 @@ MACHINE_DRIVER_END
static MACHINE_DRIVER_START( sexygal )
/* basic machine hardware */
MDRV_IMPORT_FROM( nightgal )
// MDRV_CPU_MODIFY("main")
// MDRV_CPU_VBLANK_INT("main", irq0_line_hold)
// MDRV_CPU_MODIFY("main")
// MDRV_CPU_VBLANK_INT("main", irq0_line_hold)
MACHINE_DRIVER_END
@ -632,23 +632,23 @@ CPU:Z80
SND:AY-3-8910
ETC:CUSTOM(The surface of the chip is scrached, so the name of the chip is unknown), MemoryBackup
NGAL_01.BIN graphic
NGAL_02.BIN graphic
NGAL_03.BIN graphic
NGAL_04.BIN graphic
NGAL_05.BIN graphic
NGAL_06.BIN graphic
NGAL_07.BIN graphic
NGAL_08.BIN graphic
NGAL_09.BIN program
NGAL_10.BIN program
NGAL_11.BIN program
NGAL_12.BIN program
NGAL_BP.BIN color
NGAL_01.BIN graphic
NGAL_02.BIN graphic
NGAL_03.BIN graphic
NGAL_04.BIN graphic
NGAL_05.BIN graphic
NGAL_06.BIN graphic
NGAL_07.BIN graphic
NGAL_08.BIN graphic
NGAL_09.BIN program
NGAL_10.BIN program
NGAL_11.BIN program
NGAL_12.BIN program
NGAL_BP.BIN color
Dumped by Gastroptosis. 2000/06/04
Dumped by Uki. 2000/06/11

?
*/
ROM_START( nightgal )
@ -748,14 +748,14 @@ Sexy Gal
XG-1B (main board)
SGP-A (sub board)
CPU: Z80-A
SOUND: YM2203C
DAC
OSC: 20.000MHz
10.000MHz
6.000MHz (sub board)
Chips: CPU? 40pin
CPU? 40pin (sub board)
CPU: Z80-A
SOUND: YM2203C
DAC
OSC: 20.000MHz
10.000MHz
6.000MHz (sub board)
Chips: CPU? 40pin
CPU? 40pin (sub board)
1.3A prg?
@ -841,15 +841,15 @@ ROM_END
Night Gal Summer (JPN Ver.)
(c)1985 Nihon Bussan
CPU: Z80
SOUND: AY-3-8910
DAC
OSC: 20.000MHz
6.000MHz (sub board)
CPU: Z80
SOUND: AY-3-8910
DAC
OSC: 20.000MHz
6.000MHz (sub board)
Chips: NG138507 (CPU?)
Unknown 40pin
Unknown 40pin
Chips: NG138507 (CPU?)
Unknown 40pin
Unknown 40pin
1S.IC7 prg./samples?

2
src/mame/drivers/progolf.c
View File

@ -47,7 +47,7 @@ Twenty four 8116 rams.
static ADDRESS_MAP_START( main_cpu, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_RAM
AM_RANGE(0x1000, 0x1fff) AM_RAM //AM_WRITE(deco_charram_w) AM_BASE(&deco_charram)
AM_RANGE(0x2000, 0x7fff) AM_RAM AM_BASE(&deco_charram) //AM_WRITE(deco_charram_w)
AM_RANGE(0x2000, 0x7fff) AM_RAM AM_BASE(&deco_charram) //AM_WRITE(deco_charram_w)
AM_RANGE(0x9000, 0x9000) AM_WRITENOP
AM_RANGE(0x9000, 0x9000) AM_READNOP
AM_RANGE(0x9200, 0x9200) AM_WRITENOP

18
src/mame/drivers/realbrk.c
View File

@ -1132,15 +1132,15 @@ The only ones with numbers are the EPROMs at 1A and 1B.
/*
This dump matches the already supported set, except for rom sizes:
1r 52201B.2R IDENTICAL
2r 52202B.1R IDENTICAL
nm52204.1b 52204.1B IDENTICAL
nm52205.1a 52205.1A IDENTICAL
2e [1/2] 52203.2E IDENTICAL
9a 52211.9A [1/2] IDENTICAL
9b 52210.9B [1/2] IDENTICAL
9d 52208.9D [1/2] IDENTICAL
9f 52206.9F [1/2] IDENTICAL
1r 52201B.2R IDENTICAL
2r 52202B.1R IDENTICAL
nm52204.1b 52204.1B IDENTICAL
nm52205.1a 52205.1A IDENTICAL
2e [1/2] 52203.2E IDENTICAL
9a 52211.9A [1/2] IDENTICAL
9b 52210.9B [1/2] IDENTICAL
9d 52208.9D [1/2] IDENTICAL
9f 52206.9F [1/2] IDENTICAL
*/
#if 0
ROM_START( dai2kaku_alt_rom_size )

2
src/mame/drivers/route16.c
View File

@ -891,7 +891,7 @@ Spacech2: 0x008b: im 1 ed 56
0x008d: nop 00
So... spacech2 is avoiding to enter the sub at $2929.
*/
ROM_START( spacech2 )
ROM_REGION( 0x10000, "cpu1", 0 )

2
src/mame/drivers/segas16a.c
View File

@ -1786,7 +1786,7 @@ static MACHINE_DRIVER_START( system16a )
MDRV_CPU_ADD("n7751", N7751, 6000000)
MDRV_CPU_IO_MAP(n7751_portmap,0)
MDRV_I8243_ADD("n7751_8243", NULL, n7751_rom_offset_w)
MDRV_MACHINE_RESET(system16a)

6
src/mame/drivers/statriv2.c
View File

@ -429,7 +429,7 @@ static ADDRESS_MAP_START( statusbj_io, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0xb0, 0xb0) AM_WRITE(ay8910_control_port_0_w)
AM_RANGE(0xb1, 0xb1) AM_READWRITE(ay8910_read_port_0_r,ay8910_write_port_0_w)
AM_RANGE(0xc0, 0xcf) AM_READWRITE(SMH_NOP, SMH_NOP) /* 9927 CRT controller? */
// AM_RANGE(0xce,0xce) AM_READ(test_r)
// AM_RANGE(0xce,0xce) AM_READ(test_r)
ADDRESS_MAP_END
/*some sort of "simple" protection? This is just a kludge for it,coin chuts doesn't work consistantly,
@ -446,7 +446,7 @@ static READ8_DEVICE_HANDLER( prot_r )
//static WRITE8_DEVICE_HANDLER( ppi_portc_hi_w );
//{
// popmessage("PPI port C out: %02X", data);
// popmessage("PPI port C out: %02X", data);
//}
@ -462,7 +462,7 @@ static const ppi8255_interface ppi8255_intf[1] =
DEVICE8_PORT("IN2"), /* Port C read (Lower Nibble as Input) */
NULL, /* Port A write */
NULL, /* Port B write */
NULL //ppi_portc_hi_w /* Port C write (High nibble as Output) */
NULL //ppi_portc_hi_w /* Port C write (High nibble as Output) */
}
};

2
src/mame/drivers/taitopjc.c
View File

@ -24,7 +24,7 @@
E63-01 PALCE16V8H
E63-02 PALCE22V10H
IC41 E63-06 PALCE16V8H
IC43 E63-07 PALCE16V8H

78
src/mame/drivers/taitotz.c
View File

@ -8,62 +8,62 @@ Landing High Japan PCB info
Taito Landing High
Top board
silkscreened TYPE-ZERO MOTHER PCB
Top board
silkscreened TYPE-ZERO MOTHER PCB
stickered 298100308
K11X0886A
JC101
stickered 298100308
K11X0886A
JC101
.5 29LV400BC-90 stamped E68-05-1
.6 29LV400BC-90 stamped E68-04-1
.24 PALV 18V8-10JC stamped E68-06
.5 29LV400BC-90 stamped E68-05-1
.6 29LV400BC-90 stamped E68-04-1
.24 PALV 18V8-10JC stamped E68-06
IC30 Taito TCG020AGP
IC26 IDT7024 S35J V9928P
IC10 IBM EMPPC603eBG-100
IC53 ADV7120KP30 9926 F101764.1
IC16,17 M54256V32A-10
IC15,25,31,39,45,49,44 48D4811650GF-A10-9BT
IC27,36 D4564163G5-A10n-9JF
IC 41,46,42,47 D4516161AG5-A10B-9F
IC43 QSV991-7JRI
IC30 Taito TCG020AGP
IC26 IDT7024 S35J V9928P
IC10 IBM EMPPC603eBG-100
IC53 ADV7120KP30 9926 F101764.1
IC16,17 M54256V32A-10
IC15,25,31,39,45,49,44 48D4811650GF-A10-9BT
IC27,36 D4564163G5-A10n-9JF
IC 41,46,42,47 D4516161AG5-A10B-9F
IC43 QSV991-7JRI
66.6667 Oscillator near IC43
Bottom board
silkscreened JC101 DAUGHTER PCB
silkscreened JC101 DAUGHTER PCB
stickered K91J0775A
LANDING H.JAPAN
stickered K91J0775A
LANDING H.JAPAN
299100308
299100308
M43J0741A
LANDING H.JAPAN
M43J0741A
LANDING H.JAPAN
.14 27c1001 stickered E82
03*
.14 27c1001 stickered E82
03*
.15 27c1001 stickered E82
04*
.15 27c1001 stickered E82
04*
.44 PALCE16V8H stamped E82-01
.44 PALCE16V8H stamped E82-01
.45 PALCE22V10H stamped E82-02
.45 PALCE22V10H stamped E82-02
IC40 Toshiba TMP95C063F
IC55 Panasonic MN89306
IC40 Toshiba TMP95C063F
IC55 Panasonic MN89306
EPSON 9X5C pscillator near IC55
IC56 HY57V161610D TC-10
IC22 ID7133 SA70J
IC56 HY57V161610D TC-10
IC22 ID7133 SA70J
25.000 oscillator near IC22
IC11 Xilinx XC9572
IC5 HY5118164C JC-60
IC10 ZOOM ZSG-2
IC20 ZOOM ZFX 2 HD 96NE2VJ
IC26 TM TECH UA4464V T224162B-28J
IC7 Panasonic MN1020819DA E68-01
IC11 Xilinx XC9572
IC5 HY5118164C JC-60
IC10 ZOOM ZSG-2
IC20 ZOOM ZFX 2 HD 96NE2VJ
IC26 TM TECH UA4464V T224162B-28J
IC7 Panasonic MN1020819DA E68-01
20.000 oscillator near IC7
*/

4
src/mame/drivers/thunderj.c
View File

@ -171,7 +171,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( extra_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x060000, 0x07ffff) AM_ROM
AM_RANGE(0x160000, 0x16ffff) AM_RAM AM_SHARE(1)
AM_RANGE(0x160000, 0x16ffff) AM_RAM AM_SHARE(1)
AM_RANGE(0x260000, 0x26000f) AM_READ_PORT("260000")
AM_RANGE(0x260010, 0x260011) AM_READ_PORT("260010")
AM_RANGE(0x260012, 0x260013) AM_READ(special_port2_r)
@ -279,7 +279,7 @@ static MACHINE_DRIVER_START( thunderj )
MDRV_MACHINE_RESET(thunderj)
MDRV_NVRAM_HANDLER(atarigen)
/* perfect synchronization due to shared RAM */
MDRV_QUANTUM_PERFECT_CPU("main")

4
src/mame/drivers/toaplan2.c
View File

@ -75,8 +75,8 @@ Supported games:
the original within days of its release!) and adds a "team" mode ala Batrider where you
select a different ship for each of your three lives.
dogyuunk - PCB says "TOAPLAN CO.,LTD. TP-022-1 MADE IN KOREA". It contains 3 custom Toaplan chips
(2 gfx chips and TS-002-MACH sound MCU). Uses original Toaplan-badged MASKROMs for GFX
dogyuunk - PCB says "TOAPLAN CO.,LTD. TP-022-1 MADE IN KOREA". It contains 3 custom Toaplan chips
(2 gfx chips and TS-002-MACH sound MCU). Uses original Toaplan-badged MASKROMs for GFX
and sound and original 'TP-022 01 TOAPLAN' sticker on program EPROM.

6
src/mame/drivers/tx1.c
View File

@ -16,7 +16,7 @@
* TX-1 tyre screech noises are not implemented yet.
* 'buggyboy' set is using ROMs from 'buggybjr' for testing purposes
until the original set can be dumped.
****************************************************************************
Buggy Boy Error Codes TX-1 Error Codes
@ -415,14 +415,14 @@ static WRITE8_DEVICE_HANDLER( tx1_coin_cnt_w )
{
coin_counter_w(0, data & 0x80);
coin_counter_w(1, data & 0x40);
// coin_counter_w(2, data & 0x40);
// coin_counter_w(2, data & 0x40);
}
static WRITE8_DEVICE_HANDLER( bb_coin_cnt_w )
{
coin_counter_w(0, data & 0x01);
coin_counter_w(1, data & 0x02);
// coin_counter_w(2, data & 0x04);
// coin_counter_w(2, data & 0x04);
}
static WRITE8_HANDLER( tx1_ppi_latch_w )

2
src/mame/drivers/vball.c
View File

@ -136,7 +136,7 @@ static TIMER_DEVICE_CALLBACK( vball_scanline )
/* Save the scroll x register value */
if (scanline < 256)
{
{
scrollx[255 - scanline] = (vb_scrollx_hi + vb_scrollx_lo+4);
}
}

36
src/mame/drivers/vcombat.c
View File

@ -1,8 +1,8 @@
/*
Virtual Combat hardware games.
Driver by Jason Eckhardt and Andrew Gardner.
Driver by Jason Eckhardt and Andrew Gardner.
----
There are two known games on this hardware. Both are developed by
@ -28,7 +28,7 @@ UPPER:
8-way DIP switch
574200D x4
PAL palce24v10 x2 (next to the i860)
Bt476 RAMDAC
Bt476 RAMDAC
LOWER:
Motorola MC68000P12 x2
@ -85,16 +85,16 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_ROM
AM_RANGE(0x200000, 0x2fffff) AM_RAM
AM_RANGE(0x300000, 0x3fffff) AM_RAM AM_BASE(&framebuffer) AM_SHARE(1)
AM_RANGE(0x400000, 0x43ffff) AM_RAM AM_BASE(&vid_0_shared_RAM) AM_SHARE(2) /* First i860 shared RAM */
// AM_RANGE(0x440000, 0x440003) i860 #1 com 1
// AM_RANGE(0x480000, 0x480003) i860 #1 com 2
// AM_RANGE(0x4c0000, 0x4c0003) i860 #1 stop/start/reset
// AM_RANGE(0x440000, 0x440003) i860 #1 com 1
// AM_RANGE(0x480000, 0x480003) i860 #1 com 2
// AM_RANGE(0x4c0000, 0x4c0003) i860 #1 stop/start/reset
AM_RANGE(0x500000, 0x53ffff) AM_RAM AM_BASE(&vid_1_shared_RAM) AM_SHARE(3) /* Second i860 shared RAM */
// AM_RANGE(0x540000, 0x540003) i860 #2 com 1
// AM_RANGE(0x580000, 0x580003) i860 #2 com 2
// AM_RANGE(0x5c0000, 0x5c0003) i860 #2 stop/start/reset
// AM_RANGE(0x540000, 0x540003) i860 #2 com 1
// AM_RANGE(0x580000, 0x580003) i860 #2 com 2
// AM_RANGE(0x5c0000, 0x5c0003) i860 #2 stop/start/reset
AM_RANGE(0x706000, 0x70601f) AM_READWRITE(tlc34076_lsb_r, tlc34076_lsb_w)
ADDRESS_MAP_END
@ -103,9 +103,9 @@ ADDRESS_MAP_END
/* The first i860 - middle board */
static ADDRESS_MAP_START( vid_0_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x00000000, 0x000fffff) AM_RAM AM_SHARE(1) /* Shared framebuffer */
// AM_RANGE(0x20000000, 0x20000003) com 1 (0x440000 in 68k-land)
// AM_RANGE(0x40000000, 0x401fffff) AM_ROM /* 3d data ROMs */
// AM_RANGE(0x80000000, 0x80000003) com 2 (0x480000 in 68k-land)
// AM_RANGE(0x20000000, 0x20000003) com 1 (0x440000 in 68k-land)
// AM_RANGE(0x40000000, 0x401fffff) AM_ROM /* 3d data ROMs */
// AM_RANGE(0x80000000, 0x80000003) com 2 (0x480000 in 68k-land)
AM_RANGE(0xfffc0000, 0xffffffff) AM_RAM AM_SHARE(2) /* Shared RAM with main */
ADDRESS_MAP_END
@ -113,16 +113,16 @@ ADDRESS_MAP_END
/* The second i860 - top board */
static ADDRESS_MAP_START( vid_1_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x00000000, 0x000fffff) AM_RAM AM_SHARE(1) /* Shared framebuffer */
// AM_RANGE(0x20000000, 0x20000003) com 1 (0x540000 in 68k-land)
// AM_RANGE(0x40000000, 0x401fffff) AM_ROM /* 3d data ROMs */
// AM_RANGE(0x80000000, 0x80000003) com 2 (0x580000 in 68k-land)
// AM_RANGE(0x20000000, 0x20000003) com 1 (0x540000 in 68k-land)
// AM_RANGE(0x40000000, 0x401fffff) AM_ROM /* 3d data ROMs */
// AM_RANGE(0x80000000, 0x80000003) com 2 (0x580000 in 68k-land)
AM_RANGE(0xfffc0000, 0xffffffff) AM_RAM AM_SHARE(3) /* Shared RAM with main */
ADDRESS_MAP_END
/* Sound CPU - temprarily disabled */
//static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 16 )
// AM_RANGE(0x000000, 0x03ffff) AM_ROM
// AM_RANGE(0x000000, 0x03ffff) AM_ROM
//ADDRESS_MAP_END

60
src/mame/machine/decocass.c
View File

@ -1218,7 +1218,7 @@ READ8_HANDLER( decocass_e5xx_r )
if (2 == (offset & E5XX_MASK))
{
UINT8 bot_eot = (tape_get_status_bits(cassette_device) >> 5) & 1;
data =
(BIT7(i8041_p1) << 0) | /* D0 = P17 - REQ/ */
(BIT0(i8041_p2) << 1) | /* D1 = P20 - FNO/ */
@ -1369,7 +1369,7 @@ static void decocass_reset_common(running_machine *machine)
memset(decocass_quadrature_decoder, 0, sizeof(decocass_quadrature_decoder));
decocass_sound_ack = 0;
audio_nmi_enabled = 0;
audio_nmi_state = 0;
}
@ -1666,7 +1666,7 @@ WRITE8_HANDLER( i8041_p1_w )
if ((data ^ i8041_p1) & 0x34)
{
int newspeed = 0;
if ((data & 0x30) == 0x20)
newspeed = (data & 0x04) ? -1 : -7;
else if ((data & 0x30) == 0x10)
@ -1871,7 +1871,7 @@ INLINE tape_state *get_safe_token(const device_config *device)
static UINT16 tape_crc16_byte(UINT16 crc, UINT8 data)
{
int bit;
for (bit = 0; bit < 8; bit++)
{
crc = (crc >> 1) | (crc << 15);
@ -1894,7 +1894,7 @@ static const char *tape_describe_state(tape_state *tape)
static char buffer[40];
char temprname[40];
const char *rname = temprname;
if (tape->region == REGION_LEADER)
rname = "LEAD";
else if (tape->region == REGION_LEADER_GAP)
@ -1916,7 +1916,7 @@ static const char *tape_describe_state(tape_state *tape)
char tempbname[40];
const char *bname = tempbname;
int clk;
if (tape->bytenum <= BYTE_PRE_GAP_33)
sprintf(tempbname, "PR%02d", tape->bytenum - BYTE_PRE_GAP_0);
else if (tape->bytenum == BYTE_LEADIN)
@ -1948,7 +1948,7 @@ static const char *tape_describe_state(tape_state *tape)
sprintf(temprname, "BL%02X.%4s.%d.%d", tape->region - REGION_DATA_BLOCK_0, bname, tape->bitnum, clk);
}
sprintf(buffer, "{%9d=%s}", tape->clockpos, rname);
return buffer;
}
@ -1963,7 +1963,7 @@ static TIMER_CALLBACK( tape_clock_callback )
{
const device_config *device = ptr;
tape_state *tape = get_safe_token(device);
/* advance by one clock in the desired direction */
if (tape->speed < 0 && tape->clockpos > 0)
tape->clockpos--;
@ -1979,7 +1979,7 @@ static TIMER_CALLBACK( tape_clock_callback )
tape->region = REGION_BOT;
else if (tape->clockpos < REGION_BOT_GAP_END_CLOCK)
tape->region = REGION_BOT_GAP;
/* look for states after the end of data */
else if (tape->clockpos >= tape->numclocks - REGION_LEADER_END_CLOCK)
tape->region = REGION_TRAILER;
@ -1989,24 +1989,24 @@ static TIMER_CALLBACK( tape_clock_callback )
tape->region = REGION_EOT;
else if (tape->clockpos >= tape->numclocks - REGION_BOT_GAP_END_CLOCK)
tape->region = REGION_EOT_GAP;
/* everything else is data */
else
{
UINT32 dataclock = tape->clockpos - REGION_BOT_GAP_END_CLOCK;
/* compute the block number */
tape->region = REGION_DATA_BLOCK_0 + dataclock / (TAPE_CLOCKS_PER_BYTE * BYTE_BLOCK_TOTAL);
dataclock -= (tape->region - REGION_DATA_BLOCK_0) * TAPE_CLOCKS_PER_BYTE * BYTE_BLOCK_TOTAL;
/* compute the byte within the block */
tape->bytenum = dataclock / TAPE_CLOCKS_PER_BYTE;
dataclock -= tape->bytenum * TAPE_CLOCKS_PER_BYTE;
/* compute the bit within the byte */
tape->bitnum = dataclock / TAPE_CLOCKS_PER_BIT;
}
/* log */
if (LOG_CASSETTE_STATE)
tape_describe_state(tape);
@ -2022,26 +2022,26 @@ static UINT8 tape_get_status_bits(const device_config *device)
{
tape_state *tape = get_safe_token(device);
UINT8 tape_bits = 0;
/* bit 0x20 is the BOT/EOT signal, which is also set in the leader/trailer area */
if (tape->region == REGION_LEADER || tape->region == REGION_BOT || tape->region == REGION_EOT || tape->region == REGION_TRAILER)
tape_bits |= 0x20;
/* bit 0x40 is the clock, which is only valid in some areas of the data block */
/* bit 0x80 is the data, which is only valid in some areas of the data block */
if (tape->region >= REGION_DATA_BLOCK_0 && tape->region <= REGION_DATA_BLOCK_255)
{
int blocknum = tape->region - REGION_DATA_BLOCK_0;
UINT8 byteval = 0x00;
/* in the main data area, the clock alternates at the clock rate */
if (tape->bytenum >= BYTE_LEADIN && tape->bytenum <= BYTE_LEADOUT)
tape_bits |= ((UINT32)(tape->clockpos - REGION_BOT_GAP_END_CLOCK) & 1) ? 0x00 : 0x40;
/* in the longclock area, the clock holds high */
else if (tape->bytenum == BYTE_LONGCLOCK)
tape_bits |= 0x40;
/* everywhere else, the clock holds to 0 */
else
;
@ -2049,19 +2049,19 @@ static UINT8 tape_get_status_bits(const device_config *device)
/* lead-in and lead-out bytes are 0xAA */
if (tape->bytenum == BYTE_HEADER || tape->bytenum == BYTE_TRAILER)
byteval = 0xaa;
/* data block bytes are data */
else if (tape->bytenum >= BYTE_DATA_0 && tape->bytenum <= BYTE_DATA_255)
byteval = device->region[blocknum * 256 + (tape->bytenum - BYTE_DATA_0)];
/* CRC MSB */
else if (tape->bytenum == BYTE_CRC16_MSB)
byteval = tape->crc16[blocknum] >> 8;
/* CRC LSB */
else if (tape->bytenum == BYTE_CRC16_LSB)
byteval = tape->crc16[blocknum];
/* select the appropriate bit from the byte and move to the upper bit */
if ((byteval >> tape->bitnum) & 1)
tape_bits |= 0x80;
@ -2091,11 +2091,11 @@ static void tape_change_speed(const device_config *device, INT8 newspeed)
tape_state *tape = get_safe_token(device);
attotime newperiod;
INT8 absnewspeed;
/* do nothing if speed has not changed */
if (tape->speed == newspeed)
return;
/* compute how fast to run the tape timer */
absnewspeed = (newspeed < 0) ? -newspeed : newspeed;
if (newspeed == 0)
@ -2103,7 +2103,7 @@ static void tape_change_speed(const device_config *device, INT8 newspeed)
else
newperiod = ATTOTIME_IN_HZ(TAPE_CLOCKRATE * absnewspeed);
/* set the new speed */
/* set the new speed */
timer_adjust_periodic(tape->timer, newperiod, 0, newperiod);
tape->speed = newspeed;
}
@ -2117,7 +2117,7 @@ static DEVICE_START( decocass_tape )
{
tape_state *tape = get_safe_token(device);
int curblock, offs, numblocks;
/* validate some basic stuff */
assert(device != NULL);
assert(device->static_config == NULL);
@ -2129,14 +2129,14 @@ static DEVICE_START( decocass_tape )
tape->timer = timer_alloc(device->machine, tape_clock_callback, (void *)device);
if (device->region == NULL)
return DEVICE_START_OK;
/* scan for the first non-empty block in the image */
for (offs = device->regionbytes - 1; offs >= 0; offs--)
if (device->region[offs] != 0)
break;
numblocks = ((offs | 0xff) + 1) / 256;
assert(numblocks < ARRAY_LENGTH(tape->crc16));
/* compute the total length */
tape->numclocks = REGION_BOT_GAP_END_CLOCK + numblocks * BYTE_BLOCK_TOTAL * 16 + REGION_BOT_GAP_END_CLOCK;
@ -2145,7 +2145,7 @@ static DEVICE_START( decocass_tape )
{
UINT16 crc = 0;
int testval;
/* first CRC the 256 bytes of data */
for (offs = 256 * curblock; offs < 256 * curblock + 256; offs++)
crc = tape_crc16_byte(crc, device->region[offs]);

2
src/mame/machine/segaic16.c
View File

@ -217,7 +217,7 @@ static void memory_mapper_w(const address_space *space, struct memory_mapper_chi
{
if ((chip->regs[offset] & 3) == 3)
fd1094_machine_init(space->machine->cpu[0]);
/* fd1094_machine_init calls device_reset on the CPU, so we must do this afterwards */
cpu_set_input_line(chip->cpu, INPUT_LINE_RESET, (chip->regs[offset] & 3) == 3 ? ASSERT_LINE : CLEAR_LINE);
}

2
src/mame/video/goodejan.c
View File

@ -30,7 +30,7 @@ static TILE_GET_INFO( goodejan_bg_tile_info )
// WRONG!
tile|= (goodejan_bgvram[tile_index]&0x8000)>>3;
// if ((goodejan_bgvram[tile_index]&0x8000)==0x0000) tile+=0x1000;
// if ((goodejan_bgvram[tile_index]&0x8000)==0x0000) tile+=0x1000;
SET_TILE_INFO(1, tile, color, 0);
}

2
src/mame/video/jack.c
View File

@ -43,7 +43,7 @@ static TILE_GET_INFO( get_bg_tile_info )
{
int code = videoram[tile_index] + ((colorram[tile_index] & 0x18) << 5);
int color = colorram[tile_index] & 0x07;
// striv: colorram[tile_index] & 0x80 ???
SET_TILE_INFO(0, code, color, 0);

2
src/mame/video/mrdo.c
View File

@ -171,7 +171,7 @@ VIDEO_START( mrdo )
tilemap_set_transparent_pen(bg_tilemap,0);
tilemap_set_transparent_pen(fg_tilemap,0);
tilemap_set_scrolldx(bg_tilemap, 0, 56);
tilemap_set_scrolldx(fg_tilemap, 0, 56);
tilemap_set_scrolldy(bg_tilemap, 0, 6);

4
src/mame/video/nmk16.c
View File

@ -545,7 +545,7 @@ VIDEO_UPDATE( macross )
VIDEO_UPDATE( tdragon )
{
// mcu_run(screen->machine, 1);
// mcu_run(screen->machine, 1);
tilemap_set_scrollx(tx_tilemap,0,-videoshift);
@ -562,7 +562,7 @@ VIDEO_UPDATE( tdragon )
VIDEO_UPDATE( hachamf )
{
// mcu_run(screen->machine, 0);
// mcu_run(screen->machine, 0);
tilemap_set_scrollx(tx_tilemap,0,-videoshift);

4
src/osd/windows/debugwin.c
View File

@ -393,13 +393,13 @@ void debugwin_init_windows(void)
{
int size = options_get_int(mame_options(), WINOPTION_DEBUGGER_FONT_SIZE);
TCHAR *t_face;
// create a standard font
t_face = tstring_from_utf8(options_get_string(mame_options(), WINOPTION_DEBUGGER_FONT));
debug_font = CreateFont(-MulDiv(size, GetDeviceCaps(temp_dc, LOGPIXELSY), 72), 0, 0, 0, FW_MEDIUM, FALSE, FALSE, FALSE,
ANSI_CHARSET, OUT_DEFAULT_PRECIS, CLIP_DEFAULT_PRECIS, DEFAULT_QUALITY, FF_DONTCARE, t_face);
free(t_face);
// fall back to Lucida Console 8
if (debug_font == NULL)
{

2
src/version.c
View File

@ -9,4 +9,4 @@
***************************************************************************/
const char build_version[] = "0.128u7 ("__DATE__")";
const char build_version[] = "0.129 ("__DATE__")";