mirror of
https://github.com/holub/mame
synced 2025-05-20 12:48:53 +03:00
Cleanups and version bump.
This commit is contained in:
Aaron Giles
parent
ed893fe35c
commit
835ace034d
@ -139,7 +139,7 @@ static STATE_POSTLOAD( esrip_postload )
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//static void esrip_state_register(int index, const char *type)
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//{
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// state_save_register_item_pointer(type, index, cpustate->ipt_ram, IPT_RAM_SIZE / 2);
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// state_save_register_item_pointer(type, index, cpustate->ipt_ram, IPT_RAM_SIZE / 2);
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//}
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@ -261,9 +261,9 @@ static CPU_INIT( esrip )
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cpustate->draw = _config->draw;
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cpustate->ipt_ram = auto_malloc(IPT_RAM_SIZE);
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//state_save_register_global_pointer(cpustate->ipt_ram, IPT_RAM_SIZE / 2); // TODO
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//state_save_register_global_pointer(cpustate->ipt_ram, IPT_RAM_SIZE / 2); // TODO
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// esrip_state_register(index, "esrip");
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// esrip_state_register(index, "esrip");
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cpustate->device = device;
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cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
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@ -1741,7 +1741,7 @@ static CPU_EXECUTE( esrip )
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cpustate->l6 = (in_h >> 16);
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cpustate->l7 = (in_h >> 24);
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// if (RISING_EDGE(cpustate->pl7, cpustate->l2, 7))
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// if (RISING_EDGE(cpustate->pl7, cpustate->l2, 7))
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/* Colour latch */
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if (RISING_EDGE(cpustate->pl3, cpustate->l3, 0))
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@ -1773,7 +1773,7 @@ static CPU_EXECUTE( esrip )
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cpustate->y_scale = x_bus & 0xff;
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/* Unknown */
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// if (RISING_EDGE(cpustate->pl4, cpustate->l4, 7))
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// if (RISING_EDGE(cpustate->pl4, cpustate->l4, 7))
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/* Image ROM address */
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if (RISING_EDGE(cpustate->pl3, cpustate->l3, 5))
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@ -48,9 +48,9 @@ CPU_DISASSEMBLE( i860 )
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/* Little Endian */
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const UINT32 op = (oprom[3] << 24) | (oprom[2] << 16) | (oprom[1] << 8) | (oprom[0] << 0);
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//const UINT32 op = (oprom[2] << 24) | (oprom[3] << 16) | (oprom[0] << 8) | (oprom[1] << 0); /* Mixed Endian */
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//const UINT32 op = (oprom[0] << 24) | (oprom[1] << 16) | (oprom[2] << 8) | (oprom[3] << 0); /* Big Endian */
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//const UINT32 op = (oprom[1] << 24) | (oprom[0] << 16) | (oprom[3] << 8) | (oprom[2] << 0); /* Mixed Endian */
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//const UINT32 op = (oprom[2] << 24) | (oprom[3] << 16) | (oprom[0] << 8) | (oprom[1] << 0); /* Mixed Endian */
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//const UINT32 op = (oprom[0] << 24) | (oprom[1] << 16) | (oprom[2] << 8) | (oprom[3] << 0); /* Big Endian */
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//const UINT32 op = (oprom[1] << 24) | (oprom[0] << 16) | (oprom[3] << 8) | (oprom[2] << 0); /* Mixed Endian */
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/* The opcode is the top 6 bits */
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UINT8 opcode = (op >> 26) & 0x3f;
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@ -228,11 +228,11 @@ static void i860_dasm_stx(const UINT32 op, char* buffer)
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static void i860_dasm_ixfr(const UINT32 op, char* buffer)
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{
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// UINT16 val = op & 0x7ff;
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// UINT8 opc = (op >> 26) & 0x3f;
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// UINT8 src2 = (op >> 21) & 0x1f;
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// UINT8 dest = (op >> 16) & 0x1f;
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// UINT8 src1 = (op >> 11) & 0x1f;
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// UINT16 val = op & 0x7ff;
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// UINT8 opc = (op >> 26) & 0x3f;
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// UINT8 src2 = (op >> 21) & 0x1f;
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// UINT8 dest = (op >> 16) & 0x1f;
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// UINT8 src1 = (op >> 11) & 0x1f;
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sprintf(buffer, "ixfr");
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}
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@ -40,26 +40,26 @@ T0 output clock
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****************************************************************************
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UPI-41/42 chips are MCS-48 derived, with some opcode changes:
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UPI-41/42 chips are MCS-48 derived, with some opcode changes:
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MCS-48 opcode UPI-41/42 opcode
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------------- ----------------
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02: OUTL BUS,A OUT DBB,A
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08: INS BUS,A <illegal>
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22: <illegal> IN DBB,A
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75: ENT0 CLK <illegal>
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80: MOVX A,@R0 <illegal>
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81: MOVX A,@R1 <illegal>
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86: JNI <dest> JOBF <dest>
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88: ORL BUS,#n <illegal>
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90: MOVX @R0,A MOV STS,A
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91: MOVX @R1,A <illegal>
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98: ANL BUS,#n <illegal>
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D6: <illegal> JNIBF <dest>
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E5: SEL MB0 EN DMA
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F5: SEL MB1 EN FLAGS
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MCS-48 opcode UPI-41/42 opcode
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------------- ----------------
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02: OUTL BUS,A OUT DBB,A
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08: INS BUS,A <illegal>
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22: <illegal> IN DBB,A
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75: ENT0 CLK <illegal>
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80: MOVX A,@R0 <illegal>
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81: MOVX A,@R1 <illegal>
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86: JNI <dest> JOBF <dest>
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88: ORL BUS,#n <illegal>
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90: MOVX @R0,A MOV STS,A
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91: MOVX @R1,A <illegal>
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98: ANL BUS,#n <illegal>
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D6: <illegal> JNIBF <dest>
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E5: SEL MB0 EN DMA
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F5: SEL MB1 EN FLAGS
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Chip numbers are similar to the MCS-48 series:
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Chip numbers are similar to the MCS-48 series:
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Chip RAM ROM I/O
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---- --- --- ---
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@ -9,13 +9,13 @@
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****************************************************************************
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To start profiling a certain section, e.g. video:
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profiler_mark(PROFILER_VIDEO);
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To start profiling a certain section, e.g. video:
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profiler_mark(PROFILER_VIDEO);
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to end profiling the current section:
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profiler_mark(PROFILER_END);
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to end profiling the current section:
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profiler_mark(PROFILER_END);
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the profiler handles a FILO list so calls may be nested.
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the profiler handles a FILO list so calls may be nested.
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***************************************************************************/
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@ -395,7 +395,7 @@ static INTERRUPT_GEN( drill_interrupt )
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/* WRONG,it does something with 60000c & 700002,likely to be called when the player throws the ball.*/
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static void irqhandler(running_machine *machine, int irq)
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{
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// cpu_set_input_line(machine->cpu[0],5,irq ? ASSERT_LINE : CLEAR_LINE);
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// cpu_set_input_line(machine->cpu[0],5,irq ? ASSERT_LINE : CLEAR_LINE);
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}
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static const ym2610_interface ym2610_config =
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@ -84,13 +84,13 @@ static WRITE16_HANDLER( main_sound_latch_w )
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static WRITE8_HANDLER( bingoc_play_w )
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{
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/*
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---- --x- sound rom banking
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---- ---x start-stop sample
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*/
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---- --x- sound rom banking
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---- ---x start-stop sample
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*/
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UINT8 *upd = memory_region(space->machine, "upd");
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memcpy(&upd[0x00000], &upd[0x20000 + (((data & 2)>>1) * 0x20000)], 0x20000);
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upd7759_start_w(0, data & 1);
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// printf("%02x\n",data);
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// printf("%02x\n",data);
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}
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static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
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@ -257,7 +257,7 @@ static VIDEO_UPDATE( bishjan )
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if (layers_ctrl & 1) tilemap_draw(bitmap,cliprect, tmap_1, 0, 0);
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if (layers_ctrl & 2) tilemap_draw(bitmap,cliprect, tmap_2, 0, 0);
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// popmessage("SCROLL: %03x,%03x - %03x,%03x DISABLE: %02x", bishjan_scroll_1_x,bishjan_scroll_1_y, bishjan_scroll_2_x,bishjan_scroll_2_y, bishjan_disable);
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// popmessage("SCROLL: %03x,%03x - %03x,%03x DISABLE: %02x", bishjan_scroll_1_x,bishjan_scroll_1_y, bishjan_scroll_2_x,bishjan_scroll_2_y, bishjan_disable);
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return 0;
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}
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@ -447,7 +447,7 @@ static WRITE8_HANDLER( saklove_outputs_w )
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break;
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}
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// popmessage("0: %02x - 1: %02x - 2: %02x - 3: %02x", saklove_outputs[0], saklove_outputs[1], saklove_outputs[2], saklove_outputs[3]);
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// popmessage("0: %02x - 1: %02x - 2: %02x - 3: %02x", saklove_outputs[0], saklove_outputs[1], saklove_outputs[2], saklove_outputs[3]);
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}
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static WRITE8_HANDLER( saklove_oki_bank_w )
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@ -102,8 +102,8 @@ static MACHINE_START( btime )
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static WRITE8_HANDLER( audio_nmi_enable_w )
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{
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/* for most games, this serves as the NMI enable for the audio CPU; however,
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lnc and disco use bit 0 of the first AY-8910's port A instead; many other
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games also write there in addition to this address */
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lnc and disco use bit 0 of the first AY-8910's port A instead; many other
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games also write there in addition to this address */
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if (audio_nmi_enable_type == AUDIO_ENABLE_DIRECT)
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{
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audio_nmi_enabled = data & 1;
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@ -3,7 +3,7 @@
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Cherry Bonus 2001 (c)2000/2001 Dyna
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Produttore Dyna
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Produttore Dyna
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N.revisione
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CPU
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@ -46,35 +46,35 @@ In test mode (c) is 2000
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const UINT8 cb2001_decryption_table[256] = {
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0xe8,xxxx,xxxx,xxxx,xxxx,0x61,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, /* 00 */
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// pppp ????
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// pppp ????
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xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, 0x32,xxxx,xxxx,xxxx,0x3a,xxxx,xxxx,0x1f, /* 10 */
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// pppp pppp ????
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// pppp pppp ????
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xxxx,0x8e,xxxx,0x0f,xxxx,0x49,0xbc,xxxx, xxxx,xxxx,xxxx,0x75,xxxx,xxxx,xxxx,xxxx, /* 20 */
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// !!!! ???? ???? ???? pppp
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// !!!! ???? ???? ???? pppp
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0x9d,xxxx,xxxx,xxxx,xxxx,xxxx,0xbe,xxxx, xxxx,xxxx,0x74,xxxx,xxxx,0xa6,0xbf,xxxx, /* 30 */
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// ???? pppp ???? ???? ????
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// ???? pppp ???? ???? ????
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xxxx,0xea,xxxx,xxxx,xxxx,0xb0,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, /* 40 */
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// !!!! gggg
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// !!!! gggg
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xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,0x42,xxxx, xxxx,xxxx,xxxx,xxxx,0xeb,xxxx,xxxx,xxxx, /* 50 */
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// ???? ????
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// ???? ????
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xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, xxxx,0xa5,xxxx,xxxx,xxxx,xxxx,0xba,xxxx, /* 60 */
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// ???? gggg
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// ???? gggg
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0xc3,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, 0x72,xxxx,0xf2,xxxx,xxxx,xxxx,xxxx,xxxx, /* 70 */
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// pppp ???? ????
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// pppp ???? ????
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xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,0x34, xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, /* 80 */
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// ????
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// ????
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xxxx,xxxx,0xe9,xxxx,xxxx,0xbe,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,0xb9,xxxx,xxxx,xxxx, /* 90 */
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// ???? ???? pppp
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// ???? ???? pppp
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xxxx,xxxx,xxxx,0x06,0xaa,0x9c,xxxx,0xb8, xxxx,xxxx,0xfc,xxxx,xxxx,xxxx,xxxx,xxxx, /* A0 */
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// ???? ???? ???? !!!! ????
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// ???? ???? ???? !!!! ????
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xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,0x1e,xxxx,0x07,0xcf, /* B0 */
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// ???? ???? ????
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// ???? ???? ????
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xxxx,xxxx,0xee,xxxx,xxxx,0xe2,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,0xa4,xxxx, /* C0 */
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// ???? pppp ????
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// ???? pppp ????
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xxxx,xxxx,0x46,xxxx,0x60,xxxx,xxxx,xxxx, 0x88,xxxx,xxxx,xxxx,xxxx,0xfa,0xc7,xxxx, /* D0 */
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// pppp ???? pppp ???? !!!!
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0x8a,xxxx,xxxx,0xc6,xxxx,xxxx,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, /* E0 */
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// ???? !!!!
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// ???? !!!!
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xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, /* F0 */
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//
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};
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@ -150,7 +150,7 @@ INPUT_PORTS_END
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static INTERRUPT_GEN( vblank_irq )
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{
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// cpu_set_input_line_and_vector(device,0,HOLD_LINE,0x08/4);
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// cpu_set_input_line_and_vector(device,0,HOLD_LINE,0x08/4);
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}
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static const nec_config cb2001_config = { cb2001_decryption_table, };
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@ -19,12 +19,12 @@ This one should be a simple project, it uses a Z80 and a Seta graphics chipset a
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There are 3 banks of dipswitches, 4,8,8. Battery backup of a 4364 cpu ram. 2 6264 video rams. All 5 eproms are 27512
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Chip checksum
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cpu $ba0d
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cha0 $2ed7
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cha1 $dc81
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cha2 $cca8
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cha3 $10d8
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Chip checksum
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cpu $ba0d
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cha0 $2ed7
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cha1 $dc81
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cha2 $cca8
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cha3 $10d8
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2 color proms for the output. will get those dumped as well.
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@ -43,7 +43,7 @@ static WRITE8_HANDLER( output_0_w )
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//---- --x- divider?
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coin_lockout_w(0,~data & 1);
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// coin_counter_w(0,~data & 1);
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// coin_counter_w(0,~data & 1);
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}
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static UINT8 hop_io,bell_io;
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@ -92,8 +92,8 @@ static INPUT_PORTS_START( cchance )
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PORT_START("SP")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Opt 1") PORT_CODE(KEYCODE_A)
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Opt 2") PORT_CODE(KEYCODE_S)
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// PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Payout") PORT_CODE(KEYCODE_D)
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// PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Hop Over") PORT_CODE(KEYCODE_F)
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// PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Payout") PORT_CODE(KEYCODE_D)
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// PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Hop Over") PORT_CODE(KEYCODE_F)
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Slottle") PORT_CODE(KEYCODE_Z)
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Drop SW") PORT_CODE(KEYCODE_H)
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Reset Key") PORT_CODE(KEYCODE_J)
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@ -100,18 +100,18 @@ static READ8_HANDLER( input_r )
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static WRITE8_HANDLER( output_w )
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{
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/*
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---- x--- refill meter [4]
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---- x--- token out meter [5]
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---- x--- token in meter [6]
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---- x--- cash out meter [7]
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---- -x-- coin out (meter) [0-3]
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---- -x-- coin lockout token [4]
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---- -x-- coin counter (meter) [5]
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---- --x- coin lockout [0-3]
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---- ---x lamp [0-6]
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*/
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---- x--- refill meter [4]
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---- x--- token out meter [5]
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---- x--- token in meter [6]
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---- x--- cash out meter [7]
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---- -x-- coin out (meter) [0-3]
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---- -x-- coin lockout token [4]
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---- -x-- coin counter (meter) [5]
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---- --x- coin lockout [0-3]
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---- ---x lamp [0-6]
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*/
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io_port[offset] = data;
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// popmessage("%02x|%02x|%02x|%02x|%02x|%02x|%02x|%02x|",io_port[0],io_port[1],io_port[2],io_port[3],io_port[4],io_port[5],io_port[6],io_port[7]);
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// popmessage("%02x|%02x|%02x|%02x|%02x|%02x|%02x|%02x|",io_port[0],io_port[1],io_port[2],io_port[3],io_port[4],io_port[5],io_port[6],io_port[7]);
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}
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static ADDRESS_MAP_START( memmap, ADDRESS_SPACE_PROGRAM, 8 )
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@ -54,8 +54,8 @@ static WRITE8_HANDLER( p2_w )
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static WRITE8_HANDLER( prog_w )
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{
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/* this is written via an out to port 4, but unless there is an 8243 port expander,
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it is more likely that the port 4 output is used to toggle the PROG line; see
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videopkr */
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it is more likely that the port 4 output is used to toggle the PROG line; see
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videopkr */
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prog = data;
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}
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@ -597,9 +597,9 @@ static WRITE8_HANDLER( dac_w )
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UINT16 dac_data = (dac_msb << 8) | data;
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/*
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The 8-bit DAC modulates the 10-bit DAC.
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Shift down to prevent clipping.
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*/
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The 8-bit DAC modulates the 10-bit DAC.
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Shift down to prevent clipping.
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*/
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dac_signed_data_16_w(0, (dac_vol * dac_data) >> 1);
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}
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}
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@ -684,8 +684,8 @@ static DRIVER_INIT( esripsys )
|
||||
memory_set_bankptr(machine, 4, &ROM[0x0000+0x8000]);
|
||||
|
||||
/* TODO: Finish me! */
|
||||
// state_save_register_global_pointer(fdt_a, FDT_RAM_SIZE);
|
||||
// state_save_register_global_pointer(fdt_b, FDT_RAM_SIZE);
|
||||
// state_save_register_global_pointer(fdt_a, FDT_RAM_SIZE);
|
||||
// state_save_register_global_pointer(fdt_b, FDT_RAM_SIZE);
|
||||
}
|
||||
|
||||
static NVRAM_HANDLER( esripsys )
|
||||
|
||||
@ -584,8 +584,8 @@
|
||||
- Added common MC6845 device interface.
|
||||
- Merged witchcrd and sloco93 machine drivers.
|
||||
- Added/corrected the 50/60 Hz. DIP switches to all games.
|
||||
The 50hz mode needs to be corrected. Some games as most bsuerte sets have
|
||||
the 50/60 Hz. DIP switch connection patched.
|
||||
The 50hz mode needs to be corrected. Some games as most bsuerte sets have
|
||||
the 50/60 Hz. DIP switch connection patched.
|
||||
|
||||
|
||||
TODO:
|
||||
|
||||
@ -161,19 +161,19 @@ static ADDRESS_MAP_START( ncb3_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0xf820, 0xf823) AM_DEVREADWRITE(PPI8255, "ppi8255_2", ppi8255_r, ppi8255_w) /* Input/Output Ports */
|
||||
AM_RANGE(0xf830, 0xf830) AM_READWRITE(ay8910_read_port_0_r,ay8910_write_port_0_w)
|
||||
AM_RANGE(0xf840, 0xf840) AM_WRITE(ay8910_control_port_0_w)
|
||||
// AM_RANGE(0xf850, 0xf850) AM_WRITE(ncb3_p1_flip_w) // need flip?
|
||||
// AM_RANGE(0xf860, 0xf860) AM_WRITE(ncb3_p2_flip_w) // need flip?
|
||||
// AM_RANGE(0xf850, 0xf850) AM_WRITE(ncb3_p1_flip_w) // need flip?
|
||||
// AM_RANGE(0xf860, 0xf860) AM_WRITE(ncb3_p2_flip_w) // need flip?
|
||||
AM_RANGE(0xf870, 0xf870) AM_WRITE(sn76496_0_w) /* guess... device is initialized, but doesn't seems to be used.*/
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( ncb3_readwriteport, ADDRESS_SPACE_IO, 8 )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
// AM_RANGE(0x00, 0x00) AM_READ(ncb3_unkread_r) // read from 0x00 when controls set1 is used...
|
||||
// AM_RANGE(0x02, 0x02) AM_READ(ncb3_unkread_r) // read from 0x02 when controls set2 is used...
|
||||
// AM_RANGE(0x06, 0x06) AM_READ(ncb3_unkread_r) // unknown...
|
||||
// AM_RANGE(0x08, 0x08) AM_READ(ncb3_unkread_r) // unknown...
|
||||
// AM_RANGE(0x00, 0x00) AM_READ(ncb3_unkread_r) // read from 0x00 when controls set1 is used...
|
||||
// AM_RANGE(0x02, 0x02) AM_READ(ncb3_unkread_r) // read from 0x02 when controls set2 is used...
|
||||
// AM_RANGE(0x06, 0x06) AM_READ(ncb3_unkread_r) // unknown...
|
||||
// AM_RANGE(0x08, 0x08) AM_READ(ncb3_unkread_r) // unknown...
|
||||
AM_RANGE(0x10, 0x10) AM_READ_PORT("DSW5") /* confirmed for ncb3 */
|
||||
// AM_RANGE(0x81, 0x81) ---> large writes.
|
||||
// AM_RANGE(0x81, 0x81) ---> large writes.
|
||||
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -3110,7 +3110,7 @@ static void do_blockswaps(UINT8* ROM)
|
||||
0x0000, 0x4800, 0x2000, 0x5000,
|
||||
0x1000, 0x7800, 0x6000, 0x3800,
|
||||
/* bit below, I'm not sure, no exact match, but only the first ones matter,
|
||||
as the is just garbage */
|
||||
as the is just garbage */
|
||||
0xc000, 0xc800, 0xd000, 0xd800,
|
||||
0xe000, 0xe800, 0xf000, 0xf800,
|
||||
0x8000, 0x8800, 0x9000, 0x9800,
|
||||
|
||||
@ -204,34 +204,34 @@ static WRITE32_HANDLER( gstream_oki_banking_w )
|
||||
{
|
||||
/* OKI BANKING (still far from perfect, based on game behaviour)
|
||||
|
||||
The two okis can indifferently play music or samples and are switched on the fly during game
|
||||
This is a preliminary table of the banks:
|
||||
The two okis can indifferently play music or samples and are switched on the fly during game
|
||||
This is a preliminary table of the banks:
|
||||
|
||||
BANK MUSIC SAMPLES
|
||||
0 X
|
||||
1 X
|
||||
2 X
|
||||
3 X
|
||||
4 X
|
||||
5 X
|
||||
6 X
|
||||
7 X
|
||||
BANK MUSIC SAMPLES
|
||||
0 X
|
||||
1 X
|
||||
2 X
|
||||
3 X
|
||||
4 X
|
||||
5 X
|
||||
6 X
|
||||
7 X
|
||||
|
||||
Two nibbles are used in this handler: (data & 0xf) and ((data >> 4) & 0xf)
|
||||
The values for the first nibble are the followings and should map the 8 oki banks:
|
||||
- 0x6, 0x7, 0x9, 0xa, 0xb, 0xd, 0xe, 0xf
|
||||
The values for the second nibble are the followings and should probably be used too:
|
||||
- 0x6, 0x9, 0xa
|
||||
Two nibbles are used in this handler: (data & 0xf) and ((data >> 4) & 0xf)
|
||||
The values for the first nibble are the followings and should map the 8 oki banks:
|
||||
- 0x6, 0x7, 0x9, 0xa, 0xb, 0xd, 0xe, 0xf
|
||||
The values for the second nibble are the followings and should probably be used too:
|
||||
- 0x6, 0x9, 0xa
|
||||
|
||||
Same values are redudant, for example:
|
||||
level 2: data = 0x99
|
||||
level 6: data = 0x99
|
||||
(this means same background music for the two levels - it could be correct, though)
|
||||
Same values are redudant, for example:
|
||||
level 2: data = 0x99
|
||||
level 6: data = 0x99
|
||||
(this means same background music for the two levels - it could be correct, though)
|
||||
|
||||
Also with current implementation, using only (data & 0xf), we have to force some values
|
||||
manually, because the correspondent places in the table are already used
|
||||
Also with current implementation, using only (data & 0xf), we have to force some values
|
||||
manually, because the correspondent places in the table are already used
|
||||
|
||||
Musics order is completely guessed but close to what the original PCB game should be */
|
||||
Musics order is completely guessed but close to what the original PCB game should be */
|
||||
|
||||
static const int bank_table_0[16] = { -1, -1, -1, -1, -1, -1, 0, 0, -1, 6, 0, 5, -1, 0, 0, 0 };
|
||||
static const int bank_table_1[16] = { -1, -1, -1, -1, -1, -1, 2, 2, -1, 0, 0, 4, -1, 1, 1, 1 };
|
||||
|
||||
@ -63,7 +63,7 @@ static VIDEO_UPDATE(jongkyo)
|
||||
// good mahjong tiles
|
||||
data3 = 0x0f; // we're missing 2 bits.. there must be another piece of video ram somewhere or we can't use all the colours (6bpp).. banked somehow?
|
||||
// good girl tiles
|
||||
// data3 = 0x00; // we're missing 2 bits.. there must be another piece of video ram somewhere or we can't use all the colours (6bpp).. banked somehow?
|
||||
// data3 = 0x00; // we're missing 2 bits.. there must be another piece of video ram somewhere or we can't use all the colours (6bpp).. banked somehow?
|
||||
|
||||
|
||||
|
||||
@ -107,7 +107,7 @@ static UINT8 mux_data;
|
||||
static WRITE8_HANDLER( mux_w )
|
||||
{
|
||||
mux_data = ~data;
|
||||
// printf("%02x\n",mux_data);
|
||||
// printf("%02x\n",mux_data);
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( jongkyo_coin_counter_w )
|
||||
@ -133,7 +133,7 @@ static READ8_HANDLER( input_1p_r )
|
||||
case 0x10: return input_port_read(space->machine, "PL1_5") | cr_clear;
|
||||
case 0x20: return input_port_read(space->machine, "PL1_6") | cr_clear;
|
||||
}
|
||||
// printf("%04x\n",mux_data);
|
||||
// printf("%04x\n",mux_data);
|
||||
|
||||
return (input_port_read(space->machine, "PL1_1") & input_port_read(space->machine, "PL1_2") & input_port_read(space->machine, "PL1_3") &
|
||||
input_port_read(space->machine, "PL1_4") & input_port_read(space->machine, "PL1_5") & input_port_read(space->machine, "PL1_6")) | cr_clear;//input_port_read(space->machine, "PL1_0") && ;
|
||||
@ -154,7 +154,7 @@ static READ8_HANDLER( input_2p_r )
|
||||
case 0x10: return input_port_read(space->machine, "PL2_5") | coin_port;
|
||||
case 0x20: return input_port_read(space->machine, "PL2_6") | coin_port;
|
||||
}
|
||||
// printf("%04x\n",mux_data);
|
||||
// printf("%04x\n",mux_data);
|
||||
|
||||
return (input_port_read(space->machine, "PL2_1") & input_port_read(space->machine, "PL2_2") & input_port_read(space->machine, "PL2_3") &
|
||||
input_port_read(space->machine, "PL2_4") & input_port_read(space->machine, "PL2_5") & input_port_read(space->machine, "PL2_6")) | coin_port;//input_port_read(space->machine, "PL1_0") && ;
|
||||
|
||||
@ -30,7 +30,7 @@
|
||||
1x 19.6608 MHz.
|
||||
|
||||
- PLDs: 1x PAL16L8ACN
|
||||
1x PALCE18V8H-25
|
||||
1x PALCE18V8H-25
|
||||
|
||||
|
||||
*******************************************************************************
|
||||
@ -136,7 +136,7 @@ static ADDRESS_MAP_START( magicard_mem, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x020002, 0x020003) AM_READ(test_r)
|
||||
AM_RANGE(0x040000, 0x05ffff) AM_RAM
|
||||
AM_RANGE(0x060000, 0x07ffff) AM_RAM AM_BASE(&blit_ram)
|
||||
// AM_RANGE(0x100000, 0x17ffff) AM_RAM AM_REGION("main", 0)
|
||||
// AM_RANGE(0x100000, 0x17ffff) AM_RAM AM_REGION("main", 0)
|
||||
AM_RANGE(0x180000, 0x1ffbff) AM_ROM AM_REGION("main", 0)
|
||||
AM_RANGE(0x1ffc00, 0x1fffff) AM_RAM
|
||||
AM_RANGE(0x260000, 0x27ffff) AM_RAM /*???*/
|
||||
@ -160,27 +160,27 @@ MACHINE_RESET( magicard )
|
||||
|
||||
static PALETTE_INIT( magicard )
|
||||
{
|
||||
/* int bit0, bit1, bit2 , r, g, b;
|
||||
int i;
|
||||
/* int bit0, bit1, bit2 , r, g, b;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < 0x100; ++i)
|
||||
{
|
||||
bit0 = (color_prom[0] >> 0) & 0x01;
|
||||
bit1 = (color_prom[0] >> 1) & 0x01;
|
||||
bit2 = (color_prom[0] >> 2) & 0x01;
|
||||
r = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
|
||||
bit0 = (color_prom[0] >> 3) & 0x01;
|
||||
bit1 = (color_prom[0] >> 4) & 0x01;
|
||||
bit2 = (color_prom[0] >> 5) & 0x01;
|
||||
g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
|
||||
bit0 = 0;
|
||||
bit1 = (color_prom[0] >> 6) & 0x01;
|
||||
bit2 = (color_prom[0] >> 7) & 0x01;
|
||||
b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
|
||||
for (i = 0; i < 0x100; ++i)
|
||||
{
|
||||
bit0 = (color_prom[0] >> 0) & 0x01;
|
||||
bit1 = (color_prom[0] >> 1) & 0x01;
|
||||
bit2 = (color_prom[0] >> 2) & 0x01;
|
||||
r = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
|
||||
bit0 = (color_prom[0] >> 3) & 0x01;
|
||||
bit1 = (color_prom[0] >> 4) & 0x01;
|
||||
bit2 = (color_prom[0] >> 5) & 0x01;
|
||||
g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
|
||||
bit0 = 0;
|
||||
bit1 = (color_prom[0] >> 6) & 0x01;
|
||||
bit2 = (color_prom[0] >> 7) & 0x01;
|
||||
b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
|
||||
|
||||
palette_set_color(machine, i, MAKE_RGB(r, g, b));
|
||||
color_prom++;
|
||||
}*/
|
||||
palette_set_color(machine, i, MAKE_RGB(r, g, b));
|
||||
color_prom++;
|
||||
}*/
|
||||
}
|
||||
|
||||
/*************************
|
||||
@ -224,13 +224,13 @@ static const gfx_layout mca_tilelayout =
|
||||
static GFXDECODE_START( magicard )
|
||||
GFXDECODE_ENTRY( "main", 0x21562, mca_charlayout, 0, 32 )
|
||||
GFXDECODE_ENTRY( "main", 0x16470, mca_tilelayout, 0, 32 )
|
||||
// GFXDECODE_ENTRY( "main", 0x22efa, mca_tilelayout, 0, 32 )
|
||||
// GFXDECODE_ENTRY( "main", 0x22efa, mca_tilelayout, 0, 32 )
|
||||
GFXDECODE_END
|
||||
|
||||
static GFXDECODE_START( magicrda )
|
||||
GFXDECODE_ENTRY( "main", 0x21562 + 0x792, mca_charlayout, 0, 32 )
|
||||
GFXDECODE_ENTRY( "main", 0x16470, mca_tilelayout, 0, 32 )
|
||||
// GFXDECODE_ENTRY( "main", 0x22efa, mca_tilelayout, 0, 32 )
|
||||
// GFXDECODE_ENTRY( "main", 0x22efa, mca_tilelayout, 0, 32 )
|
||||
GFXDECODE_END
|
||||
|
||||
|
||||
@ -250,7 +250,7 @@ static INTERRUPT_GEN( magicard_irq )
|
||||
static MACHINE_DRIVER_START( magicard )
|
||||
MDRV_CPU_ADD("main", M68000, CLOCK_A/2) /* SCC-68070 CCA84 datasheet */
|
||||
MDRV_CPU_PROGRAM_MAP(magicard_mem,0)
|
||||
// MDRV_CPU_VBLANK_INT("main", magicard_irq) /* no interrupts? (it erases the vectors..) */
|
||||
// MDRV_CPU_VBLANK_INT("main", magicard_irq) /* no interrupts? (it erases the vectors..) */
|
||||
|
||||
MDRV_SCREEN_ADD("main", RASTER)
|
||||
MDRV_SCREEN_REFRESH_RATE(60)
|
||||
@ -287,8 +287,8 @@ ROM_START( magicard )
|
||||
ROM_REGION( 0x80000, "main", 0 ) /* 68000 Code & GFX */
|
||||
ROM_LOAD16_WORD_SWAP( "magicorg.bin", 0x000000, 0x80000, CRC(810edf9f) SHA1(0f1638a789a4be7413aa019b4e198353ba9c12d9) )
|
||||
|
||||
// ROM_REGION( 0x400, "boot_prg", 0 )
|
||||
// ROM_COPY( "main", 0x00000, 0x00000, 0x400)
|
||||
// ROM_REGION( 0x400, "boot_prg", 0 )
|
||||
// ROM_COPY( "main", 0x00000, 0x00000, 0x400)
|
||||
|
||||
ROM_REGION( 0x0100, "proms", 0 ) /* Color PROM?? */
|
||||
ROM_LOAD16_WORD_SWAP("mgorigee.bin", 0x0000, 0x0100, CRC(73522889) SHA1(3e10d6c1585c3a63cff717a0b950528d5373c781) )
|
||||
@ -299,8 +299,8 @@ ROM_START( magicrda )
|
||||
ROM_LOAD16_WORD_SWAP( "mcorigg2.bin", 0x00000, 0x20000, CRC(48546aa9) SHA1(23099a5e4c9f2c3386496f6d7f5bb7d435a6fb16) )
|
||||
ROM_LOAD16_WORD_SWAP( "mcorigg1.bin", 0x20000, 0x20000, CRC(c9e4a38d) SHA1(812e5826b27c7ad98142a0f52fbdb6b61a2e31d7) )
|
||||
|
||||
// ROM_REGION( 0x400, "boot_prg", 0 )
|
||||
// ROM_COPY( "main", 0x00000, 0x00000, 0x400)
|
||||
// ROM_REGION( 0x400, "boot_prg", 0 )
|
||||
// ROM_COPY( "main", 0x00000, 0x00000, 0x400)
|
||||
|
||||
ROM_REGION( 0x0100, "proms", 0 ) /* Color PROM?? */
|
||||
ROM_LOAD("mgorigee.bin", 0x0000, 0x0100, CRC(73522889) SHA1(3e10d6c1585c3a63cff717a0b950528d5373c781) )
|
||||
|
||||
@ -49,10 +49,10 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x8001, 0x8001) AM_READ(test_r)
|
||||
AM_RANGE(0x8002, 0x8002) AM_READ_PORT("IN1")
|
||||
AM_RANGE(0x8003, 0x8003) AM_READ_PORT("IN2")
|
||||
// AM_RANGE(0x8004, 0x8004) AM_READ(test_r)
|
||||
// AM_RANGE(0x8005, 0x8005) AM_READ(test_r)
|
||||
// AM_RANGE(0x8006, 0x8006) AM_READ(test_r)
|
||||
// AM_RANGE(0x8007, 0x8007) AM_READ(test_r)
|
||||
// AM_RANGE(0x8004, 0x8004) AM_READ(test_r)
|
||||
// AM_RANGE(0x8005, 0x8005) AM_READ(test_r)
|
||||
// AM_RANGE(0x8006, 0x8006) AM_READ(test_r)
|
||||
// AM_RANGE(0x8007, 0x8007) AM_READ(test_r)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static INPUT_PORTS_START( mpoker )
|
||||
|
||||
@ -354,7 +354,7 @@ static WRITE8_HANDLER( barline_output_w )
|
||||
|
||||
static ADDRESS_MAP_START( readport_barline, ADDRESS_SPACE_IO, 8 )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
// AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
|
||||
// AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
|
||||
AM_RANGE(0x80, 0x80) AM_READ(ym3812_status_port_0_r)
|
||||
AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
|
||||
AM_RANGE(0xa0, 0xa0) AM_READ(nb1413m3_inputport1_r)
|
||||
@ -374,7 +374,7 @@ static ADDRESS_MAP_START( writeport_barline, ADDRESS_SPACE_IO, 8 )
|
||||
AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
|
||||
AM_RANGE(0xb0, 0xb0) AM_WRITE(barline_output_w)
|
||||
AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj8688_clut_w)
|
||||
// AM_RANGE(0xd0, 0xd0) AM_WRITE(DAC_0_WRITE) //not used
|
||||
// AM_RANGE(0xd0, 0xd0) AM_WRITE(DAC_0_WRITE) //not used
|
||||
AM_RANGE(0xe0, 0xe0) AM_WRITE(secolove_romsel_w)
|
||||
AM_RANGE(0xf0, 0xf0) AM_WRITE(mjsikaku_scrolly_w)
|
||||
ADDRESS_MAP_END
|
||||
@ -3063,7 +3063,7 @@ static MACHINE_DRIVER_START( barline )
|
||||
MDRV_IMPORT_FROM(mbmj_h12bit)
|
||||
MDRV_CPU_MODIFY("main")
|
||||
MDRV_CPU_IO_MAP(readport_barline, writeport_barline)
|
||||
// MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 128) // nmiclock = 60
|
||||
// MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 128) // nmiclock = 60
|
||||
|
||||
MDRV_SOUND_REPLACE("8910", YM3812, 20000000/8)
|
||||
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.70)
|
||||
|
||||
@ -253,7 +253,7 @@ static UINT8 mux_data;
|
||||
static WRITE8_HANDLER( mux_w )
|
||||
{
|
||||
mux_data = ~data;
|
||||
// printf("%02x\n",mux_data);
|
||||
// printf("%02x\n",mux_data);
|
||||
}
|
||||
|
||||
static READ8_HANDLER( input_1p_r )
|
||||
@ -271,7 +271,7 @@ static READ8_HANDLER( input_1p_r )
|
||||
case 0x10: return input_port_read(space->machine, "PL1_5") | cr_clear;
|
||||
case 0x20: return input_port_read(space->machine, "PL1_6") | cr_clear;
|
||||
}
|
||||
// printf("%04x\n",mux_data);
|
||||
// printf("%04x\n",mux_data);
|
||||
|
||||
return (input_port_read(space->machine, "PL1_1") & input_port_read(space->machine, "PL1_2") & input_port_read(space->machine, "PL1_3") &
|
||||
input_port_read(space->machine, "PL1_4") & input_port_read(space->machine, "PL1_5") & input_port_read(space->machine, "PL1_6")) | cr_clear;//input_port_read(space->machine, "PL1_0") && ;
|
||||
@ -292,7 +292,7 @@ static READ8_HANDLER( input_2p_r )
|
||||
case 0x10: return input_port_read(space->machine, "PL2_5") | coin_port;
|
||||
case 0x20: return input_port_read(space->machine, "PL2_6") | coin_port;
|
||||
}
|
||||
// printf("%04x\n",mux_data);
|
||||
// printf("%04x\n",mux_data);
|
||||
|
||||
return (input_port_read(space->machine, "PL2_1") & input_port_read(space->machine, "PL2_2") & input_port_read(space->machine, "PL2_3") &
|
||||
input_port_read(space->machine, "PL2_4") & input_port_read(space->machine, "PL2_5") & input_port_read(space->machine, "PL2_6")) | coin_port;//input_port_read(space->machine, "PL1_0") && ;
|
||||
@ -318,7 +318,7 @@ static ADDRESS_MAP_START( nightgal_io, ADDRESS_SPACE_IO, 8 )
|
||||
AM_RANGE(0x01,0x01) AM_READ(ay8910_read_port_0_r) //ay read port
|
||||
AM_RANGE(0x02,0x02) AM_WRITE(ay8910_write_port_0_w)
|
||||
AM_RANGE(0x03,0x03) AM_WRITE(ay8910_control_port_0_w)
|
||||
// AM_RANGE(0x10,0x10) AM_WRITE(output_w)
|
||||
// AM_RANGE(0x10,0x10) AM_WRITE(output_w)
|
||||
AM_RANGE(0x10,0x10) AM_READ_PORT("DSWC")
|
||||
AM_RANGE(0x11,0x11) AM_READ_PORT("SYSA")
|
||||
AM_RANGE(0x12,0x12) AM_READ_PORT("DSWA")
|
||||
@ -338,7 +338,7 @@ static ADDRESS_MAP_START( nsc_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x1100, 0x1100) AM_READWRITE(z80_latch_r,z80_latch_w) //irq control?
|
||||
AM_RANGE(0x1200, 0x1200) AM_READNOP //flip screen set bit
|
||||
AM_RANGE(0x1300, 0x130f) AM_READ(blit_vregs_r)
|
||||
// AM_RANGE(0x1000, 0xdfff) AM_ROM AM_REGION("gfx1", 0 )
|
||||
// AM_RANGE(0x1000, 0xdfff) AM_ROM AM_REGION("gfx1", 0 )
|
||||
AM_RANGE(0xe000, 0xffff) AM_ROM AM_WRITENOP
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -618,8 +618,8 @@ MACHINE_DRIVER_END
|
||||
static MACHINE_DRIVER_START( sexygal )
|
||||
/* basic machine hardware */
|
||||
MDRV_IMPORT_FROM( nightgal )
|
||||
// MDRV_CPU_MODIFY("main")
|
||||
// MDRV_CPU_VBLANK_INT("main", irq0_line_hold)
|
||||
// MDRV_CPU_MODIFY("main")
|
||||
// MDRV_CPU_VBLANK_INT("main", irq0_line_hold)
|
||||
MACHINE_DRIVER_END
|
||||
|
||||
|
||||
@ -632,23 +632,23 @@ CPU:Z80
|
||||
SND:AY-3-8910
|
||||
ETC:CUSTOM(The surface of the chip is scrached, so the name of the chip is unknown), MemoryBackup
|
||||
|
||||
NGAL_01.BIN graphic
|
||||
NGAL_02.BIN graphic
|
||||
NGAL_03.BIN graphic
|
||||
NGAL_04.BIN graphic
|
||||
NGAL_05.BIN graphic
|
||||
NGAL_06.BIN graphic
|
||||
NGAL_07.BIN graphic
|
||||
NGAL_08.BIN graphic
|
||||
NGAL_09.BIN program
|
||||
NGAL_10.BIN program
|
||||
NGAL_11.BIN program
|
||||
NGAL_12.BIN program
|
||||
NGAL_BP.BIN color
|
||||
NGAL_01.BIN graphic
|
||||
NGAL_02.BIN graphic
|
||||
NGAL_03.BIN graphic
|
||||
NGAL_04.BIN graphic
|
||||
NGAL_05.BIN graphic
|
||||
NGAL_06.BIN graphic
|
||||
NGAL_07.BIN graphic
|
||||
NGAL_08.BIN graphic
|
||||
NGAL_09.BIN program
|
||||
NGAL_10.BIN program
|
||||
NGAL_11.BIN program
|
||||
NGAL_12.BIN program
|
||||
NGAL_BP.BIN color
|
||||
|
||||
Dumped by Gastroptosis. 2000/06/04
|
||||
Dumped by Uki. 2000/06/11
|
||||
|
||||
?
|
||||
*/
|
||||
|
||||
ROM_START( nightgal )
|
||||
@ -748,14 +748,14 @@ Sexy Gal
|
||||
XG-1B (main board)
|
||||
SGP-A (sub board)
|
||||
|
||||
CPU: Z80-A
|
||||
SOUND: YM2203C
|
||||
DAC
|
||||
OSC: 20.000MHz
|
||||
10.000MHz
|
||||
6.000MHz (sub board)
|
||||
Chips: CPU? 40pin
|
||||
CPU? 40pin (sub board)
|
||||
CPU: Z80-A
|
||||
SOUND: YM2203C
|
||||
DAC
|
||||
OSC: 20.000MHz
|
||||
10.000MHz
|
||||
6.000MHz (sub board)
|
||||
Chips: CPU? 40pin
|
||||
CPU? 40pin (sub board)
|
||||
|
||||
|
||||
1.3A prg?
|
||||
@ -841,15 +841,15 @@ ROM_END
|
||||
Night Gal Summer (JPN Ver.)
|
||||
(c)1985 Nihon Bussan
|
||||
|
||||
CPU: Z80
|
||||
SOUND: AY-3-8910
|
||||
DAC
|
||||
OSC: 20.000MHz
|
||||
6.000MHz (sub board)
|
||||
CPU: Z80
|
||||
SOUND: AY-3-8910
|
||||
DAC
|
||||
OSC: 20.000MHz
|
||||
6.000MHz (sub board)
|
||||
|
||||
Chips: NG138507 (CPU?)
|
||||
Unknown 40pin
|
||||
Unknown 40pin
|
||||
Chips: NG138507 (CPU?)
|
||||
Unknown 40pin
|
||||
Unknown 40pin
|
||||
|
||||
|
||||
1S.IC7 prg./samples?
|
||||
|
||||
@ -1132,15 +1132,15 @@ The only ones with numbers are the EPROMs at 1A and 1B.
|
||||
/*
|
||||
This dump matches the already supported set, except for rom sizes:
|
||||
|
||||
1r 52201B.2R IDENTICAL
|
||||
2r 52202B.1R IDENTICAL
|
||||
nm52204.1b 52204.1B IDENTICAL
|
||||
nm52205.1a 52205.1A IDENTICAL
|
||||
2e [1/2] 52203.2E IDENTICAL
|
||||
9a 52211.9A [1/2] IDENTICAL
|
||||
9b 52210.9B [1/2] IDENTICAL
|
||||
9d 52208.9D [1/2] IDENTICAL
|
||||
9f 52206.9F [1/2] IDENTICAL
|
||||
1r 52201B.2R IDENTICAL
|
||||
2r 52202B.1R IDENTICAL
|
||||
nm52204.1b 52204.1B IDENTICAL
|
||||
nm52205.1a 52205.1A IDENTICAL
|
||||
2e [1/2] 52203.2E IDENTICAL
|
||||
9a 52211.9A [1/2] IDENTICAL
|
||||
9b 52210.9B [1/2] IDENTICAL
|
||||
9d 52208.9D [1/2] IDENTICAL
|
||||
9f 52206.9F [1/2] IDENTICAL
|
||||
*/
|
||||
#if 0
|
||||
ROM_START( dai2kaku_alt_rom_size )
|
||||
|
||||
@ -429,7 +429,7 @@ static ADDRESS_MAP_START( statusbj_io, ADDRESS_SPACE_IO, 8 )
|
||||
AM_RANGE(0xb0, 0xb0) AM_WRITE(ay8910_control_port_0_w)
|
||||
AM_RANGE(0xb1, 0xb1) AM_READWRITE(ay8910_read_port_0_r,ay8910_write_port_0_w)
|
||||
AM_RANGE(0xc0, 0xcf) AM_READWRITE(SMH_NOP, SMH_NOP) /* 9927 CRT controller? */
|
||||
// AM_RANGE(0xce,0xce) AM_READ(test_r)
|
||||
// AM_RANGE(0xce,0xce) AM_READ(test_r)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
/*some sort of "simple" protection? This is just a kludge for it,coin chuts doesn't work consistantly,
|
||||
@ -446,7 +446,7 @@ static READ8_DEVICE_HANDLER( prot_r )
|
||||
|
||||
//static WRITE8_DEVICE_HANDLER( ppi_portc_hi_w );
|
||||
//{
|
||||
// popmessage("PPI port C out: %02X", data);
|
||||
// popmessage("PPI port C out: %02X", data);
|
||||
//}
|
||||
|
||||
|
||||
@ -462,7 +462,7 @@ static const ppi8255_interface ppi8255_intf[1] =
|
||||
DEVICE8_PORT("IN2"), /* Port C read (Lower Nibble as Input) */
|
||||
NULL, /* Port A write */
|
||||
NULL, /* Port B write */
|
||||
NULL //ppi_portc_hi_w /* Port C write (High nibble as Output) */
|
||||
NULL //ppi_portc_hi_w /* Port C write (High nibble as Output) */
|
||||
}
|
||||
};
|
||||
|
||||
|
||||
@ -9,61 +9,61 @@ Landing High Japan PCB info
|
||||
Taito Landing High
|
||||
|
||||
Top board
|
||||
silkscreened TYPE-ZERO MOTHER PCB
|
||||
silkscreened TYPE-ZERO MOTHER PCB
|
||||
|
||||
stickered 298100308
|
||||
K11X0886A
|
||||
JC101
|
||||
stickered 298100308
|
||||
K11X0886A
|
||||
JC101
|
||||
|
||||
.5 29LV400BC-90 stamped E68-05-1
|
||||
.6 29LV400BC-90 stamped E68-04-1
|
||||
.24 PALV 18V8-10JC stamped E68-06
|
||||
.5 29LV400BC-90 stamped E68-05-1
|
||||
.6 29LV400BC-90 stamped E68-04-1
|
||||
.24 PALV 18V8-10JC stamped E68-06
|
||||
|
||||
|
||||
IC30 Taito TCG020AGP
|
||||
IC26 IDT7024 S35J V9928P
|
||||
IC10 IBM EMPPC603eBG-100
|
||||
IC53 ADV7120KP30 9926 F101764.1
|
||||
IC16,17 M54256V32A-10
|
||||
IC15,25,31,39,45,49,44 48D4811650GF-A10-9BT
|
||||
IC27,36 D4564163G5-A10n-9JF
|
||||
IC 41,46,42,47 D4516161AG5-A10B-9F
|
||||
IC43 QSV991-7JRI
|
||||
IC30 Taito TCG020AGP
|
||||
IC26 IDT7024 S35J V9928P
|
||||
IC10 IBM EMPPC603eBG-100
|
||||
IC53 ADV7120KP30 9926 F101764.1
|
||||
IC16,17 M54256V32A-10
|
||||
IC15,25,31,39,45,49,44 48D4811650GF-A10-9BT
|
||||
IC27,36 D4564163G5-A10n-9JF
|
||||
IC 41,46,42,47 D4516161AG5-A10B-9F
|
||||
IC43 QSV991-7JRI
|
||||
66.6667 Oscillator near IC43
|
||||
|
||||
Bottom board
|
||||
silkscreened JC101 DAUGHTER PCB
|
||||
silkscreened JC101 DAUGHTER PCB
|
||||
|
||||
stickered K91J0775A
|
||||
LANDING H.JAPAN
|
||||
stickered K91J0775A
|
||||
LANDING H.JAPAN
|
||||
|
||||
299100308
|
||||
299100308
|
||||
|
||||
M43J0741A
|
||||
LANDING H.JAPAN
|
||||
M43J0741A
|
||||
LANDING H.JAPAN
|
||||
|
||||
.14 27c1001 stickered E82
|
||||
03*
|
||||
.14 27c1001 stickered E82
|
||||
03*
|
||||
|
||||
.15 27c1001 stickered E82
|
||||
04*
|
||||
.15 27c1001 stickered E82
|
||||
04*
|
||||
|
||||
.44 PALCE16V8H stamped E82-01
|
||||
.44 PALCE16V8H stamped E82-01
|
||||
|
||||
.45 PALCE22V10H stamped E82-02
|
||||
.45 PALCE22V10H stamped E82-02
|
||||
|
||||
IC40 Toshiba TMP95C063F
|
||||
IC55 Panasonic MN89306
|
||||
IC40 Toshiba TMP95C063F
|
||||
IC55 Panasonic MN89306
|
||||
EPSON 9X5C pscillator near IC55
|
||||
IC56 HY57V161610D TC-10
|
||||
IC22 ID7133 SA70J
|
||||
IC56 HY57V161610D TC-10
|
||||
IC22 ID7133 SA70J
|
||||
25.000 oscillator near IC22
|
||||
IC11 Xilinx XC9572
|
||||
IC5 HY5118164C JC-60
|
||||
IC10 ZOOM ZSG-2
|
||||
IC20 ZOOM ZFX 2 HD 96NE2VJ
|
||||
IC26 TM TECH UA4464V T224162B-28J
|
||||
IC7 Panasonic MN1020819DA E68-01
|
||||
IC11 Xilinx XC9572
|
||||
IC5 HY5118164C JC-60
|
||||
IC10 ZOOM ZSG-2
|
||||
IC20 ZOOM ZFX 2 HD 96NE2VJ
|
||||
IC26 TM TECH UA4464V T224162B-28J
|
||||
IC7 Panasonic MN1020819DA E68-01
|
||||
20.000 oscillator near IC7
|
||||
|
||||
*/
|
||||
|
||||
@ -415,14 +415,14 @@ static WRITE8_DEVICE_HANDLER( tx1_coin_cnt_w )
|
||||
{
|
||||
coin_counter_w(0, data & 0x80);
|
||||
coin_counter_w(1, data & 0x40);
|
||||
// coin_counter_w(2, data & 0x40);
|
||||
// coin_counter_w(2, data & 0x40);
|
||||
}
|
||||
|
||||
static WRITE8_DEVICE_HANDLER( bb_coin_cnt_w )
|
||||
{
|
||||
coin_counter_w(0, data & 0x01);
|
||||
coin_counter_w(1, data & 0x02);
|
||||
// coin_counter_w(2, data & 0x04);
|
||||
// coin_counter_w(2, data & 0x04);
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( tx1_ppi_latch_w )
|
||||
|
||||
@ -28,7 +28,7 @@ UPPER:
|
||||
8-way DIP switch
|
||||
574200D x4
|
||||
PAL palce24v10 x2 (next to the i860)
|
||||
Bt476 RAMDAC
|
||||
Bt476 RAMDAC
|
||||
|
||||
LOWER:
|
||||
Motorola MC68000P12 x2
|
||||
@ -87,14 +87,14 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x300000, 0x3fffff) AM_RAM AM_BASE(&framebuffer) AM_SHARE(1)
|
||||
|
||||
AM_RANGE(0x400000, 0x43ffff) AM_RAM AM_BASE(&vid_0_shared_RAM) AM_SHARE(2) /* First i860 shared RAM */
|
||||
// AM_RANGE(0x440000, 0x440003) i860 #1 com 1
|
||||
// AM_RANGE(0x480000, 0x480003) i860 #1 com 2
|
||||
// AM_RANGE(0x4c0000, 0x4c0003) i860 #1 stop/start/reset
|
||||
// AM_RANGE(0x440000, 0x440003) i860 #1 com 1
|
||||
// AM_RANGE(0x480000, 0x480003) i860 #1 com 2
|
||||
// AM_RANGE(0x4c0000, 0x4c0003) i860 #1 stop/start/reset
|
||||
|
||||
AM_RANGE(0x500000, 0x53ffff) AM_RAM AM_BASE(&vid_1_shared_RAM) AM_SHARE(3) /* Second i860 shared RAM */
|
||||
// AM_RANGE(0x540000, 0x540003) i860 #2 com 1
|
||||
// AM_RANGE(0x580000, 0x580003) i860 #2 com 2
|
||||
// AM_RANGE(0x5c0000, 0x5c0003) i860 #2 stop/start/reset
|
||||
// AM_RANGE(0x540000, 0x540003) i860 #2 com 1
|
||||
// AM_RANGE(0x580000, 0x580003) i860 #2 com 2
|
||||
// AM_RANGE(0x5c0000, 0x5c0003) i860 #2 stop/start/reset
|
||||
|
||||
AM_RANGE(0x706000, 0x70601f) AM_READWRITE(tlc34076_lsb_r, tlc34076_lsb_w)
|
||||
ADDRESS_MAP_END
|
||||
@ -103,9 +103,9 @@ ADDRESS_MAP_END
|
||||
/* The first i860 - middle board */
|
||||
static ADDRESS_MAP_START( vid_0_map, ADDRESS_SPACE_PROGRAM, 32 )
|
||||
AM_RANGE(0x00000000, 0x000fffff) AM_RAM AM_SHARE(1) /* Shared framebuffer */
|
||||
// AM_RANGE(0x20000000, 0x20000003) com 1 (0x440000 in 68k-land)
|
||||
// AM_RANGE(0x40000000, 0x401fffff) AM_ROM /* 3d data ROMs */
|
||||
// AM_RANGE(0x80000000, 0x80000003) com 2 (0x480000 in 68k-land)
|
||||
// AM_RANGE(0x20000000, 0x20000003) com 1 (0x440000 in 68k-land)
|
||||
// AM_RANGE(0x40000000, 0x401fffff) AM_ROM /* 3d data ROMs */
|
||||
// AM_RANGE(0x80000000, 0x80000003) com 2 (0x480000 in 68k-land)
|
||||
AM_RANGE(0xfffc0000, 0xffffffff) AM_RAM AM_SHARE(2) /* Shared RAM with main */
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -113,16 +113,16 @@ ADDRESS_MAP_END
|
||||
/* The second i860 - top board */
|
||||
static ADDRESS_MAP_START( vid_1_map, ADDRESS_SPACE_PROGRAM, 32 )
|
||||
AM_RANGE(0x00000000, 0x000fffff) AM_RAM AM_SHARE(1) /* Shared framebuffer */
|
||||
// AM_RANGE(0x20000000, 0x20000003) com 1 (0x540000 in 68k-land)
|
||||
// AM_RANGE(0x40000000, 0x401fffff) AM_ROM /* 3d data ROMs */
|
||||
// AM_RANGE(0x80000000, 0x80000003) com 2 (0x580000 in 68k-land)
|
||||
// AM_RANGE(0x20000000, 0x20000003) com 1 (0x540000 in 68k-land)
|
||||
// AM_RANGE(0x40000000, 0x401fffff) AM_ROM /* 3d data ROMs */
|
||||
// AM_RANGE(0x80000000, 0x80000003) com 2 (0x580000 in 68k-land)
|
||||
AM_RANGE(0xfffc0000, 0xffffffff) AM_RAM AM_SHARE(3) /* Shared RAM with main */
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
/* Sound CPU - temprarily disabled */
|
||||
//static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
// AM_RANGE(0x000000, 0x03ffff) AM_ROM
|
||||
// AM_RANGE(0x000000, 0x03ffff) AM_ROM
|
||||
//ADDRESS_MAP_END
|
||||
|
||||
|
||||
|
||||
@ -30,7 +30,7 @@ static TILE_GET_INFO( goodejan_bg_tile_info )
|
||||
|
||||
// WRONG!
|
||||
tile|= (goodejan_bgvram[tile_index]&0x8000)>>3;
|
||||
// if ((goodejan_bgvram[tile_index]&0x8000)==0x0000) tile+=0x1000;
|
||||
// if ((goodejan_bgvram[tile_index]&0x8000)==0x0000) tile+=0x1000;
|
||||
|
||||
SET_TILE_INFO(1, tile, color, 0);
|
||||
}
|
||||
|
||||
@ -545,7 +545,7 @@ VIDEO_UPDATE( macross )
|
||||
|
||||
VIDEO_UPDATE( tdragon )
|
||||
{
|
||||
// mcu_run(screen->machine, 1);
|
||||
// mcu_run(screen->machine, 1);
|
||||
|
||||
tilemap_set_scrollx(tx_tilemap,0,-videoshift);
|
||||
|
||||
@ -562,7 +562,7 @@ VIDEO_UPDATE( tdragon )
|
||||
|
||||
VIDEO_UPDATE( hachamf )
|
||||
{
|
||||
// mcu_run(screen->machine, 0);
|
||||
// mcu_run(screen->machine, 0);
|
||||
|
||||
tilemap_set_scrollx(tx_tilemap,0,-videoshift);
|
||||
|
||||
|
||||
@ -9,4 +9,4 @@
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
const char build_version[] = "0.128u7 ("__DATE__")";
|
||||
const char build_version[] = "0.129 ("__DATE__")";
|
||||
|
||||
Loading…
Reference in New Issue
Block a user